2 * Copyright (C) 2014 Free Electrons
4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/err.h>
13 #include <linux/export.h>
14 #include <linux/mtd/rawnand.h>
16 #define ONFI_DYN_TIMING_MAX U16_MAX
18 static const struct nand_data_interface onfi_sdr_timings[] = {
21 .type = NAND_SDR_IFACE,
52 .tRST_max = 250000000000ULL,
63 .type = NAND_SDR_IFACE,
94 .tRST_max = 500000000,
105 .type = NAND_SDR_IFACE,
124 .tFEAT_max = 1000000,
135 .tRST_max = 500000000,
147 .type = NAND_SDR_IFACE,
166 .tFEAT_max = 1000000,
178 .tRST_max = 500000000,
189 .type = NAND_SDR_IFACE,
208 .tFEAT_max = 1000000,
220 .tRST_max = 500000000,
231 .type = NAND_SDR_IFACE,
250 .tFEAT_max = 1000000,
262 .tRST_max = 500000000,
274 * onfi_async_timing_mode_to_sdr_timings - [NAND Interface] Retrieve NAND
275 * timings according to the given ONFI timing mode
276 * @mode: ONFI timing mode
278 const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode)
280 if (mode < 0 || mode >= ARRAY_SIZE(onfi_sdr_timings))
281 return ERR_PTR(-EINVAL);
283 return &onfi_sdr_timings[mode].timings.sdr;
285 EXPORT_SYMBOL(onfi_async_timing_mode_to_sdr_timings);
288 * onfi_fill_data_interface - [NAND Interface] Initialize a data interface from
290 * @mode: The ONFI timing mode
292 int onfi_fill_data_interface(struct nand_chip *chip,
293 enum nand_data_interface_type type,
296 struct nand_data_interface *iface = &chip->data_interface;
297 struct onfi_params *onfi = chip->parameters.onfi;
299 if (type != NAND_SDR_IFACE)
302 if (timing_mode < 0 || timing_mode >= ARRAY_SIZE(onfi_sdr_timings))
305 *iface = onfi_sdr_timings[timing_mode];
308 * Initialize timings that cannot be deduced from timing mode:
309 * tPROG, tBERS, tR and tCCS.
310 * These information are part of the ONFI parameter page.
313 struct nand_sdr_timings *timings = &iface->timings.sdr;
315 /* microseconds -> picoseconds */
316 timings->tPROG_max = 1000000ULL * onfi->tPROG;
317 timings->tBERS_max = 1000000ULL * onfi->tBERS;
318 timings->tR_max = 1000000ULL * onfi->tR;
320 /* nanoseconds -> picoseconds */
321 timings->tCCS_min = 1000UL * onfi->tCCS;
323 struct nand_sdr_timings *timings = &iface->timings.sdr;
325 * For non-ONFI chips we use the highest possible value for
326 * tPROG and tBERS. tR and tCCS will take the default values
327 * precised in the ONFI specification for timing mode 0,
328 * respectively 200us and 500ns.
331 /* microseconds -> picoseconds */
332 timings->tPROG_max = 1000000ULL * ONFI_DYN_TIMING_MAX;
333 timings->tBERS_max = 1000000ULL * ONFI_DYN_TIMING_MAX;
334 timings->tR_max = 1000000ULL * 200000000ULL;
336 /* nanoseconds -> picoseconds */
337 timings->tCCS_min = 1000UL * 500000;
342 EXPORT_SYMBOL(onfi_fill_data_interface);