2 * Common Flash Interface support:
3 * Intel Extended Vendor Command Set (ID 0x0001)
5 * (C) 2000 Red Hat. GPL'd
7 * $Id: cfi_cmdset_0001.c,v 1.173 2005/03/30 23:57:30 tpoynor Exp $
10 * 10/10/2000 Nicolas Pitre <nico@cam.org>
11 * - completely revamped method functions so they are aware and
12 * independent of the flash geometry (buswidth, interleave, etc.)
13 * - scalability vs code size is completely set at compile-time
14 * (see include/linux/mtd/cfi.h for selection)
15 * - optimized write buffer method
16 * 02/05/2002 Christopher Hoover <ch@hpl.hp.com>/<ch@murgatroid.com>
17 * - reworked lock/unlock/erase support for var size flash
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/init.h>
26 #include <asm/byteorder.h>
28 #include <linux/errno.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/mtd/xip.h>
33 #include <linux/mtd/map.h>
34 #include <linux/mtd/mtd.h>
35 #include <linux/mtd/compatmac.h>
36 #include <linux/mtd/cfi.h>
38 /* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */
39 /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
41 // debugging, turns off buffer write mode if set to 1
42 #define FORCE_WORD_WRITE 0
44 #define MANUFACTURER_INTEL 0x0089
45 #define I82802AB 0x00ad
46 #define I82802AC 0x00ac
47 #define MANUFACTURER_ST 0x0020
48 #define M50LPW080 0x002F
50 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
51 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
52 static int cfi_intelext_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
53 static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *);
54 static void cfi_intelext_sync (struct mtd_info *);
55 static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len);
56 static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, size_t len);
58 static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
59 static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
60 static int cfi_intelext_write_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
61 static int cfi_intelext_lock_user_prot_reg (struct mtd_info *, loff_t, size_t);
62 static int cfi_intelext_get_fact_prot_info (struct mtd_info *,
63 struct otp_info *, size_t);
64 static int cfi_intelext_get_user_prot_info (struct mtd_info *,
65 struct otp_info *, size_t);
67 static int cfi_intelext_suspend (struct mtd_info *);
68 static void cfi_intelext_resume (struct mtd_info *);
70 static void cfi_intelext_destroy(struct mtd_info *);
72 struct mtd_info *cfi_cmdset_0001(struct map_info *, int);
74 static struct mtd_info *cfi_intelext_setup (struct mtd_info *);
75 static int cfi_intelext_partition_fixup(struct mtd_info *, struct cfi_private **);
77 static int cfi_intelext_point (struct mtd_info *mtd, loff_t from, size_t len,
78 size_t *retlen, u_char **mtdbuf);
79 static void cfi_intelext_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from,
82 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
83 static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr);
89 * *********** SETUP AND PROBE BITS ***********
92 static struct mtd_chip_driver cfi_intelext_chipdrv = {
93 .probe = NULL, /* Not usable directly */
94 .destroy = cfi_intelext_destroy,
95 .name = "cfi_cmdset_0001",
99 /* #define DEBUG_LOCK_BITS */
100 /* #define DEBUG_CFI_FEATURES */
102 #ifdef DEBUG_CFI_FEATURES
103 static void cfi_tell_features(struct cfi_pri_intelext *extp)
106 printk(" Feature/Command Support: %4.4X\n", extp->FeatureSupport);
107 printk(" - Chip Erase: %s\n", extp->FeatureSupport&1?"supported":"unsupported");
108 printk(" - Suspend Erase: %s\n", extp->FeatureSupport&2?"supported":"unsupported");
109 printk(" - Suspend Program: %s\n", extp->FeatureSupport&4?"supported":"unsupported");
110 printk(" - Legacy Lock/Unlock: %s\n", extp->FeatureSupport&8?"supported":"unsupported");
111 printk(" - Queued Erase: %s\n", extp->FeatureSupport&16?"supported":"unsupported");
112 printk(" - Instant block lock: %s\n", extp->FeatureSupport&32?"supported":"unsupported");
113 printk(" - Protection Bits: %s\n", extp->FeatureSupport&64?"supported":"unsupported");
114 printk(" - Page-mode read: %s\n", extp->FeatureSupport&128?"supported":"unsupported");
115 printk(" - Synchronous read: %s\n", extp->FeatureSupport&256?"supported":"unsupported");
116 printk(" - Simultaneous operations: %s\n", extp->FeatureSupport&512?"supported":"unsupported");
117 for (i=10; i<32; i++) {
118 if (extp->FeatureSupport & (1<<i))
119 printk(" - Unknown Bit %X: supported\n", i);
122 printk(" Supported functions after Suspend: %2.2X\n", extp->SuspendCmdSupport);
123 printk(" - Program after Erase Suspend: %s\n", extp->SuspendCmdSupport&1?"supported":"unsupported");
124 for (i=1; i<8; i++) {
125 if (extp->SuspendCmdSupport & (1<<i))
126 printk(" - Unknown Bit %X: supported\n", i);
129 printk(" Block Status Register Mask: %4.4X\n", extp->BlkStatusRegMask);
130 printk(" - Lock Bit Active: %s\n", extp->BlkStatusRegMask&1?"yes":"no");
131 printk(" - Valid Bit Active: %s\n", extp->BlkStatusRegMask&2?"yes":"no");
132 for (i=2; i<16; i++) {
133 if (extp->BlkStatusRegMask & (1<<i))
134 printk(" - Unknown Bit %X Active: yes\n",i);
137 printk(" Vcc Logic Supply Optimum Program/Erase Voltage: %d.%d V\n",
138 extp->VccOptimal >> 4, extp->VccOptimal & 0xf);
139 if (extp->VppOptimal)
140 printk(" Vpp Programming Supply Optimum Program/Erase Voltage: %d.%d V\n",
141 extp->VppOptimal >> 4, extp->VppOptimal & 0xf);
145 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
146 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
147 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
149 struct map_info *map = mtd->priv;
150 struct cfi_private *cfi = map->fldrv_priv;
151 struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
153 printk(KERN_WARNING "cfi_cmdset_0001: Suspend "
154 "erase on write disabled.\n");
155 extp->SuspendCmdSupport &= ~1;
159 #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
160 static void fixup_no_write_suspend(struct mtd_info *mtd, void* param)
162 struct map_info *map = mtd->priv;
163 struct cfi_private *cfi = map->fldrv_priv;
164 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
166 if (cfip && (cfip->FeatureSupport&4)) {
167 cfip->FeatureSupport &= ~4;
168 printk(KERN_WARNING "cfi_cmdset_0001: write suspend disabled\n");
173 static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param)
175 struct map_info *map = mtd->priv;
176 struct cfi_private *cfi = map->fldrv_priv;
178 cfi->cfiq->BufWriteTimeoutTyp = 0; /* Not supported */
179 cfi->cfiq->BufWriteTimeoutMax = 0; /* Not supported */
182 static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param)
184 struct map_info *map = mtd->priv;
185 struct cfi_private *cfi = map->fldrv_priv;
187 /* Note this is done after the region info is endian swapped */
188 cfi->cfiq->EraseRegionInfo[1] =
189 (cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e;
192 static void fixup_use_point(struct mtd_info *mtd, void *param)
194 struct map_info *map = mtd->priv;
195 if (!mtd->point && map_is_linear(map)) {
196 mtd->point = cfi_intelext_point;
197 mtd->unpoint = cfi_intelext_unpoint;
201 static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
203 struct map_info *map = mtd->priv;
204 struct cfi_private *cfi = map->fldrv_priv;
205 if (cfi->cfiq->BufWriteTimeoutTyp) {
206 printk(KERN_INFO "Using buffer write method\n" );
207 mtd->write = cfi_intelext_write_buffers;
211 static struct cfi_fixup cfi_fixup_table[] = {
212 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
213 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
215 #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
216 { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend, NULL },
218 #if !FORCE_WORD_WRITE
219 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL },
221 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL },
222 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL },
226 static struct cfi_fixup jedec_fixup_table[] = {
227 { MANUFACTURER_INTEL, I82802AB, fixup_use_fwh_lock, NULL, },
228 { MANUFACTURER_INTEL, I82802AC, fixup_use_fwh_lock, NULL, },
229 { MANUFACTURER_ST, M50LPW080, fixup_use_fwh_lock, NULL, },
232 static struct cfi_fixup fixup_table[] = {
233 /* The CFI vendor ids and the JEDEC vendor IDs appear
234 * to be common. It is like the devices id's are as
235 * well. This table is to pick all cases where
236 * we know that is the case.
238 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point, NULL },
242 static inline struct cfi_pri_intelext *
243 read_pri_intelext(struct map_info *map, __u16 adr)
245 struct cfi_pri_intelext *extp;
246 unsigned int extp_size = sizeof(*extp);
249 extp = (struct cfi_pri_intelext *)cfi_read_pri(map, adr, extp_size, "Intel/Sharp");
253 /* Do some byteswapping if necessary */
254 extp->FeatureSupport = le32_to_cpu(extp->FeatureSupport);
255 extp->BlkStatusRegMask = le16_to_cpu(extp->BlkStatusRegMask);
256 extp->ProtRegAddr = le16_to_cpu(extp->ProtRegAddr);
258 if (extp->MajorVersion == '1' && extp->MinorVersion == '3') {
259 unsigned int extra_size = 0;
262 /* Protection Register info */
263 extra_size += (extp->NumProtectionFields - 1) *
264 sizeof(struct cfi_intelext_otpinfo);
266 /* Burst Read info */
269 /* Number of hardware-partitions */
271 if (extp_size < sizeof(*extp) + extra_size)
273 nb_parts = extp->extra[extra_size - 1];
275 for (i = 0; i < nb_parts; i++) {
276 struct cfi_intelext_regioninfo *rinfo;
277 rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[extra_size];
278 extra_size += sizeof(*rinfo);
279 if (extp_size < sizeof(*extp) + extra_size)
281 rinfo->NumIdentPartitions=le16_to_cpu(rinfo->NumIdentPartitions);
282 extra_size += (rinfo->NumBlockTypes - 1)
283 * sizeof(struct cfi_intelext_blockinfo);
286 if (extp_size < sizeof(*extp) + extra_size) {
288 extp_size = sizeof(*extp) + extra_size;
290 if (extp_size > 4096) {
292 "%s: cfi_pri_intelext is too fat\n",
303 /* This routine is made available to other mtd code via
304 * inter_module_register. It must only be accessed through
305 * inter_module_get which will bump the use count of this module. The
306 * addresses passed back in cfi are valid as long as the use count of
307 * this module is non-zero, i.e. between inter_module_get and
308 * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
310 struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
312 struct cfi_private *cfi = map->fldrv_priv;
313 struct mtd_info *mtd;
316 mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
318 printk(KERN_ERR "Failed to allocate memory for MTD device\n");
321 memset(mtd, 0, sizeof(*mtd));
323 mtd->type = MTD_NORFLASH;
325 /* Fill in the default mtd operations */
326 mtd->erase = cfi_intelext_erase_varsize;
327 mtd->read = cfi_intelext_read;
328 mtd->write = cfi_intelext_write_words;
329 mtd->sync = cfi_intelext_sync;
330 mtd->lock = cfi_intelext_lock;
331 mtd->unlock = cfi_intelext_unlock;
332 mtd->suspend = cfi_intelext_suspend;
333 mtd->resume = cfi_intelext_resume;
334 mtd->flags = MTD_CAP_NORFLASH;
335 mtd->name = map->name;
337 if (cfi->cfi_mode == CFI_MODE_CFI) {
339 * It's a real CFI chip, not one for which the probe
340 * routine faked a CFI structure. So we read the feature
343 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
344 struct cfi_pri_intelext *extp;
346 extp = read_pri_intelext(map, adr);
352 /* Install our own private info structure */
353 cfi->cmdset_priv = extp;
355 cfi_fixup(mtd, cfi_fixup_table);
357 #ifdef DEBUG_CFI_FEATURES
358 /* Tell the user about it in lots of lovely detail */
359 cfi_tell_features(extp);
362 if(extp->SuspendCmdSupport & 1) {
363 printk(KERN_NOTICE "cfi_cmdset_0001: Erase suspend on write enabled\n");
366 else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
367 /* Apply jedec specific fixups */
368 cfi_fixup(mtd, jedec_fixup_table);
370 /* Apply generic fixups */
371 cfi_fixup(mtd, fixup_table);
373 for (i=0; i< cfi->numchips; i++) {
374 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
375 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
376 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
377 cfi->chips[i].ref_point_counter = 0;
380 map->fldrv = &cfi_intelext_chipdrv;
382 return cfi_intelext_setup(mtd);
385 static struct mtd_info *cfi_intelext_setup(struct mtd_info *mtd)
387 struct map_info *map = mtd->priv;
388 struct cfi_private *cfi = map->fldrv_priv;
389 unsigned long offset = 0;
391 unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
393 //printk(KERN_DEBUG "number of CFI chips: %d\n", cfi->numchips);
395 mtd->size = devsize * cfi->numchips;
397 mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
398 mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info)
399 * mtd->numeraseregions, GFP_KERNEL);
400 if (!mtd->eraseregions) {
401 printk(KERN_ERR "Failed to allocate memory for MTD erase region info\n");
405 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
406 unsigned long ernum, ersize;
407 ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
408 ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
410 if (mtd->erasesize < ersize) {
411 mtd->erasesize = ersize;
413 for (j=0; j<cfi->numchips; j++) {
414 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
415 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
416 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
418 offset += (ersize * ernum);
421 if (offset != devsize) {
423 printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
427 for (i=0; i<mtd->numeraseregions;i++){
428 printk(KERN_DEBUG "%d: offset=0x%x,size=0x%x,blocks=%d\n",
429 i,mtd->eraseregions[i].offset,
430 mtd->eraseregions[i].erasesize,
431 mtd->eraseregions[i].numblocks);
434 #ifdef CONFIG_MTD_OTP
435 mtd->read_fact_prot_reg = cfi_intelext_read_fact_prot_reg;
436 mtd->read_user_prot_reg = cfi_intelext_read_user_prot_reg;
437 mtd->write_user_prot_reg = cfi_intelext_write_user_prot_reg;
438 mtd->lock_user_prot_reg = cfi_intelext_lock_user_prot_reg;
439 mtd->get_fact_prot_info = cfi_intelext_get_fact_prot_info;
440 mtd->get_user_prot_info = cfi_intelext_get_user_prot_info;
443 /* This function has the potential to distort the reality
444 a bit and therefore should be called last. */
445 if (cfi_intelext_partition_fixup(mtd, &cfi) != 0)
448 __module_get(THIS_MODULE);
453 if(mtd->eraseregions)
454 kfree(mtd->eraseregions);
457 kfree(cfi->cmdset_priv);
461 static int cfi_intelext_partition_fixup(struct mtd_info *mtd,
462 struct cfi_private **pcfi)
464 struct map_info *map = mtd->priv;
465 struct cfi_private *cfi = *pcfi;
466 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
469 * Probing of multi-partition flash ships.
471 * To support multiple partitions when available, we simply arrange
472 * for each of them to have their own flchip structure even if they
473 * are on the same physical chip. This means completely recreating
474 * a new cfi_private structure right here which is a blatent code
475 * layering violation, but this is still the least intrusive
476 * arrangement at this point. This can be rearranged in the future
477 * if someone feels motivated enough. --nico
479 if (extp && extp->MajorVersion == '1' && extp->MinorVersion == '3'
480 && extp->FeatureSupport & (1 << 9)) {
481 struct cfi_private *newcfi;
483 struct flchip_shared *shared;
484 int offs, numregions, numparts, partshift, numvirtchips, i, j;
486 /* Protection Register info */
487 offs = (extp->NumProtectionFields - 1) *
488 sizeof(struct cfi_intelext_otpinfo);
490 /* Burst Read info */
493 /* Number of partition regions */
494 numregions = extp->extra[offs];
497 /* Number of hardware partitions */
499 for (i = 0; i < numregions; i++) {
500 struct cfi_intelext_regioninfo *rinfo;
501 rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[offs];
502 numparts += rinfo->NumIdentPartitions;
503 offs += sizeof(*rinfo)
504 + (rinfo->NumBlockTypes - 1) *
505 sizeof(struct cfi_intelext_blockinfo);
509 * All functions below currently rely on all chips having
510 * the same geometry so we'll just assume that all hardware
511 * partitions are of the same size too.
513 partshift = cfi->chipshift - __ffs(numparts);
515 if ((1 << partshift) < mtd->erasesize) {
517 "%s: bad number of hw partitions (%d)\n",
518 __FUNCTION__, numparts);
522 numvirtchips = cfi->numchips * numparts;
523 newcfi = kmalloc(sizeof(struct cfi_private) + numvirtchips * sizeof(struct flchip), GFP_KERNEL);
526 shared = kmalloc(sizeof(struct flchip_shared) * cfi->numchips, GFP_KERNEL);
531 memcpy(newcfi, cfi, sizeof(struct cfi_private));
532 newcfi->numchips = numvirtchips;
533 newcfi->chipshift = partshift;
535 chip = &newcfi->chips[0];
536 for (i = 0; i < cfi->numchips; i++) {
537 shared[i].writing = shared[i].erasing = NULL;
538 spin_lock_init(&shared[i].lock);
539 for (j = 0; j < numparts; j++) {
540 *chip = cfi->chips[i];
541 chip->start += j << partshift;
542 chip->priv = &shared[i];
543 /* those should be reset too since
544 they create memory references. */
545 init_waitqueue_head(&chip->wq);
546 spin_lock_init(&chip->_spinlock);
547 chip->mutex = &chip->_spinlock;
552 printk(KERN_DEBUG "%s: %d set(s) of %d interleaved chips "
553 "--> %d partitions of %d KiB\n",
554 map->name, cfi->numchips, cfi->interleave,
555 newcfi->numchips, 1<<(newcfi->chipshift-10));
557 map->fldrv_priv = newcfi;
566 * *********** CHIP ACCESS FUNCTIONS ***********
569 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
571 DECLARE_WAITQUEUE(wait, current);
572 struct cfi_private *cfi = map->fldrv_priv;
573 map_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01);
575 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
578 timeo = jiffies + HZ;
580 if (chip->priv && (mode == FL_WRITING || mode == FL_ERASING || mode == FL_OTP_WRITE)) {
582 * OK. We have possibility for contension on the write/erase
583 * operations which are global to the real chip and not per
584 * partition. So let's fight it over in the partition which
585 * currently has authority on the operation.
587 * The rules are as follows:
589 * - any write operation must own shared->writing.
591 * - any erase operation must own _both_ shared->writing and
594 * - contension arbitration is handled in the owner's context.
596 * The 'shared' struct can be read when its lock is taken.
597 * However any writes to it can only be made when the current
598 * owner's lock is also held.
600 struct flchip_shared *shared = chip->priv;
601 struct flchip *contender;
602 spin_lock(&shared->lock);
603 contender = shared->writing;
604 if (contender && contender != chip) {
606 * The engine to perform desired operation on this
607 * partition is already in use by someone else.
608 * Let's fight over it in the context of the chip
609 * currently using it. If it is possible to suspend,
610 * that other partition will do just that, otherwise
611 * it'll happily send us to sleep. In any case, when
612 * get_chip returns success we're clear to go ahead.
614 int ret = spin_trylock(contender->mutex);
615 spin_unlock(&shared->lock);
618 spin_unlock(chip->mutex);
619 ret = get_chip(map, contender, contender->start, mode);
620 spin_lock(chip->mutex);
622 spin_unlock(contender->mutex);
625 timeo = jiffies + HZ;
626 spin_lock(&shared->lock);
630 shared->writing = chip;
631 if (mode == FL_ERASING)
632 shared->erasing = chip;
633 if (contender && contender != chip)
634 spin_unlock(contender->mutex);
635 spin_unlock(&shared->lock);
638 switch (chip->state) {
642 status = map_read(map, adr);
643 if (map_word_andequal(map, status, status_OK, status_OK))
646 /* At this point we're fine with write operations
647 in other partitions as they don't conflict. */
648 if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS))
651 if (time_after(jiffies, timeo)) {
652 printk(KERN_ERR "Waiting for chip to be ready timed out. Status %lx\n",
656 spin_unlock(chip->mutex);
658 spin_lock(chip->mutex);
659 /* Someone else might have been playing with it. */
670 !(cfip->FeatureSupport & 2) ||
671 !(mode == FL_READY || mode == FL_POINT ||
672 (mode == FL_WRITING && (cfip->SuspendCmdSupport & 1))))
677 map_write(map, CMD(0xB0), adr);
679 /* If the flash has finished erasing, then 'erase suspend'
680 * appears to make some (28F320) flash devices switch to
681 * 'read' mode. Make sure that we switch to 'read status'
682 * mode so we get the right data. --rmk
684 map_write(map, CMD(0x70), adr);
685 chip->oldstate = FL_ERASING;
686 chip->state = FL_ERASE_SUSPENDING;
687 chip->erase_suspended = 1;
689 status = map_read(map, adr);
690 if (map_word_andequal(map, status, status_OK, status_OK))
693 if (time_after(jiffies, timeo)) {
694 /* Urgh. Resume and pretend we weren't here. */
695 map_write(map, CMD(0xd0), adr);
696 /* Make sure we're in 'read status' mode if it had finished */
697 map_write(map, CMD(0x70), adr);
698 chip->state = FL_ERASING;
699 chip->oldstate = FL_READY;
700 printk(KERN_ERR "Chip not ready after erase "
701 "suspended: status = 0x%lx\n", status.x[0]);
705 spin_unlock(chip->mutex);
707 spin_lock(chip->mutex);
708 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
709 So we can just loop here. */
711 chip->state = FL_STATUS;
714 case FL_XIP_WHILE_ERASING:
715 if (mode != FL_READY && mode != FL_POINT &&
716 (mode != FL_WRITING || !cfip || !(cfip->SuspendCmdSupport&1)))
718 chip->oldstate = chip->state;
719 chip->state = FL_READY;
723 /* Only if there's no operation suspended... */
724 if (mode == FL_READY && chip->oldstate == FL_READY)
729 set_current_state(TASK_UNINTERRUPTIBLE);
730 add_wait_queue(&chip->wq, &wait);
731 spin_unlock(chip->mutex);
733 remove_wait_queue(&chip->wq, &wait);
734 spin_lock(chip->mutex);
739 static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr)
741 struct cfi_private *cfi = map->fldrv_priv;
744 struct flchip_shared *shared = chip->priv;
745 spin_lock(&shared->lock);
746 if (shared->writing == chip && chip->oldstate == FL_READY) {
747 /* We own the ability to write, but we're done */
748 shared->writing = shared->erasing;
749 if (shared->writing && shared->writing != chip) {
750 /* give back ownership to who we loaned it from */
751 struct flchip *loaner = shared->writing;
752 spin_lock(loaner->mutex);
753 spin_unlock(&shared->lock);
754 spin_unlock(chip->mutex);
755 put_chip(map, loaner, loaner->start);
756 spin_lock(chip->mutex);
757 spin_unlock(loaner->mutex);
761 shared->erasing = NULL;
762 shared->writing = NULL;
763 } else if (shared->erasing == chip && shared->writing != chip) {
765 * We own the ability to erase without the ability
766 * to write, which means the erase was suspended
767 * and some other partition is currently writing.
768 * Don't let the switch below mess things up since
769 * we don't have ownership to resume anything.
771 spin_unlock(&shared->lock);
775 spin_unlock(&shared->lock);
778 switch(chip->oldstate) {
780 chip->state = chip->oldstate;
781 /* What if one interleaved chip has finished and the
782 other hasn't? The old code would leave the finished
783 one in READY mode. That's bad, and caused -EROFS
784 errors to be returned from do_erase_oneblock because
785 that's the only bit it checked for at the time.
786 As the state machine appears to explicitly allow
787 sending the 0x70 (Read Status) command to an erasing
788 chip and expecting it to be ignored, that's what we
790 map_write(map, CMD(0xd0), adr);
791 map_write(map, CMD(0x70), adr);
792 chip->oldstate = FL_READY;
793 chip->state = FL_ERASING;
796 case FL_XIP_WHILE_ERASING:
797 chip->state = chip->oldstate;
798 chip->oldstate = FL_READY;
804 /* We should really make set_vpp() count, rather than doing this */
808 printk(KERN_ERR "put_chip() called with oldstate %d!!\n", chip->oldstate);
813 #ifdef CONFIG_MTD_XIP
816 * No interrupt what so ever can be serviced while the flash isn't in array
817 * mode. This is ensured by the xip_disable() and xip_enable() functions
818 * enclosing any code path where the flash is known not to be in array mode.
819 * And within a XIP disabled code path, only functions marked with __xipram
820 * may be called and nothing else (it's a good thing to inspect generated
821 * assembly to make sure inline functions were actually inlined and that gcc
822 * didn't emit calls to its own support functions). Also configuring MTD CFI
823 * support to a single buswidth and a single interleave is also recommended.
824 * Note that not only IRQs are disabled but the preemption count is also
825 * increased to prevent other locking primitives (namely spin_unlock) from
826 * decrementing the preempt count to zero and scheduling the CPU away while
830 static void xip_disable(struct map_info *map, struct flchip *chip,
833 /* TODO: chips with no XIP use should ignore and return */
834 (void) map_read(map, adr); /* ensure mmu mapping is up to date */
839 static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
842 struct cfi_private *cfi = map->fldrv_priv;
843 if (chip->state != FL_POINT && chip->state != FL_READY) {
844 map_write(map, CMD(0xff), adr);
845 chip->state = FL_READY;
847 (void) map_read(map, adr);
848 asm volatile (".rep 8; nop; .endr"); /* fill instruction prefetch */
854 * When a delay is required for the flash operation to complete, the
855 * xip_udelay() function is polling for both the given timeout and pending
856 * (but still masked) hardware interrupts. Whenever there is an interrupt
857 * pending then the flash erase or write operation is suspended, array mode
858 * restored and interrupts unmasked. Task scheduling might also happen at that
859 * point. The CPU eventually returns from the interrupt or the call to
860 * schedule() and the suspended flash operation is resumed for the remaining
861 * of the delay period.
863 * Warning: this function _will_ fool interrupt latency tracing tools.
866 static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
867 unsigned long adr, int usec)
869 struct cfi_private *cfi = map->fldrv_priv;
870 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
871 map_word status, OK = CMD(0x80);
872 unsigned long suspended, start = xip_currtime();
873 flstate_t oldstate, newstate;
877 if (xip_irqpending() && cfip &&
878 ((chip->state == FL_ERASING && (cfip->FeatureSupport&2)) ||
879 (chip->state == FL_WRITING && (cfip->FeatureSupport&4))) &&
880 (cfi_interleave_is_1(cfi) || chip->oldstate == FL_READY)) {
882 * Let's suspend the erase or write operation when
883 * supported. Note that we currently don't try to
884 * suspend interleaved chips if there is already
885 * another operation suspended (imagine what happens
886 * when one chip was already done with the current
887 * operation while another chip suspended it, then
888 * we resume the whole thing at once). Yes, it
891 map_write(map, CMD(0xb0), adr);
892 map_write(map, CMD(0x70), adr);
893 usec -= xip_elapsed_since(start);
894 suspended = xip_currtime();
896 if (xip_elapsed_since(suspended) > 100000) {
898 * The chip doesn't want to suspend
899 * after waiting for 100 msecs.
900 * This is a critical error but there
901 * is not much we can do here.
905 status = map_read(map, adr);
906 } while (!map_word_andequal(map, status, OK, OK));
908 /* Suspend succeeded */
909 oldstate = chip->state;
910 if (oldstate == FL_ERASING) {
911 if (!map_word_bitsset(map, status, CMD(0x40)))
913 newstate = FL_XIP_WHILE_ERASING;
914 chip->erase_suspended = 1;
916 if (!map_word_bitsset(map, status, CMD(0x04)))
918 newstate = FL_XIP_WHILE_WRITING;
919 chip->write_suspended = 1;
921 chip->state = newstate;
922 map_write(map, CMD(0xff), adr);
923 (void) map_read(map, adr);
924 asm volatile (".rep 8; nop; .endr");
927 asm volatile (".rep 8; nop; .endr");
931 * We're back. However someone else might have
932 * decided to go write to the chip if we are in
933 * a suspended erase state. If so let's wait
937 while (chip->state != newstate) {
938 DECLARE_WAITQUEUE(wait, current);
939 set_current_state(TASK_UNINTERRUPTIBLE);
940 add_wait_queue(&chip->wq, &wait);
943 remove_wait_queue(&chip->wq, &wait);
946 /* Disallow XIP again */
949 /* Resume the write or erase operation */
950 map_write(map, CMD(0xd0), adr);
951 map_write(map, CMD(0x70), adr);
952 chip->state = oldstate;
953 start = xip_currtime();
954 } else if (usec >= 1000000/HZ) {
956 * Try to save on CPU power when waiting delay
957 * is at least a system timer tick period.
958 * No need to be extremely accurate here.
962 status = map_read(map, adr);
963 } while (!map_word_andequal(map, status, OK, OK)
964 && xip_elapsed_since(start) < usec);
967 #define UDELAY(map, chip, adr, usec) xip_udelay(map, chip, adr, usec)
970 * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
971 * the flash is actively programming or erasing since we have to poll for
972 * the operation to complete anyway. We can't do that in a generic way with
973 * a XIP setup so do it before the actual flash operation in this case.
975 #undef INVALIDATE_CACHED_RANGE
976 #define INVALIDATE_CACHED_RANGE(x...)
977 #define XIP_INVAL_CACHED_RANGE(map, from, size) \
978 do { if(map->inval_cache) map->inval_cache(map, from, size); } while(0)
983 * Activating this XIP support changes the way the code works a bit. For
984 * example the code to suspend the current process when concurrent access
985 * happens is never executed because xip_udelay() will always return with the
986 * same chip state as it was entered with. This is why there is no care for
987 * the presence of add_wait_queue() or schedule() calls from within a couple
988 * xip_disable()'d areas of code, like in do_erase_oneblock for example.
989 * The queueing and scheduling are always happening within xip_udelay().
991 * Similarly, get_chip() and put_chip() just happen to always be executed
992 * with chip->state set to FL_READY (or FL_XIP_WHILE_*) where flash state
993 * is in array mode, therefore never executing many cases therein and not
994 * causing any problem with XIP.
999 #define xip_disable(map, chip, adr)
1000 #define xip_enable(map, chip, adr)
1002 #define UDELAY(map, chip, adr, usec) cfi_udelay(usec)
1004 #define XIP_INVAL_CACHED_RANGE(x...)
1008 static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
1010 unsigned long cmd_addr;
1011 struct cfi_private *cfi = map->fldrv_priv;
1016 /* Ensure cmd read/writes are aligned. */
1017 cmd_addr = adr & ~(map_bankwidth(map)-1);
1019 spin_lock(chip->mutex);
1021 ret = get_chip(map, chip, cmd_addr, FL_POINT);
1024 if (chip->state != FL_POINT && chip->state != FL_READY)
1025 map_write(map, CMD(0xff), cmd_addr);
1027 chip->state = FL_POINT;
1028 chip->ref_point_counter++;
1030 spin_unlock(chip->mutex);
1035 static int cfi_intelext_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
1037 struct map_info *map = mtd->priv;
1038 struct cfi_private *cfi = map->fldrv_priv;
1043 if (!map->virt || (from + len > mtd->size))
1046 *mtdbuf = (void *)map->virt + from;
1049 /* Now lock the chip(s) to POINT state */
1051 /* ofs: offset within the first chip that the first read should start */
1052 chipnum = (from >> cfi->chipshift);
1053 ofs = from - (chipnum << cfi->chipshift);
1056 unsigned long thislen;
1058 if (chipnum >= cfi->numchips)
1061 if ((len + ofs -1) >> cfi->chipshift)
1062 thislen = (1<<cfi->chipshift) - ofs;
1066 ret = do_point_onechip(map, &cfi->chips[chipnum], ofs, thislen);
1079 static void cfi_intelext_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
1081 struct map_info *map = mtd->priv;
1082 struct cfi_private *cfi = map->fldrv_priv;
1086 /* Now unlock the chip(s) POINT state */
1088 /* ofs: offset within the first chip that the first read should start */
1089 chipnum = (from >> cfi->chipshift);
1090 ofs = from - (chipnum << cfi->chipshift);
1093 unsigned long thislen;
1094 struct flchip *chip;
1096 chip = &cfi->chips[chipnum];
1097 if (chipnum >= cfi->numchips)
1100 if ((len + ofs -1) >> cfi->chipshift)
1101 thislen = (1<<cfi->chipshift) - ofs;
1105 spin_lock(chip->mutex);
1106 if (chip->state == FL_POINT) {
1107 chip->ref_point_counter--;
1108 if(chip->ref_point_counter == 0)
1109 chip->state = FL_READY;
1111 printk(KERN_ERR "Warning: unpoint called on non pointed region\n"); /* Should this give an error? */
1113 put_chip(map, chip, chip->start);
1114 spin_unlock(chip->mutex);
1122 static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
1124 unsigned long cmd_addr;
1125 struct cfi_private *cfi = map->fldrv_priv;
1130 /* Ensure cmd read/writes are aligned. */
1131 cmd_addr = adr & ~(map_bankwidth(map)-1);
1133 spin_lock(chip->mutex);
1134 ret = get_chip(map, chip, cmd_addr, FL_READY);
1136 spin_unlock(chip->mutex);
1140 if (chip->state != FL_POINT && chip->state != FL_READY) {
1141 map_write(map, CMD(0xff), cmd_addr);
1143 chip->state = FL_READY;
1146 map_copy_from(map, buf, adr, len);
1148 put_chip(map, chip, cmd_addr);
1150 spin_unlock(chip->mutex);
1154 static int cfi_intelext_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
1156 struct map_info *map = mtd->priv;
1157 struct cfi_private *cfi = map->fldrv_priv;
1162 /* ofs: offset within the first chip that the first read should start */
1163 chipnum = (from >> cfi->chipshift);
1164 ofs = from - (chipnum << cfi->chipshift);
1169 unsigned long thislen;
1171 if (chipnum >= cfi->numchips)
1174 if ((len + ofs -1) >> cfi->chipshift)
1175 thislen = (1<<cfi->chipshift) - ofs;
1179 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
1193 static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1194 unsigned long adr, map_word datum, int mode)
1196 struct cfi_private *cfi = map->fldrv_priv;
1197 map_word status, status_OK, write_cmd;
1198 unsigned long timeo;
1203 /* Let's determine this according to the interleave only once */
1204 status_OK = CMD(0x80);
1206 case FL_WRITING: write_cmd = CMD(0x40); break;
1207 case FL_OTP_WRITE: write_cmd = CMD(0xc0); break;
1208 default: return -EINVAL;
1211 spin_lock(chip->mutex);
1212 ret = get_chip(map, chip, adr, mode);
1214 spin_unlock(chip->mutex);
1218 XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
1220 xip_disable(map, chip, adr);
1221 map_write(map, write_cmd, adr);
1222 map_write(map, datum, adr);
1225 spin_unlock(chip->mutex);
1226 INVALIDATE_CACHED_RANGE(map, adr, map_bankwidth(map));
1227 UDELAY(map, chip, adr, chip->word_write_time);
1228 spin_lock(chip->mutex);
1230 timeo = jiffies + (HZ/2);
1233 if (chip->state != mode) {
1234 /* Someone's suspended the write. Sleep */
1235 DECLARE_WAITQUEUE(wait, current);
1237 set_current_state(TASK_UNINTERRUPTIBLE);
1238 add_wait_queue(&chip->wq, &wait);
1239 spin_unlock(chip->mutex);
1241 remove_wait_queue(&chip->wq, &wait);
1242 timeo = jiffies + (HZ / 2); /* FIXME */
1243 spin_lock(chip->mutex);
1247 status = map_read(map, adr);
1248 if (map_word_andequal(map, status, status_OK, status_OK))
1251 /* OK Still waiting */
1252 if (time_after(jiffies, timeo)) {
1253 chip->state = FL_STATUS;
1254 xip_enable(map, chip, adr);
1255 printk(KERN_ERR "waiting for chip to be ready timed out in word write\n");
1260 /* Latency issues. Drop the lock, wait a while and retry */
1261 spin_unlock(chip->mutex);
1263 UDELAY(map, chip, adr, 1);
1264 spin_lock(chip->mutex);
1267 chip->word_write_time--;
1268 if (!chip->word_write_time)
1269 chip->word_write_time++;
1272 chip->word_write_time++;
1274 /* Done and happy. */
1275 chip->state = FL_STATUS;
1277 /* check for lock bit */
1278 if (map_word_bitsset(map, status, CMD(0x02))) {
1280 map_write(map, CMD(0x50), adr);
1281 /* put back into read status register mode */
1282 map_write(map, CMD(0x70), adr);
1286 xip_enable(map, chip, adr);
1287 out: put_chip(map, chip, adr);
1288 spin_unlock(chip->mutex);
1294 static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
1296 struct map_info *map = mtd->priv;
1297 struct cfi_private *cfi = map->fldrv_priv;
1306 chipnum = to >> cfi->chipshift;
1307 ofs = to - (chipnum << cfi->chipshift);
1309 /* If it's not bus-aligned, do the first byte write */
1310 if (ofs & (map_bankwidth(map)-1)) {
1311 unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
1312 int gap = ofs - bus_ofs;
1316 n = min_t(int, len, map_bankwidth(map)-gap);
1317 datum = map_word_ff(map);
1318 datum = map_word_load_partial(map, datum, buf, gap, n);
1320 ret = do_write_oneword(map, &cfi->chips[chipnum],
1321 bus_ofs, datum, FL_WRITING);
1330 if (ofs >> cfi->chipshift) {
1333 if (chipnum == cfi->numchips)
1338 while(len >= map_bankwidth(map)) {
1339 map_word datum = map_word_load(map, buf);
1341 ret = do_write_oneword(map, &cfi->chips[chipnum],
1342 ofs, datum, FL_WRITING);
1346 ofs += map_bankwidth(map);
1347 buf += map_bankwidth(map);
1348 (*retlen) += map_bankwidth(map);
1349 len -= map_bankwidth(map);
1351 if (ofs >> cfi->chipshift) {
1354 if (chipnum == cfi->numchips)
1359 if (len & (map_bankwidth(map)-1)) {
1362 datum = map_word_ff(map);
1363 datum = map_word_load_partial(map, datum, buf, 0, len);
1365 ret = do_write_oneword(map, &cfi->chips[chipnum],
1366 ofs, datum, FL_WRITING);
1377 static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1378 unsigned long adr, const u_char *buf, int len)
1380 struct cfi_private *cfi = map->fldrv_priv;
1381 map_word status, status_OK;
1382 unsigned long cmd_adr, timeo;
1383 int wbufsize, z, ret=0, bytes, words;
1385 wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1387 cmd_adr = adr & ~(wbufsize-1);
1389 /* Let's determine this according to the interleave only once */
1390 status_OK = CMD(0x80);
1392 spin_lock(chip->mutex);
1393 ret = get_chip(map, chip, cmd_adr, FL_WRITING);
1395 spin_unlock(chip->mutex);
1399 XIP_INVAL_CACHED_RANGE(map, adr, len);
1401 xip_disable(map, chip, cmd_adr);
1403 /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
1404 [...], the device will not accept any more Write to Buffer commands".
1405 So we must check here and reset those bits if they're set. Otherwise
1406 we're just pissing in the wind */
1407 if (chip->state != FL_STATUS)
1408 map_write(map, CMD(0x70), cmd_adr);
1409 status = map_read(map, cmd_adr);
1410 if (map_word_bitsset(map, status, CMD(0x30))) {
1411 xip_enable(map, chip, cmd_adr);
1412 printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %lx). Clearing.\n", status.x[0]);
1413 xip_disable(map, chip, cmd_adr);
1414 map_write(map, CMD(0x50), cmd_adr);
1415 map_write(map, CMD(0x70), cmd_adr);
1418 chip->state = FL_WRITING_TO_BUFFER;
1422 map_write(map, CMD(0xe8), cmd_adr);
1424 status = map_read(map, cmd_adr);
1425 if (map_word_andequal(map, status, status_OK, status_OK))
1428 spin_unlock(chip->mutex);
1429 UDELAY(map, chip, cmd_adr, 1);
1430 spin_lock(chip->mutex);
1433 /* Argh. Not ready for write to buffer */
1435 map_write(map, CMD(0x70), cmd_adr);
1436 chip->state = FL_STATUS;
1437 Xstatus = map_read(map, cmd_adr);
1438 /* Odd. Clear status bits */
1439 map_write(map, CMD(0x50), cmd_adr);
1440 map_write(map, CMD(0x70), cmd_adr);
1441 xip_enable(map, chip, cmd_adr);
1442 printk(KERN_ERR "Chip not ready for buffer write. status = %lx, Xstatus = %lx\n",
1443 status.x[0], Xstatus.x[0]);
1449 /* Write length of data to come */
1450 bytes = len & (map_bankwidth(map)-1);
1451 words = len / map_bankwidth(map);
1452 map_write(map, CMD(words - !bytes), cmd_adr );
1456 while(z < words * map_bankwidth(map)) {
1457 map_word datum = map_word_load(map, buf);
1458 map_write(map, datum, adr+z);
1460 z += map_bankwidth(map);
1461 buf += map_bankwidth(map);
1467 datum = map_word_ff(map);
1468 datum = map_word_load_partial(map, datum, buf, 0, bytes);
1469 map_write(map, datum, adr+z);
1473 map_write(map, CMD(0xd0), cmd_adr);
1474 chip->state = FL_WRITING;
1476 spin_unlock(chip->mutex);
1477 INVALIDATE_CACHED_RANGE(map, adr, len);
1478 UDELAY(map, chip, cmd_adr, chip->buffer_write_time);
1479 spin_lock(chip->mutex);
1481 timeo = jiffies + (HZ/2);
1484 if (chip->state != FL_WRITING) {
1485 /* Someone's suspended the write. Sleep */
1486 DECLARE_WAITQUEUE(wait, current);
1487 set_current_state(TASK_UNINTERRUPTIBLE);
1488 add_wait_queue(&chip->wq, &wait);
1489 spin_unlock(chip->mutex);
1491 remove_wait_queue(&chip->wq, &wait);
1492 timeo = jiffies + (HZ / 2); /* FIXME */
1493 spin_lock(chip->mutex);
1497 status = map_read(map, cmd_adr);
1498 if (map_word_andequal(map, status, status_OK, status_OK))
1501 /* OK Still waiting */
1502 if (time_after(jiffies, timeo)) {
1503 chip->state = FL_STATUS;
1504 xip_enable(map, chip, cmd_adr);
1505 printk(KERN_ERR "waiting for chip to be ready timed out in bufwrite\n");
1510 /* Latency issues. Drop the lock, wait a while and retry */
1511 spin_unlock(chip->mutex);
1512 UDELAY(map, chip, cmd_adr, 1);
1514 spin_lock(chip->mutex);
1517 chip->buffer_write_time--;
1518 if (!chip->buffer_write_time)
1519 chip->buffer_write_time++;
1522 chip->buffer_write_time++;
1524 /* Done and happy. */
1525 chip->state = FL_STATUS;
1527 /* check for lock bit */
1528 if (map_word_bitsset(map, status, CMD(0x02))) {
1530 map_write(map, CMD(0x50), cmd_adr);
1531 /* put back into read status register mode */
1532 map_write(map, CMD(0x70), adr);
1536 xip_enable(map, chip, cmd_adr);
1537 out: put_chip(map, chip, cmd_adr);
1538 spin_unlock(chip->mutex);
1542 static int cfi_intelext_write_buffers (struct mtd_info *mtd, loff_t to,
1543 size_t len, size_t *retlen, const u_char *buf)
1545 struct map_info *map = mtd->priv;
1546 struct cfi_private *cfi = map->fldrv_priv;
1547 int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1556 chipnum = to >> cfi->chipshift;
1557 ofs = to - (chipnum << cfi->chipshift);
1559 /* If it's not bus-aligned, do the first word write */
1560 if (ofs & (map_bankwidth(map)-1)) {
1561 size_t local_len = (-ofs)&(map_bankwidth(map)-1);
1562 if (local_len > len)
1564 ret = cfi_intelext_write_words(mtd, to, local_len,
1572 if (ofs >> cfi->chipshift) {
1575 if (chipnum == cfi->numchips)
1581 /* We must not cross write block boundaries */
1582 int size = wbufsize - (ofs & (wbufsize-1));
1586 ret = do_write_buffer(map, &cfi->chips[chipnum],
1596 if (ofs >> cfi->chipshift) {
1599 if (chipnum == cfi->numchips)
1606 static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1607 unsigned long adr, int len, void *thunk)
1609 struct cfi_private *cfi = map->fldrv_priv;
1610 map_word status, status_OK;
1611 unsigned long timeo;
1613 DECLARE_WAITQUEUE(wait, current);
1618 /* Let's determine this according to the interleave only once */
1619 status_OK = CMD(0x80);
1622 spin_lock(chip->mutex);
1623 ret = get_chip(map, chip, adr, FL_ERASING);
1625 spin_unlock(chip->mutex);
1629 XIP_INVAL_CACHED_RANGE(map, adr, len);
1631 xip_disable(map, chip, adr);
1633 /* Clear the status register first */
1634 map_write(map, CMD(0x50), adr);
1637 map_write(map, CMD(0x20), adr);
1638 map_write(map, CMD(0xD0), adr);
1639 chip->state = FL_ERASING;
1640 chip->erase_suspended = 0;
1642 spin_unlock(chip->mutex);
1643 INVALIDATE_CACHED_RANGE(map, adr, len);
1644 UDELAY(map, chip, adr, chip->erase_time*1000/2);
1645 spin_lock(chip->mutex);
1647 /* FIXME. Use a timer to check this, and return immediately. */
1648 /* Once the state machine's known to be working I'll do that */
1650 timeo = jiffies + (HZ*20);
1652 if (chip->state != FL_ERASING) {
1653 /* Someone's suspended the erase. Sleep */
1654 set_current_state(TASK_UNINTERRUPTIBLE);
1655 add_wait_queue(&chip->wq, &wait);
1656 spin_unlock(chip->mutex);
1658 remove_wait_queue(&chip->wq, &wait);
1659 spin_lock(chip->mutex);
1662 if (chip->erase_suspended) {
1663 /* This erase was suspended and resumed.
1664 Adjust the timeout */
1665 timeo = jiffies + (HZ*20); /* FIXME */
1666 chip->erase_suspended = 0;
1669 status = map_read(map, adr);
1670 if (map_word_andequal(map, status, status_OK, status_OK))
1673 /* OK Still waiting */
1674 if (time_after(jiffies, timeo)) {
1676 map_write(map, CMD(0x70), adr);
1677 chip->state = FL_STATUS;
1678 Xstatus = map_read(map, adr);
1679 /* Clear status bits */
1680 map_write(map, CMD(0x50), adr);
1681 map_write(map, CMD(0x70), adr);
1682 xip_enable(map, chip, adr);
1683 printk(KERN_ERR "waiting for erase at %08lx to complete timed out. status = %lx, Xstatus = %lx.\n",
1684 adr, status.x[0], Xstatus.x[0]);
1689 /* Latency issues. Drop the lock, wait a while and retry */
1690 spin_unlock(chip->mutex);
1691 UDELAY(map, chip, adr, 1000000/HZ);
1692 spin_lock(chip->mutex);
1695 /* We've broken this before. It doesn't hurt to be safe */
1696 map_write(map, CMD(0x70), adr);
1697 chip->state = FL_STATUS;
1698 status = map_read(map, adr);
1700 /* check for lock bit */
1701 if (map_word_bitsset(map, status, CMD(0x3a))) {
1702 unsigned long chipstatus;
1704 /* Reset the error bits */
1705 map_write(map, CMD(0x50), adr);
1706 map_write(map, CMD(0x70), adr);
1707 xip_enable(map, chip, adr);
1709 chipstatus = MERGESTATUS(status);
1711 if ((chipstatus & 0x30) == 0x30) {
1712 printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%lx\n", chipstatus);
1714 } else if (chipstatus & 0x02) {
1715 /* Protection bit set */
1717 } else if (chipstatus & 0x8) {
1719 printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%lx\n", chipstatus);
1721 } else if (chipstatus & 0x20) {
1723 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
1724 timeo = jiffies + HZ;
1725 put_chip(map, chip, adr);
1726 spin_unlock(chip->mutex);
1729 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%lx\n", adr, chipstatus);
1733 xip_enable(map, chip, adr);
1737 out: put_chip(map, chip, adr);
1738 spin_unlock(chip->mutex);
1742 int cfi_intelext_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
1744 unsigned long ofs, len;
1750 ret = cfi_varsize_frob(mtd, do_erase_oneblock, ofs, len, NULL);
1754 instr->state = MTD_ERASE_DONE;
1755 mtd_erase_callback(instr);
1760 static void cfi_intelext_sync (struct mtd_info *mtd)
1762 struct map_info *map = mtd->priv;
1763 struct cfi_private *cfi = map->fldrv_priv;
1765 struct flchip *chip;
1768 for (i=0; !ret && i<cfi->numchips; i++) {
1769 chip = &cfi->chips[i];
1771 spin_lock(chip->mutex);
1772 ret = get_chip(map, chip, chip->start, FL_SYNCING);
1775 chip->oldstate = chip->state;
1776 chip->state = FL_SYNCING;
1777 /* No need to wake_up() on this state change -
1778 * as the whole point is that nobody can do anything
1779 * with the chip now anyway.
1782 spin_unlock(chip->mutex);
1785 /* Unlock the chips again */
1787 for (i--; i >=0; i--) {
1788 chip = &cfi->chips[i];
1790 spin_lock(chip->mutex);
1792 if (chip->state == FL_SYNCING) {
1793 chip->state = chip->oldstate;
1794 chip->oldstate = FL_READY;
1797 spin_unlock(chip->mutex);
1801 #ifdef DEBUG_LOCK_BITS
1802 static int __xipram do_printlockstatus_oneblock(struct map_info *map,
1803 struct flchip *chip,
1805 int len, void *thunk)
1807 struct cfi_private *cfi = map->fldrv_priv;
1808 int status, ofs_factor = cfi->interleave * cfi->device_type;
1810 xip_disable(map, chip, adr+(2*ofs_factor));
1811 cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1812 chip->state = FL_JEDEC_QUERY;
1813 status = cfi_read_query(map, adr+(2*ofs_factor));
1814 xip_enable(map, chip, 0);
1815 printk(KERN_DEBUG "block status register for 0x%08lx is %x\n",
1821 #define DO_XXLOCK_ONEBLOCK_LOCK ((void *) 1)
1822 #define DO_XXLOCK_ONEBLOCK_UNLOCK ((void *) 2)
1824 static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip,
1825 unsigned long adr, int len, void *thunk)
1827 struct cfi_private *cfi = map->fldrv_priv;
1828 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
1829 map_word status, status_OK;
1830 unsigned long timeo = jiffies + HZ;
1835 /* Let's determine this according to the interleave only once */
1836 status_OK = CMD(0x80);
1838 spin_lock(chip->mutex);
1839 ret = get_chip(map, chip, adr, FL_LOCKING);
1841 spin_unlock(chip->mutex);
1846 xip_disable(map, chip, adr);
1848 map_write(map, CMD(0x60), adr);
1849 if (thunk == DO_XXLOCK_ONEBLOCK_LOCK) {
1850 map_write(map, CMD(0x01), adr);
1851 chip->state = FL_LOCKING;
1852 } else if (thunk == DO_XXLOCK_ONEBLOCK_UNLOCK) {
1853 map_write(map, CMD(0xD0), adr);
1854 chip->state = FL_UNLOCKING;
1859 * If Instant Individual Block Locking supported then no need
1863 if (!extp || !(extp->FeatureSupport & (1 << 5))) {
1864 spin_unlock(chip->mutex);
1865 UDELAY(map, chip, adr, 1000000/HZ);
1866 spin_lock(chip->mutex);
1869 /* FIXME. Use a timer to check this, and return immediately. */
1870 /* Once the state machine's known to be working I'll do that */
1872 timeo = jiffies + (HZ*20);
1875 status = map_read(map, adr);
1876 if (map_word_andequal(map, status, status_OK, status_OK))
1879 /* OK Still waiting */
1880 if (time_after(jiffies, timeo)) {
1882 map_write(map, CMD(0x70), adr);
1883 chip->state = FL_STATUS;
1884 Xstatus = map_read(map, adr);
1885 xip_enable(map, chip, adr);
1886 printk(KERN_ERR "waiting for unlock to complete timed out. status = %lx, Xstatus = %lx.\n",
1887 status.x[0], Xstatus.x[0]);
1888 put_chip(map, chip, adr);
1889 spin_unlock(chip->mutex);
1893 /* Latency issues. Drop the lock, wait a while and retry */
1894 spin_unlock(chip->mutex);
1895 UDELAY(map, chip, adr, 1);
1896 spin_lock(chip->mutex);
1899 /* Done and happy. */
1900 chip->state = FL_STATUS;
1901 xip_enable(map, chip, adr);
1902 put_chip(map, chip, adr);
1903 spin_unlock(chip->mutex);
1907 static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1911 #ifdef DEBUG_LOCK_BITS
1912 printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
1913 __FUNCTION__, ofs, len);
1914 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1918 ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
1919 ofs, len, DO_XXLOCK_ONEBLOCK_LOCK);
1921 #ifdef DEBUG_LOCK_BITS
1922 printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
1924 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1931 static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1935 #ifdef DEBUG_LOCK_BITS
1936 printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
1937 __FUNCTION__, ofs, len);
1938 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1942 ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
1943 ofs, len, DO_XXLOCK_ONEBLOCK_UNLOCK);
1945 #ifdef DEBUG_LOCK_BITS
1946 printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
1948 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1955 #ifdef CONFIG_MTD_OTP
1957 typedef int (*otp_op_t)(struct map_info *map, struct flchip *chip,
1958 u_long data_offset, u_char *buf, u_int size,
1959 u_long prot_offset, u_int groupno, u_int groupsize);
1962 do_otp_read(struct map_info *map, struct flchip *chip, u_long offset,
1963 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
1965 struct cfi_private *cfi = map->fldrv_priv;
1968 spin_lock(chip->mutex);
1969 ret = get_chip(map, chip, chip->start, FL_JEDEC_QUERY);
1971 spin_unlock(chip->mutex);
1975 /* let's ensure we're not reading back cached data from array mode */
1976 if (map->inval_cache)
1977 map->inval_cache(map, chip->start + offset, size);
1979 xip_disable(map, chip, chip->start);
1980 if (chip->state != FL_JEDEC_QUERY) {
1981 map_write(map, CMD(0x90), chip->start);
1982 chip->state = FL_JEDEC_QUERY;
1984 map_copy_from(map, buf, chip->start + offset, size);
1985 xip_enable(map, chip, chip->start);
1987 /* then ensure we don't keep OTP data in the cache */
1988 if (map->inval_cache)
1989 map->inval_cache(map, chip->start + offset, size);
1991 put_chip(map, chip, chip->start);
1992 spin_unlock(chip->mutex);
1997 do_otp_write(struct map_info *map, struct flchip *chip, u_long offset,
1998 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2003 unsigned long bus_ofs = offset & ~(map_bankwidth(map)-1);
2004 int gap = offset - bus_ofs;
2005 int n = min_t(int, size, map_bankwidth(map)-gap);
2006 map_word datum = map_word_ff(map);
2008 datum = map_word_load_partial(map, datum, buf, gap, n);
2009 ret = do_write_oneword(map, chip, bus_ofs, datum, FL_OTP_WRITE);
2022 do_otp_lock(struct map_info *map, struct flchip *chip, u_long offset,
2023 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2025 struct cfi_private *cfi = map->fldrv_priv;
2028 /* make sure area matches group boundaries */
2032 datum = map_word_ff(map);
2033 datum = map_word_clr(map, datum, CMD(1 << grpno));
2034 return do_write_oneword(map, chip, prot, datum, FL_OTP_WRITE);
2037 static int cfi_intelext_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2038 size_t *retlen, u_char *buf,
2039 otp_op_t action, int user_regs)
2041 struct map_info *map = mtd->priv;
2042 struct cfi_private *cfi = map->fldrv_priv;
2043 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2044 struct flchip *chip;
2045 struct cfi_intelext_otpinfo *otp;
2046 u_long devsize, reg_prot_offset, data_offset;
2047 u_int chip_num, chip_step, field, reg_fact_size, reg_user_size;
2048 u_int groups, groupno, groupsize, reg_fact_groups, reg_user_groups;
2053 /* Check that we actually have some OTP registers */
2054 if (!extp || !(extp->FeatureSupport & 64) || !extp->NumProtectionFields)
2057 /* we need real chips here not virtual ones */
2058 devsize = (1 << cfi->cfiq->DevSize) * cfi->interleave;
2059 chip_step = devsize >> cfi->chipshift;
2061 for (chip_num = 0; chip_num < cfi->numchips; chip_num += chip_step) {
2062 chip = &cfi->chips[chip_num];
2063 otp = (struct cfi_intelext_otpinfo *)&extp->extra[0];
2065 /* first OTP region */
2067 reg_prot_offset = extp->ProtRegAddr;
2068 reg_fact_groups = 1;
2069 reg_fact_size = 1 << extp->FactProtRegSize;
2070 reg_user_groups = 1;
2071 reg_user_size = 1 << extp->UserProtRegSize;
2074 /* flash geometry fixup */
2075 data_offset = reg_prot_offset + 1;
2076 data_offset *= cfi->interleave * cfi->device_type;
2077 reg_prot_offset *= cfi->interleave * cfi->device_type;
2078 reg_fact_size *= cfi->interleave;
2079 reg_user_size *= cfi->interleave;
2082 groups = reg_user_groups;
2083 groupsize = reg_user_size;
2084 /* skip over factory reg area */
2085 groupno = reg_fact_groups;
2086 data_offset += reg_fact_groups * reg_fact_size;
2088 groups = reg_fact_groups;
2089 groupsize = reg_fact_size;
2093 while (len > 0 && groups > 0) {
2096 * Special case: if action is NULL
2097 * we fill buf with otp_info records.
2099 struct otp_info *otpinfo;
2101 len -= sizeof(struct otp_info);
2104 ret = do_otp_read(map, chip,
2106 (u_char *)&lockword,
2111 otpinfo = (struct otp_info *)buf;
2112 otpinfo->start = from;
2113 otpinfo->length = groupsize;
2115 !map_word_bitsset(map, lockword,
2118 buf += sizeof(*otpinfo);
2119 *retlen += sizeof(*otpinfo);
2120 } else if (from >= groupsize) {
2122 data_offset += groupsize;
2124 int size = groupsize;
2125 data_offset += from;
2130 ret = action(map, chip, data_offset,
2131 buf, size, reg_prot_offset,
2132 groupno, groupsize);
2138 data_offset += size;
2144 /* next OTP region */
2145 if (++field == extp->NumProtectionFields)
2147 reg_prot_offset = otp->ProtRegAddr;
2148 reg_fact_groups = otp->FactGroups;
2149 reg_fact_size = 1 << otp->FactProtRegSize;
2150 reg_user_groups = otp->UserGroups;
2151 reg_user_size = 1 << otp->UserProtRegSize;
2159 static int cfi_intelext_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2160 size_t len, size_t *retlen,
2163 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2164 buf, do_otp_read, 0);
2167 static int cfi_intelext_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2168 size_t len, size_t *retlen,
2171 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2172 buf, do_otp_read, 1);
2175 static int cfi_intelext_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2176 size_t len, size_t *retlen,
2179 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2180 buf, do_otp_write, 1);
2183 static int cfi_intelext_lock_user_prot_reg(struct mtd_info *mtd,
2184 loff_t from, size_t len)
2187 return cfi_intelext_otp_walk(mtd, from, len, &retlen,
2188 NULL, do_otp_lock, 1);
2191 static int cfi_intelext_get_fact_prot_info(struct mtd_info *mtd,
2192 struct otp_info *buf, size_t len)
2197 ret = cfi_intelext_otp_walk(mtd, 0, len, &retlen, (u_char *)buf, NULL, 0);
2198 return ret ? : retlen;
2201 static int cfi_intelext_get_user_prot_info(struct mtd_info *mtd,
2202 struct otp_info *buf, size_t len)
2207 ret = cfi_intelext_otp_walk(mtd, 0, len, &retlen, (u_char *)buf, NULL, 1);
2208 return ret ? : retlen;
2213 static int cfi_intelext_suspend(struct mtd_info *mtd)
2215 struct map_info *map = mtd->priv;
2216 struct cfi_private *cfi = map->fldrv_priv;
2218 struct flchip *chip;
2221 for (i=0; !ret && i<cfi->numchips; i++) {
2222 chip = &cfi->chips[i];
2224 spin_lock(chip->mutex);
2226 switch (chip->state) {
2230 case FL_JEDEC_QUERY:
2231 if (chip->oldstate == FL_READY) {
2232 chip->oldstate = chip->state;
2233 chip->state = FL_PM_SUSPENDED;
2234 /* No need to wake_up() on this state change -
2235 * as the whole point is that nobody can do anything
2236 * with the chip now anyway.
2239 /* There seems to be an operation pending. We must wait for it. */
2240 printk(KERN_NOTICE "Flash device refused suspend due to pending operation (oldstate %d)\n", chip->oldstate);
2245 /* Should we actually wait? Once upon a time these routines weren't
2246 allowed to. Or should we return -EAGAIN, because the upper layers
2247 ought to have already shut down anything which was using the device
2248 anyway? The latter for now. */
2249 printk(KERN_NOTICE "Flash device refused suspend due to active operation (state %d)\n", chip->oldstate);
2251 case FL_PM_SUSPENDED:
2254 spin_unlock(chip->mutex);
2257 /* Unlock the chips again */
2260 for (i--; i >=0; i--) {
2261 chip = &cfi->chips[i];
2263 spin_lock(chip->mutex);
2265 if (chip->state == FL_PM_SUSPENDED) {
2266 /* No need to force it into a known state here,
2267 because we're returning failure, and it didn't
2269 chip->state = chip->oldstate;
2270 chip->oldstate = FL_READY;
2273 spin_unlock(chip->mutex);
2280 static void cfi_intelext_resume(struct mtd_info *mtd)
2282 struct map_info *map = mtd->priv;
2283 struct cfi_private *cfi = map->fldrv_priv;
2285 struct flchip *chip;
2287 for (i=0; i<cfi->numchips; i++) {
2289 chip = &cfi->chips[i];
2291 spin_lock(chip->mutex);
2293 /* Go to known state. Chip may have been power cycled */
2294 if (chip->state == FL_PM_SUSPENDED) {
2295 map_write(map, CMD(0xFF), cfi->chips[i].start);
2296 chip->oldstate = chip->state = FL_READY;
2300 spin_unlock(chip->mutex);
2304 static void cfi_intelext_destroy(struct mtd_info *mtd)
2306 struct map_info *map = mtd->priv;
2307 struct cfi_private *cfi = map->fldrv_priv;
2308 kfree(cfi->cmdset_priv);
2310 kfree(cfi->chips[0].priv);
2312 kfree(mtd->eraseregions);
2315 static char im_name_1[]="cfi_cmdset_0001";
2316 static char im_name_3[]="cfi_cmdset_0003";
2318 static int __init cfi_intelext_init(void)
2320 inter_module_register(im_name_1, THIS_MODULE, &cfi_cmdset_0001);
2321 inter_module_register(im_name_3, THIS_MODULE, &cfi_cmdset_0001);
2325 static void __exit cfi_intelext_exit(void)
2327 inter_module_unregister(im_name_1);
2328 inter_module_unregister(im_name_3);
2331 module_init(cfi_intelext_init);
2332 module_exit(cfi_intelext_exit);
2334 MODULE_LICENSE("GPL");
2335 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
2336 MODULE_DESCRIPTION("MTD chip driver for Intel/Sharp flash chips");