drivers/mfd/omap-usb-host.c

   1 /**
   2  * omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
   3  *
   4  * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com
   5  * Author: Keshava Munegowda <keshava_mgowda@ti.com>
   6  * Author: Roger Quadros <rogerq@ti.com>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2  of
  10  * the License as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/types.h>
  23 #include <linux/slab.h>
  24 #include <linux/delay.h>
  25 #include <linux/clk.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/gpio.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/platform_data/usb-omap.h>
  30 #include <linux/pm_runtime.h>
  31 #include <linux/of.h>
  32 #include <linux/of_platform.h>
  33 #include <linux/err.h>
  34
  35 #include "omap-usb.h"
  36
  37 #define USBHS_DRIVER_NAME       "usbhs_omap"
  38 #define OMAP_EHCI_DEVICE        "ehci-omap"
  39 #define OMAP_OHCI_DEVICE        "ohci-omap3"
  40
  41 /* OMAP USBHOST Register addresses  */
  42
  43 /* UHH Register Set */
  44 #define OMAP_UHH_REVISION                               (0x00)
  45 #define OMAP_UHH_SYSCONFIG                              (0x10)
  46 #define OMAP_UHH_SYSCONFIG_MIDLEMODE                    (1 << 12)
  47 #define OMAP_UHH_SYSCONFIG_CACTIVITY                    (1 << 8)
  48 #define OMAP_UHH_SYSCONFIG_SIDLEMODE                    (1 << 3)
  49 #define OMAP_UHH_SYSCONFIG_ENAWAKEUP                    (1 << 2)
  50 #define OMAP_UHH_SYSCONFIG_SOFTRESET                    (1 << 1)
  51 #define OMAP_UHH_SYSCONFIG_AUTOIDLE                     (1 << 0)
  52
  53 #define OMAP_UHH_SYSSTATUS                              (0x14)
  54 #define OMAP_UHH_HOSTCONFIG                             (0x40)
  55 #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS                 (1 << 0)
  56 #define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS              (1 << 0)
  57 #define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS              (1 << 11)
  58 #define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS              (1 << 12)
  59 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN              (1 << 2)
  60 #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN              (1 << 3)
  61 #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN             (1 << 4)
  62 #define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN              (1 << 5)
  63 #define OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS           (1 << 8)
  64 #define OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS           (1 << 9)
  65 #define OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS           (1 << 10)
  66 #define OMAP4_UHH_HOSTCONFIG_APP_START_CLK              (1 << 31)
  67
  68 /* OMAP4-specific defines */
  69 #define OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR              (3 << 2)
  70 #define OMAP4_UHH_SYSCONFIG_NOIDLE                      (1 << 2)
  71 #define OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR             (3 << 4)
  72 #define OMAP4_UHH_SYSCONFIG_NOSTDBY                     (1 << 4)
  73 #define OMAP4_UHH_SYSCONFIG_SOFTRESET                   (1 << 0)
  74
  75 #define OMAP4_P1_MODE_CLEAR                             (3 << 16)
  76 #define OMAP4_P1_MODE_TLL                               (1 << 16)
  77 #define OMAP4_P1_MODE_HSIC                              (3 << 16)
  78 #define OMAP4_P2_MODE_CLEAR                             (3 << 18)
  79 #define OMAP4_P2_MODE_TLL                               (1 << 18)
  80 #define OMAP4_P2_MODE_HSIC                              (3 << 18)
  81
  82 #define OMAP_UHH_DEBUG_CSR                              (0x44)
  83
  84 /* Values of UHH_REVISION - Note: these are not given in the TRM */
  85 #define OMAP_USBHS_REV1         0x00000010      /* OMAP3 */
  86 #define OMAP_USBHS_REV2         0x50700100      /* OMAP4 */
  87
  88 #define is_omap_usbhs_rev1(x)   (x->usbhs_rev == OMAP_USBHS_REV1)
  89 #define is_omap_usbhs_rev2(x)   (x->usbhs_rev == OMAP_USBHS_REV2)
  90
  91 #define is_ehci_phy_mode(x)     (x == OMAP_EHCI_PORT_MODE_PHY)
  92 #define is_ehci_tll_mode(x)     (x == OMAP_EHCI_PORT_MODE_TLL)
  93 #define is_ehci_hsic_mode(x)    (x == OMAP_EHCI_PORT_MODE_HSIC)
  94
  95
  96 struct usbhs_hcd_omap {
  97         int                             nports;
  98         struct clk                      **utmi_clk;
  99         struct clk                      **hsic60m_clk;
 100         struct clk                      **hsic480m_clk;
 101
 102         struct clk                      *xclk60mhsp1_ck;
 103         struct clk                      *xclk60mhsp2_ck;
 104         struct clk                      *utmi_p1_gfclk;
 105         struct clk                      *utmi_p2_gfclk;
 106         struct clk                      *init_60m_fclk;
 107         struct clk                      *ehci_logic_fck;
 108
 109         void __iomem                    *uhh_base;
 110
 111         struct usbhs_omap_platform_data *pdata;
 112
 113         u32                             usbhs_rev;
 114 };
 115 /*-------------------------------------------------------------------------*/
 116
 117 static const char usbhs_driver_name[] = USBHS_DRIVER_NAME;
 118 static u64 usbhs_dmamask = DMA_BIT_MASK(32);
 119
 120 /*-------------------------------------------------------------------------*/
 121
 122 static inline void usbhs_write(void __iomem *base, u32 reg, u32 val)
 123 {
 124         writel_relaxed(val, base + reg);
 125 }
 126
 127 static inline u32 usbhs_read(void __iomem *base, u32 reg)
 128 {
 129         return readl_relaxed(base + reg);
 130 }
 131
 132 static inline void usbhs_writeb(void __iomem *base, u8 reg, u8 val)
 133 {
 134         writeb_relaxed(val, base + reg);
 135 }
 136
 137 static inline u8 usbhs_readb(void __iomem *base, u8 reg)
 138 {
 139         return readb_relaxed(base + reg);
 140 }
 141
 142 /*-------------------------------------------------------------------------*/
 143
 144 /**
 145  * Map 'enum usbhs_omap_port_mode' found in <linux/platform_data/usb-omap.h>
 146  * to the device tree binding portN-mode found in
 147  * 'Documentation/devicetree/bindings/mfd/omap-usb-host.txt'
 148  */
 149 static const char * const port_modes[] = {
 150         [OMAP_USBHS_PORT_MODE_UNUSED]   = "",
 151         [OMAP_EHCI_PORT_MODE_PHY]       = "ehci-phy",
 152         [OMAP_EHCI_PORT_MODE_TLL]       = "ehci-tll",
 153         [OMAP_EHCI_PORT_MODE_HSIC]      = "ehci-hsic",
 154         [OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0]   = "ohci-phy-6pin-datse0",
 155         [OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM]     = "ohci-phy-6pin-dpdm",
 156         [OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0]   = "ohci-phy-3pin-datse0",
 157         [OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM]     = "ohci-phy-4pin-dpdm",
 158         [OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0]   = "ohci-tll-6pin-datse0",
 159         [OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM]     = "ohci-tll-6pin-dpdm",
 160         [OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0]   = "ohci-tll-3pin-datse0",
 161         [OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM]     = "ohci-tll-4pin-dpdm",
 162         [OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0]   = "ohci-tll-2pin-datse0",
 163         [OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM]     = "ohci-tll-2pin-dpdm",
 164 };
 165
 166 /**
 167  * omap_usbhs_get_dt_port_mode - Get the 'enum usbhs_omap_port_mode'
 168  * from the port mode string.
 169  * @mode: The port mode string, usually obtained from device tree.
 170  *
 171  * The function returns the 'enum usbhs_omap_port_mode' that matches the
 172  * provided port mode string as per the port_modes table.
 173  * If no match is found it returns -ENODEV
 174  */
 175 static const int omap_usbhs_get_dt_port_mode(const char *mode)
 176 {
 177         int i;
 178
 179         for (i = 0; i < ARRAY_SIZE(port_modes); i++) {
 180                 if (!strcmp(mode, port_modes[i]))
 181                         return i;
 182         }
 183
 184         return -ENODEV;
 185 }
 186
 187 static struct platform_device *omap_usbhs_alloc_child(const char *name,
 188                         struct resource *res, int num_resources, void *pdata,
 189                         size_t pdata_size, struct device *dev)
 190 {
 191         struct platform_device  *child;
 192         int                     ret;
 193
 194         child = platform_device_alloc(name, 0);
 195
 196         if (!child) {
 197                 dev_err(dev, "platform_device_alloc %s failed\n", name);
 198                 goto err_end;
 199         }
 200
 201         ret = platform_device_add_resources(child, res, num_resources);
 202         if (ret) {
 203                 dev_err(dev, "platform_device_add_resources failed\n");
 204                 goto err_alloc;
 205         }
 206
 207         ret = platform_device_add_data(child, pdata, pdata_size);
 208         if (ret) {
 209                 dev_err(dev, "platform_device_add_data failed\n");
 210                 goto err_alloc;
 211         }
 212
 213         child->dev.dma_mask             = &usbhs_dmamask;
 214         dma_set_coherent_mask(&child->dev, DMA_BIT_MASK(32));
 215         child->dev.parent               = dev;
 216
 217         ret = platform_device_add(child);
 218         if (ret) {
 219                 dev_err(dev, "platform_device_add failed\n");
 220                 goto err_alloc;
 221         }
 222
 223         return child;
 224
 225 err_alloc:
 226         platform_device_put(child);
 227
 228 err_end:
 229         return NULL;
 230 }
 231
 232 static int omap_usbhs_alloc_children(struct platform_device *pdev)
 233 {
 234         struct device                           *dev = &pdev->dev;
 235         struct usbhs_omap_platform_data         *pdata = dev_get_platdata(dev);
 236         struct platform_device                  *ehci;
 237         struct platform_device                  *ohci;
 238         struct resource                         *res;
 239         struct resource                         resources[2];
 240         int                                     ret;
 241
 242         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci");
 243         if (!res) {
 244                 dev_err(dev, "EHCI get resource IORESOURCE_MEM failed\n");
 245                 ret = -ENODEV;
 246                 goto err_end;
 247         }
 248         resources[0] = *res;
 249
 250         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ehci-irq");
 251         if (!res) {
 252                 dev_err(dev, " EHCI get resource IORESOURCE_IRQ failed\n");
 253                 ret = -ENODEV;
 254                 goto err_end;
 255         }
 256         resources[1] = *res;
 257
 258         ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, pdata,
 259                 sizeof(*pdata), dev);
 260
 261         if (!ehci) {
 262                 dev_err(dev, "omap_usbhs_alloc_child failed\n");
 263                 ret = -ENOMEM;
 264                 goto err_end;
 265         }
 266
 267         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ohci");
 268         if (!res) {
 269                 dev_err(dev, "OHCI get resource IORESOURCE_MEM failed\n");
 270                 ret = -ENODEV;
 271                 goto err_ehci;
 272         }
 273         resources[0] = *res;
 274
 275         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ohci-irq");
 276         if (!res) {
 277                 dev_err(dev, "OHCI get resource IORESOURCE_IRQ failed\n");
 278                 ret = -ENODEV;
 279                 goto err_ehci;
 280         }
 281         resources[1] = *res;
 282
 283         ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, pdata,
 284                 sizeof(*pdata), dev);
 285         if (!ohci) {
 286                 dev_err(dev, "omap_usbhs_alloc_child failed\n");
 287                 ret = -ENOMEM;
 288                 goto err_ehci;
 289         }
 290
 291         return 0;
 292
 293 err_ehci:
 294         platform_device_unregister(ehci);
 295
 296 err_end:
 297         return ret;
 298 }
 299
 300 static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
 301 {
 302         switch (pmode) {
 303         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
 304         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
 305         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
 306         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
 307         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
 308         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
 309         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
 310         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
 311         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
 312         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
 313                 return true;
 314
 315         default:
 316                 return false;
 317         }
 318 }
 319
 320 static int usbhs_runtime_resume(struct device *dev)
 321 {
 322         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 323         struct usbhs_omap_platform_data *pdata = omap->pdata;
 324         int i, r;
 325
 326         dev_dbg(dev, "usbhs_runtime_resume\n");
 327
 328         omap_tll_enable(pdata);
 329
 330         if (!IS_ERR(omap->ehci_logic_fck))
 331                 clk_prepare_enable(omap->ehci_logic_fck);
 332
 333         for (i = 0; i < omap->nports; i++) {
 334                 switch (pdata->port_mode[i]) {
 335                 case OMAP_EHCI_PORT_MODE_HSIC:
 336                         if (!IS_ERR(omap->hsic60m_clk[i])) {
 337                                 r = clk_prepare_enable(omap->hsic60m_clk[i]);
 338                                 if (r) {
 339                                         dev_err(dev,
 340                                          "Can't enable port %d hsic60m clk:%d\n",
 341                                          i, r);
 342                                 }
 343                         }
 344
 345                         if (!IS_ERR(omap->hsic480m_clk[i])) {
 346                                 r = clk_prepare_enable(omap->hsic480m_clk[i]);
 347                                 if (r) {
 348                                         dev_err(dev,
 349                                          "Can't enable port %d hsic480m clk:%d\n",
 350                                          i, r);
 351                                 }
 352                         }
 353                 /* Fall through as HSIC mode needs utmi_clk */
 354
 355                 case OMAP_EHCI_PORT_MODE_TLL:
 356                         if (!IS_ERR(omap->utmi_clk[i])) {
 357                                 r = clk_prepare_enable(omap->utmi_clk[i]);
 358                                 if (r) {
 359                                         dev_err(dev,
 360                                          "Can't enable port %d clk : %d\n",
 361                                          i, r);
 362                                 }
 363                         }
 364                         break;
 365                 default:
 366                         break;
 367                 }
 368         }
 369
 370         return 0;
 371 }
 372
 373 static int usbhs_runtime_suspend(struct device *dev)
 374 {
 375         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 376         struct usbhs_omap_platform_data *pdata = omap->pdata;
 377         int i;
 378
 379         dev_dbg(dev, "usbhs_runtime_suspend\n");
 380
 381         for (i = 0; i < omap->nports; i++) {
 382                 switch (pdata->port_mode[i]) {
 383                 case OMAP_EHCI_PORT_MODE_HSIC:
 384                         if (!IS_ERR(omap->hsic60m_clk[i]))
 385                                 clk_disable_unprepare(omap->hsic60m_clk[i]);
 386
 387                         if (!IS_ERR(omap->hsic480m_clk[i]))
 388                                 clk_disable_unprepare(omap->hsic480m_clk[i]);
 389                 /* Fall through as utmi_clks were used in HSIC mode */
 390
 391                 case OMAP_EHCI_PORT_MODE_TLL:
 392                         if (!IS_ERR(omap->utmi_clk[i]))
 393                                 clk_disable_unprepare(omap->utmi_clk[i]);
 394                         break;
 395                 default:
 396                         break;
 397                 }
 398         }
 399
 400         if (!IS_ERR(omap->ehci_logic_fck))
 401                 clk_disable_unprepare(omap->ehci_logic_fck);
 402
 403         omap_tll_disable(pdata);
 404
 405         return 0;
 406 }
 407
 408 static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap,
 409                                                 unsigned reg)
 410 {
 411         struct usbhs_omap_platform_data *pdata = omap->pdata;
 412         int i;
 413
 414         for (i = 0; i < omap->nports; i++) {
 415                 switch (pdata->port_mode[i]) {
 416                 case OMAP_USBHS_PORT_MODE_UNUSED:
 417                         reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i);
 418                         break;
 419                 case OMAP_EHCI_PORT_MODE_PHY:
 420                         if (pdata->single_ulpi_bypass)
 421                                 break;
 422
 423                         if (i == 0)
 424                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 425                         else
 426                                 reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
 427                                                                 << (i-1));
 428                         break;
 429                 default:
 430                         if (pdata->single_ulpi_bypass)
 431                                 break;
 432
 433                         if (i == 0)
 434                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 435                         else
 436                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
 437                                                                 << (i-1);
 438                         break;
 439                 }
 440         }
 441
 442         if (pdata->single_ulpi_bypass) {
 443                 /* bypass ULPI only if none of the ports use PHY mode */
 444                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 445
 446                 for (i = 0; i < omap->nports; i++) {
 447                         if (is_ehci_phy_mode(pdata->port_mode[i])) {
 448                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 449                                 break;
 450                         }
 451                 }
 452         }
 453
 454         return reg;
 455 }
 456
 457 static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,
 458                                                 unsigned reg)
 459 {
 460         struct usbhs_omap_platform_data *pdata = omap->pdata;
 461         int i;
 462
 463         for (i = 0; i < omap->nports; i++) {
 464                 /* Clear port mode fields for PHY mode */
 465                 reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i);
 466
 467                 if (is_ehci_tll_mode(pdata->port_mode[i]) ||
 468                                 (is_ohci_port(pdata->port_mode[i])))
 469                         reg |= OMAP4_P1_MODE_TLL << 2 * i;
 470                 else if (is_ehci_hsic_mode(pdata->port_mode[i]))
 471                         reg |= OMAP4_P1_MODE_HSIC << 2 * i;
 472         }
 473
 474         return reg;
 475 }
 476
 477 static void omap_usbhs_init(struct device *dev)
 478 {
 479         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 480         unsigned                        reg;
 481
 482         dev_dbg(dev, "starting TI HSUSB Controller\n");
 483
 484         pm_runtime_get_sync(dev);
 485
 486         reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
 487         /* setup ULPI bypass and burst configurations */
 488         reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
 489                         | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
 490                         | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
 491         reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;
 492         reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
 493
 494         switch (omap->usbhs_rev) {
 495         case OMAP_USBHS_REV1:
 496                 reg = omap_usbhs_rev1_hostconfig(omap, reg);
 497                 break;
 498
 499         case OMAP_USBHS_REV2:
 500                 reg = omap_usbhs_rev2_hostconfig(omap, reg);
 501                 break;
 502
 503         default:        /* newer revisions */
 504                 reg = omap_usbhs_rev2_hostconfig(omap, reg);
 505                 break;
 506         }
 507
 508         usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
 509         dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
 510
 511         pm_runtime_put_sync(dev);
 512 }
 513
 514 static int usbhs_omap_get_dt_pdata(struct device *dev,
 515                                         struct usbhs_omap_platform_data *pdata)
 516 {
 517         int ret, i;
 518         struct device_node *node = dev->of_node;
 519
 520         ret = of_property_read_u32(node, "num-ports", &pdata->nports);
 521         if (ret)
 522                 pdata->nports = 0;
 523
 524         if (pdata->nports > OMAP3_HS_USB_PORTS) {
 525                 dev_warn(dev, "Too many num_ports <%d> in device tree. Max %d\n",
 526                                 pdata->nports, OMAP3_HS_USB_PORTS);
 527                 return -ENODEV;
 528         }
 529
 530         /* get port modes */
 531         for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
 532                 char prop[11];
 533                 const char *mode;
 534
 535                 pdata->port_mode[i] = OMAP_USBHS_PORT_MODE_UNUSED;
 536
 537                 snprintf(prop, sizeof(prop), "port%d-mode", i + 1);
 538                 ret = of_property_read_string(node, prop, &mode);
 539                 if (ret < 0)
 540                         continue;
 541
 542                 ret = omap_usbhs_get_dt_port_mode(mode);
 543                 if (ret < 0) {
 544                         dev_warn(dev, "Invalid port%d-mode \"%s\" in device tree\n",
 545                                         i, mode);
 546                         return -ENODEV;
 547                 }
 548
 549                 dev_dbg(dev, "port%d-mode: %s -> %d\n", i, mode, ret);
 550                 pdata->port_mode[i] = ret;
 551         }
 552
 553         /* get flags */
 554         pdata->single_ulpi_bypass = of_property_read_bool(node,
 555                                                 "single-ulpi-bypass");
 556
 557         return 0;
 558 }
 559
 560 static const struct of_device_id usbhs_child_match_table[] = {
 561         { .compatible = "ti,omap-ehci", },
 562         { .compatible = "ti,omap-ohci", },
 563         { }
 564 };
 565
 566 /**
 567  * usbhs_omap_probe - initialize TI-based HCDs
 568  *
 569  * Allocates basic resources for this USB host controller.
 570  */
 571 static int usbhs_omap_probe(struct platform_device *pdev)
 572 {
 573         struct device                   *dev =  &pdev->dev;
 574         struct usbhs_omap_platform_data *pdata = dev_get_platdata(dev);
 575         struct usbhs_hcd_omap           *omap;
 576         struct resource                 *res;
 577         int                             ret = 0;
 578         int                             i;
 579         bool                            need_logic_fck;
 580
 581         if (dev->of_node) {
 582                 /* For DT boot we populate platform data from OF node */
 583                 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 584                 if (!pdata)
 585                         return -ENOMEM;
 586
 587                 ret = usbhs_omap_get_dt_pdata(dev, pdata);
 588                 if (ret)
 589                         return ret;
 590
 591                 dev->platform_data = pdata;
 592         }
 593
 594         if (!pdata) {
 595                 dev_err(dev, "Missing platform data\n");
 596                 return -ENODEV;
 597         }
 598
 599         if (pdata->nports > OMAP3_HS_USB_PORTS) {
 600                 dev_info(dev, "Too many num_ports <%d> in platform_data. Max %d\n",
 601                                 pdata->nports, OMAP3_HS_USB_PORTS);
 602                 return -ENODEV;
 603         }
 604
 605         omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);
 606         if (!omap) {
 607                 dev_err(dev, "Memory allocation failed\n");
 608                 return -ENOMEM;
 609         }
 610
 611         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 612         omap->uhh_base = devm_ioremap_resource(dev, res);
 613         if (IS_ERR(omap->uhh_base))
 614                 return PTR_ERR(omap->uhh_base);
 615
 616         omap->pdata = pdata;
 617
 618         /* Initialize the TLL subsystem */
 619         omap_tll_init(pdata);
 620
 621         pm_runtime_enable(dev);
 622
 623         platform_set_drvdata(pdev, omap);
 624         pm_runtime_get_sync(dev);
 625
 626         omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
 627
 628         /* we need to call runtime suspend before we update omap->nports
 629          * to prevent unbalanced clk_disable()
 630          */
 631         pm_runtime_put_sync(dev);
 632
 633         /*
 634          * If platform data contains nports then use that
 635          * else make out number of ports from USBHS revision
 636          */
 637         if (pdata->nports) {
 638                 omap->nports = pdata->nports;
 639         } else {
 640                 switch (omap->usbhs_rev) {
 641                 case OMAP_USBHS_REV1:
 642                         omap->nports = 3;
 643                         break;
 644                 case OMAP_USBHS_REV2:
 645                         omap->nports = 2;
 646                         break;
 647                 default:
 648                         omap->nports = OMAP3_HS_USB_PORTS;
 649                         dev_dbg(dev,
 650                          "USB HOST Rev:0x%x not recognized, assuming %d ports\n",
 651                          omap->usbhs_rev, omap->nports);
 652                         break;
 653                 }
 654                 pdata->nports = omap->nports;
 655         }
 656
 657         i = sizeof(struct clk *) * omap->nports;
 658         omap->utmi_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 659         omap->hsic480m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 660         omap->hsic60m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 661
 662         if (!omap->utmi_clk || !omap->hsic480m_clk || !omap->hsic60m_clk) {
 663                 dev_err(dev, "Memory allocation failed\n");
 664                 ret = -ENOMEM;
 665                 goto err_mem;
 666         }
 667
 668         /* Set all clocks as invalid to begin with */
 669         omap->ehci_logic_fck = ERR_PTR(-ENODEV);
 670         omap->init_60m_fclk = ERR_PTR(-ENODEV);
 671         omap->utmi_p1_gfclk = ERR_PTR(-ENODEV);
 672         omap->utmi_p2_gfclk = ERR_PTR(-ENODEV);
 673         omap->xclk60mhsp1_ck = ERR_PTR(-ENODEV);
 674         omap->xclk60mhsp2_ck = ERR_PTR(-ENODEV);
 675
 676         for (i = 0; i < omap->nports; i++) {
 677                 omap->utmi_clk[i] = ERR_PTR(-ENODEV);
 678                 omap->hsic480m_clk[i] = ERR_PTR(-ENODEV);
 679                 omap->hsic60m_clk[i] = ERR_PTR(-ENODEV);
 680         }
 681
 682         /* for OMAP3 i.e. USBHS REV1 */
 683         if (omap->usbhs_rev == OMAP_USBHS_REV1) {
 684                 need_logic_fck = false;
 685                 for (i = 0; i < omap->nports; i++) {
 686                         if (is_ehci_phy_mode(pdata->port_mode[i]) ||
 687                             is_ehci_tll_mode(pdata->port_mode[i]) ||
 688                             is_ehci_hsic_mode(pdata->port_mode[i]))
 689
 690                                 need_logic_fck |= true;
 691                 }
 692
 693                 if (need_logic_fck) {
 694                         omap->ehci_logic_fck = devm_clk_get(dev,
 695                                                             "usbhost_120m_fck");
 696                         if (IS_ERR(omap->ehci_logic_fck)) {
 697                                 ret = PTR_ERR(omap->ehci_logic_fck);
 698                                 dev_err(dev, "usbhost_120m_fck failed:%d\n",
 699                                         ret);
 700                                 goto err_mem;
 701                         }
 702                 }
 703                 goto initialize;
 704         }
 705
 706         /* for OMAP4+ i.e. USBHS REV2+ */
 707         omap->utmi_p1_gfclk = devm_clk_get(dev, "utmi_p1_gfclk");
 708         if (IS_ERR(omap->utmi_p1_gfclk)) {
 709                 ret = PTR_ERR(omap->utmi_p1_gfclk);
 710                 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
 711                 goto err_mem;
 712         }
 713
 714         omap->utmi_p2_gfclk = devm_clk_get(dev, "utmi_p2_gfclk");
 715         if (IS_ERR(omap->utmi_p2_gfclk)) {
 716                 ret = PTR_ERR(omap->utmi_p2_gfclk);
 717                 dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
 718                 goto err_mem;
 719         }
 720
 721         omap->xclk60mhsp1_ck = devm_clk_get(dev, "refclk_60m_ext_p1");
 722         if (IS_ERR(omap->xclk60mhsp1_ck)) {
 723                 ret = PTR_ERR(omap->xclk60mhsp1_ck);
 724                 dev_err(dev, "refclk_60m_ext_p1 failed error:%d\n", ret);
 725                 goto err_mem;
 726         }
 727
 728         omap->xclk60mhsp2_ck = devm_clk_get(dev, "refclk_60m_ext_p2");
 729         if (IS_ERR(omap->xclk60mhsp2_ck)) {
 730                 ret = PTR_ERR(omap->xclk60mhsp2_ck);
 731                 dev_err(dev, "refclk_60m_ext_p2 failed error:%d\n", ret);
 732                 goto err_mem;
 733         }
 734
 735         omap->init_60m_fclk = devm_clk_get(dev, "refclk_60m_int");
 736         if (IS_ERR(omap->init_60m_fclk)) {
 737                 ret = PTR_ERR(omap->init_60m_fclk);
 738                 dev_err(dev, "refclk_60m_int failed error:%d\n", ret);
 739                 goto err_mem;
 740         }
 741
 742         for (i = 0; i < omap->nports; i++) {
 743                 char clkname[30];
 744
 745                 /* clock names are indexed from 1*/
 746                 snprintf(clkname, sizeof(clkname),
 747                                 "usb_host_hs_utmi_p%d_clk", i + 1);
 748
 749                 /* If a clock is not found we won't bail out as not all
 750                  * platforms have all clocks and we can function without
 751                  * them
 752                  */
 753                 omap->utmi_clk[i] = devm_clk_get(dev, clkname);
 754                 if (IS_ERR(omap->utmi_clk[i])) {
 755                         ret = PTR_ERR(omap->utmi_clk[i]);
 756                         dev_err(dev, "Failed to get clock : %s : %d\n",
 757                                 clkname, ret);
 758                         goto err_mem;
 759                 }
 760
 761                 snprintf(clkname, sizeof(clkname),
 762                                 "usb_host_hs_hsic480m_p%d_clk", i + 1);
 763                 omap->hsic480m_clk[i] = devm_clk_get(dev, clkname);
 764                 if (IS_ERR(omap->hsic480m_clk[i])) {
 765                         ret = PTR_ERR(omap->hsic480m_clk[i]);
 766                         dev_err(dev, "Failed to get clock : %s : %d\n",
 767                                 clkname, ret);
 768                         goto err_mem;
 769                 }
 770
 771                 snprintf(clkname, sizeof(clkname),
 772                                 "usb_host_hs_hsic60m_p%d_clk", i + 1);
 773                 omap->hsic60m_clk[i] = devm_clk_get(dev, clkname);
 774                 if (IS_ERR(omap->hsic60m_clk[i])) {
 775                         ret = PTR_ERR(omap->hsic60m_clk[i]);
 776                         dev_err(dev, "Failed to get clock : %s : %d\n",
 777                                 clkname, ret);
 778                         goto err_mem;
 779                 }
 780         }
 781
 782         if (is_ehci_phy_mode(pdata->port_mode[0])) {
 783                 ret = clk_set_parent(omap->utmi_p1_gfclk,
 784                                         omap->xclk60mhsp1_ck);
 785                 if (ret != 0) {
 786                         dev_err(dev, "xclk60mhsp1_ck set parent failed: %d\n",
 787                                 ret);
 788                         goto err_mem;
 789                 }
 790         } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
 791                 ret = clk_set_parent(omap->utmi_p1_gfclk,
 792                                         omap->init_60m_fclk);
 793                 if (ret != 0) {
 794                         dev_err(dev, "P0 init_60m_fclk set parent failed: %d\n",
 795                                 ret);
 796                         goto err_mem;
 797                 }
 798         }
 799
 800         if (is_ehci_phy_mode(pdata->port_mode[1])) {
 801                 ret = clk_set_parent(omap->utmi_p2_gfclk,
 802                                         omap->xclk60mhsp2_ck);
 803                 if (ret != 0) {
 804                         dev_err(dev, "xclk60mhsp2_ck set parent failed: %d\n",
 805                                 ret);
 806                         goto err_mem;
 807                 }
 808         } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
 809                 ret = clk_set_parent(omap->utmi_p2_gfclk,
 810                                                 omap->init_60m_fclk);
 811                 if (ret != 0) {
 812                         dev_err(dev, "P1 init_60m_fclk set parent failed: %d\n",
 813                                 ret);
 814                         goto err_mem;
 815                 }
 816         }
 817
 818 initialize:
 819         omap_usbhs_init(dev);
 820
 821         if (dev->of_node) {
 822                 ret = of_platform_populate(dev->of_node,
 823                                 usbhs_child_match_table, NULL, dev);
 824
 825                 if (ret) {
 826                         dev_err(dev, "Failed to create DT children: %d\n", ret);
 827                         goto err_mem;
 828                 }
 829
 830         } else {
 831                 ret = omap_usbhs_alloc_children(pdev);
 832                 if (ret) {
 833                         dev_err(dev, "omap_usbhs_alloc_children failed: %d\n",
 834                                                 ret);
 835                         goto err_mem;
 836                 }
 837         }
 838
 839         return 0;
 840
 841 err_mem:
 842         pm_runtime_disable(dev);
 843
 844         return ret;
 845 }
 846
 847 static int usbhs_omap_remove_child(struct device *dev, void *data)
 848 {
 849         dev_info(dev, "unregistering\n");
 850         platform_device_unregister(to_platform_device(dev));
 851         return 0;
 852 }
 853
 854 /**
 855  * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
 856  * @pdev: USB Host Controller being removed
 857  *
 858  * Reverses the effect of usbhs_omap_probe().
 859  */
 860 static int usbhs_omap_remove(struct platform_device *pdev)
 861 {
 862         pm_runtime_disable(&pdev->dev);
 863
 864         /* remove children */
 865         device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
 866         return 0;
 867 }
 868
 869 static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
 870         .runtime_suspend        = usbhs_runtime_suspend,
 871         .runtime_resume         = usbhs_runtime_resume,
 872 };
 873
 874 static const struct of_device_id usbhs_omap_dt_ids[] = {
 875         { .compatible = "ti,usbhs-host" },
 876         { }
 877 };
 878
 879 MODULE_DEVICE_TABLE(of, usbhs_omap_dt_ids);
 880
 881
 882 static struct platform_driver usbhs_omap_driver = {
 883         .driver = {
 884                 .name           = (char *)usbhs_driver_name,
 885                 .owner          = THIS_MODULE,
 886                 .pm             = &usbhsomap_dev_pm_ops,
 887                 .of_match_table = usbhs_omap_dt_ids,
 888         },
 889         .remove         = usbhs_omap_remove,
 890 };
 891
 892 MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
 893 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
 894 MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
 895 MODULE_LICENSE("GPL v2");
 896 MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
 897
 898 static int __init omap_usbhs_drvinit(void)
 899 {
 900         return platform_driver_probe(&usbhs_omap_driver, usbhs_omap_probe);
 901 }
 902
 903 /*
 904  * init before ehci and ohci drivers;
 905  * The usbhs core driver should be initialized much before
 906  * the omap ehci and ohci probe functions are called.
 907  * This usbhs core driver should be initialized after
 908  * usb tll driver
 909  */
 910 fs_initcall_sync(omap_usbhs_drvinit);
 911
 912 static void __exit omap_usbhs_drvexit(void)
 913 {
 914         platform_driver_unregister(&usbhs_omap_driver);
 915 }
 916 module_exit(omap_usbhs_drvexit);