2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31 #include "cx23888-ir.h"
33 /* ------------------------------------------------------------------ */
34 /* board config info */
36 struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
39 /* Ensure safe default for unknown boards */
42 .type = CX23885_VMUX_COMPOSITE1,
45 .type = CX23885_VMUX_COMPOSITE2,
48 .type = CX23885_VMUX_COMPOSITE3,
51 .type = CX23885_VMUX_COMPOSITE4,
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
57 .portc = CX23885_MPEG_DVB,
59 .type = CX23885_VMUX_TELEVISION,
63 .type = CX23885_VMUX_DEBUG,
67 .type = CX23885_VMUX_COMPOSITE1,
71 .type = CX23885_VMUX_SVIDEO,
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
78 .porta = CX23885_ANALOG_VIDEO,
79 .portb = CX23885_MPEG_ENCODER,
80 .portc = CX23885_MPEG_DVB,
81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
84 .type = CX23885_VMUX_TELEVISION,
85 .vmux = CX25840_VIN7_CH3 |
90 .type = CX23885_VMUX_COMPOSITE1,
91 .vmux = CX25840_VIN7_CH3 |
96 .type = CX23885_VMUX_SVIDEO,
97 .vmux = CX25840_VIN7_CH3 |
104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
108 .type = CX23885_VMUX_TELEVISION,
112 .type = CX23885_VMUX_DEBUG,
116 .type = CX23885_VMUX_COMPOSITE1,
120 .type = CX23885_VMUX_SVIDEO,
125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
127 .portb = CX23885_MPEG_DVB,
129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
151 .portb = CX23885_MPEG_DVB,
152 .portc = CX23885_MPEG_DVB,
154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
187 .portc = CX23885_MPEG_DVB,
189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
203 .tuner_type = TUNER_XC5000,
205 .porta = CX23885_ANALOG_VIDEO,
206 .portb = CX23885_MPEG_DVB,
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
232 .tuner_type = TUNER_XC5000,
234 .porta = CX23885_ANALOG_VIDEO,
235 .portb = CX23885_MPEG_DVB,
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
268 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
269 .name = "Hauppauge WinTV-HVR1290",
270 .portc = CX23885_MPEG_DVB,
272 [CX23885_BOARD_MYGICA_X8558PRO] = {
273 .name = "Mygica X8558 PRO DMB-TH",
274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB,
277 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
278 .name = "LEADTEK WinFast PxTV1200",
279 .porta = CX23885_ANALOG_VIDEO,
280 .tuner_type = TUNER_XC2028,
283 .type = CX23885_VMUX_TELEVISION,
284 .vmux = CX25840_VIN2_CH1 |
288 .type = CX23885_VMUX_COMPOSITE1,
289 .vmux = CX25840_COMPOSITE1,
291 .type = CX23885_VMUX_SVIDEO,
292 .vmux = CX25840_SVIDEO_LUMA3 |
293 CX25840_SVIDEO_CHROMA4,
295 .type = CX23885_VMUX_COMPONENT,
296 .vmux = CX25840_VIN7_CH1 |
299 CX25840_COMPONENT_ON,
303 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
305 /* ------------------------------------------------------------------ */
306 /* PCI subsystem IDs */
308 struct cx23885_subid cx23885_subids[] = {
312 .card = CX23885_BOARD_UNKNOWN,
316 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
320 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
324 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
328 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
332 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
336 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
340 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
344 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
348 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
352 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
356 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
360 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
364 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
368 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
372 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
376 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
380 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
384 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
388 .card = CX23885_BOARD_TBS_6920,
392 .card = CX23885_BOARD_TEVII_S470,
396 .card = CX23885_BOARD_DVBWORLD_2005,
400 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
424 .card = CX23885_BOARD_MYGICA_X8506,
428 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
436 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
444 .card = CX23885_BOARD_MYGICA_X8558PRO,
448 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
451 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
453 void cx23885_card_list(struct cx23885_dev *dev)
457 if (0 == dev->pci->subsystem_vendor &&
458 0 == dev->pci->subsystem_device) {
460 "%s: Board has no valid PCIe Subsystem ID and can't\n"
461 "%s: be autodetected. Pass card=<n> insmod option\n"
462 "%s: to workaround that. Redirect complaints to the\n"
463 "%s: vendor of the TV card. Best regards,\n"
465 dev->name, dev->name, dev->name, dev->name, dev->name);
468 "%s: Your board isn't known (yet) to the driver.\n"
469 "%s: Try to pick one of the existing card configs via\n"
470 "%s: card=<n> insmod option. Updating to the latest\n"
471 "%s: version might help as well.\n",
472 dev->name, dev->name, dev->name, dev->name);
474 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
476 for (i = 0; i < cx23885_bcount; i++)
477 printk(KERN_INFO "%s: card=%d -> %s\n",
478 dev->name, i, cx23885_boards[i].name);
481 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
485 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
488 /* Make sure we support the board model */
491 /* WinTV-HVR1270 (PCIe, Retail, half height)
492 * ATSC/QAM and basic analog, IR Blast */
494 /* WinTV-HVR1210 (PCIe, Retail, half height)
495 * DVB-T and basic analog, IR Blast */
497 /* WinTV-HVR1270 (PCIe, Retail, half height)
498 * ATSC/QAM and basic analog, IR Recv */
500 /* WinTV-HVR1210 (PCIe, Retail, half height)
501 * DVB-T and basic analog, IR Recv */
503 /* WinTV-HVR1275 (PCIe, Retail, half height)
504 * ATSC/QAM and basic analog, IR Recv */
506 /* WinTV-HVR1210 (PCIe, Retail, half height)
507 * DVB-T and basic analog, IR Recv */
509 /* WinTV-HVR1270 (PCIe, Retail, full height)
510 * ATSC/QAM and basic analog, IR Blast */
512 /* WinTV-HVR1210 (PCIe, Retail, full height)
513 * DVB-T and basic analog, IR Blast */
515 /* WinTV-HVR1270 (PCIe, Retail, full height)
516 * ATSC/QAM and basic analog, IR Recv */
518 /* WinTV-HVR1210 (PCIe, Retail, full height)
519 * DVB-T and basic analog, IR Recv */
521 /* WinTV-HVR1275 (PCIe, Retail, full height)
522 * ATSC/QAM and basic analog, IR Recv */
524 /* WinTV-HVR1210 (PCIe, Retail, full height)
525 * DVB-T and basic analog, IR Recv */
527 /* WinTV-HVR1200 (PCIe, Retail, full height)
528 * DVB-T and basic analog */
530 /* WinTV-HVR1200 (PCIe, OEM, half height)
531 * DVB-T and basic analog */
533 /* WinTV-HVR1200 (PCIe, OEM, half height)
534 * DVB-T and basic analog */
536 /* WinTV-HVR1200 (PCIe, OEM, full height)
537 * DVB-T and basic analog */
539 /* WinTV-HVR1200 (PCIe, OEM, half height)
540 * DVB-T and basic analog */
542 /* WinTV-HVR1200 (PCIe, OEM, full height)
543 * DVB-T and basic analog */
545 /* WinTV-HVR1200 (PCIe, OEM, full height)
546 * DVB-T and basic analog */
548 /* WinTV-HVR1200 (PCIe, OEM, half height)
549 * DVB-T and basic analog */
551 /* WinTV-HVR1200 (PCIe, OEM, full height)
552 * DVB-T and basic analog */
554 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
555 channel ATSC and MPEG2 HW Encoder */
557 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
560 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
563 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
566 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
569 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
570 Dual channel ATSC and MPEG2 HW Encoder */
572 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
573 Dual channel ATSC and MPEG2 HW Encoder */
575 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
576 Dual channel ATSC and MPEG2 HW Encoder */
578 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
579 Dual channel ATSC and MPEG2 HW Encoder */
581 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
582 Dual channel ATSC and MPEG2 HW Encoder */
584 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
585 ATSC and Basic analog */
587 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
588 ATSC and Basic analog */
590 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
591 ATSC and Basic analog */
593 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
594 ATSC and Basic analog */
596 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
597 ATSC and Basic analog */
599 /* WinTV-HVR1400 (Express Card, Retail, IR,
600 * DVB-T and Basic analog */
602 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
603 * DVB-T and MPEG2 HW Encoder */
605 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
606 * DVB-T and MPEG2 HW Encoder */
609 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
610 Dual channel ATSC and MPEG2 HW Encoder */
613 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
614 Dual channel ATSC and Basic analog */
617 printk(KERN_WARNING "%s: warning: "
618 "unknown hauppauge model #%d\n",
619 dev->name, tv.model);
623 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
624 dev->name, tv.model);
627 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
629 struct cx23885_tsport *port = priv;
630 struct cx23885_dev *dev = port->dev;
633 if (command == XC2028_RESET_CLK)
637 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
642 switch (dev->board) {
643 case CX23885_BOARD_HAUPPAUGE_HVR1400:
644 case CX23885_BOARD_HAUPPAUGE_HVR1500:
645 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
646 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
647 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
648 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
649 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
650 /* Tuner Reset Command */
653 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
654 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
655 /* Two identical tuners on two different i2c buses,
656 * we need to reset the correct gpio. */
659 else if (port->nr == 2)
665 /* Drive the tuner into reset and back out */
666 cx_clear(GP0_IO, bitmask);
668 cx_set(GP0_IO, bitmask);
674 void cx23885_gpio_setup(struct cx23885_dev *dev)
676 switch (dev->board) {
677 case CX23885_BOARD_HAUPPAUGE_HVR1250:
678 /* GPIO-0 cx24227 demodulator reset */
679 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
681 case CX23885_BOARD_HAUPPAUGE_HVR1500:
682 /* GPIO-0 cx24227 demodulator */
683 /* GPIO-2 xc3028 tuner */
685 /* Put the parts into reset */
686 cx_set(GP0_IO, 0x00050000);
687 cx_clear(GP0_IO, 0x00000005);
690 /* Bring the parts out of reset */
691 cx_set(GP0_IO, 0x00050005);
693 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
694 /* GPIO-0 cx24227 demodulator reset */
695 /* GPIO-2 xc5000 tuner reset */
696 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
698 case CX23885_BOARD_HAUPPAUGE_HVR1800:
701 /* GPIO-2 8295A Reset */
702 /* GPIO-3-10 cx23417 data0-7 */
703 /* GPIO-11-14 cx23417 addr0-3 */
704 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
708 /* EIO15 Zilog Reset */
709 /* EIO14 S5H1409/CX24227 Reset */
710 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
712 /* Put the demod into reset and protect the eeprom */
713 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
716 /* Bring the demod and blaster out of reset */
717 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
720 /* Force the TDA8295A into reset and back */
721 cx23885_gpio_enable(dev, GPIO_2, 1);
722 cx23885_gpio_set(dev, GPIO_2);
724 cx23885_gpio_clear(dev, GPIO_2);
726 cx23885_gpio_set(dev, GPIO_2);
729 case CX23885_BOARD_HAUPPAUGE_HVR1200:
730 /* GPIO-0 tda10048 demodulator reset */
731 /* GPIO-2 tda18271 tuner reset */
733 /* Put the parts into reset and back */
734 cx_set(GP0_IO, 0x00050000);
736 cx_clear(GP0_IO, 0x00000005);
738 cx_set(GP0_IO, 0x00050005);
740 case CX23885_BOARD_HAUPPAUGE_HVR1700:
741 /* GPIO-0 TDA10048 demodulator reset */
742 /* GPIO-2 TDA8295A Reset */
743 /* GPIO-3-10 cx23417 data0-7 */
744 /* GPIO-11-14 cx23417 addr0-3 */
745 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
747 /* The following GPIO's are on the interna AVCore (cx25840) */
749 /* GPIO-20 IR_TX 416/DVBT Select */
750 /* GPIO-21 IIS DAT */
751 /* GPIO-22 IIS WCLK */
752 /* GPIO-23 IIS BCLK */
754 /* Put the parts into reset and back */
755 cx_set(GP0_IO, 0x00050000);
757 cx_clear(GP0_IO, 0x00000005);
759 cx_set(GP0_IO, 0x00050005);
761 case CX23885_BOARD_HAUPPAUGE_HVR1400:
762 /* GPIO-0 Dibcom7000p demodulator reset */
763 /* GPIO-2 xc3028L tuner reset */
766 /* Put the parts into reset and back */
767 cx_set(GP0_IO, 0x00050000);
769 cx_clear(GP0_IO, 0x00000005);
771 cx_set(GP0_IO, 0x00050005);
773 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
774 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
775 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
776 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
777 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
779 /* Put the parts into reset and back */
780 cx_set(GP0_IO, 0x000f0000);
782 cx_clear(GP0_IO, 0x0000000f);
784 cx_set(GP0_IO, 0x000f000f);
786 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
787 /* GPIO-0 portb xc3028 reset */
788 /* GPIO-1 portb zl10353 reset */
789 /* GPIO-2 portc xc3028 reset */
790 /* GPIO-3 portc zl10353 reset */
792 /* Put the parts into reset and back */
793 cx_set(GP0_IO, 0x000f0000);
795 cx_clear(GP0_IO, 0x0000000f);
797 cx_set(GP0_IO, 0x000f000f);
799 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
800 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
801 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
802 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
803 /* GPIO-2 xc3028 tuner reset */
805 /* The following GPIO's are on the internal AVCore (cx25840) */
806 /* GPIO-? zl10353 demod reset */
808 /* Put the parts into reset and back */
809 cx_set(GP0_IO, 0x00040000);
811 cx_clear(GP0_IO, 0x00000004);
813 cx_set(GP0_IO, 0x00040004);
815 case CX23885_BOARD_TBS_6920:
816 cx_write(MC417_CTL, 0x00000036);
817 cx_write(MC417_OEN, 0x00001000);
818 cx_set(MC417_RWD, 0x00000002);
820 cx_clear(MC417_RWD, 0x00000800);
822 cx_set(MC417_RWD, 0x00000800);
825 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
826 /* GPIO-0 INTA from CiMax1
827 GPIO-1 INTB from CiMax2
829 GPIO-3 to GPIO-10 data/addr for CA
830 GPIO-11 ~CS0 to CiMax1
831 GPIO-12 ~CS1 to CiMax2
832 GPIO-13 ADL0 load LSB addr
833 GPIO-14 ADL1 load MSB addr
834 GPIO-15 ~RDY from CiMax
838 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
839 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
840 cx_clear(GP0_IO, 0x00030004);
841 mdelay(100);/* reset delay */
842 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
843 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
844 /* GPIO-15 IN as ~ACK, rest as OUT */
845 cx_write(MC417_OEN, 0x00001000);
846 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
847 cx_write(MC417_RWD, 0x0000c300);
849 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
851 case CX23885_BOARD_HAUPPAUGE_HVR1270:
852 case CX23885_BOARD_HAUPPAUGE_HVR1275:
853 case CX23885_BOARD_HAUPPAUGE_HVR1255:
854 case CX23885_BOARD_HAUPPAUGE_HVR1210:
855 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
856 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
857 /* GPIO-9 Demod reset */
859 /* Put the parts into reset and back */
860 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
861 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
862 cx23885_gpio_clear(dev, GPIO_9);
864 cx23885_gpio_set(dev, GPIO_9);
866 case CX23885_BOARD_MYGICA_X8506:
867 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
868 /* GPIO-0 (0)Analog / (1)Digital TV */
869 /* GPIO-1 reset XC5000 */
870 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
871 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
872 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
874 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
877 case CX23885_BOARD_MYGICA_X8558PRO:
878 /* GPIO-0 reset first ATBM8830 */
879 /* GPIO-1 reset second ATBM8830 */
880 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
881 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
883 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
886 case CX23885_BOARD_HAUPPAUGE_HVR1850:
887 case CX23885_BOARD_HAUPPAUGE_HVR1290:
891 /* GPIO-3-10 cx23417 data0-7 */
892 /* GPIO-11-14 cx23417 addr0-3 */
893 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
895 /* GPIO-20 C_IR_TX */
896 /* GPIO-21 I2S DAT */
897 /* GPIO-22 I2S WCLK */
898 /* GPIO-23 I2S BCLK */
899 /* ALT GPIO: EXP GPIO LATCH */
902 /* GPIO-14 S5H1411/CX24228 Reset */
903 /* GPIO-13 EEPROM write protect */
904 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
906 /* Put the demod into reset and protect the eeprom */
907 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
910 /* Bring the demod out of reset */
911 mc417_gpio_set(dev, GPIO_14);
915 /* Connected to IF / Mux */
920 int cx23885_ir_init(struct cx23885_dev *dev)
923 switch (dev->board) {
924 case CX23885_BOARD_HAUPPAUGE_HVR1250:
925 case CX23885_BOARD_HAUPPAUGE_HVR1500:
926 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
927 case CX23885_BOARD_HAUPPAUGE_HVR1800:
928 case CX23885_BOARD_HAUPPAUGE_HVR1200:
929 case CX23885_BOARD_HAUPPAUGE_HVR1400:
930 case CX23885_BOARD_HAUPPAUGE_HVR1270:
931 case CX23885_BOARD_HAUPPAUGE_HVR1275:
932 case CX23885_BOARD_HAUPPAUGE_HVR1255:
933 case CX23885_BOARD_HAUPPAUGE_HVR1210:
934 /* FIXME: Implement me */
936 case CX23885_BOARD_HAUPPAUGE_HVR1850:
937 case CX23885_BOARD_HAUPPAUGE_HVR1290:
938 ret = cx23888_ir_probe(dev);
941 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
942 dev->pci_irqmask |= PCI_MSK_IR;
944 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
945 request_module("ir-kbd-i2c");
952 void cx23885_ir_fini(struct cx23885_dev *dev)
954 switch (dev->board) {
955 case CX23885_BOARD_HAUPPAUGE_HVR1850:
956 case CX23885_BOARD_HAUPPAUGE_HVR1290:
957 dev->pci_irqmask &= ~PCI_MSK_IR;
958 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
959 cx23888_ir_remove(dev);
965 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
967 switch (dev->board) {
968 case CX23885_BOARD_HAUPPAUGE_HVR1850:
969 case CX23885_BOARD_HAUPPAUGE_HVR1290:
970 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
971 cx_set(PCI_INT_MSK, PCI_MSK_IR);
976 void cx23885_card_setup(struct cx23885_dev *dev)
978 struct cx23885_tsport *ts1 = &dev->ts1;
979 struct cx23885_tsport *ts2 = &dev->ts2;
981 static u8 eeprom[256];
983 if (dev->i2c_bus[0].i2c_rc == 0) {
984 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
985 tveeprom_read(&dev->i2c_bus[0].i2c_client,
986 eeprom, sizeof(eeprom));
989 switch (dev->board) {
990 case CX23885_BOARD_HAUPPAUGE_HVR1250:
991 case CX23885_BOARD_HAUPPAUGE_HVR1500:
992 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
993 case CX23885_BOARD_HAUPPAUGE_HVR1400:
994 if (dev->i2c_bus[0].i2c_rc == 0)
995 hauppauge_eeprom(dev, eeprom+0x80);
997 case CX23885_BOARD_HAUPPAUGE_HVR1800:
998 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
999 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1000 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1001 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1002 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1003 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1004 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1005 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1006 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1007 if (dev->i2c_bus[0].i2c_rc == 0)
1008 hauppauge_eeprom(dev, eeprom+0xc0);
1012 switch (dev->board) {
1013 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1014 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1015 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1016 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1017 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1018 /* break omitted intentionally */
1019 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1020 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1021 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1022 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1024 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1025 /* Defaults for VID B - Analog encoder */
1026 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1027 ts1->gen_ctrl_val = 0x10e;
1028 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1029 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1031 /* APB_TSVALERR_POL (active low)*/
1032 ts1->vld_misc_val = 0x2000;
1033 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1035 /* Defaults for VID C */
1036 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1037 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1038 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1040 case CX23885_BOARD_TBS_6920:
1041 ts1->gen_ctrl_val = 0x4; /* Parallel */
1042 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1043 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1045 case CX23885_BOARD_TEVII_S470:
1046 case CX23885_BOARD_DVBWORLD_2005:
1047 ts1->gen_ctrl_val = 0x5; /* Parallel */
1048 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1049 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1051 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1052 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1053 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1054 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1055 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1056 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1057 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1059 case CX23885_BOARD_MYGICA_X8506:
1060 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1061 ts1->gen_ctrl_val = 0x5; /* Parallel */
1062 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1063 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1065 case CX23885_BOARD_MYGICA_X8558PRO:
1066 ts1->gen_ctrl_val = 0x5; /* Parallel */
1067 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1068 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1069 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1070 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1071 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1073 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1074 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1075 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1076 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1077 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1078 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1079 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1080 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1081 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1082 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1083 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1084 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1085 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1086 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1087 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1088 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1090 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1091 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1092 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1095 /* Certain boards support analog, or require the avcore to be
1096 * loaded, ensure this happens.
1098 switch (dev->board) {
1099 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1100 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1101 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1102 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1103 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1104 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1105 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1106 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1107 case CX23885_BOARD_MYGICA_X8506:
1108 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1109 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1110 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1111 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1112 &dev->i2c_bus[2].i2c_adap,
1113 "cx25840", "cx25840", 0x88 >> 1, NULL);
1114 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1118 /* AUX-PLL 27MHz CLK */
1119 switch (dev->board) {
1120 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1121 netup_initialize(dev);
1126 /* ------------------------------------------------------------------ */