Merge tag 'regulator-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / drivers / media / rc / img-ir / img-ir-hw.c
1 /*
2  * ImgTec IR Hardware Decoder found in PowerDown Controller.
3  *
4  * Copyright 2010-2014 Imagination Technologies Ltd.
5  *
6  * This ties into the input subsystem using the RC-core. Protocol support is
7  * provided in separate modules which provide the parameters and scancode
8  * translation functions to set up the hardware decoder and interpret the
9  * resulting input.
10  */
11
12 #include <linux/bitops.h>
13 #include <linux/clk.h>
14 #include <linux/interrupt.h>
15 #include <linux/spinlock.h>
16 #include <linux/timer.h>
17 #include <media/rc-core.h>
18 #include "img-ir.h"
19
20 /* Decoders lock (only modified to preprocess them) */
21 static DEFINE_SPINLOCK(img_ir_decoders_lock);
22
23 extern struct img_ir_decoder img_ir_nec;
24 extern struct img_ir_decoder img_ir_jvc;
25 extern struct img_ir_decoder img_ir_sony;
26 extern struct img_ir_decoder img_ir_sharp;
27 extern struct img_ir_decoder img_ir_sanyo;
28
29 static bool img_ir_decoders_preprocessed;
30 static struct img_ir_decoder *img_ir_decoders[] = {
31 #ifdef CONFIG_IR_IMG_NEC
32         &img_ir_nec,
33 #endif
34 #ifdef CONFIG_IR_IMG_JVC
35         &img_ir_jvc,
36 #endif
37 #ifdef CONFIG_IR_IMG_SONY
38         &img_ir_sony,
39 #endif
40 #ifdef CONFIG_IR_IMG_SHARP
41         &img_ir_sharp,
42 #endif
43 #ifdef CONFIG_IR_IMG_SANYO
44         &img_ir_sanyo,
45 #endif
46         NULL
47 };
48
49 #define IMG_IR_F_FILTER         BIT(RC_FILTER_NORMAL)   /* enable filtering */
50 #define IMG_IR_F_WAKE           BIT(RC_FILTER_WAKEUP)   /* enable waking */
51
52 /* code type quirks */
53
54 #define IMG_IR_QUIRK_CODE_BROKEN        0x1     /* Decode is broken */
55 #define IMG_IR_QUIRK_CODE_LEN_INCR      0x2     /* Bit length needs increment */
56
57 /* functions for preprocessing timings, ensuring max is set */
58
59 static void img_ir_timing_preprocess(struct img_ir_timing_range *range,
60                                      unsigned int unit)
61 {
62         if (range->max < range->min)
63                 range->max = range->min;
64         if (unit) {
65                 /* multiply by unit and convert to microseconds */
66                 range->min = (range->min*unit)/1000;
67                 range->max = (range->max*unit + 999)/1000; /* round up */
68         }
69 }
70
71 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing,
72                                             unsigned int unit)
73 {
74         img_ir_timing_preprocess(&timing->pulse, unit);
75         img_ir_timing_preprocess(&timing->space, unit);
76 }
77
78 static void img_ir_timings_preprocess(struct img_ir_timings *timings,
79                                       unsigned int unit)
80 {
81         img_ir_symbol_timing_preprocess(&timings->ldr, unit);
82         img_ir_symbol_timing_preprocess(&timings->s00, unit);
83         img_ir_symbol_timing_preprocess(&timings->s01, unit);
84         img_ir_symbol_timing_preprocess(&timings->s10, unit);
85         img_ir_symbol_timing_preprocess(&timings->s11, unit);
86         /* default s10 and s11 to s00 and s01 if no leader */
87         if (unit)
88                 /* multiply by unit and convert to microseconds (round up) */
89                 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000;
90 }
91
92 /* functions for filling empty fields with defaults */
93
94 static void img_ir_timing_defaults(struct img_ir_timing_range *range,
95                                    struct img_ir_timing_range *defaults)
96 {
97         if (!range->min)
98                 range->min = defaults->min;
99         if (!range->max)
100                 range->max = defaults->max;
101 }
102
103 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing,
104                                           struct img_ir_symbol_timing *defaults)
105 {
106         img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
107         img_ir_timing_defaults(&timing->space, &defaults->space);
108 }
109
110 static void img_ir_timings_defaults(struct img_ir_timings *timings,
111                                     struct img_ir_timings *defaults)
112 {
113         img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr);
114         img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00);
115         img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01);
116         img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10);
117         img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11);
118         if (!timings->ft.ft_min)
119                 timings->ft.ft_min = defaults->ft.ft_min;
120 }
121
122 /* functions for converting timings to register values */
123
124 /**
125  * img_ir_control() - Convert control struct to control register value.
126  * @control:    Control data
127  *
128  * Returns:     The control register value equivalent of @control.
129  */
130 static u32 img_ir_control(const struct img_ir_control *control)
131 {
132         u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT;
133         if (control->decoden)
134                 ctrl |= IMG_IR_DECODEN;
135         if (control->hdrtog)
136                 ctrl |= IMG_IR_HDRTOG;
137         if (control->ldrdec)
138                 ctrl |= IMG_IR_LDRDEC;
139         if (control->decodinpol)
140                 ctrl |= IMG_IR_DECODINPOL;
141         if (control->bitorien)
142                 ctrl |= IMG_IR_BITORIEN;
143         if (control->d1validsel)
144                 ctrl |= IMG_IR_D1VALIDSEL;
145         if (control->bitinv)
146                 ctrl |= IMG_IR_BITINV;
147         if (control->decodend2)
148                 ctrl |= IMG_IR_DECODEND2;
149         if (control->bitoriend2)
150                 ctrl |= IMG_IR_BITORIEND2;
151         if (control->bitinvd2)
152                 ctrl |= IMG_IR_BITINVD2;
153         return ctrl;
154 }
155
156 /**
157  * img_ir_timing_range_convert() - Convert microsecond range.
158  * @out:        Output timing range in clock cycles with a shift.
159  * @in:         Input timing range in microseconds.
160  * @tolerance:  Tolerance as a fraction of 128 (roughly percent).
161  * @clock_hz:   IR clock rate in Hz.
162  * @shift:      Shift of output units.
163  *
164  * Converts min and max from microseconds to IR clock cycles, applies a
165  * tolerance, and shifts for the register, rounding in the right direction.
166  * Note that in and out can safely be the same object.
167  */
168 static void img_ir_timing_range_convert(struct img_ir_timing_range *out,
169                                         const struct img_ir_timing_range *in,
170                                         unsigned int tolerance,
171                                         unsigned long clock_hz,
172                                         unsigned int shift)
173 {
174         unsigned int min = in->min;
175         unsigned int max = in->max;
176         /* add a tolerance */
177         min = min - (min*tolerance >> 7);
178         max = max + (max*tolerance >> 7);
179         /* convert from microseconds into clock cycles */
180         min = min*clock_hz / 1000000;
181         max = (max*clock_hz + 999999) / 1000000; /* round up */
182         /* apply shift and copy to output */
183         out->min = min >> shift;
184         out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */
185 }
186
187 /**
188  * img_ir_symbol_timing() - Convert symbol timing struct to register value.
189  * @timing:     Symbol timing data
190  * @tolerance:  Timing tolerance where 0-128 represents 0-100%
191  * @clock_hz:   Frequency of source clock in Hz
192  * @pd_shift:   Shift to apply to symbol period
193  * @w_shift:    Shift to apply to symbol width
194  *
195  * Returns:     Symbol timing register value based on arguments.
196  */
197 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing,
198                                 unsigned int tolerance,
199                                 unsigned long clock_hz,
200                                 unsigned int pd_shift,
201                                 unsigned int w_shift)
202 {
203         struct img_ir_timing_range hw_pulse, hw_period;
204         /* we calculate period in hw_period, then convert in place */
205         hw_period.min = timing->pulse.min + timing->space.min;
206         hw_period.max = timing->pulse.max + timing->space.max;
207         img_ir_timing_range_convert(&hw_period, &hw_period,
208                         tolerance, clock_hz, pd_shift);
209         img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
210                         tolerance, clock_hz, w_shift);
211         /* construct register value */
212         return  (hw_period.max  << IMG_IR_PD_MAX_SHIFT) |
213                 (hw_period.min  << IMG_IR_PD_MIN_SHIFT) |
214                 (hw_pulse.max   << IMG_IR_W_MAX_SHIFT)  |
215                 (hw_pulse.min   << IMG_IR_W_MIN_SHIFT);
216 }
217
218 /**
219  * img_ir_free_timing() - Convert free time timing struct to register value.
220  * @timing:     Free symbol timing data
221  * @clock_hz:   Source clock frequency in Hz
222  *
223  * Returns:     Free symbol timing register value.
224  */
225 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing,
226                               unsigned long clock_hz)
227 {
228         unsigned int minlen, maxlen, ft_min;
229         /* minlen is only 5 bits, and round minlen to multiple of 2 */
230         if (timing->minlen < 30)
231                 minlen = timing->minlen & -2;
232         else
233                 minlen = 30;
234         /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */
235         if (timing->maxlen < 48)
236                 maxlen = (timing->maxlen + 1) & -2;
237         else
238                 maxlen = 48;
239         /* convert and shift ft_min, rounding upwards */
240         ft_min = (timing->ft_min*clock_hz + 999999) / 1000000;
241         ft_min = (ft_min + 7) >> 3;
242         /* construct register value */
243         return  (maxlen << IMG_IR_MAXLEN_SHIFT) |
244                 (minlen << IMG_IR_MINLEN_SHIFT) |
245                 (ft_min << IMG_IR_FT_MIN_SHIFT);
246 }
247
248 /**
249  * img_ir_free_timing_dynamic() - Update free time register value.
250  * @st_ft:      Static free time register value from img_ir_free_timing.
251  * @filter:     Current filter which may additionally restrict min/max len.
252  *
253  * Returns:     Updated free time register value based on the current filter.
254  */
255 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter)
256 {
257         unsigned int minlen, maxlen, newminlen, newmaxlen;
258
259         /* round minlen, maxlen to multiple of 2 */
260         newminlen = filter->minlen & -2;
261         newmaxlen = (filter->maxlen + 1) & -2;
262         /* extract min/max len from register */
263         minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT;
264         maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT;
265         /* if the new values are more restrictive, update the register value */
266         if (newminlen > minlen) {
267                 st_ft &= ~IMG_IR_MINLEN;
268                 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT;
269         }
270         if (newmaxlen < maxlen) {
271                 st_ft &= ~IMG_IR_MAXLEN;
272                 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT;
273         }
274         return st_ft;
275 }
276
277 /**
278  * img_ir_timings_convert() - Convert timings to register values
279  * @regs:       Output timing register values
280  * @timings:    Input timing data
281  * @tolerance:  Timing tolerance where 0-128 represents 0-100%
282  * @clock_hz:   Source clock frequency in Hz
283  */
284 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs,
285                                    const struct img_ir_timings *timings,
286                                    unsigned int tolerance,
287                                    unsigned int clock_hz)
288 {
289         /* leader symbol timings are divided by 16 */
290         regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz,
291                         4, 4);
292         /* other symbol timings, pd fields only are divided by 2 */
293         regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz,
294                         1, 0);
295         regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz,
296                         1, 0);
297         regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz,
298                         1, 0);
299         regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz,
300                         1, 0);
301         regs->ft = img_ir_free_timing(&timings->ft, clock_hz);
302 }
303
304 /**
305  * img_ir_decoder_preprocess() - Preprocess timings in decoder.
306  * @decoder:    Decoder to be preprocessed.
307  *
308  * Ensures that the symbol timing ranges are valid with respect to ordering, and
309  * does some fixed conversion on them.
310  */
311 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder)
312 {
313         /* default tolerance */
314         if (!decoder->tolerance)
315                 decoder->tolerance = 10; /* percent */
316         /* and convert tolerance to fraction out of 128 */
317         decoder->tolerance = decoder->tolerance * 128 / 100;
318
319         /* fill in implicit fields */
320         img_ir_timings_preprocess(&decoder->timings, decoder->unit);
321
322         /* do the same for repeat timings if applicable */
323         if (decoder->repeat) {
324                 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit);
325                 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings);
326         }
327 }
328
329 /**
330  * img_ir_decoder_convert() - Generate internal timings in decoder.
331  * @decoder:    Decoder to be converted to internal timings.
332  * @timings:    Timing register values.
333  * @clock_hz:   IR clock rate in Hz.
334  *
335  * Fills out the repeat timings and timing register values for a specific clock
336  * rate.
337  */
338 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder,
339                                    struct img_ir_reg_timings *reg_timings,
340                                    unsigned int clock_hz)
341 {
342         /* calculate control value */
343         reg_timings->ctrl = img_ir_control(&decoder->control);
344
345         /* fill in implicit fields and calculate register values */
346         img_ir_timings_convert(&reg_timings->timings, &decoder->timings,
347                                decoder->tolerance, clock_hz);
348
349         /* do the same for repeat timings if applicable */
350         if (decoder->repeat)
351                 img_ir_timings_convert(&reg_timings->rtimings,
352                                        &decoder->rtimings, decoder->tolerance,
353                                        clock_hz);
354 }
355
356 /**
357  * img_ir_write_timings() - Write timings to the hardware now
358  * @priv:       IR private data
359  * @regs:       Timing register values to write
360  * @type:       RC filter type (RC_FILTER_*)
361  *
362  * Write timing register values @regs to the hardware, taking into account the
363  * current filter which may impose restrictions on the length of the expected
364  * data.
365  */
366 static void img_ir_write_timings(struct img_ir_priv *priv,
367                                  struct img_ir_timing_regvals *regs,
368                                  enum rc_filter_type type)
369 {
370         struct img_ir_priv_hw *hw = &priv->hw;
371
372         /* filter may be more restrictive to minlen, maxlen */
373         u32 ft = regs->ft;
374         if (hw->flags & BIT(type))
375                 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]);
376         /* write to registers */
377         img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);
378         img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);
379         img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);
380         img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);
381         img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);
382         img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);
383         dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
384                 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft);
385 }
386
387 static void img_ir_write_filter(struct img_ir_priv *priv,
388                                 struct img_ir_filter *filter)
389 {
390         if (filter) {
391                 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n",
392                         (unsigned long long)filter->data,
393                         (unsigned long long)filter->mask);
394                 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);
395                 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data
396                                                                         >> 32));
397                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);
398                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask
399                                                                         >> 32));
400         } else {
401                 dev_dbg(priv->dev, "IR clearing filter\n");
402                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);
403                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);
404         }
405 }
406
407 /* caller must have lock */
408 static void _img_ir_set_filter(struct img_ir_priv *priv,
409                                struct img_ir_filter *filter)
410 {
411         struct img_ir_priv_hw *hw = &priv->hw;
412         u32 irq_en, irq_on;
413
414         irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
415         if (filter) {
416                 /* Only use the match interrupt */
417                 hw->filters[RC_FILTER_NORMAL] = *filter;
418                 hw->flags |= IMG_IR_F_FILTER;
419                 irq_on = IMG_IR_IRQ_DATA_MATCH;
420                 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID);
421         } else {
422                 /* Only use the valid interrupt */
423                 hw->flags &= ~IMG_IR_F_FILTER;
424                 irq_en &= ~IMG_IR_IRQ_DATA_MATCH;
425                 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID;
426         }
427         irq_en |= irq_on;
428
429         img_ir_write_filter(priv, filter);
430         /* clear any interrupts we're enabling so we don't handle old ones */
431         img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);
432         img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);
433 }
434
435 /* caller must have lock */
436 static void _img_ir_set_wake_filter(struct img_ir_priv *priv,
437                                     struct img_ir_filter *filter)
438 {
439         struct img_ir_priv_hw *hw = &priv->hw;
440         if (filter) {
441                 /* Enable wake, and copy filter for later */
442                 hw->filters[RC_FILTER_WAKEUP] = *filter;
443                 hw->flags |= IMG_IR_F_WAKE;
444         } else {
445                 /* Disable wake */
446                 hw->flags &= ~IMG_IR_F_WAKE;
447         }
448 }
449
450 /* Callback for setting scancode filter */
451 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type,
452                              struct rc_scancode_filter *sc_filter)
453 {
454         struct img_ir_priv *priv = dev->priv;
455         struct img_ir_priv_hw *hw = &priv->hw;
456         struct img_ir_filter filter, *filter_ptr = &filter;
457         int ret = 0;
458
459         dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n",
460                 type == RC_FILTER_WAKEUP ? "wake " : "",
461                 sc_filter->data,
462                 sc_filter->mask);
463
464         spin_lock_irq(&priv->lock);
465
466         /* filtering can always be disabled */
467         if (!sc_filter->mask) {
468                 filter_ptr = NULL;
469                 goto set_unlock;
470         }
471
472         /* current decoder must support scancode filtering */
473         if (!hw->decoder || !hw->decoder->filter) {
474                 ret = -EINVAL;
475                 goto unlock;
476         }
477
478         /* convert scancode filter to raw filter */
479         filter.minlen = 0;
480         filter.maxlen = ~0;
481         ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols);
482         if (ret)
483                 goto unlock;
484         dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n",
485                 type == RC_FILTER_WAKEUP ? "wake " : "",
486                 (unsigned long long)filter.data,
487                 (unsigned long long)filter.mask);
488
489 set_unlock:
490         /* apply raw filters */
491         switch (type) {
492         case RC_FILTER_NORMAL:
493                 _img_ir_set_filter(priv, filter_ptr);
494                 break;
495         case RC_FILTER_WAKEUP:
496                 _img_ir_set_wake_filter(priv, filter_ptr);
497                 break;
498         default:
499                 ret = -EINVAL;
500         }
501
502 unlock:
503         spin_unlock_irq(&priv->lock);
504         return ret;
505 }
506
507 /**
508  * img_ir_set_decoder() - Set the current decoder.
509  * @priv:       IR private data.
510  * @decoder:    Decoder to use with immediate effect.
511  * @proto:      Protocol bitmap (or 0 to use decoder->type).
512  */
513 static void img_ir_set_decoder(struct img_ir_priv *priv,
514                                const struct img_ir_decoder *decoder,
515                                u64 proto)
516 {
517         struct img_ir_priv_hw *hw = &priv->hw;
518         struct rc_dev *rdev = hw->rdev;
519         u32 ir_status, irq_en;
520         spin_lock_irq(&priv->lock);
521
522         /* switch off and disable interrupts */
523         img_ir_write(priv, IMG_IR_CONTROL, 0);
524         irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
525         img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);
526         img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);
527
528         /* ack any data already detected */
529         ir_status = img_ir_read(priv, IMG_IR_STATUS);
530         if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) {
531                 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
532                 img_ir_write(priv, IMG_IR_STATUS, ir_status);
533                 img_ir_read(priv, IMG_IR_DATA_LW);
534                 img_ir_read(priv, IMG_IR_DATA_UP);
535         }
536
537         /* stop the end timer and switch back to normal mode */
538         del_timer_sync(&hw->end_timer);
539         hw->mode = IMG_IR_M_NORMAL;
540
541         /* clear the wakeup scancode filter */
542         rdev->scancode_filters[RC_FILTER_WAKEUP].data = 0;
543         rdev->scancode_filters[RC_FILTER_WAKEUP].mask = 0;
544
545         /* clear raw filters */
546         _img_ir_set_filter(priv, NULL);
547         _img_ir_set_wake_filter(priv, NULL);
548
549         /* clear the enabled protocols */
550         hw->enabled_protocols = 0;
551
552         /* switch decoder */
553         hw->decoder = decoder;
554         if (!decoder)
555                 goto unlock;
556
557         /* set the enabled protocols */
558         if (!proto)
559                 proto = decoder->type;
560         hw->enabled_protocols = proto;
561
562         /* write the new timings */
563         img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz);
564         img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL);
565
566         /* set up and enable */
567         img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
568
569
570 unlock:
571         spin_unlock_irq(&priv->lock);
572 }
573
574 /**
575  * img_ir_decoder_compatable() - Find whether a decoder will work with a device.
576  * @priv:       IR private data.
577  * @dec:        Decoder to check.
578  *
579  * Returns:     true if @dec is compatible with the device @priv refers to.
580  */
581 static bool img_ir_decoder_compatible(struct img_ir_priv *priv,
582                                       const struct img_ir_decoder *dec)
583 {
584         unsigned int ct;
585
586         /* don't accept decoders using code types which aren't supported */
587         ct = dec->control.code_type;
588         if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN)
589                 return false;
590
591         return true;
592 }
593
594 /**
595  * img_ir_allowed_protos() - Get allowed protocols from global decoder list.
596  * @priv:       IR private data.
597  *
598  * Returns:     Mask of protocols supported by the device @priv refers to.
599  */
600 static u64 img_ir_allowed_protos(struct img_ir_priv *priv)
601 {
602         u64 protos = 0;
603         struct img_ir_decoder **decp;
604
605         for (decp = img_ir_decoders; *decp; ++decp) {
606                 const struct img_ir_decoder *dec = *decp;
607                 if (img_ir_decoder_compatible(priv, dec))
608                         protos |= dec->type;
609         }
610         return protos;
611 }
612
613 /* Callback for changing protocol using sysfs */
614 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type)
615 {
616         struct img_ir_priv *priv = dev->priv;
617         struct img_ir_priv_hw *hw = &priv->hw;
618         struct rc_dev *rdev = hw->rdev;
619         struct img_ir_decoder **decp;
620         u64 wakeup_protocols;
621
622         if (!*ir_type) {
623                 /* disable all protocols */
624                 img_ir_set_decoder(priv, NULL, 0);
625                 goto success;
626         }
627         for (decp = img_ir_decoders; *decp; ++decp) {
628                 const struct img_ir_decoder *dec = *decp;
629                 if (!img_ir_decoder_compatible(priv, dec))
630                         continue;
631                 if (*ir_type & dec->type) {
632                         *ir_type &= dec->type;
633                         img_ir_set_decoder(priv, dec, *ir_type);
634                         goto success;
635                 }
636         }
637         return -EINVAL;
638
639 success:
640         /*
641          * Only allow matching wakeup protocols for now, and only if filtering
642          * is supported.
643          */
644         wakeup_protocols = *ir_type;
645         if (!hw->decoder || !hw->decoder->filter)
646                 wakeup_protocols = 0;
647         rc_set_allowed_wakeup_protocols(rdev, wakeup_protocols);
648         rc_set_enabled_wakeup_protocols(rdev, wakeup_protocols);
649         return 0;
650 }
651
652 /* Changes ir-core protocol device attribute */
653 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto)
654 {
655         struct rc_dev *rdev = priv->hw.rdev;
656
657         spin_lock_irq(&rdev->rc_map.lock);
658         rdev->rc_map.rc_type = __ffs64(proto);
659         spin_unlock_irq(&rdev->rc_map.lock);
660
661         mutex_lock(&rdev->lock);
662         rc_set_enabled_protocols(rdev, proto);
663         rc_set_allowed_wakeup_protocols(rdev, proto);
664         rc_set_enabled_wakeup_protocols(rdev, proto);
665         mutex_unlock(&rdev->lock);
666 }
667
668 /* Set up IR decoders */
669 static void img_ir_init_decoders(void)
670 {
671         struct img_ir_decoder **decp;
672
673         spin_lock(&img_ir_decoders_lock);
674         if (!img_ir_decoders_preprocessed) {
675                 for (decp = img_ir_decoders; *decp; ++decp)
676                         img_ir_decoder_preprocess(*decp);
677                 img_ir_decoders_preprocessed = true;
678         }
679         spin_unlock(&img_ir_decoders_lock);
680 }
681
682 #ifdef CONFIG_PM_SLEEP
683 /**
684  * img_ir_enable_wake() - Switch to wake mode.
685  * @priv:       IR private data.
686  *
687  * Returns:     non-zero if the IR can wake the system.
688  */
689 static int img_ir_enable_wake(struct img_ir_priv *priv)
690 {
691         struct img_ir_priv_hw *hw = &priv->hw;
692         int ret = 0;
693
694         spin_lock_irq(&priv->lock);
695         if (hw->flags & IMG_IR_F_WAKE) {
696                 /* interrupt only on a match */
697                 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
698                 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);
699                 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]);
700                 img_ir_write_timings(priv, &hw->reg_timings.timings,
701                                      RC_FILTER_WAKEUP);
702                 hw->mode = IMG_IR_M_WAKE;
703                 ret = 1;
704         }
705         spin_unlock_irq(&priv->lock);
706         return ret;
707 }
708
709 /**
710  * img_ir_disable_wake() - Switch out of wake mode.
711  * @priv:       IR private data
712  *
713  * Returns:     1 if the hardware should be allowed to wake from a sleep state.
714  *              0 otherwise.
715  */
716 static int img_ir_disable_wake(struct img_ir_priv *priv)
717 {
718         struct img_ir_priv_hw *hw = &priv->hw;
719         int ret = 0;
720
721         spin_lock_irq(&priv->lock);
722         if (hw->flags & IMG_IR_F_WAKE) {
723                 /* restore normal filtering */
724                 if (hw->flags & IMG_IR_F_FILTER) {
725                         img_ir_write(priv, IMG_IR_IRQ_ENABLE,
726                                      (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
727                                      IMG_IR_IRQ_DATA_MATCH);
728                         img_ir_write_filter(priv,
729                                             &hw->filters[RC_FILTER_NORMAL]);
730                 } else {
731                         img_ir_write(priv, IMG_IR_IRQ_ENABLE,
732                                      (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
733                                      IMG_IR_IRQ_DATA_VALID |
734                                      IMG_IR_IRQ_DATA2_VALID);
735                         img_ir_write_filter(priv, NULL);
736                 }
737                 img_ir_write_timings(priv, &hw->reg_timings.timings,
738                                      RC_FILTER_NORMAL);
739                 hw->mode = IMG_IR_M_NORMAL;
740                 ret = 1;
741         }
742         spin_unlock_irq(&priv->lock);
743         return ret;
744 }
745 #endif /* CONFIG_PM_SLEEP */
746
747 /* lock must be held */
748 static void img_ir_begin_repeat(struct img_ir_priv *priv)
749 {
750         struct img_ir_priv_hw *hw = &priv->hw;
751         if (hw->mode == IMG_IR_M_NORMAL) {
752                 /* switch to repeat timings */
753                 img_ir_write(priv, IMG_IR_CONTROL, 0);
754                 hw->mode = IMG_IR_M_REPEATING;
755                 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
756                                      RC_FILTER_NORMAL);
757                 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
758         }
759 }
760
761 /* lock must be held */
762 static void img_ir_end_repeat(struct img_ir_priv *priv)
763 {
764         struct img_ir_priv_hw *hw = &priv->hw;
765         if (hw->mode == IMG_IR_M_REPEATING) {
766                 /* switch to normal timings */
767                 img_ir_write(priv, IMG_IR_CONTROL, 0);
768                 hw->mode = IMG_IR_M_NORMAL;
769                 img_ir_write_timings(priv, &hw->reg_timings.timings,
770                                      RC_FILTER_NORMAL);
771                 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
772         }
773 }
774
775 /* lock must be held */
776 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw)
777 {
778         struct img_ir_priv_hw *hw = &priv->hw;
779         const struct img_ir_decoder *dec = hw->decoder;
780         int ret = IMG_IR_SCANCODE;
781         int scancode;
782         if (dec->scancode)
783                 ret = dec->scancode(len, raw, &scancode, hw->enabled_protocols);
784         else if (len >= 32)
785                 scancode = (u32)raw;
786         else if (len < 32)
787                 scancode = (u32)raw & ((1 << len)-1);
788         dev_dbg(priv->dev, "data (%u bits) = %#llx\n",
789                 len, (unsigned long long)raw);
790         if (ret == IMG_IR_SCANCODE) {
791                 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode);
792                 rc_keydown(hw->rdev, scancode, 0);
793                 img_ir_end_repeat(priv);
794         } else if (ret == IMG_IR_REPEATCODE) {
795                 if (hw->mode == IMG_IR_M_REPEATING) {
796                         dev_dbg(priv->dev, "decoded repeat code\n");
797                         rc_repeat(hw->rdev);
798                 } else {
799                         dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n");
800                 }
801         } else {
802                 dev_dbg(priv->dev, "decode failed (%d)\n", ret);
803                 return;
804         }
805
806
807         if (dec->repeat) {
808                 unsigned long interval;
809
810                 img_ir_begin_repeat(priv);
811
812                 /* update timer, but allowing for 1/8th tolerance */
813                 interval = dec->repeat + (dec->repeat >> 3);
814                 mod_timer(&hw->end_timer,
815                           jiffies + msecs_to_jiffies(interval));
816         }
817 }
818
819 /* timer function to end waiting for repeat. */
820 static void img_ir_end_timer(unsigned long arg)
821 {
822         struct img_ir_priv *priv = (struct img_ir_priv *)arg;
823
824         spin_lock_irq(&priv->lock);
825         img_ir_end_repeat(priv);
826         spin_unlock_irq(&priv->lock);
827 }
828
829 #ifdef CONFIG_COMMON_CLK
830 static void img_ir_change_frequency(struct img_ir_priv *priv,
831                                     struct clk_notifier_data *change)
832 {
833         struct img_ir_priv_hw *hw = &priv->hw;
834
835         dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n",
836                 change->old_rate, change->new_rate);
837
838         spin_lock_irq(&priv->lock);
839         if (hw->clk_hz == change->new_rate)
840                 goto unlock;
841         hw->clk_hz = change->new_rate;
842         /* refresh current timings */
843         if (hw->decoder) {
844                 img_ir_decoder_convert(hw->decoder, &hw->reg_timings,
845                                        hw->clk_hz);
846                 switch (hw->mode) {
847                 case IMG_IR_M_NORMAL:
848                         img_ir_write_timings(priv, &hw->reg_timings.timings,
849                                              RC_FILTER_NORMAL);
850                         break;
851                 case IMG_IR_M_REPEATING:
852                         img_ir_write_timings(priv, &hw->reg_timings.rtimings,
853                                              RC_FILTER_NORMAL);
854                         break;
855 #ifdef CONFIG_PM_SLEEP
856                 case IMG_IR_M_WAKE:
857                         img_ir_write_timings(priv, &hw->reg_timings.timings,
858                                              RC_FILTER_WAKEUP);
859                         break;
860 #endif
861                 }
862         }
863 unlock:
864         spin_unlock_irq(&priv->lock);
865 }
866
867 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action,
868                              void *data)
869 {
870         struct img_ir_priv *priv = container_of(self, struct img_ir_priv,
871                                                 hw.clk_nb);
872         switch (action) {
873         case POST_RATE_CHANGE:
874                 img_ir_change_frequency(priv, data);
875                 break;
876         default:
877                 break;
878         }
879         return NOTIFY_OK;
880 }
881 #endif /* CONFIG_COMMON_CLK */
882
883 /* called with priv->lock held */
884 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
885 {
886         struct img_ir_priv_hw *hw = &priv->hw;
887         u32 ir_status, len, lw, up;
888         unsigned int ct;
889
890         /* use the current decoder */
891         if (!hw->decoder)
892                 return;
893
894         ir_status = img_ir_read(priv, IMG_IR_STATUS);
895         if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)))
896                 return;
897         ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
898         img_ir_write(priv, IMG_IR_STATUS, ir_status);
899
900         len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT;
901         /* some versions report wrong length for certain code types */
902         ct = hw->decoder->control.code_type;
903         if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR)
904                 ++len;
905
906         lw = img_ir_read(priv, IMG_IR_DATA_LW);
907         up = img_ir_read(priv, IMG_IR_DATA_UP);
908         img_ir_handle_data(priv, len, (u64)up << 32 | lw);
909 }
910
911 void img_ir_setup_hw(struct img_ir_priv *priv)
912 {
913         struct img_ir_decoder **decp;
914
915         if (!priv->hw.rdev)
916                 return;
917
918         /* Use the first available decoder (or disable stuff if NULL) */
919         for (decp = img_ir_decoders; *decp; ++decp) {
920                 const struct img_ir_decoder *dec = *decp;
921                 if (img_ir_decoder_compatible(priv, dec)) {
922                         img_ir_set_protocol(priv, dec->type);
923                         img_ir_set_decoder(priv, dec, 0);
924                         return;
925                 }
926         }
927         img_ir_set_decoder(priv, NULL, 0);
928 }
929
930 /**
931  * img_ir_probe_hw_caps() - Probe capabilities of the hardware.
932  * @priv:       IR private data.
933  */
934 static void img_ir_probe_hw_caps(struct img_ir_priv *priv)
935 {
936         struct img_ir_priv_hw *hw = &priv->hw;
937         /*
938          * When a version of the block becomes available without these quirks,
939          * they'll have to depend on the core revision.
940          */
941         hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN]
942                 |= IMG_IR_QUIRK_CODE_LEN_INCR;
943         hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE]
944                 |= IMG_IR_QUIRK_CODE_BROKEN;
945         hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS]
946                 |= IMG_IR_QUIRK_CODE_BROKEN;
947 }
948
949 int img_ir_probe_hw(struct img_ir_priv *priv)
950 {
951         struct img_ir_priv_hw *hw = &priv->hw;
952         struct rc_dev *rdev;
953         int error;
954
955         /* Ensure hardware decoders have been preprocessed */
956         img_ir_init_decoders();
957
958         /* Probe hardware capabilities */
959         img_ir_probe_hw_caps(priv);
960
961         /* Set up the end timer */
962         setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv);
963
964         /* Register a clock notifier */
965         if (!IS_ERR(priv->clk)) {
966                 hw->clk_hz = clk_get_rate(priv->clk);
967 #ifdef CONFIG_COMMON_CLK
968                 hw->clk_nb.notifier_call = img_ir_clk_notify;
969                 error = clk_notifier_register(priv->clk, &hw->clk_nb);
970                 if (error)
971                         dev_warn(priv->dev,
972                                  "failed to register clock notifier\n");
973 #endif
974         } else {
975                 hw->clk_hz = 32768;
976         }
977
978         /* Allocate hardware decoder */
979         hw->rdev = rdev = rc_allocate_device();
980         if (!rdev) {
981                 dev_err(priv->dev, "cannot allocate input device\n");
982                 error = -ENOMEM;
983                 goto err_alloc_rc;
984         }
985         rdev->priv = priv;
986         rdev->map_name = RC_MAP_EMPTY;
987         rc_set_allowed_protocols(rdev, img_ir_allowed_protos(priv));
988         rdev->input_name = "IMG Infrared Decoder";
989         rdev->s_filter = img_ir_set_filter;
990
991         /* Register hardware decoder */
992         error = rc_register_device(rdev);
993         if (error) {
994                 dev_err(priv->dev, "failed to register IR input device\n");
995                 goto err_register_rc;
996         }
997
998         /*
999          * Set this after rc_register_device as no protocols have been
1000          * registered yet.
1001          */
1002         rdev->change_protocol = img_ir_change_protocol;
1003
1004         device_init_wakeup(priv->dev, 1);
1005
1006         return 0;
1007
1008 err_register_rc:
1009         img_ir_set_decoder(priv, NULL, 0);
1010         hw->rdev = NULL;
1011         rc_free_device(rdev);
1012 err_alloc_rc:
1013 #ifdef CONFIG_COMMON_CLK
1014         if (!IS_ERR(priv->clk))
1015                 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1016 #endif
1017         return error;
1018 }
1019
1020 void img_ir_remove_hw(struct img_ir_priv *priv)
1021 {
1022         struct img_ir_priv_hw *hw = &priv->hw;
1023         struct rc_dev *rdev = hw->rdev;
1024         if (!rdev)
1025                 return;
1026         img_ir_set_decoder(priv, NULL, 0);
1027         hw->rdev = NULL;
1028         rc_unregister_device(rdev);
1029 #ifdef CONFIG_COMMON_CLK
1030         if (!IS_ERR(priv->clk))
1031                 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1032 #endif
1033 }
1034
1035 #ifdef CONFIG_PM_SLEEP
1036 int img_ir_suspend(struct device *dev)
1037 {
1038         struct img_ir_priv *priv = dev_get_drvdata(dev);
1039
1040         if (device_may_wakeup(dev) && img_ir_enable_wake(priv))
1041                 enable_irq_wake(priv->irq);
1042         return 0;
1043 }
1044
1045 int img_ir_resume(struct device *dev)
1046 {
1047         struct img_ir_priv *priv = dev_get_drvdata(dev);
1048
1049         if (device_may_wakeup(dev) && img_ir_disable_wake(priv))
1050                 disable_irq_wake(priv->irq);
1051         return 0;
1052 }
1053 #endif  /* CONFIG_PM_SLEEP */