ecryptfs: convert to file_write_and_wait in ->fsync
[sfrench/cifs-2.6.git] / drivers / media / pci / ddbridge / ddbridge-core.c
1 /*
2  * ddbridge.c: Digital Devices PCIe bridge driver
3  *
4  * Copyright (C) 2010-2011 Digital Devices GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * version 2 only, as published by the Free Software Foundation.
9  *
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * To obtain the license, point your browser to
17  * http://www.gnu.org/copyleft/gpl.html
18  */
19
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/poll.h>
26 #include <linux/io.h>
27 #include <linux/pci.h>
28 #include <linux/pci_ids.h>
29 #include <linux/timer.h>
30 #include <linux/i2c.h>
31 #include <linux/swab.h>
32 #include <linux/vmalloc.h>
33 #include "ddbridge.h"
34
35 #include "ddbridge-regs.h"
36
37 #include "tda18271c2dd.h"
38 #include "stv6110x.h"
39 #include "stv090x.h"
40 #include "lnbh24.h"
41 #include "drxk.h"
42 #include "stv0367.h"
43 #include "stv0367_priv.h"
44 #include "cxd2841er.h"
45 #include "tda18212.h"
46
47 static int xo2_speed = 2;
48 module_param(xo2_speed, int, 0444);
49 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards");
50
51 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
52
53 /* MSI had problems with lost interrupts, fixed but needs testing */
54 #undef CONFIG_PCI_MSI
55
56 /******************************************************************************/
57
58 static int i2c_io(struct i2c_adapter *adapter, u8 adr,
59                   u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
60 {
61         struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
62                                    .buf  = wbuf, .len   = wlen },
63                                   {.addr = adr,  .flags = I2C_M_RD,
64                                    .buf  = rbuf,  .len   = rlen } };
65         return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
66 }
67
68 static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
69 {
70         struct i2c_msg msg = {.addr = adr, .flags = 0,
71                               .buf = data, .len = len};
72
73         return (i2c_transfer(adap, &msg, 1) == 1) ? 0 : -1;
74 }
75
76 static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
77 {
78         struct i2c_msg msgs[1] = {{.addr = adr,  .flags = I2C_M_RD,
79                                    .buf  = val,  .len   = 1 } };
80         return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
81 }
82
83 static int i2c_read_regs(struct i2c_adapter *adapter,
84                          u8 adr, u8 reg, u8 *val, u8 len)
85 {
86         struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
87                                    .buf  = &reg, .len   = 1 },
88                                   {.addr = adr,  .flags = I2C_M_RD,
89                                    .buf  = val,  .len   = len } };
90         return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
91 }
92
93 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val)
94 {
95         return i2c_read_regs(adapter, adr, reg, val, 1);
96 }
97
98 static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
99                           u16 reg, u8 *val)
100 {
101         u8 msg[2] = {reg>>8, reg&0xff};
102         struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
103                                    .buf  = msg, .len   = 2},
104                                   {.addr = adr, .flags = I2C_M_RD,
105                                    .buf  = val, .len   = 1} };
106         return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
107 }
108
109 static int i2c_write_reg(struct i2c_adapter *adap, u8 adr,
110                          u8 reg, u8 val)
111 {
112         u8 msg[2] = {reg, val};
113
114         return i2c_write(adap, adr, msg, 2);
115 }
116
117 static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
118 {
119         struct ddb *dev = i2c->dev;
120         long stat;
121         u32 val;
122
123         i2c->done = 0;
124         ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND);
125         stat = wait_event_timeout(i2c->wq, i2c->done == 1, HZ);
126         if (stat == 0) {
127                 printk(KERN_ERR "I2C timeout\n");
128                 { /* MSI debugging*/
129                         u32 istat = ddbreadl(INTERRUPT_STATUS);
130                         printk(KERN_ERR "IRS %08x\n", istat);
131                         ddbwritel(istat, INTERRUPT_ACK);
132                 }
133                 return -EIO;
134         }
135         val = ddbreadl(i2c->regs+I2C_COMMAND);
136         if (val & 0x70000)
137                 return -EIO;
138         return 0;
139 }
140
141 static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
142                                struct i2c_msg msg[], int num)
143 {
144         struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
145         struct ddb *dev = i2c->dev;
146         u8 addr = 0;
147
148         if (num)
149                 addr = msg[0].addr;
150
151         if (num == 2 && msg[1].flags & I2C_M_RD &&
152             !(msg[0].flags & I2C_M_RD)) {
153                 memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf,
154                             msg[0].buf, msg[0].len);
155                 ddbwritel(msg[0].len|(msg[1].len << 16),
156                           i2c->regs+I2C_TASKLENGTH);
157                 if (!ddb_i2c_cmd(i2c, addr, 1)) {
158                         memcpy_fromio(msg[1].buf,
159                                       dev->regs + I2C_TASKMEM_BASE + i2c->rbuf,
160                                       msg[1].len);
161                         return num;
162                 }
163         }
164
165         if (num == 1 && !(msg[0].flags & I2C_M_RD)) {
166                 ddbcpyto(I2C_TASKMEM_BASE + i2c->wbuf, msg[0].buf, msg[0].len);
167                 ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH);
168                 if (!ddb_i2c_cmd(i2c, addr, 2))
169                         return num;
170         }
171         if (num == 1 && (msg[0].flags & I2C_M_RD)) {
172                 ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);
173                 if (!ddb_i2c_cmd(i2c, addr, 3)) {
174                         ddbcpyfrom(msg[0].buf,
175                                    I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len);
176                         return num;
177                 }
178         }
179         return -EIO;
180 }
181
182
183 static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
184 {
185         return I2C_FUNC_SMBUS_EMUL;
186 }
187
188 static struct i2c_algorithm ddb_i2c_algo = {
189         .master_xfer   = ddb_i2c_master_xfer,
190         .functionality = ddb_i2c_functionality,
191 };
192
193 static void ddb_i2c_release(struct ddb *dev)
194 {
195         int i;
196         struct ddb_i2c *i2c;
197         struct i2c_adapter *adap;
198
199         for (i = 0; i < dev->info->port_num; i++) {
200                 i2c = &dev->i2c[i];
201                 adap = &i2c->adap;
202                 i2c_del_adapter(adap);
203         }
204 }
205
206 static int ddb_i2c_init(struct ddb *dev)
207 {
208         int i, j, stat = 0;
209         struct ddb_i2c *i2c;
210         struct i2c_adapter *adap;
211
212         for (i = 0; i < dev->info->port_num; i++) {
213                 i2c = &dev->i2c[i];
214                 i2c->dev = dev;
215                 i2c->nr = i;
216                 i2c->wbuf = i * (I2C_TASKMEM_SIZE / 4);
217                 i2c->rbuf = i2c->wbuf + (I2C_TASKMEM_SIZE / 8);
218                 i2c->regs = 0x80 + i * 0x20;
219                 ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING);
220                 ddbwritel((i2c->rbuf << 16) | i2c->wbuf,
221                           i2c->regs + I2C_TASKADDRESS);
222                 init_waitqueue_head(&i2c->wq);
223
224                 adap = &i2c->adap;
225                 i2c_set_adapdata(adap, i2c);
226 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
227                 adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
228 #else
229 #ifdef I2C_CLASS_TV_ANALOG
230                 adap->class = I2C_CLASS_TV_ANALOG;
231 #endif
232 #endif
233                 strcpy(adap->name, "ddbridge");
234                 adap->algo = &ddb_i2c_algo;
235                 adap->algo_data = (void *)i2c;
236                 adap->dev.parent = &dev->pdev->dev;
237                 stat = i2c_add_adapter(adap);
238                 if (stat)
239                         break;
240         }
241         if (stat)
242                 for (j = 0; j < i; j++) {
243                         i2c = &dev->i2c[j];
244                         adap = &i2c->adap;
245                         i2c_del_adapter(adap);
246                 }
247         return stat;
248 }
249
250
251 /******************************************************************************/
252 /******************************************************************************/
253 /******************************************************************************/
254
255 #if 0
256 static void set_table(struct ddb *dev, u32 off,
257                       dma_addr_t *pbuf, u32 num)
258 {
259         u32 i, base;
260         u64 mem;
261
262         base = DMA_BASE_ADDRESS_TABLE + off;
263         for (i = 0; i < num; i++) {
264                 mem = pbuf[i];
265                 ddbwritel(mem & 0xffffffff, base + i * 8);
266                 ddbwritel(mem >> 32, base + i * 8 + 4);
267         }
268 }
269 #endif
270
271 static void ddb_address_table(struct ddb *dev)
272 {
273         u32 i, j, base;
274         u64 mem;
275         dma_addr_t *pbuf;
276
277         for (i = 0; i < dev->info->port_num * 2; i++) {
278                 base = DMA_BASE_ADDRESS_TABLE + i * 0x100;
279                 pbuf = dev->input[i].pbuf;
280                 for (j = 0; j < dev->input[i].dma_buf_num; j++) {
281                         mem = pbuf[j];
282                         ddbwritel(mem & 0xffffffff, base + j * 8);
283                         ddbwritel(mem >> 32, base + j * 8 + 4);
284                 }
285         }
286         for (i = 0; i < dev->info->port_num; i++) {
287                 base = DMA_BASE_ADDRESS_TABLE + 0x800 + i * 0x100;
288                 pbuf = dev->output[i].pbuf;
289                 for (j = 0; j < dev->output[i].dma_buf_num; j++) {
290                         mem = pbuf[j];
291                         ddbwritel(mem & 0xffffffff, base + j * 8);
292                         ddbwritel(mem >> 32, base + j * 8 + 4);
293                 }
294         }
295 }
296
297 static void io_free(struct pci_dev *pdev, u8 **vbuf,
298                     dma_addr_t *pbuf, u32 size, int num)
299 {
300         int i;
301
302         for (i = 0; i < num; i++) {
303                 if (vbuf[i]) {
304                         pci_free_consistent(pdev, size, vbuf[i], pbuf[i]);
305                         vbuf[i] = NULL;
306                 }
307         }
308 }
309
310 static int io_alloc(struct pci_dev *pdev, u8 **vbuf,
311                     dma_addr_t *pbuf, u32 size, int num)
312 {
313         int i;
314
315         for (i = 0; i < num; i++) {
316                 vbuf[i] = pci_alloc_consistent(pdev, size, &pbuf[i]);
317                 if (!vbuf[i])
318                         return -ENOMEM;
319         }
320         return 0;
321 }
322
323 static int ddb_buffers_alloc(struct ddb *dev)
324 {
325         int i;
326         struct ddb_port *port;
327
328         for (i = 0; i < dev->info->port_num; i++) {
329                 port = &dev->port[i];
330                 switch (port->class) {
331                 case DDB_PORT_TUNER:
332                         if (io_alloc(dev->pdev, port->input[0]->vbuf,
333                                      port->input[0]->pbuf,
334                                      port->input[0]->dma_buf_size,
335                                      port->input[0]->dma_buf_num) < 0)
336                                 return -1;
337                         if (io_alloc(dev->pdev, port->input[1]->vbuf,
338                                      port->input[1]->pbuf,
339                                      port->input[1]->dma_buf_size,
340                                      port->input[1]->dma_buf_num) < 0)
341                                 return -1;
342                         break;
343                 case DDB_PORT_CI:
344                         if (io_alloc(dev->pdev, port->input[0]->vbuf,
345                                      port->input[0]->pbuf,
346                                      port->input[0]->dma_buf_size,
347                                      port->input[0]->dma_buf_num) < 0)
348                                 return -1;
349                         if (io_alloc(dev->pdev, port->output->vbuf,
350                                      port->output->pbuf,
351                                      port->output->dma_buf_size,
352                                      port->output->dma_buf_num) < 0)
353                                 return -1;
354                         break;
355                 default:
356                         break;
357                 }
358         }
359         ddb_address_table(dev);
360         return 0;
361 }
362
363 static void ddb_buffers_free(struct ddb *dev)
364 {
365         int i;
366         struct ddb_port *port;
367
368         for (i = 0; i < dev->info->port_num; i++) {
369                 port = &dev->port[i];
370                 io_free(dev->pdev, port->input[0]->vbuf,
371                         port->input[0]->pbuf,
372                         port->input[0]->dma_buf_size,
373                         port->input[0]->dma_buf_num);
374                 io_free(dev->pdev, port->input[1]->vbuf,
375                         port->input[1]->pbuf,
376                         port->input[1]->dma_buf_size,
377                         port->input[1]->dma_buf_num);
378                 io_free(dev->pdev, port->output->vbuf,
379                         port->output->pbuf,
380                         port->output->dma_buf_size,
381                         port->output->dma_buf_num);
382         }
383 }
384
385 static void ddb_input_start(struct ddb_input *input)
386 {
387         struct ddb *dev = input->port->dev;
388
389         spin_lock_irq(&input->lock);
390         input->cbuf = 0;
391         input->coff = 0;
392
393         /* reset */
394         ddbwritel(0, TS_INPUT_CONTROL(input->nr));
395         ddbwritel(2, TS_INPUT_CONTROL(input->nr));
396         ddbwritel(0, TS_INPUT_CONTROL(input->nr));
397
398         ddbwritel((1 << 16) |
399                   (input->dma_buf_num << 11) |
400                   (input->dma_buf_size >> 7),
401                   DMA_BUFFER_SIZE(input->nr));
402         ddbwritel(0, DMA_BUFFER_ACK(input->nr));
403
404         ddbwritel(1, DMA_BASE_WRITE);
405         ddbwritel(3, DMA_BUFFER_CONTROL(input->nr));
406         ddbwritel(9, TS_INPUT_CONTROL(input->nr));
407         input->running = 1;
408         spin_unlock_irq(&input->lock);
409 }
410
411 static void ddb_input_stop(struct ddb_input *input)
412 {
413         struct ddb *dev = input->port->dev;
414
415         spin_lock_irq(&input->lock);
416         ddbwritel(0, TS_INPUT_CONTROL(input->nr));
417         ddbwritel(0, DMA_BUFFER_CONTROL(input->nr));
418         input->running = 0;
419         spin_unlock_irq(&input->lock);
420 }
421
422 static void ddb_output_start(struct ddb_output *output)
423 {
424         struct ddb *dev = output->port->dev;
425
426         spin_lock_irq(&output->lock);
427         output->cbuf = 0;
428         output->coff = 0;
429         ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
430         ddbwritel(2, TS_OUTPUT_CONTROL(output->nr));
431         ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
432         ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr));
433         ddbwritel((1 << 16) |
434                   (output->dma_buf_num << 11) |
435                   (output->dma_buf_size >> 7),
436                   DMA_BUFFER_SIZE(output->nr + 8));
437         ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8));
438
439         ddbwritel(1, DMA_BASE_READ);
440         ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8));
441         /* ddbwritel(0xbd, TS_OUTPUT_CONTROL(output->nr)); */
442         ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr));
443         output->running = 1;
444         spin_unlock_irq(&output->lock);
445 }
446
447 static void ddb_output_stop(struct ddb_output *output)
448 {
449         struct ddb *dev = output->port->dev;
450
451         spin_lock_irq(&output->lock);
452         ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
453         ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8));
454         output->running = 0;
455         spin_unlock_irq(&output->lock);
456 }
457
458 static u32 ddb_output_free(struct ddb_output *output)
459 {
460         u32 idx, off, stat = output->stat;
461         s32 diff;
462
463         idx = (stat >> 11) & 0x1f;
464         off = (stat & 0x7ff) << 7;
465
466         if (output->cbuf != idx) {
467                 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
468                     (output->dma_buf_size - output->coff <= 188))
469                         return 0;
470                 return 188;
471         }
472         diff = off - output->coff;
473         if (diff <= 0 || diff > 188)
474                 return 188;
475         return 0;
476 }
477
478 static ssize_t ddb_output_write(struct ddb_output *output,
479                                 const __user u8 *buf, size_t count)
480 {
481         struct ddb *dev = output->port->dev;
482         u32 idx, off, stat = output->stat;
483         u32 left = count, len;
484
485         idx = (stat >> 11) & 0x1f;
486         off = (stat & 0x7ff) << 7;
487
488         while (left) {
489                 len = output->dma_buf_size - output->coff;
490                 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
491                     (off == 0)) {
492                         if (len <= 188)
493                                 break;
494                         len -= 188;
495                 }
496                 if (output->cbuf == idx) {
497                         if (off > output->coff) {
498 #if 1
499                                 len = off - output->coff;
500                                 len -= (len % 188);
501                                 if (len <= 188)
502
503 #endif
504                                         break;
505                                 len -= 188;
506                         }
507                 }
508                 if (len > left)
509                         len = left;
510                 if (copy_from_user(output->vbuf[output->cbuf] + output->coff,
511                                    buf, len))
512                         return -EIO;
513                 left -= len;
514                 buf += len;
515                 output->coff += len;
516                 if (output->coff == output->dma_buf_size) {
517                         output->coff = 0;
518                         output->cbuf = ((output->cbuf + 1) % output->dma_buf_num);
519                 }
520                 ddbwritel((output->cbuf << 11) | (output->coff >> 7),
521                           DMA_BUFFER_ACK(output->nr + 8));
522         }
523         return count - left;
524 }
525
526 static u32 ddb_input_avail(struct ddb_input *input)
527 {
528         struct ddb *dev = input->port->dev;
529         u32 idx, off, stat = input->stat;
530         u32 ctrl = ddbreadl(DMA_BUFFER_CONTROL(input->nr));
531
532         idx = (stat >> 11) & 0x1f;
533         off = (stat & 0x7ff) << 7;
534
535         if (ctrl & 4) {
536                 printk(KERN_ERR "IA %d %d %08x\n", idx, off, ctrl);
537                 ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr));
538                 return 0;
539         }
540         if (input->cbuf != idx)
541                 return 188;
542         return 0;
543 }
544
545 static ssize_t ddb_input_read(struct ddb_input *input, __user u8 *buf, size_t count)
546 {
547         struct ddb *dev = input->port->dev;
548         u32 left = count;
549         u32 idx, free, stat = input->stat;
550         int ret;
551
552         idx = (stat >> 11) & 0x1f;
553
554         while (left) {
555                 if (input->cbuf == idx)
556                         return count - left;
557                 free = input->dma_buf_size - input->coff;
558                 if (free > left)
559                         free = left;
560                 ret = copy_to_user(buf, input->vbuf[input->cbuf] +
561                                    input->coff, free);
562                 if (ret)
563                         return -EFAULT;
564                 input->coff += free;
565                 if (input->coff == input->dma_buf_size) {
566                         input->coff = 0;
567                         input->cbuf = (input->cbuf+1) % input->dma_buf_num;
568                 }
569                 left -= free;
570                 ddbwritel((input->cbuf << 11) | (input->coff >> 7),
571                           DMA_BUFFER_ACK(input->nr));
572         }
573         return count;
574 }
575
576 /******************************************************************************/
577 /******************************************************************************/
578 /******************************************************************************/
579
580 #if 0
581 static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe)
582 {
583         int i;
584
585         for (i = 0; i < dev->info->port_num * 2; i++) {
586                 if (dev->input[i].fe == fe)
587                         return &dev->input[i];
588         }
589         return NULL;
590 }
591 #endif
592
593 static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
594 {
595         struct ddb_input *input = fe->sec_priv;
596         struct ddb_port *port = input->port;
597         int status;
598
599         if (enable) {
600                 mutex_lock(&port->i2c_gate_lock);
601                 status = input->gate_ctrl(fe, 1);
602         } else {
603                 status = input->gate_ctrl(fe, 0);
604                 mutex_unlock(&port->i2c_gate_lock);
605         }
606         return status;
607 }
608
609 static int demod_attach_drxk(struct ddb_input *input)
610 {
611         struct i2c_adapter *i2c = &input->port->i2c->adap;
612         struct dvb_frontend *fe;
613         struct drxk_config config;
614
615         memset(&config, 0, sizeof(config));
616         config.microcode_name = "drxk_a3.mc";
617         config.qam_demod_parameter_count = 4;
618         config.adr = 0x29 + (input->nr & 1);
619
620         fe = input->fe = dvb_attach(drxk_attach, &config, i2c);
621         if (!input->fe) {
622                 printk(KERN_ERR "No DRXK found!\n");
623                 return -ENODEV;
624         }
625         fe->sec_priv = input;
626         input->gate_ctrl = fe->ops.i2c_gate_ctrl;
627         fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
628         return 0;
629 }
630
631 static int tuner_attach_tda18271(struct ddb_input *input)
632 {
633         struct i2c_adapter *i2c = &input->port->i2c->adap;
634         struct dvb_frontend *fe;
635
636         if (input->fe->ops.i2c_gate_ctrl)
637                 input->fe->ops.i2c_gate_ctrl(input->fe, 1);
638         fe = dvb_attach(tda18271c2dd_attach, input->fe, i2c, 0x60);
639         if (!fe) {
640                 printk(KERN_ERR "No TDA18271 found!\n");
641                 return -ENODEV;
642         }
643         if (input->fe->ops.i2c_gate_ctrl)
644                 input->fe->ops.i2c_gate_ctrl(input->fe, 0);
645         return 0;
646 }
647
648 /******************************************************************************/
649 /******************************************************************************/
650 /******************************************************************************/
651
652 static struct stv0367_config ddb_stv0367_config[] = {
653         {
654                 .demod_address = 0x1f,
655                 .xtal = 27000000,
656                 .if_khz = 0,
657                 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
658                 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
659                 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
660         }, {
661                 .demod_address = 0x1e,
662                 .xtal = 27000000,
663                 .if_khz = 0,
664                 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
665                 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
666                 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
667         },
668 };
669
670 static int demod_attach_stv0367(struct ddb_input *input)
671 {
672         struct i2c_adapter *i2c = &input->port->i2c->adap;
673
674         /* attach frontend */
675         input->fe = dvb_attach(stv0367ddb_attach,
676                 &ddb_stv0367_config[(input->nr & 1)], i2c);
677
678         if (!input->fe) {
679                 printk(KERN_ERR "stv0367ddb_attach failed (not found?)\n");
680                 return -ENODEV;
681         }
682
683         input->fe->sec_priv = input;
684         input->gate_ctrl = input->fe->ops.i2c_gate_ctrl;
685         input->fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
686
687         return 0;
688 }
689
690 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr)
691 {
692         struct i2c_adapter *adapter = &input->port->i2c->adap;
693         u8 tda_id[2];
694         u8 subaddr = 0x00;
695
696         printk(KERN_DEBUG "stv0367-tda18212 tuner ping\n");
697         if (input->fe->ops.i2c_gate_ctrl)
698                 input->fe->ops.i2c_gate_ctrl(input->fe, 1);
699
700         if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
701                 printk(KERN_DEBUG "tda18212 ping 1 fail\n");
702         if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
703                 printk(KERN_DEBUG "tda18212 ping 2 fail\n");
704
705         if (input->fe->ops.i2c_gate_ctrl)
706                 input->fe->ops.i2c_gate_ctrl(input->fe, 0);
707
708         return 0;
709 }
710
711 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24)
712 {
713         struct i2c_adapter *i2c = &input->port->i2c->adap;
714         struct cxd2841er_config cfg;
715
716         /* the cxd2841er driver expects 8bit/shifted I2C addresses */
717         cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1;
718
719         cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500;
720         cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE |
721                 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG |
722                 CXD2841ER_TSBITS;
723
724         if (!par)
725                 cfg.flags |= CXD2841ER_TS_SERIAL;
726
727         /* attach frontend */
728         input->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c);
729
730         if (!input->fe) {
731                 printk(KERN_ERR "No Sony CXD28xx found!\n");
732                 return -ENODEV;
733         }
734
735         input->fe->sec_priv = input;
736         input->gate_ctrl = input->fe->ops.i2c_gate_ctrl;
737         input->fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
738
739         return 0;
740 }
741
742 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype)
743 {
744         struct i2c_adapter *adapter = &input->port->i2c->adap;
745         struct i2c_client *client;
746         struct tda18212_config config = {
747                 .fe = input->fe,
748                 .if_dvbt_6 = 3550,
749                 .if_dvbt_7 = 3700,
750                 .if_dvbt_8 = 4150,
751                 .if_dvbt2_6 = 3250,
752                 .if_dvbt2_7 = 4000,
753                 .if_dvbt2_8 = 4000,
754                 .if_dvbc = 5000,
755         };
756         struct i2c_board_info board_info = {
757                 .type = "tda18212",
758                 .platform_data = &config,
759         };
760
761         if (input->nr & 1)
762                 board_info.addr = 0x63;
763         else
764                 board_info.addr = 0x60;
765
766         /* due to a hardware quirk with the I2C gate on the stv0367+tda18212
767          * combo, the tda18212 must be probed by reading it's id _twice_ when
768          * cold started, or it very likely will fail.
769          */
770         if (porttype == DDB_TUNER_DVBCT_ST)
771                 tuner_tda18212_ping(input, board_info.addr);
772
773         request_module(board_info.type);
774
775         /* perform tuner init/attach */
776         client = i2c_new_device(adapter, &board_info);
777         if (client == NULL || client->dev.driver == NULL)
778                 goto err;
779
780         if (!try_module_get(client->dev.driver->owner)) {
781                 i2c_unregister_device(client);
782                 goto err;
783         }
784
785         input->i2c_client[0] = client;
786
787         return 0;
788 err:
789         printk(KERN_INFO "TDA18212 tuner not found. Device is not fully operational.\n");
790         return -ENODEV;
791 }
792
793 /******************************************************************************/
794 /******************************************************************************/
795 /******************************************************************************/
796
797 static struct stv090x_config stv0900 = {
798         .device         = STV0900,
799         .demod_mode     = STV090x_DUAL,
800         .clk_mode       = STV090x_CLK_EXT,
801
802         .xtal           = 27000000,
803         .address        = 0x69,
804
805         .ts1_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
806         .ts2_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
807
808         .repeater_level = STV090x_RPTLEVEL_16,
809
810         .adc1_range     = STV090x_ADC_1Vpp,
811         .adc2_range     = STV090x_ADC_1Vpp,
812
813         .diseqc_envelope_mode = true,
814 };
815
816 static struct stv090x_config stv0900_aa = {
817         .device         = STV0900,
818         .demod_mode     = STV090x_DUAL,
819         .clk_mode       = STV090x_CLK_EXT,
820
821         .xtal           = 27000000,
822         .address        = 0x68,
823
824         .ts1_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
825         .ts2_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
826
827         .repeater_level = STV090x_RPTLEVEL_16,
828
829         .adc1_range     = STV090x_ADC_1Vpp,
830         .adc2_range     = STV090x_ADC_1Vpp,
831
832         .diseqc_envelope_mode = true,
833 };
834
835 static struct stv6110x_config stv6110a = {
836         .addr    = 0x60,
837         .refclk  = 27000000,
838         .clk_div = 1,
839 };
840
841 static struct stv6110x_config stv6110b = {
842         .addr    = 0x63,
843         .refclk  = 27000000,
844         .clk_div = 1,
845 };
846
847 static int demod_attach_stv0900(struct ddb_input *input, int type)
848 {
849         struct i2c_adapter *i2c = &input->port->i2c->adap;
850         struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
851
852         input->fe = dvb_attach(stv090x_attach, feconf, i2c,
853                                (input->nr & 1) ? STV090x_DEMODULATOR_1
854                                : STV090x_DEMODULATOR_0);
855         if (!input->fe) {
856                 printk(KERN_ERR "No STV0900 found!\n");
857                 return -ENODEV;
858         }
859         if (!dvb_attach(lnbh24_attach, input->fe, i2c, 0,
860                         0, (input->nr & 1) ?
861                         (0x09 - type) : (0x0b - type))) {
862                 printk(KERN_ERR "No LNBH24 found!\n");
863                 return -ENODEV;
864         }
865         return 0;
866 }
867
868 static int tuner_attach_stv6110(struct ddb_input *input, int type)
869 {
870         struct i2c_adapter *i2c = &input->port->i2c->adap;
871         struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
872         struct stv6110x_config *tunerconf = (input->nr & 1) ?
873                 &stv6110b : &stv6110a;
874         const struct stv6110x_devctl *ctl;
875
876         ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c);
877         if (!ctl) {
878                 printk(KERN_ERR "No STV6110X found!\n");
879                 return -ENODEV;
880         }
881         printk(KERN_INFO "attach tuner input %d adr %02x\n",
882                          input->nr, tunerconf->addr);
883
884         feconf->tuner_init          = ctl->tuner_init;
885         feconf->tuner_sleep         = ctl->tuner_sleep;
886         feconf->tuner_set_mode      = ctl->tuner_set_mode;
887         feconf->tuner_set_frequency = ctl->tuner_set_frequency;
888         feconf->tuner_get_frequency = ctl->tuner_get_frequency;
889         feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
890         feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
891         feconf->tuner_set_bbgain    = ctl->tuner_set_bbgain;
892         feconf->tuner_get_bbgain    = ctl->tuner_get_bbgain;
893         feconf->tuner_set_refclk    = ctl->tuner_set_refclk;
894         feconf->tuner_get_status    = ctl->tuner_get_status;
895
896         return 0;
897 }
898
899 static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
900                             int (*start_feed)(struct dvb_demux_feed *),
901                             int (*stop_feed)(struct dvb_demux_feed *),
902                             void *priv)
903 {
904         dvbdemux->priv = priv;
905
906         dvbdemux->filternum = 256;
907         dvbdemux->feednum = 256;
908         dvbdemux->start_feed = start_feed;
909         dvbdemux->stop_feed = stop_feed;
910         dvbdemux->write_to_decoder = NULL;
911         dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
912                                       DMX_SECTION_FILTERING |
913                                       DMX_MEMORY_BASED_FILTERING);
914         return dvb_dmx_init(dvbdemux);
915 }
916
917 static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
918                                struct dvb_demux *dvbdemux,
919                                struct dmx_frontend *hw_frontend,
920                                struct dmx_frontend *mem_frontend,
921                                struct dvb_adapter *dvb_adapter)
922 {
923         int ret;
924
925         dmxdev->filternum = 256;
926         dmxdev->demux = &dvbdemux->dmx;
927         dmxdev->capabilities = 0;
928         ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
929         if (ret < 0)
930                 return ret;
931
932         hw_frontend->source = DMX_FRONTEND_0;
933         dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
934         mem_frontend->source = DMX_MEMORY_FE;
935         dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
936         return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
937 }
938
939 static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
940 {
941         struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
942         struct ddb_input *input = dvbdmx->priv;
943
944         if (!input->users)
945                 ddb_input_start(input);
946
947         return ++input->users;
948 }
949
950 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
951 {
952         struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
953         struct ddb_input *input = dvbdmx->priv;
954
955         if (--input->users)
956                 return input->users;
957
958         ddb_input_stop(input);
959         return 0;
960 }
961
962
963 static void dvb_input_detach(struct ddb_input *input)
964 {
965         struct dvb_adapter *adap = &input->adap;
966         struct dvb_demux *dvbdemux = &input->demux;
967         struct i2c_client *client;
968
969         switch (input->attached) {
970         case 5:
971                 client = input->i2c_client[0];
972                 if (client) {
973                         module_put(client->dev.driver->owner);
974                         i2c_unregister_device(client);
975                 }
976                 if (input->fe2) {
977                         dvb_unregister_frontend(input->fe2);
978                         input->fe2 = NULL;
979                 }
980                 if (input->fe) {
981                         dvb_unregister_frontend(input->fe);
982                         dvb_frontend_detach(input->fe);
983                         input->fe = NULL;
984                 }
985                 /* fall-through */
986         case 4:
987                 dvb_net_release(&input->dvbnet);
988                 /* fall-through */
989         case 3:
990                 dvbdemux->dmx.close(&dvbdemux->dmx);
991                 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
992                                               &input->hw_frontend);
993                 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
994                                               &input->mem_frontend);
995                 dvb_dmxdev_release(&input->dmxdev);
996                 /* fall-through */
997         case 2:
998                 dvb_dmx_release(&input->demux);
999                 /* fall-through */
1000         case 1:
1001                 dvb_unregister_adapter(adap);
1002         }
1003         input->attached = 0;
1004 }
1005
1006 static int dvb_input_attach(struct ddb_input *input)
1007 {
1008         int ret;
1009         struct ddb_port *port = input->port;
1010         struct dvb_adapter *adap = &input->adap;
1011         struct dvb_demux *dvbdemux = &input->demux;
1012         int sony_osc24 = 0, sony_tspar = 0;
1013
1014         ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
1015                                    &input->port->dev->pdev->dev,
1016                                    adapter_nr);
1017         if (ret < 0) {
1018                 printk(KERN_ERR "ddbridge: Could not register adapter.Check if you enabled enough adapters in dvb-core!\n");
1019                 return ret;
1020         }
1021         input->attached = 1;
1022
1023         ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
1024                                       start_feed,
1025                                       stop_feed, input);
1026         if (ret < 0)
1027                 return ret;
1028         input->attached = 2;
1029
1030         ret = my_dvb_dmxdev_ts_card_init(&input->dmxdev, &input->demux,
1031                                          &input->hw_frontend,
1032                                          &input->mem_frontend, adap);
1033         if (ret < 0)
1034                 return ret;
1035         input->attached = 3;
1036
1037         ret = dvb_net_init(adap, &input->dvbnet, input->dmxdev.demux);
1038         if (ret < 0)
1039                 return ret;
1040         input->attached = 4;
1041
1042         input->fe = NULL;
1043         switch (port->type) {
1044         case DDB_TUNER_DVBS_ST:
1045                 if (demod_attach_stv0900(input, 0) < 0)
1046                         return -ENODEV;
1047                 if (tuner_attach_stv6110(input, 0) < 0)
1048                         return -ENODEV;
1049                 if (input->fe) {
1050                         if (dvb_register_frontend(adap, input->fe) < 0)
1051                                 return -ENODEV;
1052                 }
1053                 break;
1054         case DDB_TUNER_DVBS_ST_AA:
1055                 if (demod_attach_stv0900(input, 1) < 0)
1056                         return -ENODEV;
1057                 if (tuner_attach_stv6110(input, 1) < 0)
1058                         return -ENODEV;
1059                 if (input->fe) {
1060                         if (dvb_register_frontend(adap, input->fe) < 0)
1061                                 return -ENODEV;
1062                 }
1063                 break;
1064         case DDB_TUNER_DVBCT_TR:
1065                 if (demod_attach_drxk(input) < 0)
1066                         return -ENODEV;
1067                 if (tuner_attach_tda18271(input) < 0)
1068                         return -ENODEV;
1069                 if (dvb_register_frontend(adap, input->fe) < 0)
1070                         return -ENODEV;
1071                 if (input->fe2) {
1072                         if (dvb_register_frontend(adap, input->fe2) < 0)
1073                                 return -ENODEV;
1074                         input->fe2->tuner_priv = input->fe->tuner_priv;
1075                         memcpy(&input->fe2->ops.tuner_ops,
1076                                &input->fe->ops.tuner_ops,
1077                                sizeof(struct dvb_tuner_ops));
1078                 }
1079                 break;
1080         case DDB_TUNER_DVBCT_ST:
1081                 if (demod_attach_stv0367(input) < 0)
1082                         return -ENODEV;
1083                 if (tuner_attach_tda18212(input, port->type) < 0)
1084                         return -ENODEV;
1085                 if (input->fe) {
1086                         if (dvb_register_frontend(adap, input->fe) < 0)
1087                                 return -ENODEV;
1088                 }
1089                 break;
1090         case DDB_TUNER_DVBC2T2I_SONY_P:
1091         case DDB_TUNER_DVBCT2_SONY_P:
1092         case DDB_TUNER_DVBC2T2_SONY_P:
1093         case DDB_TUNER_ISDBT_SONY_P:
1094                 if (port->type == DDB_TUNER_DVBC2T2I_SONY_P)
1095                         sony_osc24 = 1;
1096                 if (input->port->dev->info->ts_quirks & TS_QUIRK_ALT_OSC)
1097                         sony_osc24 = 0;
1098                 if (input->port->dev->info->ts_quirks & TS_QUIRK_SERIAL)
1099                         sony_tspar = 0;
1100                 else
1101                         sony_tspar = 1;
1102
1103                 if (demod_attach_cxd28xx(input, sony_tspar, sony_osc24) < 0)
1104                         return -ENODEV;
1105                 if (tuner_attach_tda18212(input, port->type) < 0)
1106                         return -ENODEV;
1107                 if (input->fe) {
1108                         if (dvb_register_frontend(adap, input->fe) < 0)
1109                                 return -ENODEV;
1110                 }
1111                 break;
1112         case DDB_TUNER_XO2_DVBC2T2I_SONY:
1113         case DDB_TUNER_XO2_DVBCT2_SONY:
1114         case DDB_TUNER_XO2_DVBC2T2_SONY:
1115         case DDB_TUNER_XO2_ISDBT_SONY:
1116                 if (port->type == DDB_TUNER_XO2_DVBC2T2I_SONY)
1117                         sony_osc24 = 1;
1118
1119                 if (demod_attach_cxd28xx(input, 0, sony_osc24) < 0)
1120                         return -ENODEV;
1121                 if (tuner_attach_tda18212(input, port->type) < 0)
1122                         return -ENODEV;
1123                 if (input->fe) {
1124                         if (dvb_register_frontend(adap, input->fe) < 0)
1125                                 return -ENODEV;
1126                 }
1127                 break;
1128         }
1129
1130         input->attached = 5;
1131         return 0;
1132 }
1133
1134 /****************************************************************************/
1135 /****************************************************************************/
1136
1137 static ssize_t ts_write(struct file *file, const __user char *buf,
1138                         size_t count, loff_t *ppos)
1139 {
1140         struct dvb_device *dvbdev = file->private_data;
1141         struct ddb_output *output = dvbdev->priv;
1142         size_t left = count;
1143         int stat;
1144
1145         while (left) {
1146                 if (ddb_output_free(output) < 188) {
1147                         if (file->f_flags & O_NONBLOCK)
1148                                 break;
1149                         if (wait_event_interruptible(
1150                                     output->wq, ddb_output_free(output) >= 188) < 0)
1151                                 break;
1152                 }
1153                 stat = ddb_output_write(output, buf, left);
1154                 if (stat < 0)
1155                         break;
1156                 buf += stat;
1157                 left -= stat;
1158         }
1159         return (left == count) ? -EAGAIN : (count - left);
1160 }
1161
1162 static ssize_t ts_read(struct file *file, __user char *buf,
1163                        size_t count, loff_t *ppos)
1164 {
1165         struct dvb_device *dvbdev = file->private_data;
1166         struct ddb_output *output = dvbdev->priv;
1167         struct ddb_input *input = output->port->input[0];
1168         int left, read;
1169
1170         count -= count % 188;
1171         left = count;
1172         while (left) {
1173                 if (ddb_input_avail(input) < 188) {
1174                         if (file->f_flags & O_NONBLOCK)
1175                                 break;
1176                         if (wait_event_interruptible(
1177                                     input->wq, ddb_input_avail(input) >= 188) < 0)
1178                                 break;
1179                 }
1180                 read = ddb_input_read(input, buf, left);
1181                 if (read < 0)
1182                         return read;
1183                 left -= read;
1184                 buf += read;
1185         }
1186         return (left == count) ? -EAGAIN : (count - left);
1187 }
1188
1189 static unsigned int ts_poll(struct file *file, poll_table *wait)
1190 {
1191         /*
1192         struct dvb_device *dvbdev = file->private_data;
1193         struct ddb_output *output = dvbdev->priv;
1194         struct ddb_input *input = output->port->input[0];
1195         */
1196         unsigned int mask = 0;
1197
1198 #if 0
1199         if (data_avail_to_read)
1200                 mask |= POLLIN | POLLRDNORM;
1201         if (data_avail_to_write)
1202                 mask |= POLLOUT | POLLWRNORM;
1203
1204         poll_wait(file, &read_queue, wait);
1205         poll_wait(file, &write_queue, wait);
1206 #endif
1207         return mask;
1208 }
1209
1210 static const struct file_operations ci_fops = {
1211         .owner   = THIS_MODULE,
1212         .read    = ts_read,
1213         .write   = ts_write,
1214         .open    = dvb_generic_open,
1215         .release = dvb_generic_release,
1216         .poll    = ts_poll,
1217 };
1218
1219 static struct dvb_device dvbdev_ci = {
1220         .readers = -1,
1221         .writers = -1,
1222         .users   = -1,
1223         .fops    = &ci_fops,
1224 };
1225
1226 /****************************************************************************/
1227 /****************************************************************************/
1228 /****************************************************************************/
1229
1230 static void input_tasklet(unsigned long data)
1231 {
1232         struct ddb_input *input = (struct ddb_input *) data;
1233         struct ddb *dev = input->port->dev;
1234
1235         spin_lock(&input->lock);
1236         if (!input->running) {
1237                 spin_unlock(&input->lock);
1238                 return;
1239         }
1240         input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1241
1242         if (input->port->class == DDB_PORT_TUNER) {
1243                 if (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))
1244                         printk(KERN_ERR "Overflow input %d\n", input->nr);
1245                 while (input->cbuf != ((input->stat >> 11) & 0x1f)
1246                        || (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))) {
1247                         dvb_dmx_swfilter_packets(&input->demux,
1248                                                  input->vbuf[input->cbuf],
1249                                                  input->dma_buf_size / 188);
1250
1251                         input->cbuf = (input->cbuf + 1) % input->dma_buf_num;
1252                         ddbwritel((input->cbuf << 11),
1253                                   DMA_BUFFER_ACK(input->nr));
1254                         input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1255                        }
1256         }
1257         if (input->port->class == DDB_PORT_CI)
1258                 wake_up(&input->wq);
1259         spin_unlock(&input->lock);
1260 }
1261
1262 static void output_tasklet(unsigned long data)
1263 {
1264         struct ddb_output *output = (struct ddb_output *) data;
1265         struct ddb *dev = output->port->dev;
1266
1267         spin_lock(&output->lock);
1268         if (!output->running) {
1269                 spin_unlock(&output->lock);
1270                 return;
1271         }
1272         output->stat = ddbreadl(DMA_BUFFER_CURRENT(output->nr + 8));
1273         wake_up(&output->wq);
1274         spin_unlock(&output->lock);
1275 }
1276
1277
1278 static struct cxd2099_cfg cxd_cfg = {
1279         .bitrate =  62000,
1280         .adr     =  0x40,
1281         .polarity = 1,
1282         .clock_mode = 1,
1283 };
1284
1285 static int ddb_ci_attach(struct ddb_port *port)
1286 {
1287         int ret;
1288
1289         ret = dvb_register_adapter(&port->output->adap,
1290                                    "DDBridge",
1291                                    THIS_MODULE,
1292                                    &port->dev->pdev->dev,
1293                                    adapter_nr);
1294         if (ret < 0)
1295                 return ret;
1296         port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
1297         if (!port->en) {
1298                 dvb_unregister_adapter(&port->output->adap);
1299                 return -ENODEV;
1300         }
1301         ddb_input_start(port->input[0]);
1302         ddb_output_start(port->output);
1303         dvb_ca_en50221_init(&port->output->adap,
1304                             port->en, 0, 1);
1305         ret = dvb_register_device(&port->output->adap, &port->output->dev,
1306                                   &dvbdev_ci, (void *) port->output,
1307                                   DVB_DEVICE_SEC, 0);
1308         return ret;
1309 }
1310
1311 static int ddb_port_attach(struct ddb_port *port)
1312 {
1313         int ret = 0;
1314
1315         switch (port->class) {
1316         case DDB_PORT_TUNER:
1317                 ret = dvb_input_attach(port->input[0]);
1318                 if (ret < 0)
1319                         break;
1320                 ret = dvb_input_attach(port->input[1]);
1321                 break;
1322         case DDB_PORT_CI:
1323                 ret = ddb_ci_attach(port);
1324                 break;
1325         default:
1326                 break;
1327         }
1328         if (ret < 0)
1329                 printk(KERN_ERR "port_attach on port %d failed\n", port->nr);
1330         return ret;
1331 }
1332
1333 static int ddb_ports_attach(struct ddb *dev)
1334 {
1335         int i, ret = 0;
1336         struct ddb_port *port;
1337
1338         for (i = 0; i < dev->info->port_num; i++) {
1339                 port = &dev->port[i];
1340                 ret = ddb_port_attach(port);
1341                 if (ret < 0)
1342                         break;
1343         }
1344         return ret;
1345 }
1346
1347 static void ddb_ports_detach(struct ddb *dev)
1348 {
1349         int i;
1350         struct ddb_port *port;
1351
1352         for (i = 0; i < dev->info->port_num; i++) {
1353                 port = &dev->port[i];
1354                 switch (port->class) {
1355                 case DDB_PORT_TUNER:
1356                         dvb_input_detach(port->input[0]);
1357                         dvb_input_detach(port->input[1]);
1358                         break;
1359                 case DDB_PORT_CI:
1360                         dvb_unregister_device(port->output->dev);
1361                         if (port->en) {
1362                                 ddb_input_stop(port->input[0]);
1363                                 ddb_output_stop(port->output);
1364                                 dvb_ca_en50221_release(port->en);
1365                                 kfree(port->en);
1366                                 port->en = NULL;
1367                                 dvb_unregister_adapter(&port->output->adap);
1368                         }
1369                         break;
1370                 }
1371         }
1372 }
1373
1374 /****************************************************************************/
1375 /****************************************************************************/
1376
1377 static int init_xo2(struct ddb_port *port)
1378 {
1379         struct i2c_adapter *i2c = &port->i2c->adap;
1380         u8 val, data[2];
1381         int res;
1382
1383         res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1384         if (res < 0)
1385                 return res;
1386
1387         if (data[0] != 0x01)  {
1388                 pr_info("Port %d: invalid XO2\n", port->nr);
1389                 return -1;
1390         }
1391
1392         i2c_read_reg(i2c, 0x10, 0x08, &val);
1393         if (val != 0) {
1394                 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1395                 msleep(100);
1396         }
1397         /* Enable tuner power, disable pll, reset demods */
1398         i2c_write_reg(i2c, 0x10, 0x08, 0x04);
1399         usleep_range(2000, 3000);
1400         /* Release demod resets */
1401         i2c_write_reg(i2c, 0x10, 0x08, 0x07);
1402
1403         /* speed: 0=55,1=75,2=90,3=104 MBit/s */
1404         i2c_write_reg(i2c, 0x10, 0x09,
1405                 ((xo2_speed >= 0 && xo2_speed <= 3) ? xo2_speed : 2));
1406
1407         i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1408         i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1409
1410         usleep_range(2000, 3000);
1411         /* Start XO2 PLL */
1412         i2c_write_reg(i2c, 0x10, 0x08, 0x87);
1413
1414         return 0;
1415 }
1416
1417 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id)
1418 {
1419         u8 probe[1] = { 0x00 }, data[4];
1420
1421         *type = DDB_XO2_TYPE_NONE;
1422
1423         if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4))
1424                 return 0;
1425         if (data[0] == 'D' && data[1] == 'F') {
1426                 *id = data[2];
1427                 *type = DDB_XO2_TYPE_DUOFLEX;
1428                 return 1;
1429         }
1430         if (data[0] == 'C' && data[1] == 'I') {
1431                 *id = data[2];
1432                 *type = DDB_XO2_TYPE_CI;
1433                 return 1;
1434         }
1435         return 0;
1436 }
1437
1438 /****************************************************************************/
1439 /****************************************************************************/
1440
1441 static int port_has_ci(struct ddb_port *port)
1442 {
1443         u8 val;
1444         return i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1;
1445 }
1446
1447 static int port_has_stv0900(struct ddb_port *port)
1448 {
1449         u8 val;
1450         if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1451                 return 0;
1452         return 1;
1453 }
1454
1455 static int port_has_stv0900_aa(struct ddb_port *port)
1456 {
1457         u8 val;
1458         if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, &val) < 0)
1459                 return 0;
1460         return 1;
1461 }
1462
1463 static int port_has_drxks(struct ddb_port *port)
1464 {
1465         u8 val;
1466         if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1467                 return 0;
1468         if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1469                 return 0;
1470         return 1;
1471 }
1472
1473 static int port_has_stv0367(struct ddb_port *port)
1474 {
1475         u8 val;
1476         if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0)
1477                 return 0;
1478         if (val != 0x60)
1479                 return 0;
1480         if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0)
1481                 return 0;
1482         if (val != 0x60)
1483                 return 0;
1484         return 1;
1485 }
1486
1487 static int port_has_cxd28xx(struct ddb_port *port, u8 *id)
1488 {
1489         struct i2c_adapter *i2c = &port->i2c->adap;
1490         int status;
1491
1492         status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0);
1493         if (status)
1494                 return 0;
1495         status = i2c_read_reg(i2c, 0x6e, 0xfd, id);
1496         if (status)
1497                 return 0;
1498         return 1;
1499 }
1500
1501 static void ddb_port_probe(struct ddb_port *port)
1502 {
1503         struct ddb *dev = port->dev;
1504         char *modname = "NO MODULE";
1505         u8 xo2_type, xo2_id, cxd_id;
1506
1507         port->class = DDB_PORT_NONE;
1508
1509         if (port_has_ci(port)) {
1510                 modname = "CI";
1511                 port->class = DDB_PORT_CI;
1512                 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1513         } else if (port_has_xo2(port, &xo2_type, &xo2_id)) {
1514                 printk(KERN_INFO "Port %d (TAB %d): XO2 type: %d, id: %d\n",
1515                         port->nr, port->nr+1, xo2_type, xo2_id);
1516
1517                 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1518
1519                 switch (xo2_type) {
1520                 case DDB_XO2_TYPE_DUOFLEX:
1521                         init_xo2(port);
1522                         switch (xo2_id >> 2) {
1523                         case 0:
1524                                 modname = "DUAL DVB-S2 (unsupported)";
1525                                 port->class = DDB_PORT_NONE;
1526                                 port->type = DDB_TUNER_XO2_DVBS_STV0910;
1527                                 break;
1528                         case 1:
1529                                 modname = "DUAL DVB-C/T/T2";
1530                                 port->class = DDB_PORT_TUNER;
1531                                 port->type = DDB_TUNER_XO2_DVBCT2_SONY;
1532                                 break;
1533                         case 2:
1534                                 modname = "DUAL DVB-ISDBT";
1535                                 port->class = DDB_PORT_TUNER;
1536                                 port->type = DDB_TUNER_XO2_ISDBT_SONY;
1537                                 break;
1538                         case 3:
1539                                 modname = "DUAL DVB-C/C2/T/T2";
1540                                 port->class = DDB_PORT_TUNER;
1541                                 port->type = DDB_TUNER_XO2_DVBC2T2_SONY;
1542                                 break;
1543                         case 4:
1544                                 modname = "DUAL ATSC (unsupported)";
1545                                 port->class = DDB_PORT_NONE;
1546                                 port->type = DDB_TUNER_XO2_ATSC_ST;
1547                                 break;
1548                         case 5:
1549                                 modname = "DUAL DVB-C/C2/T/T2/ISDBT";
1550                                 port->class = DDB_PORT_TUNER;
1551                                 port->type = DDB_TUNER_XO2_DVBC2T2I_SONY;
1552                                 break;
1553                         default:
1554                                 modname = "Unknown XO2 DuoFlex module\n";
1555                                 break;
1556                         }
1557                         break;
1558                 case DDB_XO2_TYPE_CI:
1559                         printk(KERN_INFO "DuoFlex CI modules not supported\n");
1560                         break;
1561                 default:
1562                         printk(KERN_INFO "Unknown XO2 DuoFlex module\n");
1563                         break;
1564                 }
1565         } else if (port_has_cxd28xx(port, &cxd_id)) {
1566                 switch (cxd_id) {
1567                 case 0xa4:
1568                         modname = "DUAL DVB-C2T2 CXD2843";
1569                         port->class = DDB_PORT_TUNER;
1570                         port->type = DDB_TUNER_DVBC2T2_SONY_P;
1571                         break;
1572                 case 0xb1:
1573                         modname = "DUAL DVB-CT2 CXD2837";
1574                         port->class = DDB_PORT_TUNER;
1575                         port->type = DDB_TUNER_DVBCT2_SONY_P;
1576                         break;
1577                 case 0xb0:
1578                         modname = "DUAL ISDB-T CXD2838";
1579                         port->class = DDB_PORT_TUNER;
1580                         port->type = DDB_TUNER_ISDBT_SONY_P;
1581                         break;
1582                 case 0xc1:
1583                         modname = "DUAL DVB-C2T2 ISDB-T CXD2854";
1584                         port->class = DDB_PORT_TUNER;
1585                         port->type = DDB_TUNER_DVBC2T2I_SONY_P;
1586                         break;
1587                 default:
1588                         modname = "Unknown CXD28xx tuner";
1589                         break;
1590                 }
1591                 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1592         } else if (port_has_stv0900(port)) {
1593                 modname = "DUAL DVB-S2";
1594                 port->class = DDB_PORT_TUNER;
1595                 port->type = DDB_TUNER_DVBS_ST;
1596                 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1597         } else if (port_has_stv0900_aa(port)) {
1598                 modname = "DUAL DVB-S2";
1599                 port->class = DDB_PORT_TUNER;
1600                 port->type = DDB_TUNER_DVBS_ST_AA;
1601                 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1602         } else if (port_has_drxks(port)) {
1603                 modname = "DUAL DVB-C/T";
1604                 port->class = DDB_PORT_TUNER;
1605                 port->type = DDB_TUNER_DVBCT_TR;
1606                 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1607         } else if (port_has_stv0367(port)) {
1608                 modname = "DUAL DVB-C/T";
1609                 port->class = DDB_PORT_TUNER;
1610                 port->type = DDB_TUNER_DVBCT_ST;
1611                 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1612         }
1613
1614         printk(KERN_INFO "Port %d (TAB %d): %s\n",
1615                          port->nr, port->nr+1, modname);
1616 }
1617
1618 static void ddb_input_init(struct ddb_port *port, int nr)
1619 {
1620         struct ddb *dev = port->dev;
1621         struct ddb_input *input = &dev->input[nr];
1622
1623         input->nr = nr;
1624         input->port = port;
1625         input->dma_buf_num = INPUT_DMA_BUFS;
1626         input->dma_buf_size = INPUT_DMA_SIZE;
1627         ddbwritel(0, TS_INPUT_CONTROL(nr));
1628         ddbwritel(2, TS_INPUT_CONTROL(nr));
1629         ddbwritel(0, TS_INPUT_CONTROL(nr));
1630         ddbwritel(0, DMA_BUFFER_ACK(nr));
1631         tasklet_init(&input->tasklet, input_tasklet, (unsigned long) input);
1632         spin_lock_init(&input->lock);
1633         init_waitqueue_head(&input->wq);
1634 }
1635
1636 static void ddb_output_init(struct ddb_port *port, int nr)
1637 {
1638         struct ddb *dev = port->dev;
1639         struct ddb_output *output = &dev->output[nr];
1640         output->nr = nr;
1641         output->port = port;
1642         output->dma_buf_num = OUTPUT_DMA_BUFS;
1643         output->dma_buf_size = OUTPUT_DMA_SIZE;
1644
1645         ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1646         ddbwritel(2, TS_OUTPUT_CONTROL(nr));
1647         ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1648         tasklet_init(&output->tasklet, output_tasklet, (unsigned long) output);
1649         init_waitqueue_head(&output->wq);
1650 }
1651
1652 static void ddb_ports_init(struct ddb *dev)
1653 {
1654         int i;
1655         struct ddb_port *port;
1656
1657         for (i = 0; i < dev->info->port_num; i++) {
1658                 port = &dev->port[i];
1659                 port->dev = dev;
1660                 port->nr = i;
1661                 port->i2c = &dev->i2c[i];
1662                 port->input[0] = &dev->input[2 * i];
1663                 port->input[1] = &dev->input[2 * i + 1];
1664                 port->output = &dev->output[i];
1665
1666                 mutex_init(&port->i2c_gate_lock);
1667                 ddb_port_probe(port);
1668                 ddb_input_init(port, 2 * i);
1669                 ddb_input_init(port, 2 * i + 1);
1670                 ddb_output_init(port, i);
1671         }
1672 }
1673
1674 static void ddb_ports_release(struct ddb *dev)
1675 {
1676         int i;
1677         struct ddb_port *port;
1678
1679         for (i = 0; i < dev->info->port_num; i++) {
1680                 port = &dev->port[i];
1681                 port->dev = dev;
1682                 tasklet_kill(&port->input[0]->tasklet);
1683                 tasklet_kill(&port->input[1]->tasklet);
1684                 tasklet_kill(&port->output->tasklet);
1685         }
1686 }
1687
1688 /****************************************************************************/
1689 /****************************************************************************/
1690 /****************************************************************************/
1691
1692 static void irq_handle_i2c(struct ddb *dev, int n)
1693 {
1694         struct ddb_i2c *i2c = &dev->i2c[n];
1695
1696         i2c->done = 1;
1697         wake_up(&i2c->wq);
1698 }
1699
1700 static irqreturn_t irq_handler(int irq, void *dev_id)
1701 {
1702         struct ddb *dev = (struct ddb *) dev_id;
1703         u32 s = ddbreadl(INTERRUPT_STATUS);
1704
1705         if (!s)
1706                 return IRQ_NONE;
1707
1708         do {
1709                 ddbwritel(s, INTERRUPT_ACK);
1710
1711                 if (s & 0x00000001)
1712                         irq_handle_i2c(dev, 0);
1713                 if (s & 0x00000002)
1714                         irq_handle_i2c(dev, 1);
1715                 if (s & 0x00000004)
1716                         irq_handle_i2c(dev, 2);
1717                 if (s & 0x00000008)
1718                         irq_handle_i2c(dev, 3);
1719
1720                 if (s & 0x00000100)
1721                         tasklet_schedule(&dev->input[0].tasklet);
1722                 if (s & 0x00000200)
1723                         tasklet_schedule(&dev->input[1].tasklet);
1724                 if (s & 0x00000400)
1725                         tasklet_schedule(&dev->input[2].tasklet);
1726                 if (s & 0x00000800)
1727                         tasklet_schedule(&dev->input[3].tasklet);
1728                 if (s & 0x00001000)
1729                         tasklet_schedule(&dev->input[4].tasklet);
1730                 if (s & 0x00002000)
1731                         tasklet_schedule(&dev->input[5].tasklet);
1732                 if (s & 0x00004000)
1733                         tasklet_schedule(&dev->input[6].tasklet);
1734                 if (s & 0x00008000)
1735                         tasklet_schedule(&dev->input[7].tasklet);
1736
1737                 if (s & 0x00010000)
1738                         tasklet_schedule(&dev->output[0].tasklet);
1739                 if (s & 0x00020000)
1740                         tasklet_schedule(&dev->output[1].tasklet);
1741                 if (s & 0x00040000)
1742                         tasklet_schedule(&dev->output[2].tasklet);
1743                 if (s & 0x00080000)
1744                         tasklet_schedule(&dev->output[3].tasklet);
1745
1746                 /* if (s & 0x000f0000)  printk(KERN_DEBUG "%08x\n", istat); */
1747         } while ((s = ddbreadl(INTERRUPT_STATUS)));
1748
1749         return IRQ_HANDLED;
1750 }
1751
1752 /******************************************************************************/
1753 /******************************************************************************/
1754 /******************************************************************************/
1755
1756 static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
1757 {
1758         u32 data, shift;
1759
1760         if (wlen > 4)
1761                 ddbwritel(1, SPI_CONTROL);
1762         while (wlen > 4) {
1763                 /* FIXME: check for big-endian */
1764                 data = swab32(*(u32 *)wbuf);
1765                 wbuf += 4;
1766                 wlen -= 4;
1767                 ddbwritel(data, SPI_DATA);
1768                 while (ddbreadl(SPI_CONTROL) & 0x0004)
1769                         ;
1770         }
1771
1772         if (rlen)
1773                 ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1774         else
1775                 ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1776
1777         data = 0;
1778         shift = ((4 - wlen) * 8);
1779         while (wlen) {
1780                 data <<= 8;
1781                 data |= *wbuf;
1782                 wlen--;
1783                 wbuf++;
1784         }
1785         if (shift)
1786                 data <<= shift;
1787         ddbwritel(data, SPI_DATA);
1788         while (ddbreadl(SPI_CONTROL) & 0x0004)
1789                 ;
1790
1791         if (!rlen) {
1792                 ddbwritel(0, SPI_CONTROL);
1793                 return 0;
1794         }
1795         if (rlen > 4)
1796                 ddbwritel(1, SPI_CONTROL);
1797
1798         while (rlen > 4) {
1799                 ddbwritel(0xffffffff, SPI_DATA);
1800                 while (ddbreadl(SPI_CONTROL) & 0x0004)
1801                         ;
1802                 data = ddbreadl(SPI_DATA);
1803                 *(u32 *) rbuf = swab32(data);
1804                 rbuf += 4;
1805                 rlen -= 4;
1806         }
1807         ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL);
1808         ddbwritel(0xffffffff, SPI_DATA);
1809         while (ddbreadl(SPI_CONTROL) & 0x0004)
1810                 ;
1811
1812         data = ddbreadl(SPI_DATA);
1813         ddbwritel(0, SPI_CONTROL);
1814
1815         if (rlen < 4)
1816                 data <<= ((4 - rlen) * 8);
1817
1818         while (rlen > 0) {
1819                 *rbuf = ((data >> 24) & 0xff);
1820                 data <<= 8;
1821                 rbuf++;
1822                 rlen--;
1823         }
1824         return 0;
1825 }
1826
1827 #define DDB_MAGIC 'd'
1828
1829 struct ddb_flashio {
1830         __user __u8 *write_buf;
1831         __u32 write_len;
1832         __user __u8 *read_buf;
1833         __u32 read_len;
1834 };
1835
1836 #define IOCTL_DDB_FLASHIO  _IOWR(DDB_MAGIC, 0x00, struct ddb_flashio)
1837
1838 #define DDB_NAME "ddbridge"
1839
1840 static u32 ddb_num;
1841 static struct ddb *ddbs[32];
1842 static struct class *ddb_class;
1843 static int ddb_major;
1844
1845 static int ddb_open(struct inode *inode, struct file *file)
1846 {
1847         struct ddb *dev = ddbs[iminor(inode)];
1848
1849         file->private_data = dev;
1850         return 0;
1851 }
1852
1853 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1854 {
1855         struct ddb *dev = file->private_data;
1856         __user void *parg = (__user void *)arg;
1857         int res;
1858
1859         switch (cmd) {
1860         case IOCTL_DDB_FLASHIO:
1861         {
1862                 struct ddb_flashio fio;
1863                 u8 *rbuf, *wbuf;
1864
1865                 if (copy_from_user(&fio, parg, sizeof(fio)))
1866                         return -EFAULT;
1867
1868                 if (fio.write_len > 1028 || fio.read_len > 1028)
1869                         return -EINVAL;
1870                 if (fio.write_len + fio.read_len > 1028)
1871                         return -EINVAL;
1872
1873                 wbuf = &dev->iobuf[0];
1874                 rbuf = wbuf + fio.write_len;
1875
1876                 if (copy_from_user(wbuf, fio.write_buf, fio.write_len))
1877                         return -EFAULT;
1878                 res = flashio(dev, wbuf, fio.write_len, rbuf, fio.read_len);
1879                 if (res)
1880                         return res;
1881                 if (copy_to_user(fio.read_buf, rbuf, fio.read_len))
1882                         return -EFAULT;
1883                 break;
1884         }
1885         default:
1886                 return -ENOTTY;
1887         }
1888         return 0;
1889 }
1890
1891 static const struct file_operations ddb_fops = {
1892         .unlocked_ioctl = ddb_ioctl,
1893         .open           = ddb_open,
1894 };
1895
1896 static char *ddb_devnode(struct device *device, umode_t *mode)
1897 {
1898         struct ddb *dev = dev_get_drvdata(device);
1899
1900         return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
1901 }
1902
1903 static int ddb_class_create(void)
1904 {
1905         ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
1906         if (ddb_major < 0)
1907                 return ddb_major;
1908
1909         ddb_class = class_create(THIS_MODULE, DDB_NAME);
1910         if (IS_ERR(ddb_class)) {
1911                 unregister_chrdev(ddb_major, DDB_NAME);
1912                 return PTR_ERR(ddb_class);
1913         }
1914         ddb_class->devnode = ddb_devnode;
1915         return 0;
1916 }
1917
1918 static void ddb_class_destroy(void)
1919 {
1920         class_destroy(ddb_class);
1921         unregister_chrdev(ddb_major, DDB_NAME);
1922 }
1923
1924 static int ddb_device_create(struct ddb *dev)
1925 {
1926         dev->nr = ddb_num++;
1927         dev->ddb_dev = device_create(ddb_class, NULL,
1928                                      MKDEV(ddb_major, dev->nr),
1929                                      dev, "ddbridge%d", dev->nr);
1930         ddbs[dev->nr] = dev;
1931         if (IS_ERR(dev->ddb_dev))
1932                 return -1;
1933         return 0;
1934 }
1935
1936 static void ddb_device_destroy(struct ddb *dev)
1937 {
1938         ddb_num--;
1939         if (IS_ERR(dev->ddb_dev))
1940                 return;
1941         device_destroy(ddb_class, MKDEV(ddb_major, 0));
1942 }
1943
1944
1945 /****************************************************************************/
1946 /****************************************************************************/
1947 /****************************************************************************/
1948
1949 static void ddb_unmap(struct ddb *dev)
1950 {
1951         if (dev->regs)
1952                 iounmap(dev->regs);
1953         vfree(dev);
1954 }
1955
1956
1957 static void ddb_remove(struct pci_dev *pdev)
1958 {
1959         struct ddb *dev = pci_get_drvdata(pdev);
1960
1961         ddb_ports_detach(dev);
1962         ddb_i2c_release(dev);
1963
1964         ddbwritel(0, INTERRUPT_ENABLE);
1965         free_irq(dev->pdev->irq, dev);
1966 #ifdef CONFIG_PCI_MSI
1967         if (dev->msi)
1968                 pci_disable_msi(dev->pdev);
1969 #endif
1970         ddb_ports_release(dev);
1971         ddb_buffers_free(dev);
1972         ddb_device_destroy(dev);
1973
1974         ddb_unmap(dev);
1975         pci_set_drvdata(pdev, NULL);
1976         pci_disable_device(pdev);
1977 }
1978
1979
1980 static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1981 {
1982         struct ddb *dev;
1983         int stat = 0;
1984         int irq_flag = IRQF_SHARED;
1985
1986         if (pci_enable_device(pdev) < 0)
1987                 return -ENODEV;
1988
1989         dev = vzalloc(sizeof(struct ddb));
1990         if (dev == NULL)
1991                 return -ENOMEM;
1992
1993         dev->pdev = pdev;
1994         pci_set_drvdata(pdev, dev);
1995         dev->info = (struct ddb_info *) id->driver_data;
1996         printk(KERN_INFO "DDBridge driver detected: %s\n", dev->info->name);
1997
1998         dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
1999                             pci_resource_len(dev->pdev, 0));
2000         if (!dev->regs) {
2001                 stat = -ENOMEM;
2002                 goto fail;
2003         }
2004         printk(KERN_INFO "HW %08x FW %08x\n", ddbreadl(0), ddbreadl(4));
2005
2006 #ifdef CONFIG_PCI_MSI
2007         if (pci_msi_enabled())
2008                 stat = pci_enable_msi(dev->pdev);
2009         if (stat) {
2010                 printk(KERN_INFO ": MSI not available.\n");
2011         } else {
2012                 irq_flag = 0;
2013                 dev->msi = 1;
2014         }
2015 #endif
2016         stat = request_irq(dev->pdev->irq, irq_handler,
2017                            irq_flag, "DDBridge", (void *) dev);
2018         if (stat < 0)
2019                 goto fail1;
2020         ddbwritel(0, DMA_BASE_WRITE);
2021         ddbwritel(0, DMA_BASE_READ);
2022         ddbwritel(0xffffffff, INTERRUPT_ACK);
2023         ddbwritel(0xfff0f, INTERRUPT_ENABLE);
2024         ddbwritel(0, MSI1_ENABLE);
2025
2026         /* board control */
2027         if (dev->info->board_control) {
2028                 ddbwritel(0, DDB_LINK_TAG(0) | BOARD_CONTROL);
2029                 msleep(100);
2030                 ddbwritel(dev->info->board_control_2,
2031                         DDB_LINK_TAG(0) | BOARD_CONTROL);
2032                 usleep_range(2000, 3000);
2033                 ddbwritel(dev->info->board_control_2
2034                         | dev->info->board_control,
2035                         DDB_LINK_TAG(0) | BOARD_CONTROL);
2036                 usleep_range(2000, 3000);
2037         }
2038
2039         if (ddb_i2c_init(dev) < 0)
2040                 goto fail1;
2041         ddb_ports_init(dev);
2042         if (ddb_buffers_alloc(dev) < 0) {
2043                 printk(KERN_INFO ": Could not allocate buffer memory\n");
2044                 goto fail2;
2045         }
2046         if (ddb_ports_attach(dev) < 0)
2047                 goto fail3;
2048         ddb_device_create(dev);
2049         return 0;
2050
2051 fail3:
2052         ddb_ports_detach(dev);
2053         printk(KERN_ERR "fail3\n");
2054         ddb_ports_release(dev);
2055 fail2:
2056         printk(KERN_ERR "fail2\n");
2057         ddb_buffers_free(dev);
2058 fail1:
2059         printk(KERN_ERR "fail1\n");
2060         if (dev->msi)
2061                 pci_disable_msi(dev->pdev);
2062         if (stat == 0)
2063                 free_irq(dev->pdev->irq, dev);
2064 fail:
2065         printk(KERN_ERR "fail\n");
2066         ddb_unmap(dev);
2067         pci_set_drvdata(pdev, NULL);
2068         pci_disable_device(pdev);
2069         return -1;
2070 }
2071
2072 /******************************************************************************/
2073 /******************************************************************************/
2074 /******************************************************************************/
2075
2076 static const struct ddb_info ddb_none = {
2077         .type     = DDB_NONE,
2078         .name     = "Digital Devices PCIe bridge",
2079 };
2080
2081 static const struct ddb_info ddb_octopus = {
2082         .type     = DDB_OCTOPUS,
2083         .name     = "Digital Devices Octopus DVB adapter",
2084         .port_num = 4,
2085 };
2086
2087 static const struct ddb_info ddb_octopus_le = {
2088         .type     = DDB_OCTOPUS,
2089         .name     = "Digital Devices Octopus LE DVB adapter",
2090         .port_num = 2,
2091 };
2092
2093 static const struct ddb_info ddb_octopus_oem = {
2094         .type     = DDB_OCTOPUS,
2095         .name     = "Digital Devices Octopus OEM",
2096         .port_num = 4,
2097 };
2098
2099 static const struct ddb_info ddb_octopus_mini = {
2100         .type     = DDB_OCTOPUS,
2101         .name     = "Digital Devices Octopus Mini",
2102         .port_num = 4,
2103 };
2104
2105 static const struct ddb_info ddb_v6 = {
2106         .type     = DDB_OCTOPUS,
2107         .name     = "Digital Devices Cine S2 V6 DVB adapter",
2108         .port_num = 3,
2109 };
2110 static const struct ddb_info ddb_v6_5 = {
2111         .type     = DDB_OCTOPUS,
2112         .name     = "Digital Devices Cine S2 V6.5 DVB adapter",
2113         .port_num = 4,
2114 };
2115
2116 static const struct ddb_info ddb_dvbct = {
2117         .type     = DDB_OCTOPUS,
2118         .name     = "Digital Devices DVBCT V6.1 DVB adapter",
2119         .port_num = 3,
2120 };
2121
2122 static const struct ddb_info ddb_ctv7 = {
2123         .type     = DDB_OCTOPUS,
2124         .name     = "Digital Devices Cine CT V7 DVB adapter",
2125         .port_num = 4,
2126         .board_control   = 3,
2127         .board_control_2 = 4,
2128 };
2129
2130 static const struct ddb_info ddb_satixS2v3 = {
2131         .type     = DDB_OCTOPUS,
2132         .name     = "Mystique SaTiX-S2 V3 DVB adapter",
2133         .port_num = 3,
2134 };
2135
2136 static const struct ddb_info ddb_octopusv3 = {
2137         .type     = DDB_OCTOPUS,
2138         .name     = "Digital Devices Octopus V3 DVB adapter",
2139         .port_num = 4,
2140 };
2141
2142 /*** MaxA8 adapters ***********************************************************/
2143
2144 static struct ddb_info ddb_ct2_8 = {
2145         .type     = DDB_OCTOPUS_MAX_CT,
2146         .name     = "Digital Devices MAX A8 CT2",
2147         .port_num = 4,
2148         .board_control   = 0x0ff,
2149         .board_control_2 = 0xf00,
2150         .ts_quirks = TS_QUIRK_SERIAL,
2151 };
2152
2153 static struct ddb_info ddb_c2t2_8 = {
2154         .type     = DDB_OCTOPUS_MAX_CT,
2155         .name     = "Digital Devices MAX A8 C2T2",
2156         .port_num = 4,
2157         .board_control   = 0x0ff,
2158         .board_control_2 = 0xf00,
2159         .ts_quirks = TS_QUIRK_SERIAL,
2160 };
2161
2162 static struct ddb_info ddb_isdbt_8 = {
2163         .type     = DDB_OCTOPUS_MAX_CT,
2164         .name     = "Digital Devices MAX A8 ISDBT",
2165         .port_num = 4,
2166         .board_control   = 0x0ff,
2167         .board_control_2 = 0xf00,
2168         .ts_quirks = TS_QUIRK_SERIAL,
2169 };
2170
2171 static struct ddb_info ddb_c2t2i_v0_8 = {
2172         .type     = DDB_OCTOPUS_MAX_CT,
2173         .name     = "Digital Devices MAX A8 C2T2I V0",
2174         .port_num = 4,
2175         .board_control   = 0x0ff,
2176         .board_control_2 = 0xf00,
2177         .ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
2178 };
2179
2180 static struct ddb_info ddb_c2t2i_8 = {
2181         .type     = DDB_OCTOPUS_MAX_CT,
2182         .name     = "Digital Devices MAX A8 C2T2I",
2183         .port_num = 4,
2184         .board_control   = 0x0ff,
2185         .board_control_2 = 0xf00,
2186         .ts_quirks = TS_QUIRK_SERIAL,
2187 };
2188
2189 /******************************************************************************/
2190
2191 #define DDVID 0xdd01 /* Digital Devices Vendor ID */
2192
2193 #define DDB_ID(_vend, _dev, _subvend, _subdev, _driverdata) {   \
2194         .vendor      = _vend,    .device    = _dev, \
2195         .subvendor   = _subvend, .subdevice = _subdev, \
2196         .driver_data = (unsigned long)&_driverdata }
2197
2198 static const struct pci_device_id ddb_id_tbl[] = {
2199         DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
2200         DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
2201         DDB_ID(DDVID, 0x0005, DDVID, 0x0004, ddb_octopusv3),
2202         DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le),
2203         DDB_ID(DDVID, 0x0003, DDVID, 0x0003, ddb_octopus_oem),
2204         DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus_mini),
2205         DDB_ID(DDVID, 0x0005, DDVID, 0x0011, ddb_octopus_mini),
2206         DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
2207         DDB_ID(DDVID, 0x0003, DDVID, 0x0021, ddb_v6_5),
2208         DDB_ID(DDVID, 0x0003, DDVID, 0x0030, ddb_dvbct),
2209         DDB_ID(DDVID, 0x0003, DDVID, 0xdb03, ddb_satixS2v3),
2210         DDB_ID(DDVID, 0x0006, DDVID, 0x0031, ddb_ctv7),
2211         DDB_ID(DDVID, 0x0006, DDVID, 0x0032, ddb_ctv7),
2212         DDB_ID(DDVID, 0x0006, DDVID, 0x0033, ddb_ctv7),
2213         DDB_ID(DDVID, 0x0008, DDVID, 0x0034, ddb_ct2_8),
2214         DDB_ID(DDVID, 0x0008, DDVID, 0x0035, ddb_c2t2_8),
2215         DDB_ID(DDVID, 0x0008, DDVID, 0x0036, ddb_isdbt_8),
2216         DDB_ID(DDVID, 0x0008, DDVID, 0x0037, ddb_c2t2i_v0_8),
2217         DDB_ID(DDVID, 0x0008, DDVID, 0x0038, ddb_c2t2i_8),
2218         DDB_ID(DDVID, 0x0006, DDVID, 0x0039, ddb_ctv7),
2219         /* in case sub-ids got deleted in flash */
2220         DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2221         DDB_ID(DDVID, 0x0005, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2222         DDB_ID(DDVID, 0x0006, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2223         DDB_ID(DDVID, 0x0007, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2224         DDB_ID(DDVID, 0x0008, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2225         DDB_ID(DDVID, 0x0011, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2226         DDB_ID(DDVID, 0x0013, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2227         DDB_ID(DDVID, 0x0201, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2228         DDB_ID(DDVID, 0x0320, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
2229         {0}
2230 };
2231 MODULE_DEVICE_TABLE(pci, ddb_id_tbl);
2232
2233
2234 static struct pci_driver ddb_pci_driver = {
2235         .name        = "DDBridge",
2236         .id_table    = ddb_id_tbl,
2237         .probe       = ddb_probe,
2238         .remove      = ddb_remove,
2239 };
2240
2241 static __init int module_init_ddbridge(void)
2242 {
2243         int ret;
2244
2245         printk(KERN_INFO "Digital Devices PCIE bridge driver, Copyright (C) 2010-11 Digital Devices GmbH\n");
2246
2247         ret = ddb_class_create();
2248         if (ret < 0)
2249                 return ret;
2250         ret = pci_register_driver(&ddb_pci_driver);
2251         if (ret < 0)
2252                 ddb_class_destroy();
2253         return ret;
2254 }
2255
2256 static __exit void module_exit_ddbridge(void)
2257 {
2258         pci_unregister_driver(&ddb_pci_driver);
2259         ddb_class_destroy();
2260 }
2261
2262 module_init(module_init_ddbridge);
2263 module_exit(module_exit_ddbridge);
2264
2265 MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
2266 MODULE_AUTHOR("Ralph Metzler");
2267 MODULE_LICENSE("GPL");
2268 MODULE_VERSION("0.5");