drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include "mlx4_ib.h"
  44
  45 enum {
  46         MLX4_IB_VENDOR_CLASS1 = 0x9,
  47         MLX4_IB_VENDOR_CLASS2 = 0xa
  48 };
  49
  50 #define MLX4_TUN_SEND_WRID_SHIFT 34
  51 #define MLX4_TUN_QPN_SHIFT 32
  52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58  /* Port mgmt change event handling */
  59
  60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64 #define GUID_TBL_BLK_NUM_ENTRIES 8
  65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67 struct mlx4_mad_rcv_buf {
  68         struct ib_grh grh;
  69         u8 payload[256];
  70 } __packed;
  71
  72 struct mlx4_mad_snd_buf {
  73         u8 payload[256];
  74 } __packed;
  75
  76 struct mlx4_tunnel_mad {
  77         struct ib_grh grh;
  78         struct mlx4_ib_tunnel_header hdr;
  79         struct ib_mad mad;
  80 } __packed;
  81
  82 struct mlx4_rcv_tunnel_mad {
  83         struct mlx4_rcv_tunnel_hdr hdr;
  84         struct ib_grh grh;
  85         struct ib_mad mad;
  86 } __packed;
  87
  88 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  89 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  90 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  91                                 int block, u32 change_bitmap);
  92
  93 __be64 mlx4_ib_gen_node_guid(void)
  94 {
  95 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  96         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
  97 }
  98
  99 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 100 {
 101         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 102                 cpu_to_be64(0xff00000000000000LL);
 103 }
 104
 105 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 106                  int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
 107                  void *in_mad, void *response_mad)
 108 {
 109         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 110         void *inbox;
 111         int err;
 112         u32 in_modifier = port;
 113         u8 op_modifier = 0;
 114
 115         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 116         if (IS_ERR(inmailbox))
 117                 return PTR_ERR(inmailbox);
 118         inbox = inmailbox->buf;
 119
 120         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 121         if (IS_ERR(outmailbox)) {
 122                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 123                 return PTR_ERR(outmailbox);
 124         }
 125
 126         memcpy(inbox, in_mad, 256);
 127
 128         /*
 129          * Key check traps can't be generated unless we have in_wc to
 130          * tell us where to send the trap.
 131          */
 132         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 133                 op_modifier |= 0x1;
 134         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 135                 op_modifier |= 0x2;
 136         if (mlx4_is_mfunc(dev->dev) &&
 137             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 138                 op_modifier |= 0x8;
 139
 140         if (in_wc) {
 141                 struct {
 142                         __be32          my_qpn;
 143                         u32             reserved1;
 144                         __be32          rqpn;
 145                         u8              sl;
 146                         u8              g_path;
 147                         u16             reserved2[2];
 148                         __be16          pkey;
 149                         u32             reserved3[11];
 150                         u8              grh[40];
 151                 } *ext_info;
 152
 153                 memset(inbox + 256, 0, 256);
 154                 ext_info = inbox + 256;
 155
 156                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 157                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 158                 ext_info->sl     = in_wc->sl << 4;
 159                 ext_info->g_path = in_wc->dlid_path_bits |
 160                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 161                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 162
 163                 if (in_grh)
 164                         memcpy(ext_info->grh, in_grh, 40);
 165
 166                 op_modifier |= 0x4;
 167
 168                 in_modifier |= in_wc->slid << 16;
 169         }
 170
 171         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 172                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 173                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 174                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 175
 176         if (!err)
 177                 memcpy(response_mad, outmailbox->buf, 256);
 178
 179         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 180         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 181
 182         return err;
 183 }
 184
 185 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 186 {
 187         struct ib_ah *new_ah;
 188         struct ib_ah_attr ah_attr;
 189         unsigned long flags;
 190
 191         if (!dev->send_agent[port_num - 1][0])
 192                 return;
 193
 194         memset(&ah_attr, 0, sizeof ah_attr);
 195         ah_attr.dlid     = lid;
 196         ah_attr.sl       = sl;
 197         ah_attr.port_num = port_num;
 198
 199         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 200                               &ah_attr);
 201         if (IS_ERR(new_ah))
 202                 return;
 203
 204         spin_lock_irqsave(&dev->sm_lock, flags);
 205         if (dev->sm_ah[port_num - 1])
 206                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 207         dev->sm_ah[port_num - 1] = new_ah;
 208         spin_unlock_irqrestore(&dev->sm_lock, flags);
 209 }
 210
 211 /*
 212  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 213  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 214  */
 215 static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
 216                       u16 prev_lid)
 217 {
 218         struct ib_port_info *pinfo;
 219         u16 lid;
 220         __be16 *base;
 221         u32 bn, pkey_change_bitmap;
 222         int i;
 223
 224
 225         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 226         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 227              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 228             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 229                 switch (mad->mad_hdr.attr_id) {
 230                 case IB_SMP_ATTR_PORT_INFO:
 231                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 232                         lid = be16_to_cpu(pinfo->lid);
 233
 234                         update_sm_ah(dev, port_num,
 235                                      be16_to_cpu(pinfo->sm_lid),
 236                                      pinfo->neighbormtu_mastersmsl & 0xf);
 237
 238                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 239                                 handle_client_rereg_event(dev, port_num);
 240
 241                         if (prev_lid != lid)
 242                                 handle_lid_change_event(dev, port_num);
 243                         break;
 244
 245                 case IB_SMP_ATTR_PKEY_TABLE:
 246                         if (!mlx4_is_mfunc(dev->dev)) {
 247                                 mlx4_ib_dispatch_event(dev, port_num,
 248                                                        IB_EVENT_PKEY_CHANGE);
 249                                 break;
 250                         }
 251
 252                         /* at this point, we are running in the master.
 253                          * Slaves do not receive SMPs.
 254                          */
 255                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 256                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 257                         pkey_change_bitmap = 0;
 258                         for (i = 0; i < 32; i++) {
 259                                 pr_debug("PKEY[%d] = x%x\n",
 260                                          i + bn*32, be16_to_cpu(base[i]));
 261                                 if (be16_to_cpu(base[i]) !=
 262                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 263                                         pkey_change_bitmap |= (1 << i);
 264                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 265                                                 be16_to_cpu(base[i]);
 266                                 }
 267                         }
 268                         pr_debug("PKEY Change event: port=%d, "
 269                                  "block=0x%x, change_bitmap=0x%x\n",
 270                                  port_num, bn, pkey_change_bitmap);
 271
 272                         if (pkey_change_bitmap) {
 273                                 mlx4_ib_dispatch_event(dev, port_num,
 274                                                        IB_EVENT_PKEY_CHANGE);
 275                                 if (!dev->sriov.is_going_down)
 276                                         __propagate_pkey_ev(dev, port_num, bn,
 277                                                             pkey_change_bitmap);
 278                         }
 279                         break;
 280
 281                 case IB_SMP_ATTR_GUID_INFO:
 282                         /* paravirtualized master's guid is guid 0 -- does not change */
 283                         if (!mlx4_is_master(dev->dev))
 284                                 mlx4_ib_dispatch_event(dev, port_num,
 285                                                        IB_EVENT_GID_CHANGE);
 286                         /*if master, notify relevant slaves*/
 287                         if (mlx4_is_master(dev->dev) &&
 288                             !dev->sriov.is_going_down) {
 289                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 290                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 291                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 292                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 293                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 294                         }
 295                         break;
 296
 297                 default:
 298                         break;
 299                 }
 300 }
 301
 302 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 303                                 int block, u32 change_bitmap)
 304 {
 305         int i, ix, slave, err;
 306         int have_event = 0;
 307
 308         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 309                 if (slave == mlx4_master_func_num(dev->dev))
 310                         continue;
 311                 if (!mlx4_is_slave_active(dev->dev, slave))
 312                         continue;
 313
 314                 have_event = 0;
 315                 for (i = 0; i < 32; i++) {
 316                         if (!(change_bitmap & (1 << i)))
 317                                 continue;
 318                         for (ix = 0;
 319                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 320                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 321                                     [ix] == i + 32 * block) {
 322                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 323                                         pr_debug("propagate_pkey_ev: slave %d,"
 324                                                  " port %d, ix %d (%d)\n",
 325                                                  slave, port_num, ix, err);
 326                                         have_event = 1;
 327                                         break;
 328                                 }
 329                         }
 330                         if (have_event)
 331                                 break;
 332                 }
 333         }
 334 }
 335
 336 static void node_desc_override(struct ib_device *dev,
 337                                struct ib_mad *mad)
 338 {
 339         unsigned long flags;
 340
 341         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 342              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 343             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 344             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 345                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 346                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 347                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 348         }
 349 }
 350
 351 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *mad)
 352 {
 353         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 354         struct ib_mad_send_buf *send_buf;
 355         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 356         int ret;
 357         unsigned long flags;
 358
 359         if (agent) {
 360                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 361                                               IB_MGMT_MAD_DATA, GFP_ATOMIC);
 362                 if (IS_ERR(send_buf))
 363                         return;
 364                 /*
 365                  * We rely here on the fact that MLX QPs don't use the
 366                  * address handle after the send is posted (this is
 367                  * wrong following the IB spec strictly, but we know
 368                  * it's OK for our devices).
 369                  */
 370                 spin_lock_irqsave(&dev->sm_lock, flags);
 371                 memcpy(send_buf->mad, mad, sizeof *mad);
 372                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 373                         ret = ib_post_send_mad(send_buf, NULL);
 374                 else
 375                         ret = -EINVAL;
 376                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 377
 378                 if (ret)
 379                         ib_free_send_mad(send_buf);
 380         }
 381 }
 382
 383 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 384                                                              struct ib_sa_mad *sa_mad)
 385 {
 386         int ret = 0;
 387
 388         /* dispatch to different sa handlers */
 389         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 390         case IB_SA_ATTR_MC_MEMBER_REC:
 391                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 392                 break;
 393         default:
 394                 break;
 395         }
 396         return ret;
 397 }
 398
 399 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 400 {
 401         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 402         int i;
 403
 404         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 405                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 406                         return i;
 407         }
 408         return -1;
 409 }
 410
 411
 412 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 413                                    u8 port, u16 pkey, u16 *ix)
 414 {
 415         int i, ret;
 416         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 417         u16 slot_pkey;
 418
 419         if (slave == mlx4_master_func_num(dev->dev))
 420                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 421
 422         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 423
 424         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 425                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 426                         continue;
 427
 428                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 429
 430                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 431                 if (ret)
 432                         continue;
 433                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 434                         if (slot_pkey & 0x8000) {
 435                                 *ix = (u16) pkey_ix;
 436                                 return 0;
 437                         } else {
 438                                 /* take first partial pkey index found */
 439                                 if (partial_ix == 0xFF)
 440                                         partial_ix = pkey_ix;
 441                         }
 442                 }
 443         }
 444
 445         if (partial_ix < 0xFF) {
 446                 *ix = (u16) partial_ix;
 447                 return 0;
 448         }
 449
 450         return -EINVAL;
 451 }
 452
 453 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 454                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 455                           struct ib_grh *grh, struct ib_mad *mad)
 456 {
 457         struct ib_sge list;
 458         struct ib_send_wr wr, *bad_wr;
 459         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 460         struct mlx4_ib_demux_pv_qp *tun_qp;
 461         struct mlx4_rcv_tunnel_mad *tun_mad;
 462         struct ib_ah_attr attr;
 463         struct ib_ah *ah;
 464         struct ib_qp *src_qp = NULL;
 465         unsigned tun_tx_ix = 0;
 466         int dqpn;
 467         int ret = 0;
 468         u16 tun_pkey_ix;
 469         u16 cached_pkey;
 470         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 471
 472         if (dest_qpt > IB_QPT_GSI)
 473                 return -EINVAL;
 474
 475         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 476
 477         /* check if proxy qp created */
 478         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 479                 return -EAGAIN;
 480
 481         if (!dest_qpt)
 482                 tun_qp = &tun_ctx->qp[0];
 483         else
 484                 tun_qp = &tun_ctx->qp[1];
 485
 486         /* compute P_Key index to put in tunnel header for slave */
 487         if (dest_qpt) {
 488                 u16 pkey_ix;
 489                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 490                 if (ret)
 491                         return -EINVAL;
 492
 493                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 494                 if (ret)
 495                         return -EINVAL;
 496                 tun_pkey_ix = pkey_ix;
 497         } else
 498                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 499
 500         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 501
 502         /* get tunnel tx data buf for slave */
 503         src_qp = tun_qp->qp;
 504
 505         /* create ah. Just need an empty one with the port num for the post send.
 506          * The driver will set the force loopback bit in post_send */
 507         memset(&attr, 0, sizeof attr);
 508         attr.port_num = port;
 509         if (is_eth) {
 510                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 511                 attr.ah_flags = IB_AH_GRH;
 512         }
 513         ah = ib_create_ah(tun_ctx->pd, &attr);
 514         if (IS_ERR(ah))
 515                 return -ENOMEM;
 516
 517         /* allocate tunnel tx buf after pass failure returns */
 518         spin_lock(&tun_qp->tx_lock);
 519         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 520             (MLX4_NUM_TUNNEL_BUFS - 1))
 521                 ret = -EAGAIN;
 522         else
 523                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 524         spin_unlock(&tun_qp->tx_lock);
 525         if (ret)
 526                 goto out;
 527
 528         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 529         if (tun_qp->tx_ring[tun_tx_ix].ah)
 530                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 531         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 532         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 533                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 534                                    sizeof (struct mlx4_rcv_tunnel_mad),
 535                                    DMA_TO_DEVICE);
 536
 537         /* copy over to tunnel buffer */
 538         if (grh)
 539                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 540         memcpy(&tun_mad->mad, mad, sizeof *mad);
 541
 542         /* adjust tunnel data */
 543         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 544         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 545         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 546
 547         if (is_eth) {
 548                 u16 vlan = 0;
 549                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 550                                                 NULL)) {
 551                         /* VST mode */
 552                         if (vlan != wc->vlan_id)
 553                                 /* Packet vlan is not the VST-assigned vlan.
 554                                  * Drop the packet.
 555                                  */
 556                                 goto out;
 557                          else
 558                                 /* Remove the vlan tag before forwarding
 559                                  * the packet to the VF.
 560                                  */
 561                                 vlan = 0xffff;
 562                 } else {
 563                         vlan = wc->vlan_id;
 564                 }
 565
 566                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 567                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 568                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 569         } else {
 570                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 571                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 572         }
 573
 574         ib_dma_sync_single_for_device(&dev->ib_dev,
 575                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 576                                       sizeof (struct mlx4_rcv_tunnel_mad),
 577                                       DMA_TO_DEVICE);
 578
 579         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 580         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 581         list.lkey = tun_ctx->mr->lkey;
 582
 583         wr.wr.ud.ah = ah;
 584         wr.wr.ud.port_num = port;
 585         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 586         wr.wr.ud.remote_qpn = dqpn;
 587         wr.next = NULL;
 588         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 589         wr.sg_list = &list;
 590         wr.num_sge = 1;
 591         wr.opcode = IB_WR_SEND;
 592         wr.send_flags = IB_SEND_SIGNALED;
 593
 594         ret = ib_post_send(src_qp, &wr, &bad_wr);
 595 out:
 596         if (ret)
 597                 ib_destroy_ah(ah);
 598         return ret;
 599 }
 600
 601 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 602                         struct ib_wc *wc, struct ib_grh *grh,
 603                         struct ib_mad *mad)
 604 {
 605         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 606         int err;
 607         int slave;
 608         u8 *slave_id;
 609         int is_eth = 0;
 610
 611         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 612                 is_eth = 0;
 613         else
 614                 is_eth = 1;
 615
 616         if (is_eth) {
 617                 if (!(wc->wc_flags & IB_WC_GRH)) {
 618                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 619                         return -EINVAL;
 620                 }
 621                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 622                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 623                         return -EINVAL;
 624                 }
 625                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 626                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 627                         return -ENOENT;
 628                 }
 629                 if (slave >= dev->dev->caps.sqp_demux) {
 630                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 631                                      slave, dev->dev->caps.sqp_demux);
 632                         return -ENOENT;
 633                 }
 634
 635                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 636                         return 0;
 637
 638                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 639                 if (err)
 640                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 641                                  slave, err);
 642                 return 0;
 643         }
 644
 645         /* Initially assume that this mad is for us */
 646         slave = mlx4_master_func_num(dev->dev);
 647
 648         /* See if the slave id is encoded in a response mad */
 649         if (mad->mad_hdr.method & 0x80) {
 650                 slave_id = (u8 *) &mad->mad_hdr.tid;
 651                 slave = *slave_id;
 652                 if (slave != 255) /*255 indicates the dom0*/
 653                         *slave_id = 0; /* remap tid */
 654         }
 655
 656         /* If a grh is present, we demux according to it */
 657         if (wc->wc_flags & IB_WC_GRH) {
 658                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 659                 if (slave < 0) {
 660                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 661                         return -ENOENT;
 662                 }
 663         }
 664         /* Class-specific handling */
 665         switch (mad->mad_hdr.mgmt_class) {
 666         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 667         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 668                 /* 255 indicates the dom0 */
 669                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 670                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 671                                 return -EPERM;
 672                         /* for a VF. drop unsolicited MADs */
 673                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 674                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 675                                              slave, mad->mad_hdr.mgmt_class,
 676                                              mad->mad_hdr.method);
 677                                 return -EINVAL;
 678                         }
 679                 }
 680                 break;
 681         case IB_MGMT_CLASS_SUBN_ADM:
 682                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 683                                              (struct ib_sa_mad *) mad))
 684                         return 0;
 685                 break;
 686         case IB_MGMT_CLASS_CM:
 687                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 688                         return 0;
 689                 break;
 690         case IB_MGMT_CLASS_DEVICE_MGMT:
 691                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 692                         return 0;
 693                 break;
 694         default:
 695                 /* Drop unsupported classes for slaves in tunnel mode */
 696                 if (slave != mlx4_master_func_num(dev->dev)) {
 697                         pr_debug("dropping unsupported ingress mad from class:%d "
 698                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 699                         return 0;
 700                 }
 701         }
 702         /*make sure that no slave==255 was not handled yet.*/
 703         if (slave >= dev->dev->caps.sqp_demux) {
 704                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 705                              slave, dev->dev->caps.sqp_demux);
 706                 return -ENOENT;
 707         }
 708
 709         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 710         if (err)
 711                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 712                          slave, err);
 713         return 0;
 714 }
 715
 716 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 717                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 718                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 719 {
 720         u16 slid, prev_lid = 0;
 721         int err;
 722         struct ib_port_attr pattr;
 723
 724         if (in_wc && in_wc->qp->qp_num) {
 725                 pr_debug("received MAD: slid:%d sqpn:%d "
 726                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 727                         in_wc->slid, in_wc->src_qp,
 728                         in_wc->dlid_path_bits,
 729                         in_wc->qp->qp_num,
 730                         in_wc->wc_flags,
 731                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 732                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 733                 if (in_wc->wc_flags & IB_WC_GRH) {
 734                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 735                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 736                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 737                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 738                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 739                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 740                 }
 741         }
 742
 743         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 744
 745         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 746                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 747                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 748         }
 749
 750         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 751             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 752                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 753                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 754                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 755                         return IB_MAD_RESULT_SUCCESS;
 756
 757                 /*
 758                  * Don't process SMInfo queries -- the SMA can't handle them.
 759                  */
 760                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 761                         return IB_MAD_RESULT_SUCCESS;
 762         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 763                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 764                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 765                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 766                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 767                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 768                         return IB_MAD_RESULT_SUCCESS;
 769         } else
 770                 return IB_MAD_RESULT_SUCCESS;
 771
 772         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 773              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 774             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 775             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 776             !ib_query_port(ibdev, port_num, &pattr))
 777                 prev_lid = pattr.lid;
 778
 779         err = mlx4_MAD_IFC(to_mdev(ibdev),
 780                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 781                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 782                            MLX4_MAD_IFC_NET_VIEW,
 783                            port_num, in_wc, in_grh, in_mad, out_mad);
 784         if (err)
 785                 return IB_MAD_RESULT_FAILURE;
 786
 787         if (!out_mad->mad_hdr.status) {
 788                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 789                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 790                 /* slaves get node desc from FW */
 791                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 792                         node_desc_override(ibdev, out_mad);
 793         }
 794
 795         /* set return bit in status of directed route responses */
 796         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 797                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 798
 799         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 800                 /* no response for trap repress */
 801                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 802
 803         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 804 }
 805
 806 static void edit_counter(struct mlx4_counter *cnt,
 807                                         struct ib_pma_portcounters *pma_cnt)
 808 {
 809         pma_cnt->port_xmit_data = cpu_to_be32((be64_to_cpu(cnt->tx_bytes)>>2));
 810         pma_cnt->port_rcv_data  = cpu_to_be32((be64_to_cpu(cnt->rx_bytes)>>2));
 811         pma_cnt->port_xmit_packets = cpu_to_be32(be64_to_cpu(cnt->tx_frames));
 812         pma_cnt->port_rcv_packets  = cpu_to_be32(be64_to_cpu(cnt->rx_frames));
 813 }
 814
 815 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 816                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 817                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 818 {
 819         struct mlx4_cmd_mailbox *mailbox;
 820         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 821         int err;
 822         u32 inmod = dev->counters[port_num - 1] & 0xffff;
 823         u8 mode;
 824
 825         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 826                 return -EINVAL;
 827
 828         mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 829         if (IS_ERR(mailbox))
 830                 return IB_MAD_RESULT_FAILURE;
 831
 832         err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
 833                            MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
 834                            MLX4_CMD_WRAPPED);
 835         if (err)
 836                 err = IB_MAD_RESULT_FAILURE;
 837         else {
 838                 memset(out_mad->data, 0, sizeof out_mad->data);
 839                 mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
 840                 switch (mode & 0xf) {
 841                 case 0:
 842                         edit_counter(mailbox->buf,
 843                                                 (void *)(out_mad->data + 40));
 844                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 845                         break;
 846                 default:
 847                         err = IB_MAD_RESULT_FAILURE;
 848                 }
 849         }
 850
 851         mlx4_free_cmd_mailbox(dev->dev, mailbox);
 852
 853         return err;
 854 }
 855
 856 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 857                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 858                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 859 {
 860         switch (rdma_port_get_link_layer(ibdev, port_num)) {
 861         case IB_LINK_LAYER_INFINIBAND:
 862                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 863                                       in_grh, in_mad, out_mad);
 864         case IB_LINK_LAYER_ETHERNET:
 865                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 866                                           in_grh, in_mad, out_mad);
 867         default:
 868                 return -EINVAL;
 869         }
 870 }
 871
 872 static void send_handler(struct ib_mad_agent *agent,
 873                          struct ib_mad_send_wc *mad_send_wc)
 874 {
 875         if (mad_send_wc->send_buf->context[0])
 876                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 877         ib_free_send_mad(mad_send_wc->send_buf);
 878 }
 879
 880 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 881 {
 882         struct ib_mad_agent *agent;
 883         int p, q;
 884         int ret;
 885         enum rdma_link_layer ll;
 886
 887         for (p = 0; p < dev->num_ports; ++p) {
 888                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 889                 for (q = 0; q <= 1; ++q) {
 890                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 891                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 892                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 893                                                               NULL, 0, send_handler,
 894                                                               NULL, NULL, 0);
 895                                 if (IS_ERR(agent)) {
 896                                         ret = PTR_ERR(agent);
 897                                         goto err;
 898                                 }
 899                                 dev->send_agent[p][q] = agent;
 900                         } else
 901                                 dev->send_agent[p][q] = NULL;
 902                 }
 903         }
 904
 905         return 0;
 906
 907 err:
 908         for (p = 0; p < dev->num_ports; ++p)
 909                 for (q = 0; q <= 1; ++q)
 910                         if (dev->send_agent[p][q])
 911                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 912
 913         return ret;
 914 }
 915
 916 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 917 {
 918         struct ib_mad_agent *agent;
 919         int p, q;
 920
 921         for (p = 0; p < dev->num_ports; ++p) {
 922                 for (q = 0; q <= 1; ++q) {
 923                         agent = dev->send_agent[p][q];
 924                         if (agent) {
 925                                 dev->send_agent[p][q] = NULL;
 926                                 ib_unregister_mad_agent(agent);
 927                         }
 928                 }
 929
 930                 if (dev->sm_ah[p])
 931                         ib_destroy_ah(dev->sm_ah[p]);
 932         }
 933 }
 934
 935 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 936 {
 937         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 938
 939         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 940                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 941                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 942 }
 943
 944 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 945 {
 946         /* re-configure the alias-guid and mcg's */
 947         if (mlx4_is_master(dev->dev)) {
 948                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 949
 950                 if (!dev->sriov.is_going_down) {
 951                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 952                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 953                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 954                 }
 955         }
 956         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 957 }
 958
 959 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 960                               struct mlx4_eqe *eqe)
 961 {
 962         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 963                             GET_MASK_FROM_EQE(eqe));
 964 }
 965
 966 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 967                                       u32 guid_tbl_blk_num, u32 change_bitmap)
 968 {
 969         struct ib_smp *in_mad  = NULL;
 970         struct ib_smp *out_mad  = NULL;
 971         u16 i;
 972
 973         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 974                 return;
 975
 976         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 977         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
 978         if (!in_mad || !out_mad) {
 979                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
 980                 goto out;
 981         }
 982
 983         guid_tbl_blk_num  *= 4;
 984
 985         for (i = 0; i < 4; i++) {
 986                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
 987                         continue;
 988                 memset(in_mad, 0, sizeof *in_mad);
 989                 memset(out_mad, 0, sizeof *out_mad);
 990
 991                 in_mad->base_version  = 1;
 992                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
 993                 in_mad->class_version = 1;
 994                 in_mad->method        = IB_MGMT_METHOD_GET;
 995                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
 996                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
 997
 998                 if (mlx4_MAD_IFC(dev,
 999                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1000                                  port_num, NULL, NULL, in_mad, out_mad)) {
1001                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1002                         goto out;
1003                 }
1004
1005                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1006                                                     port_num,
1007                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1008                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1009                                                      port_num,
1010                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1011         }
1012
1013 out:
1014         kfree(in_mad);
1015         kfree(out_mad);
1016         return;
1017 }
1018
1019 void handle_port_mgmt_change_event(struct work_struct *work)
1020 {
1021         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1022         struct mlx4_ib_dev *dev = ew->ib_dev;
1023         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1024         u8 port = eqe->event.port_mgmt_change.port;
1025         u32 changed_attr;
1026         u32 tbl_block;
1027         u32 change_bitmap;
1028
1029         switch (eqe->subtype) {
1030         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1031                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1032
1033                 /* Update the SM ah - This should be done before handling
1034                    the other changed attributes so that MADs can be sent to the SM */
1035                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1036                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1037                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1038                         update_sm_ah(dev, port, lid, sl);
1039                 }
1040
1041                 /* Check if it is a lid change event */
1042                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1043                         handle_lid_change_event(dev, port);
1044
1045                 /* Generate GUID changed event */
1046                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1047                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1048                         /*if master, notify all slaves*/
1049                         if (mlx4_is_master(dev->dev))
1050                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1051                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1052                 }
1053
1054                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1055                         handle_client_rereg_event(dev, port);
1056                 break;
1057
1058         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1059                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1060                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1061                         propagate_pkey_ev(dev, port, eqe);
1062                 break;
1063         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1064                 /* paravirtualized master's guid is guid 0 -- does not change */
1065                 if (!mlx4_is_master(dev->dev))
1066                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1067                 /*if master, notify relevant slaves*/
1068                 else if (!dev->sriov.is_going_down) {
1069                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1070                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1071                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1072                 }
1073                 break;
1074         default:
1075                 pr_warn("Unsupported subtype 0x%x for "
1076                         "Port Management Change event\n", eqe->subtype);
1077         }
1078
1079         kfree(ew);
1080 }
1081
1082 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1083                             enum ib_event_type type)
1084 {
1085         struct ib_event event;
1086
1087         event.device            = &dev->ib_dev;
1088         event.element.port_num  = port_num;
1089         event.event             = type;
1090
1091         ib_dispatch_event(&event);
1092 }
1093
1094 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1095 {
1096         unsigned long flags;
1097         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1098         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1099         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1100         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1101                 queue_work(ctx->wq, &ctx->work);
1102         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1103 }
1104
1105 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1106                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1107                                   int index)
1108 {
1109         struct ib_sge sg_list;
1110         struct ib_recv_wr recv_wr, *bad_recv_wr;
1111         int size;
1112
1113         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1114                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1115
1116         sg_list.addr = tun_qp->ring[index].map;
1117         sg_list.length = size;
1118         sg_list.lkey = ctx->mr->lkey;
1119
1120         recv_wr.next = NULL;
1121         recv_wr.sg_list = &sg_list;
1122         recv_wr.num_sge = 1;
1123         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1124                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1125         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1126                                       size, DMA_FROM_DEVICE);
1127         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1128 }
1129
1130 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1131                 int slave, struct ib_sa_mad *sa_mad)
1132 {
1133         int ret = 0;
1134
1135         /* dispatch to different sa handlers */
1136         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1137         case IB_SA_ATTR_MC_MEMBER_REC:
1138                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1139                 break;
1140         default:
1141                 break;
1142         }
1143         return ret;
1144 }
1145
1146 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1147 {
1148         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1149
1150         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1151 }
1152
1153
1154 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1155                          enum ib_qp_type dest_qpt, u16 pkey_index,
1156                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1157                          u8 *s_mac, struct ib_mad *mad)
1158 {
1159         struct ib_sge list;
1160         struct ib_send_wr wr, *bad_wr;
1161         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1162         struct mlx4_ib_demux_pv_qp *sqp;
1163         struct mlx4_mad_snd_buf *sqp_mad;
1164         struct ib_ah *ah;
1165         struct ib_qp *send_qp = NULL;
1166         unsigned wire_tx_ix = 0;
1167         int ret = 0;
1168         u16 wire_pkey_ix;
1169         int src_qpnum;
1170         u8 sgid_index;
1171
1172
1173         sqp_ctx = dev->sriov.sqps[port-1];
1174
1175         /* check if proxy qp created */
1176         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1177                 return -EAGAIN;
1178
1179         if (dest_qpt == IB_QPT_SMI) {
1180                 src_qpnum = 0;
1181                 sqp = &sqp_ctx->qp[0];
1182                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1183         } else {
1184                 src_qpnum = 1;
1185                 sqp = &sqp_ctx->qp[1];
1186                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1187         }
1188
1189         send_qp = sqp->qp;
1190
1191         /* create ah */
1192         sgid_index = attr->grh.sgid_index;
1193         attr->grh.sgid_index = 0;
1194         ah = ib_create_ah(sqp_ctx->pd, attr);
1195         if (IS_ERR(ah))
1196                 return -ENOMEM;
1197         attr->grh.sgid_index = sgid_index;
1198         to_mah(ah)->av.ib.gid_index = sgid_index;
1199         /* get rid of force-loopback bit */
1200         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1201         spin_lock(&sqp->tx_lock);
1202         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1203             (MLX4_NUM_TUNNEL_BUFS - 1))
1204                 ret = -EAGAIN;
1205         else
1206                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1207         spin_unlock(&sqp->tx_lock);
1208         if (ret)
1209                 goto out;
1210
1211         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1212         if (sqp->tx_ring[wire_tx_ix].ah)
1213                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1214         sqp->tx_ring[wire_tx_ix].ah = ah;
1215         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1216                                    sqp->tx_ring[wire_tx_ix].buf.map,
1217                                    sizeof (struct mlx4_mad_snd_buf),
1218                                    DMA_TO_DEVICE);
1219
1220         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1221
1222         ib_dma_sync_single_for_device(&dev->ib_dev,
1223                                       sqp->tx_ring[wire_tx_ix].buf.map,
1224                                       sizeof (struct mlx4_mad_snd_buf),
1225                                       DMA_TO_DEVICE);
1226
1227         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1228         list.length = sizeof (struct mlx4_mad_snd_buf);
1229         list.lkey = sqp_ctx->mr->lkey;
1230
1231         wr.wr.ud.ah = ah;
1232         wr.wr.ud.port_num = port;
1233         wr.wr.ud.pkey_index = wire_pkey_ix;
1234         wr.wr.ud.remote_qkey = qkey;
1235         wr.wr.ud.remote_qpn = remote_qpn;
1236         wr.next = NULL;
1237         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1238         wr.sg_list = &list;
1239         wr.num_sge = 1;
1240         wr.opcode = IB_WR_SEND;
1241         wr.send_flags = IB_SEND_SIGNALED;
1242         if (s_mac)
1243                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1244
1245
1246         ret = ib_post_send(send_qp, &wr, &bad_wr);
1247 out:
1248         if (ret)
1249                 ib_destroy_ah(ah);
1250         return ret;
1251 }
1252
1253 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1254 {
1255         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1256                 return slave;
1257         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1258 }
1259
1260 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1261                                     struct ib_ah_attr *ah_attr)
1262 {
1263         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1264                 ah_attr->grh.sgid_index = slave;
1265         else
1266                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1267 }
1268
1269 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1270 {
1271         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1272         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1273         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1274         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1275         struct mlx4_ib_ah ah;
1276         struct ib_ah_attr ah_attr;
1277         u8 *slave_id;
1278         int slave;
1279         int port;
1280
1281         /* Get slave that sent this packet */
1282         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1283             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1284             (wc->src_qp & 0x1) != ctx->port - 1 ||
1285             wc->src_qp & 0x4) {
1286                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1287                 return;
1288         }
1289         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1290         if (slave != ctx->slave) {
1291                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1292                              "belongs to another slave\n", wc->src_qp);
1293                 return;
1294         }
1295
1296         /* Map transaction ID */
1297         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1298                                    sizeof (struct mlx4_tunnel_mad),
1299                                    DMA_FROM_DEVICE);
1300         switch (tunnel->mad.mad_hdr.method) {
1301         case IB_MGMT_METHOD_SET:
1302         case IB_MGMT_METHOD_GET:
1303         case IB_MGMT_METHOD_REPORT:
1304         case IB_SA_METHOD_GET_TABLE:
1305         case IB_SA_METHOD_DELETE:
1306         case IB_SA_METHOD_GET_MULTI:
1307         case IB_SA_METHOD_GET_TRACE_TBL:
1308                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1309                 if (*slave_id) {
1310                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1311                                      "class:%d slave:%d\n", *slave_id,
1312                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1313                         return;
1314                 } else
1315                         *slave_id = slave;
1316         default:
1317                 /* nothing */;
1318         }
1319
1320         /* Class-specific handling */
1321         switch (tunnel->mad.mad_hdr.mgmt_class) {
1322         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1323         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1324                 if (slave != mlx4_master_func_num(dev->dev) &&
1325                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1326                         return;
1327                 break;
1328         case IB_MGMT_CLASS_SUBN_ADM:
1329                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1330                               (struct ib_sa_mad *) &tunnel->mad))
1331                         return;
1332                 break;
1333         case IB_MGMT_CLASS_CM:
1334                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1335                               (struct ib_mad *) &tunnel->mad))
1336                         return;
1337                 break;
1338         case IB_MGMT_CLASS_DEVICE_MGMT:
1339                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1340                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1341                         return;
1342                 break;
1343         default:
1344                 /* Drop unsupported classes for slaves in tunnel mode */
1345                 if (slave != mlx4_master_func_num(dev->dev)) {
1346                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1347                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1348                         return;
1349                 }
1350         }
1351
1352         /* We are using standard ib_core services to send the mad, so generate a
1353          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1354         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1355         ah.ibah.device = ctx->ib_dev;
1356         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1357         if (ah_attr.ah_flags & IB_AH_GRH)
1358                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1359
1360         port = mlx4_slave_convert_port(dev->dev, slave, ah_attr.port_num);
1361         if (port < 0)
1362                 return;
1363         ah_attr.port_num = port;
1364         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1365         ah_attr.vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1366         /* if slave have default vlan use it */
1367         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1368                                     &ah_attr.vlan_id, &ah_attr.sl);
1369
1370         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1371                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1372                              IB_QPT_SMI : IB_QPT_GSI,
1373                              be16_to_cpu(tunnel->hdr.pkey_index),
1374                              be32_to_cpu(tunnel->hdr.remote_qpn),
1375                              be32_to_cpu(tunnel->hdr.qkey),
1376                              &ah_attr, wc->smac, &tunnel->mad);
1377 }
1378
1379 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1380                                  enum ib_qp_type qp_type, int is_tun)
1381 {
1382         int i;
1383         struct mlx4_ib_demux_pv_qp *tun_qp;
1384         int rx_buf_size, tx_buf_size;
1385
1386         if (qp_type > IB_QPT_GSI)
1387                 return -EINVAL;
1388
1389         tun_qp = &ctx->qp[qp_type];
1390
1391         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1392                                GFP_KERNEL);
1393         if (!tun_qp->ring)
1394                 return -ENOMEM;
1395
1396         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1397                                   sizeof (struct mlx4_ib_tun_tx_buf),
1398                                   GFP_KERNEL);
1399         if (!tun_qp->tx_ring) {
1400                 kfree(tun_qp->ring);
1401                 tun_qp->ring = NULL;
1402                 return -ENOMEM;
1403         }
1404
1405         if (is_tun) {
1406                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1407                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1408         } else {
1409                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1410                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1411         }
1412
1413         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1414                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1415                 if (!tun_qp->ring[i].addr)
1416                         goto err;
1417                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1418                                                         tun_qp->ring[i].addr,
1419                                                         rx_buf_size,
1420                                                         DMA_FROM_DEVICE);
1421         }
1422
1423         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1424                 tun_qp->tx_ring[i].buf.addr =
1425                         kmalloc(tx_buf_size, GFP_KERNEL);
1426                 if (!tun_qp->tx_ring[i].buf.addr)
1427                         goto tx_err;
1428                 tun_qp->tx_ring[i].buf.map =
1429                         ib_dma_map_single(ctx->ib_dev,
1430                                           tun_qp->tx_ring[i].buf.addr,
1431                                           tx_buf_size,
1432                                           DMA_TO_DEVICE);
1433                 tun_qp->tx_ring[i].ah = NULL;
1434         }
1435         spin_lock_init(&tun_qp->tx_lock);
1436         tun_qp->tx_ix_head = 0;
1437         tun_qp->tx_ix_tail = 0;
1438         tun_qp->proxy_qpt = qp_type;
1439
1440         return 0;
1441
1442 tx_err:
1443         while (i > 0) {
1444                 --i;
1445                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1446                                     tx_buf_size, DMA_TO_DEVICE);
1447                 kfree(tun_qp->tx_ring[i].buf.addr);
1448         }
1449         kfree(tun_qp->tx_ring);
1450         tun_qp->tx_ring = NULL;
1451         i = MLX4_NUM_TUNNEL_BUFS;
1452 err:
1453         while (i > 0) {
1454                 --i;
1455                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1456                                     rx_buf_size, DMA_FROM_DEVICE);
1457                 kfree(tun_qp->ring[i].addr);
1458         }
1459         kfree(tun_qp->ring);
1460         tun_qp->ring = NULL;
1461         return -ENOMEM;
1462 }
1463
1464 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1465                                      enum ib_qp_type qp_type, int is_tun)
1466 {
1467         int i;
1468         struct mlx4_ib_demux_pv_qp *tun_qp;
1469         int rx_buf_size, tx_buf_size;
1470
1471         if (qp_type > IB_QPT_GSI)
1472                 return;
1473
1474         tun_qp = &ctx->qp[qp_type];
1475         if (is_tun) {
1476                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1477                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1478         } else {
1479                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1480                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1481         }
1482
1483
1484         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1485                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1486                                     rx_buf_size, DMA_FROM_DEVICE);
1487                 kfree(tun_qp->ring[i].addr);
1488         }
1489
1490         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1491                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1492                                     tx_buf_size, DMA_TO_DEVICE);
1493                 kfree(tun_qp->tx_ring[i].buf.addr);
1494                 if (tun_qp->tx_ring[i].ah)
1495                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1496         }
1497         kfree(tun_qp->tx_ring);
1498         kfree(tun_qp->ring);
1499 }
1500
1501 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1502 {
1503         struct mlx4_ib_demux_pv_ctx *ctx;
1504         struct mlx4_ib_demux_pv_qp *tun_qp;
1505         struct ib_wc wc;
1506         int ret;
1507         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1508         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1509
1510         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1511                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1512                 if (wc.status == IB_WC_SUCCESS) {
1513                         switch (wc.opcode) {
1514                         case IB_WC_RECV:
1515                                 mlx4_ib_multiplex_mad(ctx, &wc);
1516                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1517                                                              wc.wr_id &
1518                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1519                                 if (ret)
1520                                         pr_err("Failed reposting tunnel "
1521                                                "buf:%lld\n", wc.wr_id);
1522                                 break;
1523                         case IB_WC_SEND:
1524                                 pr_debug("received tunnel send completion:"
1525                                          "wrid=0x%llx, status=0x%x\n",
1526                                          wc.wr_id, wc.status);
1527                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1528                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1529                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1530                                         = NULL;
1531                                 spin_lock(&tun_qp->tx_lock);
1532                                 tun_qp->tx_ix_tail++;
1533                                 spin_unlock(&tun_qp->tx_lock);
1534
1535                                 break;
1536                         default:
1537                                 break;
1538                         }
1539                 } else  {
1540                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1541                                  " status = %d, wrid = 0x%llx\n",
1542                                  ctx->slave, wc.status, wc.wr_id);
1543                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1544                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1545                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1546                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1547                                         = NULL;
1548                                 spin_lock(&tun_qp->tx_lock);
1549                                 tun_qp->tx_ix_tail++;
1550                                 spin_unlock(&tun_qp->tx_lock);
1551                         }
1552                 }
1553         }
1554 }
1555
1556 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1557 {
1558         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1559
1560         /* It's worse than that! He's dead, Jim! */
1561         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1562                event->event, sqp->port);
1563 }
1564
1565 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1566                             enum ib_qp_type qp_type, int create_tun)
1567 {
1568         int i, ret;
1569         struct mlx4_ib_demux_pv_qp *tun_qp;
1570         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1571         struct ib_qp_attr attr;
1572         int qp_attr_mask_INIT;
1573
1574         if (qp_type > IB_QPT_GSI)
1575                 return -EINVAL;
1576
1577         tun_qp = &ctx->qp[qp_type];
1578
1579         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1580         qp_init_attr.init_attr.send_cq = ctx->cq;
1581         qp_init_attr.init_attr.recv_cq = ctx->cq;
1582         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1583         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1584         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1585         qp_init_attr.init_attr.cap.max_send_sge = 1;
1586         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1587         if (create_tun) {
1588                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1589                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1590                 qp_init_attr.port = ctx->port;
1591                 qp_init_attr.slave = ctx->slave;
1592                 qp_init_attr.proxy_qp_type = qp_type;
1593                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1594                            IB_QP_QKEY | IB_QP_PORT;
1595         } else {
1596                 qp_init_attr.init_attr.qp_type = qp_type;
1597                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1598                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1599         }
1600         qp_init_attr.init_attr.port_num = ctx->port;
1601         qp_init_attr.init_attr.qp_context = ctx;
1602         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1603         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1604         if (IS_ERR(tun_qp->qp)) {
1605                 ret = PTR_ERR(tun_qp->qp);
1606                 tun_qp->qp = NULL;
1607                 pr_err("Couldn't create %s QP (%d)\n",
1608                        create_tun ? "tunnel" : "special", ret);
1609                 return ret;
1610         }
1611
1612         memset(&attr, 0, sizeof attr);
1613         attr.qp_state = IB_QPS_INIT;
1614         ret = 0;
1615         if (create_tun)
1616                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1617                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1618                                               &attr.pkey_index);
1619         if (ret || !create_tun)
1620                 attr.pkey_index =
1621                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1622         attr.qkey = IB_QP1_QKEY;
1623         attr.port_num = ctx->port;
1624         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1625         if (ret) {
1626                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1627                        create_tun ? "tunnel" : "special", ret);
1628                 goto err_qp;
1629         }
1630         attr.qp_state = IB_QPS_RTR;
1631         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1632         if (ret) {
1633                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1634                        create_tun ? "tunnel" : "special", ret);
1635                 goto err_qp;
1636         }
1637         attr.qp_state = IB_QPS_RTS;
1638         attr.sq_psn = 0;
1639         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1640         if (ret) {
1641                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1642                        create_tun ? "tunnel" : "special", ret);
1643                 goto err_qp;
1644         }
1645
1646         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1647                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1648                 if (ret) {
1649                         pr_err(" mlx4_ib_post_pv_buf error"
1650                                " (err = %d, i = %d)\n", ret, i);
1651                         goto err_qp;
1652                 }
1653         }
1654         return 0;
1655
1656 err_qp:
1657         ib_destroy_qp(tun_qp->qp);
1658         tun_qp->qp = NULL;
1659         return ret;
1660 }
1661
1662 /*
1663  * IB MAD completion callback for real SQPs
1664  */
1665 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1666 {
1667         struct mlx4_ib_demux_pv_ctx *ctx;
1668         struct mlx4_ib_demux_pv_qp *sqp;
1669         struct ib_wc wc;
1670         struct ib_grh *grh;
1671         struct ib_mad *mad;
1672
1673         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1674         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1675
1676         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1677                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1678                 if (wc.status == IB_WC_SUCCESS) {
1679                         switch (wc.opcode) {
1680                         case IB_WC_SEND:
1681                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1682                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1683                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1684                                         = NULL;
1685                                 spin_lock(&sqp->tx_lock);
1686                                 sqp->tx_ix_tail++;
1687                                 spin_unlock(&sqp->tx_lock);
1688                                 break;
1689                         case IB_WC_RECV:
1690                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1691                                                 (sqp->ring[wc.wr_id &
1692                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1693                                 grh = &(((struct mlx4_mad_rcv_buf *)
1694                                                 (sqp->ring[wc.wr_id &
1695                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1696                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1697                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1698                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1699                                         pr_err("Failed reposting SQP "
1700                                                "buf:%lld\n", wc.wr_id);
1701                                 break;
1702                         default:
1703                                 BUG_ON(1);
1704                                 break;
1705                         }
1706                 } else  {
1707                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1708                                  " status = %d, wrid = 0x%llx\n",
1709                                  ctx->slave, wc.status, wc.wr_id);
1710                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1711                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1712                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1713                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1714                                         = NULL;
1715                                 spin_lock(&sqp->tx_lock);
1716                                 sqp->tx_ix_tail++;
1717                                 spin_unlock(&sqp->tx_lock);
1718                         }
1719                 }
1720         }
1721 }
1722
1723 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1724                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1725 {
1726         struct mlx4_ib_demux_pv_ctx *ctx;
1727
1728         *ret_ctx = NULL;
1729         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1730         if (!ctx) {
1731                 pr_err("failed allocating pv resource context "
1732                        "for port %d, slave %d\n", port, slave);
1733                 return -ENOMEM;
1734         }
1735
1736         ctx->ib_dev = &dev->ib_dev;
1737         ctx->port = port;
1738         ctx->slave = slave;
1739         *ret_ctx = ctx;
1740         return 0;
1741 }
1742
1743 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1744 {
1745         if (dev->sriov.demux[port - 1].tun[slave]) {
1746                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1747                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1748         }
1749 }
1750
1751 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1752                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1753 {
1754         int ret, cq_size;
1755
1756         if (ctx->state != DEMUX_PV_STATE_DOWN)
1757                 return -EEXIST;
1758
1759         ctx->state = DEMUX_PV_STATE_STARTING;
1760         /* have QP0 only if link layer is IB */
1761         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1762             IB_LINK_LAYER_INFINIBAND)
1763                 ctx->has_smi = 1;
1764
1765         if (ctx->has_smi) {
1766                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1767                 if (ret) {
1768                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1769                         goto err_out;
1770                 }
1771         }
1772
1773         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1774         if (ret) {
1775                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1776                 goto err_out_qp0;
1777         }
1778
1779         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1780         if (ctx->has_smi)
1781                 cq_size *= 2;
1782
1783         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1784                                NULL, ctx, cq_size, 0);
1785         if (IS_ERR(ctx->cq)) {
1786                 ret = PTR_ERR(ctx->cq);
1787                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1788                 goto err_buf;
1789         }
1790
1791         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1792         if (IS_ERR(ctx->pd)) {
1793                 ret = PTR_ERR(ctx->pd);
1794                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1795                 goto err_cq;
1796         }
1797
1798         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1799         if (IS_ERR(ctx->mr)) {
1800                 ret = PTR_ERR(ctx->mr);
1801                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1802                 goto err_pd;
1803         }
1804
1805         if (ctx->has_smi) {
1806                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1807                 if (ret) {
1808                         pr_err("Couldn't create %s QP0 (%d)\n",
1809                                create_tun ? "tunnel for" : "",  ret);
1810                         goto err_mr;
1811                 }
1812         }
1813
1814         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1815         if (ret) {
1816                 pr_err("Couldn't create %s QP1 (%d)\n",
1817                        create_tun ? "tunnel for" : "",  ret);
1818                 goto err_qp0;
1819         }
1820
1821         if (create_tun)
1822                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1823         else
1824                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1825
1826         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1827
1828         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1829         if (ret) {
1830                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1831                 goto err_wq;
1832         }
1833         ctx->state = DEMUX_PV_STATE_ACTIVE;
1834         return 0;
1835
1836 err_wq:
1837         ctx->wq = NULL;
1838         ib_destroy_qp(ctx->qp[1].qp);
1839         ctx->qp[1].qp = NULL;
1840
1841
1842 err_qp0:
1843         if (ctx->has_smi)
1844                 ib_destroy_qp(ctx->qp[0].qp);
1845         ctx->qp[0].qp = NULL;
1846
1847 err_mr:
1848         ib_dereg_mr(ctx->mr);
1849         ctx->mr = NULL;
1850
1851 err_pd:
1852         ib_dealloc_pd(ctx->pd);
1853         ctx->pd = NULL;
1854
1855 err_cq:
1856         ib_destroy_cq(ctx->cq);
1857         ctx->cq = NULL;
1858
1859 err_buf:
1860         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1861
1862 err_out_qp0:
1863         if (ctx->has_smi)
1864                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1865 err_out:
1866         ctx->state = DEMUX_PV_STATE_DOWN;
1867         return ret;
1868 }
1869
1870 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1871                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1872 {
1873         if (!ctx)
1874                 return;
1875         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1876                 ctx->state = DEMUX_PV_STATE_DOWNING;
1877                 if (flush)
1878                         flush_workqueue(ctx->wq);
1879                 if (ctx->has_smi) {
1880                         ib_destroy_qp(ctx->qp[0].qp);
1881                         ctx->qp[0].qp = NULL;
1882                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1883                 }
1884                 ib_destroy_qp(ctx->qp[1].qp);
1885                 ctx->qp[1].qp = NULL;
1886                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1887                 ib_dereg_mr(ctx->mr);
1888                 ctx->mr = NULL;
1889                 ib_dealloc_pd(ctx->pd);
1890                 ctx->pd = NULL;
1891                 ib_destroy_cq(ctx->cq);
1892                 ctx->cq = NULL;
1893                 ctx->state = DEMUX_PV_STATE_DOWN;
1894         }
1895 }
1896
1897 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1898                                   int port, int do_init)
1899 {
1900         int ret = 0;
1901
1902         if (!do_init) {
1903                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1904                 /* for master, destroy real sqp resources */
1905                 if (slave == mlx4_master_func_num(dev->dev))
1906                         destroy_pv_resources(dev, slave, port,
1907                                              dev->sriov.sqps[port - 1], 1);
1908                 /* destroy the tunnel qp resources */
1909                 destroy_pv_resources(dev, slave, port,
1910                                      dev->sriov.demux[port - 1].tun[slave], 1);
1911                 return 0;
1912         }
1913
1914         /* create the tunnel qp resources */
1915         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1916                                   dev->sriov.demux[port - 1].tun[slave]);
1917
1918         /* for master, create the real sqp resources */
1919         if (!ret && slave == mlx4_master_func_num(dev->dev))
1920                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1921                                           dev->sriov.sqps[port - 1]);
1922         return ret;
1923 }
1924
1925 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1926 {
1927         struct mlx4_ib_demux_work *dmxw;
1928
1929         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1930         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1931                                dmxw->do_init);
1932         kfree(dmxw);
1933         return;
1934 }
1935
1936 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1937                                        struct mlx4_ib_demux_ctx *ctx,
1938                                        int port)
1939 {
1940         char name[12];
1941         int ret = 0;
1942         int i;
1943
1944         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1945                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1946         if (!ctx->tun)
1947                 return -ENOMEM;
1948
1949         ctx->dev = dev;
1950         ctx->port = port;
1951         ctx->ib_dev = &dev->ib_dev;
1952
1953         for (i = 0;
1954              i < min(dev->dev->caps.sqp_demux,
1955              (u16)(dev->dev->persist->num_vfs + 1));
1956              i++) {
1957                 struct mlx4_active_ports actv_ports =
1958                         mlx4_get_active_ports(dev->dev, i);
1959
1960                 if (!test_bit(port - 1, actv_ports.ports))
1961                         continue;
1962
1963                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1964                 if (ret) {
1965                         ret = -ENOMEM;
1966                         goto err_mcg;
1967                 }
1968         }
1969
1970         ret = mlx4_ib_mcg_port_init(ctx);
1971         if (ret) {
1972                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
1973                 goto err_mcg;
1974         }
1975
1976         snprintf(name, sizeof name, "mlx4_ibt%d", port);
1977         ctx->wq = create_singlethread_workqueue(name);
1978         if (!ctx->wq) {
1979                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
1980                 ret = -ENOMEM;
1981                 goto err_wq;
1982         }
1983
1984         snprintf(name, sizeof name, "mlx4_ibud%d", port);
1985         ctx->ud_wq = create_singlethread_workqueue(name);
1986         if (!ctx->ud_wq) {
1987                 pr_err("Failed to create up/down WQ for port %d\n", port);
1988                 ret = -ENOMEM;
1989                 goto err_udwq;
1990         }
1991
1992         return 0;
1993
1994 err_udwq:
1995         destroy_workqueue(ctx->wq);
1996         ctx->wq = NULL;
1997
1998 err_wq:
1999         mlx4_ib_mcg_port_cleanup(ctx, 1);
2000 err_mcg:
2001         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2002                 free_pv_object(dev, i, port);
2003         kfree(ctx->tun);
2004         ctx->tun = NULL;
2005         return ret;
2006 }
2007
2008 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2009 {
2010         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2011                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2012                 flush_workqueue(sqp_ctx->wq);
2013                 if (sqp_ctx->has_smi) {
2014                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2015                         sqp_ctx->qp[0].qp = NULL;
2016                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2017                 }
2018                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2019                 sqp_ctx->qp[1].qp = NULL;
2020                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2021                 ib_dereg_mr(sqp_ctx->mr);
2022                 sqp_ctx->mr = NULL;
2023                 ib_dealloc_pd(sqp_ctx->pd);
2024                 sqp_ctx->pd = NULL;
2025                 ib_destroy_cq(sqp_ctx->cq);
2026                 sqp_ctx->cq = NULL;
2027                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2028         }
2029 }
2030
2031 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2032 {
2033         int i;
2034         if (ctx) {
2035                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2036                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2037                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2038                         if (!ctx->tun[i])
2039                                 continue;
2040                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2041                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2042                 }
2043                 flush_workqueue(ctx->wq);
2044                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2045                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2046                         free_pv_object(dev, i, ctx->port);
2047                 }
2048                 kfree(ctx->tun);
2049                 destroy_workqueue(ctx->ud_wq);
2050                 destroy_workqueue(ctx->wq);
2051         }
2052 }
2053
2054 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2055 {
2056         int i;
2057
2058         if (!mlx4_is_master(dev->dev))
2059                 return;
2060         /* initialize or tear down tunnel QPs for the master */
2061         for (i = 0; i < dev->dev->caps.num_ports; i++)
2062                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2063         return;
2064 }
2065
2066 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2067 {
2068         int i = 0;
2069         int err;
2070
2071         if (!mlx4_is_mfunc(dev->dev))
2072                 return 0;
2073
2074         dev->sriov.is_going_down = 0;
2075         spin_lock_init(&dev->sriov.going_down_lock);
2076         mlx4_ib_cm_paravirt_init(dev);
2077
2078         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2079
2080         if (mlx4_is_slave(dev->dev)) {
2081                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2082                 return 0;
2083         }
2084
2085         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2086                 if (i == mlx4_master_func_num(dev->dev))
2087                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2088                 else
2089                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2090         }
2091
2092         err = mlx4_ib_init_alias_guid_service(dev);
2093         if (err) {
2094                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2095                 goto paravirt_err;
2096         }
2097         err = mlx4_ib_device_register_sysfs(dev);
2098         if (err) {
2099                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2100                 goto sysfs_err;
2101         }
2102
2103         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2104                      dev->dev->caps.sqp_demux);
2105         for (i = 0; i < dev->num_ports; i++) {
2106                 union ib_gid gid;
2107                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2108                 if (err)
2109                         goto demux_err;
2110                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2111                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2112                                       &dev->sriov.sqps[i]);
2113                 if (err)
2114                         goto demux_err;
2115                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2116                 if (err)
2117                         goto free_pv;
2118         }
2119         mlx4_ib_master_tunnels(dev, 1);
2120         return 0;
2121
2122 free_pv:
2123         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2124 demux_err:
2125         while (--i >= 0) {
2126                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2127                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2128         }
2129         mlx4_ib_device_unregister_sysfs(dev);
2130
2131 sysfs_err:
2132         mlx4_ib_destroy_alias_guid_service(dev);
2133
2134 paravirt_err:
2135         mlx4_ib_cm_paravirt_clean(dev, -1);
2136
2137         return err;
2138 }
2139
2140 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2141 {
2142         int i;
2143         unsigned long flags;
2144
2145         if (!mlx4_is_mfunc(dev->dev))
2146                 return;
2147
2148         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2149         dev->sriov.is_going_down = 1;
2150         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2151         if (mlx4_is_master(dev->dev)) {
2152                 for (i = 0; i < dev->num_ports; i++) {
2153                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2154                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2155                         kfree(dev->sriov.sqps[i]);
2156                         dev->sriov.sqps[i] = NULL;
2157                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2158                 }
2159
2160                 mlx4_ib_cm_paravirt_clean(dev, -1);
2161                 mlx4_ib_destroy_alias_guid_service(dev);
2162                 mlx4_ib_device_unregister_sysfs(dev);
2163         }
2164 }