drivers/i2c/busses/i2c-mpc.c

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
   4
   5  * This is a combined i2c adapter and algorithm driver for the
   6  * MPC107/Tsi107 PowerPC northbridge and processors that include
   7  * the same I2C unit (8240, 8245, 85xx).
   8  *
   9  * Release 0.8
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2. This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/init.h>
  21 #include <linux/pci.h>
  22 #include <asm/io.h>
  23 #ifdef CONFIG_FSL_OCP
  24 #include <asm/ocp.h>
  25 #define FSL_I2C_DEV_SEPARATE_DFSRR FS_I2C_SEPARATE_DFSRR
  26 #define FSL_I2C_DEV_CLOCK_5200 FS_I2C_CLOCK_5200
  27 #else
  28 #include <linux/fsl_devices.h>
  29 #endif
  30 #include <linux/i2c.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/delay.h>
  33
  34 #define MPC_I2C_ADDR  0x00
  35 #define MPC_I2C_FDR     0x04
  36 #define MPC_I2C_CR      0x08
  37 #define MPC_I2C_SR      0x0c
  38 #define MPC_I2C_DR      0x10
  39 #define MPC_I2C_DFSRR 0x14
  40 #define MPC_I2C_REGION 0x20
  41
  42 #define CCR_MEN  0x80
  43 #define CCR_MIEN 0x40
  44 #define CCR_MSTA 0x20
  45 #define CCR_MTX  0x10
  46 #define CCR_TXAK 0x08
  47 #define CCR_RSTA 0x04
  48
  49 #define CSR_MCF  0x80
  50 #define CSR_MAAS 0x40
  51 #define CSR_MBB  0x20
  52 #define CSR_MAL  0x10
  53 #define CSR_SRW  0x04
  54 #define CSR_MIF  0x02
  55 #define CSR_RXAK 0x01
  56
  57 struct mpc_i2c {
  58         void __iomem *base;
  59         u32 interrupt;
  60         wait_queue_head_t queue;
  61         struct i2c_adapter adap;
  62         int irq;
  63         u32 flags;
  64 };
  65
  66 static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
  67 {
  68         writeb(x, i2c->base + MPC_I2C_CR);
  69 }
  70
  71 static irqreturn_t mpc_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
  72 {
  73         struct mpc_i2c *i2c = dev_id;
  74         if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
  75                 /* Read again to allow register to stabilise */
  76                 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
  77                 writeb(0, i2c->base + MPC_I2C_SR);
  78                 wake_up_interruptible(&i2c->queue);
  79         }
  80         return IRQ_HANDLED;
  81 }
  82
  83 static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
  84 {
  85         unsigned long orig_jiffies = jiffies;
  86         u32 x;
  87         int result = 0;
  88
  89         if (i2c->irq == 0)
  90         {
  91                 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
  92                         schedule();
  93                         if (time_after(jiffies, orig_jiffies + timeout)) {
  94                                 pr_debug("I2C: timeout\n");
  95                                 result = -EIO;
  96                                 break;
  97                         }
  98                 }
  99                 x = readb(i2c->base + MPC_I2C_SR);
 100                 writeb(0, i2c->base + MPC_I2C_SR);
 101         } else {
 102                 /* Interrupt mode */
 103                 result = wait_event_interruptible_timeout(i2c->queue,
 104                         (i2c->interrupt & CSR_MIF), timeout * HZ);
 105
 106                 if (unlikely(result < 0))
 107                         pr_debug("I2C: wait interrupted\n");
 108                 else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
 109                         pr_debug("I2C: wait timeout\n");
 110                         result = -ETIMEDOUT;
 111                 }
 112
 113                 x = i2c->interrupt;
 114                 i2c->interrupt = 0;
 115         }
 116
 117         if (result < 0)
 118                 return result;
 119
 120         if (!(x & CSR_MCF)) {
 121                 pr_debug("I2C: unfinished\n");
 122                 return -EIO;
 123         }
 124
 125         if (x & CSR_MAL) {
 126                 pr_debug("I2C: MAL\n");
 127                 return -EIO;
 128         }
 129
 130         if (writing && (x & CSR_RXAK)) {
 131                 pr_debug("I2C: No RXAK\n");
 132                 /* generate stop */
 133                 writeccr(i2c, CCR_MEN);
 134                 return -EIO;
 135         }
 136         return 0;
 137 }
 138
 139 static void mpc_i2c_setclock(struct mpc_i2c *i2c)
 140 {
 141         /* Set clock and filters */
 142         if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
 143                 writeb(0x31, i2c->base + MPC_I2C_FDR);
 144                 writeb(0x10, i2c->base + MPC_I2C_DFSRR);
 145         } else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
 146                 writeb(0x3f, i2c->base + MPC_I2C_FDR);
 147         else
 148                 writel(0x1031, i2c->base + MPC_I2C_FDR);
 149 }
 150
 151 static void mpc_i2c_start(struct mpc_i2c *i2c)
 152 {
 153         /* Clear arbitration */
 154         writeb(0, i2c->base + MPC_I2C_SR);
 155         /* Start with MEN */
 156         writeccr(i2c, CCR_MEN);
 157 }
 158
 159 static void mpc_i2c_stop(struct mpc_i2c *i2c)
 160 {
 161         writeccr(i2c, CCR_MEN);
 162 }
 163
 164 static int mpc_write(struct mpc_i2c *i2c, int target,
 165                      const u8 * data, int length, int restart)
 166 {
 167         int i;
 168         unsigned timeout = i2c->adap.timeout;
 169         u32 flags = restart ? CCR_RSTA : 0;
 170
 171         /* Start with MEN */
 172         if (!restart)
 173                 writeccr(i2c, CCR_MEN);
 174         /* Start as master */
 175         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
 176         /* Write target byte */
 177         writeb((target << 1), i2c->base + MPC_I2C_DR);
 178
 179         if (i2c_wait(i2c, timeout, 1) < 0)
 180                 return -1;
 181
 182         for (i = 0; i < length; i++) {
 183                 /* Write data byte */
 184                 writeb(data[i], i2c->base + MPC_I2C_DR);
 185
 186                 if (i2c_wait(i2c, timeout, 1) < 0)
 187                         return -1;
 188         }
 189
 190         return 0;
 191 }
 192
 193 static int mpc_read(struct mpc_i2c *i2c, int target,
 194                     u8 * data, int length, int restart)
 195 {
 196         unsigned timeout = i2c->adap.timeout;
 197         int i;
 198         u32 flags = restart ? CCR_RSTA : 0;
 199
 200         /* Start with MEN */
 201         if (!restart)
 202                 writeccr(i2c, CCR_MEN);
 203         /* Switch to read - restart */
 204         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
 205         /* Write target address byte - this time with the read flag set */
 206         writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
 207
 208         if (i2c_wait(i2c, timeout, 1) < 0)
 209                 return -1;
 210
 211         if (length) {
 212                 if (length == 1)
 213                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
 214                 else
 215                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
 216                 /* Dummy read */
 217                 readb(i2c->base + MPC_I2C_DR);
 218         }
 219
 220         for (i = 0; i < length; i++) {
 221                 if (i2c_wait(i2c, timeout, 0) < 0)
 222                         return -1;
 223
 224                 /* Generate txack on next to last byte */
 225                 if (i == length - 2)
 226                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
 227                 /* Generate stop on last byte */
 228                 if (i == length - 1)
 229                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
 230                 data[i] = readb(i2c->base + MPC_I2C_DR);
 231         }
 232
 233         return length;
 234 }
 235
 236 static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 237 {
 238         struct i2c_msg *pmsg;
 239         int i;
 240         int ret = 0;
 241         unsigned long orig_jiffies = jiffies;
 242         struct mpc_i2c *i2c = i2c_get_adapdata(adap);
 243
 244         mpc_i2c_start(i2c);
 245
 246         /* Allow bus up to 1s to become not busy */
 247         while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
 248                 if (signal_pending(current)) {
 249                         pr_debug("I2C: Interrupted\n");
 250                         return -EINTR;
 251                 }
 252                 if (time_after(jiffies, orig_jiffies + HZ)) {
 253                         pr_debug("I2C: timeout\n");
 254                         return -EIO;
 255                 }
 256                 schedule();
 257         }
 258
 259         for (i = 0; ret >= 0 && i < num; i++) {
 260                 pmsg = &msgs[i];
 261                 pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
 262                          pmsg->flags & I2C_M_RD ? "read" : "write",
 263                          pmsg->len, pmsg->addr, i + 1, num);
 264                 if (pmsg->flags & I2C_M_RD)
 265                         ret =
 266                             mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
 267                 else
 268                         ret =
 269                             mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
 270         }
 271         mpc_i2c_stop(i2c);
 272         return (ret < 0) ? ret : num;
 273 }
 274
 275 static u32 mpc_functionality(struct i2c_adapter *adap)
 276 {
 277         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 278 }
 279
 280 static struct i2c_algorithm mpc_algo = {
 281         .name = "MPC algorithm",
 282         .id = I2C_ALGO_MPC107,
 283         .master_xfer = mpc_xfer,
 284         .functionality = mpc_functionality,
 285 };
 286
 287 static struct i2c_adapter mpc_ops = {
 288         .owner = THIS_MODULE,
 289         .name = "MPC adapter",
 290         .id = I2C_ALGO_MPC107 | I2C_HW_MPC107,
 291         .algo = &mpc_algo,
 292         .class = I2C_CLASS_HWMON,
 293         .timeout = 1,
 294         .retries = 1
 295 };
 296
 297 #ifdef CONFIG_FSL_OCP
 298 static int __devinit mpc_i2c_probe(struct ocp_device *ocp)
 299 {
 300         int result = 0;
 301         struct mpc_i2c *i2c;
 302
 303         if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
 304                 return -ENOMEM;
 305         }
 306         memset(i2c, 0, sizeof(*i2c));
 307
 308         i2c->irq = ocp->def->irq;
 309         i2c->flags = ((struct ocp_fs_i2c_data *)ocp->def->additions)->flags;
 310         init_waitqueue_head(&i2c->queue);
 311
 312         if (!request_mem_region(ocp->def->paddr, MPC_I2C_REGION, "i2c-mpc")) {
 313                 printk(KERN_ERR "i2c-mpc - resource unavailable\n");
 314                 return -ENODEV;
 315         }
 316
 317         i2c->base = ioremap(ocp->def->paddr, MPC_I2C_REGION);
 318
 319         if (!i2c->base) {
 320                 printk(KERN_ERR "i2c-mpc - failed to map controller\n");
 321                 result = -ENOMEM;
 322                 goto fail_map;
 323         }
 324
 325         if (i2c->irq != OCP_IRQ_NA)
 326         {
 327                 if ((result = request_irq(ocp->def->irq, mpc_i2c_isr,
 328                                           SA_SHIRQ, "i2c-mpc", i2c)) < 0) {
 329                         printk(KERN_ERR
 330                                "i2c-mpc - failed to attach interrupt\n");
 331                         goto fail_irq;
 332                 }
 333         } else
 334                 i2c->irq = 0;
 335
 336         mpc_i2c_setclock(i2c);
 337         ocp_set_drvdata(ocp, i2c);
 338
 339         i2c->adap = mpc_ops;
 340         i2c_set_adapdata(&i2c->adap, i2c);
 341
 342         if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
 343                 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
 344                 goto fail_add;
 345         }
 346
 347         return result;
 348
 349       fail_add:
 350         if (ocp->def->irq != OCP_IRQ_NA)
 351                 free_irq(ocp->def->irq, 0);
 352       fail_irq:
 353         iounmap(i2c->base);
 354       fail_map:
 355         release_mem_region(ocp->def->paddr, MPC_I2C_REGION);
 356         kfree(i2c);
 357         return result;
 358 }
 359 static void __devexit mpc_i2c_remove(struct ocp_device *ocp)
 360 {
 361         struct mpc_i2c *i2c = ocp_get_drvdata(ocp);
 362         i2c_del_adapter(&i2c->adap);
 363         ocp_set_drvdata(ocp, NULL);
 364
 365         if (ocp->def->irq != OCP_IRQ_NA)
 366                 free_irq(i2c->irq, i2c);
 367         iounmap(i2c->base);
 368         release_mem_region(ocp->def->paddr, MPC_I2C_REGION);
 369         kfree(i2c);
 370 }
 371
 372 static struct ocp_device_id mpc_iic_ids[] __devinitdata = {
 373         {.vendor = OCP_VENDOR_FREESCALE,.function = OCP_FUNC_IIC},
 374         {.vendor = OCP_VENDOR_INVALID}
 375 };
 376
 377 MODULE_DEVICE_TABLE(ocp, mpc_iic_ids);
 378
 379 static struct ocp_driver mpc_iic_driver = {
 380         .name = "iic",
 381         .id_table = mpc_iic_ids,
 382         .probe = mpc_i2c_probe,
 383         .remove = __devexit_p(mpc_i2c_remove)
 384 };
 385
 386 static int __init iic_init(void)
 387 {
 388         return ocp_register_driver(&mpc_iic_driver);
 389 }
 390
 391 static void __exit iic_exit(void)
 392 {
 393         ocp_unregister_driver(&mpc_iic_driver);
 394 }
 395
 396 module_init(iic_init);
 397 module_exit(iic_exit);
 398 #else
 399 static int fsl_i2c_probe(struct device *device)
 400 {
 401         int result = 0;
 402         struct mpc_i2c *i2c;
 403         struct platform_device *pdev = to_platform_device(device);
 404         struct fsl_i2c_platform_data *pdata;
 405         struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 406
 407         pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
 408
 409         if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
 410                 return -ENOMEM;
 411         }
 412         memset(i2c, 0, sizeof(*i2c));
 413
 414         i2c->irq = platform_get_irq(pdev, 0);
 415         i2c->flags = pdata->device_flags;
 416         init_waitqueue_head(&i2c->queue);
 417
 418         i2c->base = ioremap((phys_addr_t)r->start, MPC_I2C_REGION);
 419
 420         if (!i2c->base) {
 421                 printk(KERN_ERR "i2c-mpc - failed to map controller\n");
 422                 result = -ENOMEM;
 423                 goto fail_map;
 424         }
 425
 426         if (i2c->irq != 0)
 427                 if ((result = request_irq(i2c->irq, mpc_i2c_isr,
 428                                           SA_SHIRQ, "i2c-mpc", i2c)) < 0) {
 429                         printk(KERN_ERR
 430                                "i2c-mpc - failed to attach interrupt\n");
 431                         goto fail_irq;
 432                 }
 433
 434         mpc_i2c_setclock(i2c);
 435         dev_set_drvdata(device, i2c);
 436
 437         i2c->adap = mpc_ops;
 438         i2c_set_adapdata(&i2c->adap, i2c);
 439         i2c->adap.dev.parent = &pdev->dev;
 440         if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
 441                 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
 442                 goto fail_add;
 443         }
 444
 445         return result;
 446
 447       fail_add:
 448         if (i2c->irq != 0)
 449                 free_irq(i2c->irq, NULL);
 450       fail_irq:
 451         iounmap(i2c->base);
 452       fail_map:
 453         kfree(i2c);
 454         return result;
 455 };
 456
 457 static int fsl_i2c_remove(struct device *device)
 458 {
 459         struct mpc_i2c *i2c = dev_get_drvdata(device);
 460
 461         i2c_del_adapter(&i2c->adap);
 462         dev_set_drvdata(device, NULL);
 463
 464         if (i2c->irq != 0)
 465                 free_irq(i2c->irq, i2c);
 466
 467         iounmap(i2c->base);
 468         kfree(i2c);
 469         return 0;
 470 };
 471
 472 /* Structure for a device driver */
 473 static struct device_driver fsl_i2c_driver = {
 474         .name = "fsl-i2c",
 475         .bus = &platform_bus_type,
 476         .probe = fsl_i2c_probe,
 477         .remove = fsl_i2c_remove,
 478 };
 479
 480 static int __init fsl_i2c_init(void)
 481 {
 482         return driver_register(&fsl_i2c_driver);
 483 }
 484
 485 static void __exit fsl_i2c_exit(void)
 486 {
 487         driver_unregister(&fsl_i2c_driver);
 488 }
 489
 490 module_init(fsl_i2c_init);
 491 module_exit(fsl_i2c_exit);
 492
 493 #endif /* CONFIG_FSL_OCP */
 494
 495 MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
 496 MODULE_DESCRIPTION
 497     ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
 498 MODULE_LICENSE("GPL");