drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25     Supports following chips:
  26
  27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  28     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  29     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  30     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  31     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  32
  33     For other winbond chips, and for i2c support in the above chips,
  34     use w83781d.c.
  35
  36     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  37     supported yet.
  38 */
  39
  40 #include <linux/module.h>
  41 #include <linux/init.h>
  42 #include <linux/slab.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/i2c.h>
  45 #include <linux/i2c-isa.h>
  46 #include <linux/hwmon.h>
  47 #include <linux/hwmon-vid.h>
  48 #include <linux/err.h>
  49 #include <asm/io.h>
  50 #include "lm75.h"
  51
  52 static u16 force_addr;
  53 module_param(force_addr, ushort, 0);
  54 MODULE_PARM_DESC(force_addr,
  55                  "Initialize the base address of the sensors");
  56 static u8 force_i2c = 0x1f;
  57 module_param(force_i2c, byte, 0);
  58 MODULE_PARM_DESC(force_i2c,
  59                  "Initialize the i2c address of the sensors");
  60
  61 /* The actual ISA address is read from Super-I/O configuration space */
  62 static unsigned short address;
  63
  64 /* Insmod parameters */
  65 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  66
  67 static int reset;
  68 module_param(reset, bool, 0);
  69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  70
  71 static int init = 1;
  72 module_param(init, bool, 0);
  73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  74
  75 /* modified from kernel/include/traps.c */
  76 static int REG;         /* The register to read/write */
  77 #define DEV     0x07    /* Register: Logical device select */
  78 static int VAL;         /* The value to read/write */
  79
  80 /* logical device numbers for superio_select (below) */
  81 #define W83627HF_LD_FDC         0x00
  82 #define W83627HF_LD_PRT         0x01
  83 #define W83627HF_LD_UART1       0x02
  84 #define W83627HF_LD_UART2       0x03
  85 #define W83627HF_LD_KBC         0x05
  86 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  87 #define W83627HF_LD_GAME        0x07
  88 #define W83627HF_LD_MIDI        0x07
  89 #define W83627HF_LD_GPIO1       0x07
  90 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  91 #define W83627HF_LD_GPIO2       0x08
  92 #define W83627HF_LD_GPIO3       0x09
  93 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  94 #define W83627HF_LD_ACPI        0x0a
  95 #define W83627HF_LD_HWM         0x0b
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98
  99 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
 100 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
 101 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
 102
 103 static inline void
 104 superio_outb(int reg, int val)
 105 {
 106         outb(reg, REG);
 107         outb(val, VAL);
 108 }
 109
 110 static inline int
 111 superio_inb(int reg)
 112 {
 113         outb(reg, REG);
 114         return inb(VAL);
 115 }
 116
 117 static inline void
 118 superio_select(int ld)
 119 {
 120         outb(DEV, REG);
 121         outb(ld, VAL);
 122 }
 123
 124 static inline void
 125 superio_enter(void)
 126 {
 127         outb(0x87, REG);
 128         outb(0x87, REG);
 129 }
 130
 131 static inline void
 132 superio_exit(void)
 133 {
 134         outb(0xAA, REG);
 135 }
 136
 137 #define W627_DEVID 0x52
 138 #define W627THF_DEVID 0x82
 139 #define W697_DEVID 0x60
 140 #define W637_DEVID 0x70
 141 #define WINB_ACT_REG 0x30
 142 #define WINB_BASE_REG 0x60
 143 /* Constants specified below */
 144
 145 /* Length of ISA address segment */
 146 #define WINB_EXTENT 8
 147
 148 /* Where are the ISA address/data registers relative to the base address */
 149 #define W83781D_ADDR_REG_OFFSET 5
 150 #define W83781D_DATA_REG_OFFSET 6
 151
 152 /* The W83781D registers */
 153 /* The W83782D registers for nr=7,8 are in bank 5 */
 154 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 155                                            (0x554 + (((nr) - 7) * 2)))
 156 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 157                                            (0x555 + (((nr) - 7) * 2)))
 158 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 159                                            (0x550 + (nr) - 7))
 160
 161 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
 162 #define W83781D_REG_FAN(nr) (0x27 + (nr))
 163
 164 #define W83781D_REG_TEMP2_CONFIG 0x152
 165 #define W83781D_REG_TEMP3_CONFIG 0x252
 166 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
 167                                         ((nr == 2) ? (0x0150) : \
 168                                                      (0x27)))
 169 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
 170                                         ((nr == 2) ? (0x153) : \
 171                                                      (0x3A)))
 172 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
 173                                         ((nr == 2) ? (0x155) : \
 174                                                      (0x39)))
 175
 176 #define W83781D_REG_BANK 0x4E
 177
 178 #define W83781D_REG_CONFIG 0x40
 179 #define W83781D_REG_ALARM1 0x41
 180 #define W83781D_REG_ALARM2 0x42
 181 #define W83781D_REG_ALARM3 0x450
 182
 183 #define W83781D_REG_IRQ 0x4C
 184 #define W83781D_REG_BEEP_CONFIG 0x4D
 185 #define W83781D_REG_BEEP_INTS1 0x56
 186 #define W83781D_REG_BEEP_INTS2 0x57
 187 #define W83781D_REG_BEEP_INTS3 0x453
 188
 189 #define W83781D_REG_VID_FANDIV 0x47
 190
 191 #define W83781D_REG_CHIPID 0x49
 192 #define W83781D_REG_WCHIPID 0x58
 193 #define W83781D_REG_CHIPMAN 0x4F
 194 #define W83781D_REG_PIN 0x4B
 195
 196 #define W83781D_REG_VBAT 0x5D
 197
 198 #define W83627HF_REG_PWM1 0x5A
 199 #define W83627HF_REG_PWM2 0x5B
 200 #define W83627HF_REG_PWMCLK12 0x5C
 201
 202 #define W83627THF_REG_PWM1              0x01    /* 697HF and 637HF too */
 203 #define W83627THF_REG_PWM2              0x03    /* 697HF and 637HF too */
 204 #define W83627THF_REG_PWM3              0x11    /* 637HF too */
 205
 206 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF too */
 207
 208 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 209 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 210                              W83627THF_REG_PWM3 };
 211 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 212                                      regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
 213
 214 #define W83781D_REG_I2C_ADDR 0x48
 215 #define W83781D_REG_I2C_SUBADDR 0x4A
 216
 217 /* Sensor selection */
 218 #define W83781D_REG_SCFG1 0x5D
 219 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 220 #define W83781D_REG_SCFG2 0x59
 221 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 222 #define W83781D_DEFAULT_BETA 3435
 223
 224 /* Conversions. Limit checking is only done on the TO_REG
 225    variants. Note that you should be a bit careful with which arguments
 226    these macros are called: arguments may be evaluated more than once.
 227    Fixing this is just not worth it. */
 228 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 229 #define IN_FROM_REG(val) ((val) * 16)
 230
 231 static inline u8 FAN_TO_REG(long rpm, int div)
 232 {
 233         if (rpm == 0)
 234                 return 255;
 235         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 236         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 237                              254);
 238 }
 239
 240 #define TEMP_MIN (-128000)
 241 #define TEMP_MAX ( 127000)
 242
 243 /* TEMP: 0.001C/bit (-128C to +127C)
 244    REG: 1C/bit, two's complement */
 245 static u8 TEMP_TO_REG(int temp)
 246 {
 247         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 248         ntemp += (ntemp<0 ? -500 : 500);
 249         return (u8)(ntemp / 1000);
 250 }
 251
 252 static int TEMP_FROM_REG(u8 reg)
 253 {
 254         return (s8)reg * 1000;
 255 }
 256
 257 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 258
 259 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 260
 261 #define BEEP_MASK_FROM_REG(val)          (val)
 262 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 263 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 264 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 265
 266 #define DIV_FROM_REG(val) (1 << (val))
 267
 268 static inline u8 DIV_TO_REG(long val)
 269 {
 270         int i;
 271         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 272         for (i = 0; i < 7; i++) {
 273                 if (val == 0)
 274                         break;
 275                 val >>= 1;
 276         }
 277         return ((u8) i);
 278 }
 279
 280 /* For each registered chip, we need to keep some data in memory. That
 281    data is pointed to by w83627hf_list[NR]->data. The structure itself is
 282    dynamically allocated, at the same time when a new client is allocated. */
 283 struct w83627hf_data {
 284         struct i2c_client client;
 285         struct class_device *class_dev;
 286         struct semaphore lock;
 287         enum chips type;
 288
 289         struct semaphore update_lock;
 290         char valid;             /* !=0 if following fields are valid */
 291         unsigned long last_updated;     /* In jiffies */
 292
 293         struct i2c_client *lm75;        /* for secondary I2C addresses */
 294         /* pointer to array of 2 subclients */
 295
 296         u8 in[9];               /* Register value */
 297         u8 in_max[9];           /* Register value */
 298         u8 in_min[9];           /* Register value */
 299         u8 fan[3];              /* Register value */
 300         u8 fan_min[3];          /* Register value */
 301         u8 temp;
 302         u8 temp_max;            /* Register value */
 303         u8 temp_max_hyst;       /* Register value */
 304         u16 temp_add[2];        /* Register value */
 305         u16 temp_max_add[2];    /* Register value */
 306         u16 temp_max_hyst_add[2]; /* Register value */
 307         u8 fan_div[3];          /* Register encoding, shifted right */
 308         u8 vid;                 /* Register encoding, combined */
 309         u32 alarms;             /* Register encoding, combined */
 310         u32 beep_mask;          /* Register encoding, combined */
 311         u8 beep_enable;         /* Boolean */
 312         u8 pwm[3];              /* Register value */
 313         u16 sens[3];            /* 782D/783S only.
 314                                    1 = pentium diode; 2 = 3904 diode;
 315                                    3000-5000 = thermistor beta.
 316                                    Default = 3435.
 317                                    Other Betas unimplemented */
 318         u8 vrm;
 319         u8 vrm_ovt;             /* Register value, 627thf & 637hf only */
 320 };
 321
 322
 323 static int w83627hf_detect(struct i2c_adapter *adapter);
 324 static int w83627hf_detach_client(struct i2c_client *client);
 325
 326 static int w83627hf_read_value(struct i2c_client *client, u16 register);
 327 static int w83627hf_write_value(struct i2c_client *client, u16 register,
 328                                u16 value);
 329 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 330 static void w83627hf_init_client(struct i2c_client *client);
 331
 332 static struct i2c_driver w83627hf_driver = {
 333         .owner          = THIS_MODULE,
 334         .name           = "w83627hf",
 335         .attach_adapter = w83627hf_detect,
 336         .detach_client  = w83627hf_detach_client,
 337 };
 338
 339 /* following are the sysfs callback functions */
 340 #define show_in_reg(reg) \
 341 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 342 { \
 343         struct w83627hf_data *data = w83627hf_update_device(dev); \
 344         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
 345 }
 346 show_in_reg(in)
 347 show_in_reg(in_min)
 348 show_in_reg(in_max)
 349
 350 #define store_in_reg(REG, reg) \
 351 static ssize_t \
 352 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 353 { \
 354         struct i2c_client *client = to_i2c_client(dev); \
 355         struct w83627hf_data *data = i2c_get_clientdata(client); \
 356         u32 val; \
 357          \
 358         val = simple_strtoul(buf, NULL, 10); \
 359          \
 360         down(&data->update_lock); \
 361         data->in_##reg[nr] = IN_TO_REG(val); \
 362         w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
 363                             data->in_##reg[nr]); \
 364          \
 365         up(&data->update_lock); \
 366         return count; \
 367 }
 368 store_in_reg(MIN, min)
 369 store_in_reg(MAX, max)
 370
 371 #define sysfs_in_offset(offset) \
 372 static ssize_t \
 373 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 374 { \
 375         return show_in(dev, buf, offset); \
 376 } \
 377 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 378
 379 #define sysfs_in_reg_offset(reg, offset) \
 380 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 381 { \
 382         return show_in_##reg (dev, buf, offset); \
 383 } \
 384 static ssize_t \
 385 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
 386                             const char *buf, size_t count) \
 387 { \
 388         return store_in_##reg (dev, buf, count, offset); \
 389 } \
 390 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
 391                   show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 392
 393 #define sysfs_in_offsets(offset) \
 394 sysfs_in_offset(offset) \
 395 sysfs_in_reg_offset(min, offset) \
 396 sysfs_in_reg_offset(max, offset)
 397
 398 sysfs_in_offsets(1);
 399 sysfs_in_offsets(2);
 400 sysfs_in_offsets(3);
 401 sysfs_in_offsets(4);
 402 sysfs_in_offsets(5);
 403 sysfs_in_offsets(6);
 404 sysfs_in_offsets(7);
 405 sysfs_in_offsets(8);
 406
 407 /* use a different set of functions for in0 */
 408 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 409 {
 410         long in0;
 411
 412         if ((data->vrm_ovt & 0x01) &&
 413                 (w83627thf == data->type || w83637hf == data->type))
 414
 415                 /* use VRM9 calculation */
 416                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 417         else
 418                 /* use VRM8 (standard) calculation */
 419                 in0 = (long)IN_FROM_REG(reg);
 420
 421         return sprintf(buf,"%ld\n", in0);
 422 }
 423
 424 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 425 {
 426         struct w83627hf_data *data = w83627hf_update_device(dev);
 427         return show_in_0(data, buf, data->in[0]);
 428 }
 429
 430 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 431 {
 432         struct w83627hf_data *data = w83627hf_update_device(dev);
 433         return show_in_0(data, buf, data->in_min[0]);
 434 }
 435
 436 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 437 {
 438         struct w83627hf_data *data = w83627hf_update_device(dev);
 439         return show_in_0(data, buf, data->in_max[0]);
 440 }
 441
 442 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 443         const char *buf, size_t count)
 444 {
 445         struct i2c_client *client = to_i2c_client(dev);
 446         struct w83627hf_data *data = i2c_get_clientdata(client);
 447         u32 val;
 448
 449         val = simple_strtoul(buf, NULL, 10);
 450
 451         down(&data->update_lock);
 452
 453         if ((data->vrm_ovt & 0x01) &&
 454                 (w83627thf == data->type || w83637hf == data->type))
 455
 456                 /* use VRM9 calculation */
 457                 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 458         else
 459                 /* use VRM8 (standard) calculation */
 460                 data->in_min[0] = IN_TO_REG(val);
 461
 462         w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
 463         up(&data->update_lock);
 464         return count;
 465 }
 466
 467 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 468         const char *buf, size_t count)
 469 {
 470         struct i2c_client *client = to_i2c_client(dev);
 471         struct w83627hf_data *data = i2c_get_clientdata(client);
 472         u32 val;
 473
 474         val = simple_strtoul(buf, NULL, 10);
 475
 476         down(&data->update_lock);
 477
 478         if ((data->vrm_ovt & 0x01) &&
 479                 (w83627thf == data->type || w83637hf == data->type))
 480
 481                 /* use VRM9 calculation */
 482                 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 483         else
 484                 /* use VRM8 (standard) calculation */
 485                 data->in_max[0] = IN_TO_REG(val);
 486
 487         w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
 488         up(&data->update_lock);
 489         return count;
 490 }
 491
 492 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 493 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 494         show_regs_in_min0, store_regs_in_min0);
 495 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 496         show_regs_in_max0, store_regs_in_max0);
 497
 498 #define device_create_file_in(client, offset) \
 499 do { \
 500 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 501 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 502 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 503 } while (0)
 504
 505 #define show_fan_reg(reg) \
 506 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 507 { \
 508         struct w83627hf_data *data = w83627hf_update_device(dev); \
 509         return sprintf(buf,"%ld\n", \
 510                 FAN_FROM_REG(data->reg[nr-1], \
 511                             (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 512 }
 513 show_fan_reg(fan);
 514 show_fan_reg(fan_min);
 515
 516 static ssize_t
 517 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 518 {
 519         struct i2c_client *client = to_i2c_client(dev);
 520         struct w83627hf_data *data = i2c_get_clientdata(client);
 521         u32 val;
 522
 523         val = simple_strtoul(buf, NULL, 10);
 524
 525         down(&data->update_lock);
 526         data->fan_min[nr - 1] =
 527             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 528         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
 529                             data->fan_min[nr - 1]);
 530
 531         up(&data->update_lock);
 532         return count;
 533 }
 534
 535 #define sysfs_fan_offset(offset) \
 536 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 537 { \
 538         return show_fan(dev, buf, offset); \
 539 } \
 540 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 541
 542 #define sysfs_fan_min_offset(offset) \
 543 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 544 { \
 545         return show_fan_min(dev, buf, offset); \
 546 } \
 547 static ssize_t \
 548 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 549 { \
 550         return store_fan_min(dev, buf, count, offset); \
 551 } \
 552 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
 553                   show_regs_fan_min##offset, store_regs_fan_min##offset);
 554
 555 sysfs_fan_offset(1);
 556 sysfs_fan_min_offset(1);
 557 sysfs_fan_offset(2);
 558 sysfs_fan_min_offset(2);
 559 sysfs_fan_offset(3);
 560 sysfs_fan_min_offset(3);
 561
 562 #define device_create_file_fan(client, offset) \
 563 do { \
 564 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 565 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 566 } while (0)
 567
 568 #define show_temp_reg(reg) \
 569 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 570 { \
 571         struct w83627hf_data *data = w83627hf_update_device(dev); \
 572         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 573                 return sprintf(buf,"%ld\n", \
 574                         (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 575         } else {        /* TEMP1 */ \
 576                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 577         } \
 578 }
 579 show_temp_reg(temp);
 580 show_temp_reg(temp_max);
 581 show_temp_reg(temp_max_hyst);
 582
 583 #define store_temp_reg(REG, reg) \
 584 static ssize_t \
 585 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 586 { \
 587         struct i2c_client *client = to_i2c_client(dev); \
 588         struct w83627hf_data *data = i2c_get_clientdata(client); \
 589         u32 val; \
 590          \
 591         val = simple_strtoul(buf, NULL, 10); \
 592          \
 593         down(&data->update_lock); \
 594          \
 595         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 596                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 597                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 598                                 data->temp_##reg##_add[nr-2]); \
 599         } else {        /* TEMP1 */ \
 600                 data->temp_##reg = TEMP_TO_REG(val); \
 601                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 602                         data->temp_##reg); \
 603         } \
 604          \
 605         up(&data->update_lock); \
 606         return count; \
 607 }
 608 store_temp_reg(OVER, max);
 609 store_temp_reg(HYST, max_hyst);
 610
 611 #define sysfs_temp_offset(offset) \
 612 static ssize_t \
 613 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 614 { \
 615         return show_temp(dev, buf, offset); \
 616 } \
 617 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 618
 619 #define sysfs_temp_reg_offset(reg, offset) \
 620 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 621 { \
 622         return show_temp_##reg (dev, buf, offset); \
 623 } \
 624 static ssize_t \
 625 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
 626                               const char *buf, size_t count) \
 627 { \
 628         return store_temp_##reg (dev, buf, count, offset); \
 629 } \
 630 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
 631                   show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 632
 633 #define sysfs_temp_offsets(offset) \
 634 sysfs_temp_offset(offset) \
 635 sysfs_temp_reg_offset(max, offset) \
 636 sysfs_temp_reg_offset(max_hyst, offset)
 637
 638 sysfs_temp_offsets(1);
 639 sysfs_temp_offsets(2);
 640 sysfs_temp_offsets(3);
 641
 642 #define device_create_file_temp(client, offset) \
 643 do { \
 644 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 645 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 646 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 647 } while (0)
 648
 649 static ssize_t
 650 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 651 {
 652         struct w83627hf_data *data = w83627hf_update_device(dev);
 653         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 654 }
 655 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 656 #define device_create_file_vid(client) \
 657 device_create_file(&client->dev, &dev_attr_cpu0_vid)
 658
 659 static ssize_t
 660 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 661 {
 662         struct w83627hf_data *data = w83627hf_update_device(dev);
 663         return sprintf(buf, "%ld\n", (long) data->vrm);
 664 }
 665 static ssize_t
 666 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 667 {
 668         struct i2c_client *client = to_i2c_client(dev);
 669         struct w83627hf_data *data = i2c_get_clientdata(client);
 670         u32 val;
 671
 672         val = simple_strtoul(buf, NULL, 10);
 673         data->vrm = val;
 674
 675         return count;
 676 }
 677 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 678 #define device_create_file_vrm(client) \
 679 device_create_file(&client->dev, &dev_attr_vrm)
 680
 681 static ssize_t
 682 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 683 {
 684         struct w83627hf_data *data = w83627hf_update_device(dev);
 685         return sprintf(buf, "%ld\n", (long) data->alarms);
 686 }
 687 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 688 #define device_create_file_alarms(client) \
 689 device_create_file(&client->dev, &dev_attr_alarms)
 690
 691 #define show_beep_reg(REG, reg) \
 692 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 693 { \
 694         struct w83627hf_data *data = w83627hf_update_device(dev); \
 695         return sprintf(buf,"%ld\n", \
 696                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 697 }
 698 show_beep_reg(ENABLE, enable)
 699 show_beep_reg(MASK, mask)
 700
 701 #define BEEP_ENABLE                     0       /* Store beep_enable */
 702 #define BEEP_MASK                       1       /* Store beep_mask */
 703
 704 static ssize_t
 705 store_beep_reg(struct device *dev, const char *buf, size_t count,
 706                int update_mask)
 707 {
 708         struct i2c_client *client = to_i2c_client(dev);
 709         struct w83627hf_data *data = i2c_get_clientdata(client);
 710         u32 val, val2;
 711
 712         val = simple_strtoul(buf, NULL, 10);
 713
 714         down(&data->update_lock);
 715
 716         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 717                 data->beep_mask = BEEP_MASK_TO_REG(val);
 718                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
 719                                     data->beep_mask & 0xff);
 720                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
 721                                     ((data->beep_mask) >> 16) & 0xff);
 722                 val2 = (data->beep_mask >> 8) & 0x7f;
 723         } else {                /* We are storing beep_enable */
 724                 val2 =
 725                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 726                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 727         }
 728
 729         w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
 730                             val2 | data->beep_enable << 7);
 731
 732         up(&data->update_lock);
 733         return count;
 734 }
 735
 736 #define sysfs_beep(REG, reg) \
 737 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 738 { \
 739         return show_beep_##reg(dev, attr, buf); \
 740 } \
 741 static ssize_t \
 742 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 743 { \
 744         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 745 } \
 746 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 747                   show_regs_beep_##reg, store_regs_beep_##reg);
 748
 749 sysfs_beep(ENABLE, enable);
 750 sysfs_beep(MASK, mask);
 751
 752 #define device_create_file_beep(client) \
 753 do { \
 754 device_create_file(&client->dev, &dev_attr_beep_enable); \
 755 device_create_file(&client->dev, &dev_attr_beep_mask); \
 756 } while (0)
 757
 758 static ssize_t
 759 show_fan_div_reg(struct device *dev, char *buf, int nr)
 760 {
 761         struct w83627hf_data *data = w83627hf_update_device(dev);
 762         return sprintf(buf, "%ld\n",
 763                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 764 }
 765
 766 /* Note: we save and restore the fan minimum here, because its value is
 767    determined in part by the fan divisor.  This follows the principle of
 768    least suprise; the user doesn't expect the fan minimum to change just
 769    because the divisor changed. */
 770 static ssize_t
 771 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 772 {
 773         struct i2c_client *client = to_i2c_client(dev);
 774         struct w83627hf_data *data = i2c_get_clientdata(client);
 775         unsigned long min;
 776         u8 reg;
 777         unsigned long val = simple_strtoul(buf, NULL, 10);
 778
 779         down(&data->update_lock);
 780
 781         /* Save fan_min */
 782         min = FAN_FROM_REG(data->fan_min[nr],
 783                            DIV_FROM_REG(data->fan_div[nr]));
 784
 785         data->fan_div[nr] = DIV_TO_REG(val);
 786
 787         reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 788                & (nr==0 ? 0xcf : 0x3f))
 789             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 790         w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 791
 792         reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
 793                & ~(1 << (5 + nr)))
 794             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 795         w83627hf_write_value(client, W83781D_REG_VBAT, reg);
 796
 797         /* Restore fan_min */
 798         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 799         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 800
 801         up(&data->update_lock);
 802         return count;
 803 }
 804
 805 #define sysfs_fan_div(offset) \
 806 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 807 { \
 808         return show_fan_div_reg(dev, buf, offset); \
 809 } \
 810 static ssize_t \
 811 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
 812                             const char *buf, size_t count) \
 813 { \
 814         return store_fan_div_reg(dev, buf, count, offset - 1); \
 815 } \
 816 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
 817                   show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 818
 819 sysfs_fan_div(1);
 820 sysfs_fan_div(2);
 821 sysfs_fan_div(3);
 822
 823 #define device_create_file_fan_div(client, offset) \
 824 do { \
 825 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 826 } while (0)
 827
 828 static ssize_t
 829 show_pwm_reg(struct device *dev, char *buf, int nr)
 830 {
 831         struct w83627hf_data *data = w83627hf_update_device(dev);
 832         return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
 833 }
 834
 835 static ssize_t
 836 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 837 {
 838         struct i2c_client *client = to_i2c_client(dev);
 839         struct w83627hf_data *data = i2c_get_clientdata(client);
 840         u32 val;
 841
 842         val = simple_strtoul(buf, NULL, 10);
 843
 844         down(&data->update_lock);
 845
 846         if (data->type == w83627thf) {
 847                 /* bits 0-3 are reserved  in 627THF */
 848                 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
 849                 w83627hf_write_value(client,
 850                                      W836X7HF_REG_PWM(data->type, nr),
 851                                      data->pwm[nr - 1] |
 852                                      (w83627hf_read_value(client,
 853                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 854         } else {
 855                 data->pwm[nr - 1] = PWM_TO_REG(val);
 856                 w83627hf_write_value(client,
 857                                      W836X7HF_REG_PWM(data->type, nr),
 858                                      data->pwm[nr - 1]);
 859         }
 860
 861         up(&data->update_lock);
 862         return count;
 863 }
 864
 865 #define sysfs_pwm(offset) \
 866 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 867 { \
 868         return show_pwm_reg(dev, buf, offset); \
 869 } \
 870 static ssize_t \
 871 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 872 { \
 873         return store_pwm_reg(dev, buf, count, offset); \
 874 } \
 875 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 876                   show_regs_pwm_##offset, store_regs_pwm_##offset);
 877
 878 sysfs_pwm(1);
 879 sysfs_pwm(2);
 880 sysfs_pwm(3);
 881
 882 #define device_create_file_pwm(client, offset) \
 883 do { \
 884 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 885 } while (0)
 886
 887 static ssize_t
 888 show_sensor_reg(struct device *dev, char *buf, int nr)
 889 {
 890         struct w83627hf_data *data = w83627hf_update_device(dev);
 891         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 892 }
 893
 894 static ssize_t
 895 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 896 {
 897         struct i2c_client *client = to_i2c_client(dev);
 898         struct w83627hf_data *data = i2c_get_clientdata(client);
 899         u32 val, tmp;
 900
 901         val = simple_strtoul(buf, NULL, 10);
 902
 903         down(&data->update_lock);
 904
 905         switch (val) {
 906         case 1:         /* PII/Celeron diode */
 907                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 908                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 909                                     tmp | BIT_SCFG1[nr - 1]);
 910                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 911                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 912                                     tmp | BIT_SCFG2[nr - 1]);
 913                 data->sens[nr - 1] = val;
 914                 break;
 915         case 2:         /* 3904 */
 916                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 917                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 918                                     tmp | BIT_SCFG1[nr - 1]);
 919                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 920                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 921                                     tmp & ~BIT_SCFG2[nr - 1]);
 922                 data->sens[nr - 1] = val;
 923                 break;
 924         case W83781D_DEFAULT_BETA:      /* thermistor */
 925                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 926                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 927                                     tmp & ~BIT_SCFG1[nr - 1]);
 928                 data->sens[nr - 1] = val;
 929                 break;
 930         default:
 931                 dev_err(&client->dev,
 932                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 933                        (long) val, W83781D_DEFAULT_BETA);
 934                 break;
 935         }
 936
 937         up(&data->update_lock);
 938         return count;
 939 }
 940
 941 #define sysfs_sensor(offset) \
 942 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 943 { \
 944     return show_sensor_reg(dev, buf, offset); \
 945 } \
 946 static ssize_t \
 947 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 948 { \
 949     return store_sensor_reg(dev, buf, count, offset); \
 950 } \
 951 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 952                   show_regs_sensor_##offset, store_regs_sensor_##offset);
 953
 954 sysfs_sensor(1);
 955 sysfs_sensor(2);
 956 sysfs_sensor(3);
 957
 958 #define device_create_file_sensor(client, offset) \
 959 do { \
 960 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 961 } while (0)
 962
 963
 964 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
 965 {
 966         u16 val;
 967
 968         REG = sioaddr;
 969         VAL = sioaddr + 1;
 970
 971         superio_enter();
 972         val= superio_inb(DEVID);
 973         if(val != W627_DEVID &&
 974            val != W627THF_DEVID &&
 975            val != W697_DEVID &&
 976            val != W637_DEVID) {
 977                 superio_exit();
 978                 return -ENODEV;
 979         }
 980
 981         superio_select(W83627HF_LD_HWM);
 982         val = (superio_inb(WINB_BASE_REG) << 8) |
 983                superio_inb(WINB_BASE_REG + 1);
 984         *addr = val & ~(WINB_EXTENT - 1);
 985         if (*addr == 0 && force_addr == 0) {
 986                 superio_exit();
 987                 return -ENODEV;
 988         }
 989
 990         superio_exit();
 991         return 0;
 992 }
 993
 994 static int w83627hf_detect(struct i2c_adapter *adapter)
 995 {
 996         int val, kind;
 997         struct i2c_client *new_client;
 998         struct w83627hf_data *data;
 999         int err = 0;
1000         const char *client_name = "";
1001
1002         if(force_addr)
1003                 address = force_addr & ~(WINB_EXTENT - 1);
1004
1005         if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
1006                 err = -EBUSY;
1007                 goto ERROR0;
1008         }
1009
1010         if(force_addr) {
1011                 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1012                 superio_enter();
1013                 superio_select(W83627HF_LD_HWM);
1014                 superio_outb(WINB_BASE_REG, address >> 8);
1015                 superio_outb(WINB_BASE_REG+1, address & 0xff);
1016                 superio_exit();
1017         }
1018
1019         superio_enter();
1020         val= superio_inb(DEVID);
1021         if(val == W627_DEVID)
1022                 kind = w83627hf;
1023         else if(val == W697_DEVID)
1024                 kind = w83697hf;
1025         else if(val == W627THF_DEVID)
1026                 kind = w83627thf;
1027         else if(val == W637_DEVID)
1028                 kind = w83637hf;
1029         else {
1030                 dev_info(&adapter->dev,
1031                          "Unsupported chip (dev_id=0x%02X).\n", val);
1032                 goto ERROR1;
1033         }
1034
1035         superio_select(W83627HF_LD_HWM);
1036         if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1037                 superio_outb(WINB_ACT_REG, 1);
1038         superio_exit();
1039
1040         /* OK. For now, we presume we have a valid client. We now create the
1041            client structure, even though we cannot fill it completely yet.
1042            But it allows us to access w83627hf_{read,write}_value. */
1043
1044         if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1045                 err = -ENOMEM;
1046                 goto ERROR1;
1047         }
1048         memset(data, 0, sizeof(struct w83627hf_data));
1049
1050         new_client = &data->client;
1051         i2c_set_clientdata(new_client, data);
1052         new_client->addr = address;
1053         init_MUTEX(&data->lock);
1054         new_client->adapter = adapter;
1055         new_client->driver = &w83627hf_driver;
1056         new_client->flags = 0;
1057
1058
1059         if (kind == w83627hf) {
1060                 client_name = "w83627hf";
1061         } else if (kind == w83627thf) {
1062                 client_name = "w83627thf";
1063         } else if (kind == w83697hf) {
1064                 client_name = "w83697hf";
1065         } else if (kind == w83637hf) {
1066                 client_name = "w83637hf";
1067         }
1068
1069         /* Fill in the remaining client fields and put into the global list */
1070         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1071         data->type = kind;
1072         data->valid = 0;
1073         init_MUTEX(&data->update_lock);
1074
1075         /* Tell the I2C layer a new client has arrived */
1076         if ((err = i2c_attach_client(new_client)))
1077                 goto ERROR2;
1078
1079         data->lm75 = NULL;
1080
1081         /* Initialize the chip */
1082         w83627hf_init_client(new_client);
1083
1084         /* A few vars need to be filled upon startup */
1085         data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1086         data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1087         data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1088
1089         /* Register sysfs hooks */
1090         data->class_dev = hwmon_device_register(&new_client->dev);
1091         if (IS_ERR(data->class_dev)) {
1092                 err = PTR_ERR(data->class_dev);
1093                 goto ERROR3;
1094         }
1095
1096         device_create_file_in(new_client, 0);
1097         if (kind != w83697hf)
1098                 device_create_file_in(new_client, 1);
1099         device_create_file_in(new_client, 2);
1100         device_create_file_in(new_client, 3);
1101         device_create_file_in(new_client, 4);
1102         if (kind != w83627thf && kind != w83637hf) {
1103                 device_create_file_in(new_client, 5);
1104                 device_create_file_in(new_client, 6);
1105         }
1106         device_create_file_in(new_client, 7);
1107         device_create_file_in(new_client, 8);
1108
1109         device_create_file_fan(new_client, 1);
1110         device_create_file_fan(new_client, 2);
1111         if (kind != w83697hf)
1112                 device_create_file_fan(new_client, 3);
1113
1114         device_create_file_temp(new_client, 1);
1115         device_create_file_temp(new_client, 2);
1116         if (kind != w83697hf)
1117                 device_create_file_temp(new_client, 3);
1118
1119         if (kind != w83697hf)
1120                 device_create_file_vid(new_client);
1121
1122         if (kind != w83697hf)
1123                 device_create_file_vrm(new_client);
1124
1125         device_create_file_fan_div(new_client, 1);
1126         device_create_file_fan_div(new_client, 2);
1127         if (kind != w83697hf)
1128                 device_create_file_fan_div(new_client, 3);
1129
1130         device_create_file_alarms(new_client);
1131
1132         device_create_file_beep(new_client);
1133
1134         device_create_file_pwm(new_client, 1);
1135         device_create_file_pwm(new_client, 2);
1136         if (kind == w83627thf || kind == w83637hf)
1137                 device_create_file_pwm(new_client, 3);
1138
1139         device_create_file_sensor(new_client, 1);
1140         device_create_file_sensor(new_client, 2);
1141         if (kind != w83697hf)
1142                 device_create_file_sensor(new_client, 3);
1143
1144         return 0;
1145
1146       ERROR3:
1147         i2c_detach_client(new_client);
1148       ERROR2:
1149         kfree(data);
1150       ERROR1:
1151         release_region(address, WINB_EXTENT);
1152       ERROR0:
1153         return err;
1154 }
1155
1156 static int w83627hf_detach_client(struct i2c_client *client)
1157 {
1158         struct w83627hf_data *data = i2c_get_clientdata(client);
1159         int err;
1160
1161         hwmon_device_unregister(data->class_dev);
1162
1163         if ((err = i2c_detach_client(client)))
1164                 return err;
1165
1166         release_region(client->addr, WINB_EXTENT);
1167         kfree(data);
1168
1169         return 0;
1170 }
1171
1172
1173 /*
1174    ISA access must always be locked explicitly!
1175    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1176    would slow down the W83781D access and should not be necessary.
1177    There are some ugly typecasts here, but the good news is - they should
1178    nowhere else be necessary! */
1179 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1180 {
1181         struct w83627hf_data *data = i2c_get_clientdata(client);
1182         int res, word_sized;
1183
1184         down(&data->lock);
1185         word_sized = (((reg & 0xff00) == 0x100)
1186                    || ((reg & 0xff00) == 0x200))
1187                   && (((reg & 0x00ff) == 0x50)
1188                    || ((reg & 0x00ff) == 0x53)
1189                    || ((reg & 0x00ff) == 0x55));
1190         if (reg & 0xff00) {
1191                 outb_p(W83781D_REG_BANK,
1192                        client->addr + W83781D_ADDR_REG_OFFSET);
1193                 outb_p(reg >> 8,
1194                        client->addr + W83781D_DATA_REG_OFFSET);
1195         }
1196         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1197         res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1198         if (word_sized) {
1199                 outb_p((reg & 0xff) + 1,
1200                        client->addr + W83781D_ADDR_REG_OFFSET);
1201                 res =
1202                     (res << 8) + inb_p(client->addr +
1203                                        W83781D_DATA_REG_OFFSET);
1204         }
1205         if (reg & 0xff00) {
1206                 outb_p(W83781D_REG_BANK,
1207                        client->addr + W83781D_ADDR_REG_OFFSET);
1208                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1209         }
1210         up(&data->lock);
1211         return res;
1212 }
1213
1214 static int w83627thf_read_gpio5(struct i2c_client *client)
1215 {
1216         int res = 0xff, sel;
1217
1218         superio_enter();
1219         superio_select(W83627HF_LD_GPIO5);
1220
1221         /* Make sure these GPIO pins are enabled */
1222         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1223                 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1224                 goto exit;
1225         }
1226
1227         /* Make sure the pins are configured for input
1228            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1229         sel = superio_inb(W83627THF_GPIO5_IOSR);
1230         if ((sel & 0x1f) != 0x1f) {
1231                 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1232                         "function\n");
1233                 goto exit;
1234         }
1235
1236         dev_info(&client->dev, "Reading VID from GPIO5\n");
1237         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1238
1239 exit:
1240         superio_exit();
1241         return res;
1242 }
1243
1244 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1245 {
1246         struct w83627hf_data *data = i2c_get_clientdata(client);
1247         int word_sized;
1248
1249         down(&data->lock);
1250         word_sized = (((reg & 0xff00) == 0x100)
1251                    || ((reg & 0xff00) == 0x200))
1252                   && (((reg & 0x00ff) == 0x53)
1253                    || ((reg & 0x00ff) == 0x55));
1254         if (reg & 0xff00) {
1255                 outb_p(W83781D_REG_BANK,
1256                        client->addr + W83781D_ADDR_REG_OFFSET);
1257                 outb_p(reg >> 8,
1258                        client->addr + W83781D_DATA_REG_OFFSET);
1259         }
1260         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1261         if (word_sized) {
1262                 outb_p(value >> 8,
1263                        client->addr + W83781D_DATA_REG_OFFSET);
1264                 outb_p((reg & 0xff) + 1,
1265                        client->addr + W83781D_ADDR_REG_OFFSET);
1266         }
1267         outb_p(value & 0xff,
1268                client->addr + W83781D_DATA_REG_OFFSET);
1269         if (reg & 0xff00) {
1270                 outb_p(W83781D_REG_BANK,
1271                        client->addr + W83781D_ADDR_REG_OFFSET);
1272                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1273         }
1274         up(&data->lock);
1275         return 0;
1276 }
1277
1278 /* Called when we have found a new W83781D. It should set limits, etc. */
1279 static void w83627hf_init_client(struct i2c_client *client)
1280 {
1281         struct w83627hf_data *data = i2c_get_clientdata(client);
1282         int i;
1283         int type = data->type;
1284         u8 tmp;
1285
1286         if (reset) {
1287                 /* Resetting the chip has been the default for a long time,
1288                    but repeatedly caused problems (fans going to full
1289                    speed...) so it is now optional. It might even go away if
1290                    nobody reports it as being useful, as I see very little
1291                    reason why this would be needed at all. */
1292                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1293                          "having, please report!\n");
1294
1295                 /* save this register */
1296                 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1297                 /* Reset all except Watchdog values and last conversion values
1298                    This sets fan-divs to 2, among others */
1299                 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1300                 /* Restore the register and disable power-on abnormal beep.
1301                    This saves FAN 1/2/3 input/output values set by BIOS. */
1302                 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1303                 /* Disable master beep-enable (reset turns it on).
1304                    Individual beeps should be reset to off but for some reason
1305                    disabling this bit helps some people not get beeped */
1306                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1307         }
1308
1309         /* Minimize conflicts with other winbond i2c-only clients...  */
1310         /* disable i2c subclients... how to disable main i2c client?? */
1311         /* force i2c address to relatively uncommon address */
1312         w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1313         w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1314
1315         /* Read VID only once */
1316         if (w83627hf == data->type || w83637hf == data->type) {
1317                 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1318                 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1319                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1320         } else if (w83627thf == data->type) {
1321                 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1322         }
1323
1324         /* Read VRM & OVT Config only once */
1325         if (w83627thf == data->type || w83637hf == data->type) {
1326                 data->vrm_ovt =
1327                         w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1328                 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1329         } else {
1330                 /* Convert VID to voltage based on default VRM */
1331                 data->vrm = vid_which_vrm();
1332         }
1333
1334         tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1335         for (i = 1; i <= 3; i++) {
1336                 if (!(tmp & BIT_SCFG1[i - 1])) {
1337                         data->sens[i - 1] = W83781D_DEFAULT_BETA;
1338                 } else {
1339                         if (w83627hf_read_value
1340                             (client,
1341                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1342                                 data->sens[i - 1] = 1;
1343                         else
1344                                 data->sens[i - 1] = 2;
1345                 }
1346                 if ((type == w83697hf) && (i == 2))
1347                         break;
1348         }
1349
1350         if(init) {
1351                 /* Enable temp2 */
1352                 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1353                 if (tmp & 0x01) {
1354                         dev_warn(&client->dev, "Enabling temp2, readings "
1355                                  "might not make sense\n");
1356                         w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1357                                 tmp & 0xfe);
1358                 }
1359
1360                 /* Enable temp3 */
1361                 if (type != w83697hf) {
1362                         tmp = w83627hf_read_value(client,
1363                                 W83781D_REG_TEMP3_CONFIG);
1364                         if (tmp & 0x01) {
1365                                 dev_warn(&client->dev, "Enabling temp3, "
1366                                          "readings might not make sense\n");
1367                                 w83627hf_write_value(client,
1368                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1369                         }
1370                 }
1371
1372                 if (type == w83627hf) {
1373                         /* enable PWM2 control (can't hurt since PWM reg
1374                            should have been reset to 0xff) */
1375                         w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
1376                                             0x19);
1377                 }
1378                 /* enable comparator mode for temp2 and temp3 so
1379                    alarm indication will work correctly */
1380                 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1381                 if (!(i & 0x40))
1382                         w83627hf_write_value(client, W83781D_REG_IRQ,
1383                                             i | 0x40);
1384         }
1385
1386         /* Start monitoring */
1387         w83627hf_write_value(client, W83781D_REG_CONFIG,
1388                             (w83627hf_read_value(client,
1389                                                 W83781D_REG_CONFIG) & 0xf7)
1390                             | 0x01);
1391 }
1392
1393 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1394 {
1395         struct i2c_client *client = to_i2c_client(dev);
1396         struct w83627hf_data *data = i2c_get_clientdata(client);
1397         int i;
1398
1399         down(&data->update_lock);
1400
1401         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1402             || !data->valid) {
1403                 for (i = 0; i <= 8; i++) {
1404                         /* skip missing sensors */
1405                         if (((data->type == w83697hf) && (i == 1)) ||
1406                             ((data->type == w83627thf || data->type == w83637hf)
1407                             && (i == 4 || i == 5)))
1408                                 continue;
1409                         data->in[i] =
1410                             w83627hf_read_value(client, W83781D_REG_IN(i));
1411                         data->in_min[i] =
1412                             w83627hf_read_value(client,
1413                                                W83781D_REG_IN_MIN(i));
1414                         data->in_max[i] =
1415                             w83627hf_read_value(client,
1416                                                W83781D_REG_IN_MAX(i));
1417                 }
1418                 for (i = 1; i <= 3; i++) {
1419                         data->fan[i - 1] =
1420                             w83627hf_read_value(client, W83781D_REG_FAN(i));
1421                         data->fan_min[i - 1] =
1422                             w83627hf_read_value(client,
1423                                                W83781D_REG_FAN_MIN(i));
1424                 }
1425                 for (i = 1; i <= 3; i++) {
1426                         u8 tmp = w83627hf_read_value(client,
1427                                 W836X7HF_REG_PWM(data->type, i));
1428                         /* bits 0-3 are reserved  in 627THF */
1429                         if (data->type == w83627thf)
1430                                 tmp &= 0xf0;
1431                         data->pwm[i - 1] = tmp;
1432                         if(i == 2 &&
1433                            (data->type == w83627hf || data->type == w83697hf))
1434                                 break;
1435                 }
1436
1437                 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1438                 data->temp_max =
1439                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1440                 data->temp_max_hyst =
1441                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1442                 data->temp_add[0] =
1443                     w83627hf_read_value(client, W83781D_REG_TEMP(2));
1444                 data->temp_max_add[0] =
1445                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1446                 data->temp_max_hyst_add[0] =
1447                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1448                 if (data->type != w83697hf) {
1449                         data->temp_add[1] =
1450                           w83627hf_read_value(client, W83781D_REG_TEMP(3));
1451                         data->temp_max_add[1] =
1452                           w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1453                         data->temp_max_hyst_add[1] =
1454                           w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1455                 }
1456
1457                 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1458                 data->fan_div[0] = (i >> 4) & 0x03;
1459                 data->fan_div[1] = (i >> 6) & 0x03;
1460                 if (data->type != w83697hf) {
1461                         data->fan_div[2] = (w83627hf_read_value(client,
1462                                                W83781D_REG_PIN) >> 6) & 0x03;
1463                 }
1464                 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1465                 data->fan_div[0] |= (i >> 3) & 0x04;
1466                 data->fan_div[1] |= (i >> 4) & 0x04;
1467                 if (data->type != w83697hf)
1468                         data->fan_div[2] |= (i >> 5) & 0x04;
1469                 data->alarms =
1470                     w83627hf_read_value(client, W83781D_REG_ALARM1) |
1471                     (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1472                     (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1473                 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1474                 data->beep_enable = i >> 7;
1475                 data->beep_mask = ((i & 0x7f) << 8) |
1476                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1477                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1478                 data->last_updated = jiffies;
1479                 data->valid = 1;
1480         }
1481
1482         up(&data->update_lock);
1483
1484         return data;
1485 }
1486
1487 static int __init sensors_w83627hf_init(void)
1488 {
1489         if (w83627hf_find(0x2e, &address)
1490          && w83627hf_find(0x4e, &address)) {
1491                 return -ENODEV;
1492         }
1493
1494         return i2c_isa_add_driver(&w83627hf_driver);
1495 }
1496
1497 static void __exit sensors_w83627hf_exit(void)
1498 {
1499         i2c_isa_del_driver(&w83627hf_driver);
1500 }
1501
1502 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1503               "Philip Edelbrock <phil@netroedge.com>, "
1504               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1505 MODULE_DESCRIPTION("W83627HF driver");
1506 MODULE_LICENSE("GPL");
1507
1508 module_init(sensors_w83627hf_init);
1509 module_exit(sensors_w83627hf_exit);