drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25     Supports following chips:
  26
  27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  28     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  29     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  30     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  31     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  32
  33     For other winbond chips, and for i2c support in the above chips,
  34     use w83781d.c.
  35
  36     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  37     supported yet.
  38 */
  39
  40 #include <linux/module.h>
  41 #include <linux/init.h>
  42 #include <linux/slab.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/i2c.h>
  45 #include <linux/i2c-isa.h>
  46 #include <linux/hwmon.h>
  47 #include <linux/hwmon-vid.h>
  48 #include <linux/err.h>
  49 #include <asm/io.h>
  50 #include "lm75.h"
  51
  52 static u16 force_addr;
  53 module_param(force_addr, ushort, 0);
  54 MODULE_PARM_DESC(force_addr,
  55                  "Initialize the base address of the sensors");
  56 static u8 force_i2c = 0x1f;
  57 module_param(force_i2c, byte, 0);
  58 MODULE_PARM_DESC(force_i2c,
  59                  "Initialize the i2c address of the sensors");
  60
  61 /* The actual ISA address is read from Super-I/O configuration space */
  62 static unsigned short address;
  63
  64 /* Insmod parameters */
  65 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  66
  67 static int reset;
  68 module_param(reset, bool, 0);
  69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  70
  71 static int init = 1;
  72 module_param(init, bool, 0);
  73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  74
  75 /* modified from kernel/include/traps.c */
  76 static int REG;         /* The register to read/write */
  77 #define DEV     0x07    /* Register: Logical device select */
  78 static int VAL;         /* The value to read/write */
  79
  80 /* logical device numbers for superio_select (below) */
  81 #define W83627HF_LD_FDC         0x00
  82 #define W83627HF_LD_PRT         0x01
  83 #define W83627HF_LD_UART1       0x02
  84 #define W83627HF_LD_UART2       0x03
  85 #define W83627HF_LD_KBC         0x05
  86 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  87 #define W83627HF_LD_GAME        0x07
  88 #define W83627HF_LD_MIDI        0x07
  89 #define W83627HF_LD_GPIO1       0x07
  90 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  91 #define W83627HF_LD_GPIO2       0x08
  92 #define W83627HF_LD_GPIO3       0x09
  93 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  94 #define W83627HF_LD_ACPI        0x0a
  95 #define W83627HF_LD_HWM         0x0b
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98
  99 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
 100 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
 101 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
 102
 103 static inline void
 104 superio_outb(int reg, int val)
 105 {
 106         outb(reg, REG);
 107         outb(val, VAL);
 108 }
 109
 110 static inline int
 111 superio_inb(int reg)
 112 {
 113         outb(reg, REG);
 114         return inb(VAL);
 115 }
 116
 117 static inline void
 118 superio_select(int ld)
 119 {
 120         outb(DEV, REG);
 121         outb(ld, VAL);
 122 }
 123
 124 static inline void
 125 superio_enter(void)
 126 {
 127         outb(0x87, REG);
 128         outb(0x87, REG);
 129 }
 130
 131 static inline void
 132 superio_exit(void)
 133 {
 134         outb(0xAA, REG);
 135 }
 136
 137 #define W627_DEVID 0x52
 138 #define W627THF_DEVID 0x82
 139 #define W697_DEVID 0x60
 140 #define W637_DEVID 0x70
 141 #define WINB_ACT_REG 0x30
 142 #define WINB_BASE_REG 0x60
 143 /* Constants specified below */
 144
 145 /* Alignment of the base address */
 146 #define WINB_ALIGNMENT          ~7
 147
 148 /* Offset & size of I/O region we are interested in */
 149 #define WINB_REGION_OFFSET      5
 150 #define WINB_REGION_SIZE        2
 151
 152 /* Where are the sensors address/data registers relative to the base address */
 153 #define W83781D_ADDR_REG_OFFSET 5
 154 #define W83781D_DATA_REG_OFFSET 6
 155
 156 /* The W83781D registers */
 157 /* The W83782D registers for nr=7,8 are in bank 5 */
 158 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 159                                            (0x554 + (((nr) - 7) * 2)))
 160 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 161                                            (0x555 + (((nr) - 7) * 2)))
 162 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 163                                            (0x550 + (nr) - 7))
 164
 165 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
 166 #define W83781D_REG_FAN(nr) (0x27 + (nr))
 167
 168 #define W83781D_REG_TEMP2_CONFIG 0x152
 169 #define W83781D_REG_TEMP3_CONFIG 0x252
 170 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
 171                                         ((nr == 2) ? (0x0150) : \
 172                                                      (0x27)))
 173 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
 174                                         ((nr == 2) ? (0x153) : \
 175                                                      (0x3A)))
 176 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
 177                                         ((nr == 2) ? (0x155) : \
 178                                                      (0x39)))
 179
 180 #define W83781D_REG_BANK 0x4E
 181
 182 #define W83781D_REG_CONFIG 0x40
 183 #define W83781D_REG_ALARM1 0x459
 184 #define W83781D_REG_ALARM2 0x45A
 185 #define W83781D_REG_ALARM3 0x45B
 186
 187 #define W83781D_REG_BEEP_CONFIG 0x4D
 188 #define W83781D_REG_BEEP_INTS1 0x56
 189 #define W83781D_REG_BEEP_INTS2 0x57
 190 #define W83781D_REG_BEEP_INTS3 0x453
 191
 192 #define W83781D_REG_VID_FANDIV 0x47
 193
 194 #define W83781D_REG_CHIPID 0x49
 195 #define W83781D_REG_WCHIPID 0x58
 196 #define W83781D_REG_CHIPMAN 0x4F
 197 #define W83781D_REG_PIN 0x4B
 198
 199 #define W83781D_REG_VBAT 0x5D
 200
 201 #define W83627HF_REG_PWM1 0x5A
 202 #define W83627HF_REG_PWM2 0x5B
 203
 204 #define W83627THF_REG_PWM1              0x01    /* 697HF and 637HF too */
 205 #define W83627THF_REG_PWM2              0x03    /* 697HF and 637HF too */
 206 #define W83627THF_REG_PWM3              0x11    /* 637HF too */
 207
 208 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF too */
 209
 210 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 211 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 212                              W83627THF_REG_PWM3 };
 213 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 214                                      regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
 215
 216 #define W83781D_REG_I2C_ADDR 0x48
 217 #define W83781D_REG_I2C_SUBADDR 0x4A
 218
 219 /* Sensor selection */
 220 #define W83781D_REG_SCFG1 0x5D
 221 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 222 #define W83781D_REG_SCFG2 0x59
 223 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 224 #define W83781D_DEFAULT_BETA 3435
 225
 226 /* Conversions. Limit checking is only done on the TO_REG
 227    variants. Note that you should be a bit careful with which arguments
 228    these macros are called: arguments may be evaluated more than once.
 229    Fixing this is just not worth it. */
 230 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 231 #define IN_FROM_REG(val) ((val) * 16)
 232
 233 static inline u8 FAN_TO_REG(long rpm, int div)
 234 {
 235         if (rpm == 0)
 236                 return 255;
 237         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 238         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 239                              254);
 240 }
 241
 242 #define TEMP_MIN (-128000)
 243 #define TEMP_MAX ( 127000)
 244
 245 /* TEMP: 0.001C/bit (-128C to +127C)
 246    REG: 1C/bit, two's complement */
 247 static u8 TEMP_TO_REG(int temp)
 248 {
 249         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 250         ntemp += (ntemp<0 ? -500 : 500);
 251         return (u8)(ntemp / 1000);
 252 }
 253
 254 static int TEMP_FROM_REG(u8 reg)
 255 {
 256         return (s8)reg * 1000;
 257 }
 258
 259 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 260
 261 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 262
 263 #define BEEP_MASK_FROM_REG(val)          (val)
 264 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 265 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 266 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 267
 268 #define DIV_FROM_REG(val) (1 << (val))
 269
 270 static inline u8 DIV_TO_REG(long val)
 271 {
 272         int i;
 273         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 274         for (i = 0; i < 7; i++) {
 275                 if (val == 0)
 276                         break;
 277                 val >>= 1;
 278         }
 279         return ((u8) i);
 280 }
 281
 282 /* For each registered chip, we need to keep some data in memory. That
 283    data is pointed to by w83627hf_list[NR]->data. The structure itself is
 284    dynamically allocated, at the same time when a new client is allocated. */
 285 struct w83627hf_data {
 286         struct i2c_client client;
 287         struct class_device *class_dev;
 288         struct semaphore lock;
 289         enum chips type;
 290
 291         struct semaphore update_lock;
 292         char valid;             /* !=0 if following fields are valid */
 293         unsigned long last_updated;     /* In jiffies */
 294
 295         struct i2c_client *lm75;        /* for secondary I2C addresses */
 296         /* pointer to array of 2 subclients */
 297
 298         u8 in[9];               /* Register value */
 299         u8 in_max[9];           /* Register value */
 300         u8 in_min[9];           /* Register value */
 301         u8 fan[3];              /* Register value */
 302         u8 fan_min[3];          /* Register value */
 303         u8 temp;
 304         u8 temp_max;            /* Register value */
 305         u8 temp_max_hyst;       /* Register value */
 306         u16 temp_add[2];        /* Register value */
 307         u16 temp_max_add[2];    /* Register value */
 308         u16 temp_max_hyst_add[2]; /* Register value */
 309         u8 fan_div[3];          /* Register encoding, shifted right */
 310         u8 vid;                 /* Register encoding, combined */
 311         u32 alarms;             /* Register encoding, combined */
 312         u32 beep_mask;          /* Register encoding, combined */
 313         u8 beep_enable;         /* Boolean */
 314         u8 pwm[3];              /* Register value */
 315         u16 sens[3];            /* 782D/783S only.
 316                                    1 = pentium diode; 2 = 3904 diode;
 317                                    3000-5000 = thermistor beta.
 318                                    Default = 3435.
 319                                    Other Betas unimplemented */
 320         u8 vrm;
 321         u8 vrm_ovt;             /* Register value, 627thf & 637hf only */
 322 };
 323
 324
 325 static int w83627hf_detect(struct i2c_adapter *adapter);
 326 static int w83627hf_detach_client(struct i2c_client *client);
 327
 328 static int w83627hf_read_value(struct i2c_client *client, u16 register);
 329 static int w83627hf_write_value(struct i2c_client *client, u16 register,
 330                                u16 value);
 331 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 332 static void w83627hf_init_client(struct i2c_client *client);
 333
 334 static struct i2c_driver w83627hf_driver = {
 335         .owner          = THIS_MODULE,
 336         .name           = "w83627hf",
 337         .attach_adapter = w83627hf_detect,
 338         .detach_client  = w83627hf_detach_client,
 339 };
 340
 341 /* following are the sysfs callback functions */
 342 #define show_in_reg(reg) \
 343 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 344 { \
 345         struct w83627hf_data *data = w83627hf_update_device(dev); \
 346         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
 347 }
 348 show_in_reg(in)
 349 show_in_reg(in_min)
 350 show_in_reg(in_max)
 351
 352 #define store_in_reg(REG, reg) \
 353 static ssize_t \
 354 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 355 { \
 356         struct i2c_client *client = to_i2c_client(dev); \
 357         struct w83627hf_data *data = i2c_get_clientdata(client); \
 358         u32 val; \
 359          \
 360         val = simple_strtoul(buf, NULL, 10); \
 361          \
 362         down(&data->update_lock); \
 363         data->in_##reg[nr] = IN_TO_REG(val); \
 364         w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
 365                             data->in_##reg[nr]); \
 366          \
 367         up(&data->update_lock); \
 368         return count; \
 369 }
 370 store_in_reg(MIN, min)
 371 store_in_reg(MAX, max)
 372
 373 #define sysfs_in_offset(offset) \
 374 static ssize_t \
 375 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 376 { \
 377         return show_in(dev, buf, offset); \
 378 } \
 379 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 380
 381 #define sysfs_in_reg_offset(reg, offset) \
 382 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 383 { \
 384         return show_in_##reg (dev, buf, offset); \
 385 } \
 386 static ssize_t \
 387 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
 388                             const char *buf, size_t count) \
 389 { \
 390         return store_in_##reg (dev, buf, count, offset); \
 391 } \
 392 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
 393                   show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 394
 395 #define sysfs_in_offsets(offset) \
 396 sysfs_in_offset(offset) \
 397 sysfs_in_reg_offset(min, offset) \
 398 sysfs_in_reg_offset(max, offset)
 399
 400 sysfs_in_offsets(1);
 401 sysfs_in_offsets(2);
 402 sysfs_in_offsets(3);
 403 sysfs_in_offsets(4);
 404 sysfs_in_offsets(5);
 405 sysfs_in_offsets(6);
 406 sysfs_in_offsets(7);
 407 sysfs_in_offsets(8);
 408
 409 /* use a different set of functions for in0 */
 410 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 411 {
 412         long in0;
 413
 414         if ((data->vrm_ovt & 0x01) &&
 415                 (w83627thf == data->type || w83637hf == data->type))
 416
 417                 /* use VRM9 calculation */
 418                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 419         else
 420                 /* use VRM8 (standard) calculation */
 421                 in0 = (long)IN_FROM_REG(reg);
 422
 423         return sprintf(buf,"%ld\n", in0);
 424 }
 425
 426 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 427 {
 428         struct w83627hf_data *data = w83627hf_update_device(dev);
 429         return show_in_0(data, buf, data->in[0]);
 430 }
 431
 432 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 433 {
 434         struct w83627hf_data *data = w83627hf_update_device(dev);
 435         return show_in_0(data, buf, data->in_min[0]);
 436 }
 437
 438 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 439 {
 440         struct w83627hf_data *data = w83627hf_update_device(dev);
 441         return show_in_0(data, buf, data->in_max[0]);
 442 }
 443
 444 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 445         const char *buf, size_t count)
 446 {
 447         struct i2c_client *client = to_i2c_client(dev);
 448         struct w83627hf_data *data = i2c_get_clientdata(client);
 449         u32 val;
 450
 451         val = simple_strtoul(buf, NULL, 10);
 452
 453         down(&data->update_lock);
 454
 455         if ((data->vrm_ovt & 0x01) &&
 456                 (w83627thf == data->type || w83637hf == data->type))
 457
 458                 /* use VRM9 calculation */
 459                 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 460         else
 461                 /* use VRM8 (standard) calculation */
 462                 data->in_min[0] = IN_TO_REG(val);
 463
 464         w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
 465         up(&data->update_lock);
 466         return count;
 467 }
 468
 469 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 470         const char *buf, size_t count)
 471 {
 472         struct i2c_client *client = to_i2c_client(dev);
 473         struct w83627hf_data *data = i2c_get_clientdata(client);
 474         u32 val;
 475
 476         val = simple_strtoul(buf, NULL, 10);
 477
 478         down(&data->update_lock);
 479
 480         if ((data->vrm_ovt & 0x01) &&
 481                 (w83627thf == data->type || w83637hf == data->type))
 482
 483                 /* use VRM9 calculation */
 484                 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 485         else
 486                 /* use VRM8 (standard) calculation */
 487                 data->in_max[0] = IN_TO_REG(val);
 488
 489         w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
 490         up(&data->update_lock);
 491         return count;
 492 }
 493
 494 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 495 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 496         show_regs_in_min0, store_regs_in_min0);
 497 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 498         show_regs_in_max0, store_regs_in_max0);
 499
 500 #define device_create_file_in(client, offset) \
 501 do { \
 502 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 503 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 504 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 505 } while (0)
 506
 507 #define show_fan_reg(reg) \
 508 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 509 { \
 510         struct w83627hf_data *data = w83627hf_update_device(dev); \
 511         return sprintf(buf,"%ld\n", \
 512                 FAN_FROM_REG(data->reg[nr-1], \
 513                             (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 514 }
 515 show_fan_reg(fan);
 516 show_fan_reg(fan_min);
 517
 518 static ssize_t
 519 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 520 {
 521         struct i2c_client *client = to_i2c_client(dev);
 522         struct w83627hf_data *data = i2c_get_clientdata(client);
 523         u32 val;
 524
 525         val = simple_strtoul(buf, NULL, 10);
 526
 527         down(&data->update_lock);
 528         data->fan_min[nr - 1] =
 529             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 530         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
 531                             data->fan_min[nr - 1]);
 532
 533         up(&data->update_lock);
 534         return count;
 535 }
 536
 537 #define sysfs_fan_offset(offset) \
 538 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 539 { \
 540         return show_fan(dev, buf, offset); \
 541 } \
 542 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 543
 544 #define sysfs_fan_min_offset(offset) \
 545 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 546 { \
 547         return show_fan_min(dev, buf, offset); \
 548 } \
 549 static ssize_t \
 550 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 551 { \
 552         return store_fan_min(dev, buf, count, offset); \
 553 } \
 554 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
 555                   show_regs_fan_min##offset, store_regs_fan_min##offset);
 556
 557 sysfs_fan_offset(1);
 558 sysfs_fan_min_offset(1);
 559 sysfs_fan_offset(2);
 560 sysfs_fan_min_offset(2);
 561 sysfs_fan_offset(3);
 562 sysfs_fan_min_offset(3);
 563
 564 #define device_create_file_fan(client, offset) \
 565 do { \
 566 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 567 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 568 } while (0)
 569
 570 #define show_temp_reg(reg) \
 571 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 572 { \
 573         struct w83627hf_data *data = w83627hf_update_device(dev); \
 574         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 575                 return sprintf(buf,"%ld\n", \
 576                         (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 577         } else {        /* TEMP1 */ \
 578                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 579         } \
 580 }
 581 show_temp_reg(temp);
 582 show_temp_reg(temp_max);
 583 show_temp_reg(temp_max_hyst);
 584
 585 #define store_temp_reg(REG, reg) \
 586 static ssize_t \
 587 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 588 { \
 589         struct i2c_client *client = to_i2c_client(dev); \
 590         struct w83627hf_data *data = i2c_get_clientdata(client); \
 591         u32 val; \
 592          \
 593         val = simple_strtoul(buf, NULL, 10); \
 594          \
 595         down(&data->update_lock); \
 596          \
 597         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 598                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 599                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 600                                 data->temp_##reg##_add[nr-2]); \
 601         } else {        /* TEMP1 */ \
 602                 data->temp_##reg = TEMP_TO_REG(val); \
 603                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 604                         data->temp_##reg); \
 605         } \
 606          \
 607         up(&data->update_lock); \
 608         return count; \
 609 }
 610 store_temp_reg(OVER, max);
 611 store_temp_reg(HYST, max_hyst);
 612
 613 #define sysfs_temp_offset(offset) \
 614 static ssize_t \
 615 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 616 { \
 617         return show_temp(dev, buf, offset); \
 618 } \
 619 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 620
 621 #define sysfs_temp_reg_offset(reg, offset) \
 622 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 623 { \
 624         return show_temp_##reg (dev, buf, offset); \
 625 } \
 626 static ssize_t \
 627 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
 628                               const char *buf, size_t count) \
 629 { \
 630         return store_temp_##reg (dev, buf, count, offset); \
 631 } \
 632 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
 633                   show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 634
 635 #define sysfs_temp_offsets(offset) \
 636 sysfs_temp_offset(offset) \
 637 sysfs_temp_reg_offset(max, offset) \
 638 sysfs_temp_reg_offset(max_hyst, offset)
 639
 640 sysfs_temp_offsets(1);
 641 sysfs_temp_offsets(2);
 642 sysfs_temp_offsets(3);
 643
 644 #define device_create_file_temp(client, offset) \
 645 do { \
 646 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 647 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 648 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 649 } while (0)
 650
 651 static ssize_t
 652 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 653 {
 654         struct w83627hf_data *data = w83627hf_update_device(dev);
 655         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 656 }
 657 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 658 #define device_create_file_vid(client) \
 659 device_create_file(&client->dev, &dev_attr_cpu0_vid)
 660
 661 static ssize_t
 662 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 663 {
 664         struct w83627hf_data *data = w83627hf_update_device(dev);
 665         return sprintf(buf, "%ld\n", (long) data->vrm);
 666 }
 667 static ssize_t
 668 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 669 {
 670         struct i2c_client *client = to_i2c_client(dev);
 671         struct w83627hf_data *data = i2c_get_clientdata(client);
 672         u32 val;
 673
 674         val = simple_strtoul(buf, NULL, 10);
 675         data->vrm = val;
 676
 677         return count;
 678 }
 679 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 680 #define device_create_file_vrm(client) \
 681 device_create_file(&client->dev, &dev_attr_vrm)
 682
 683 static ssize_t
 684 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 685 {
 686         struct w83627hf_data *data = w83627hf_update_device(dev);
 687         return sprintf(buf, "%ld\n", (long) data->alarms);
 688 }
 689 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 690 #define device_create_file_alarms(client) \
 691 device_create_file(&client->dev, &dev_attr_alarms)
 692
 693 #define show_beep_reg(REG, reg) \
 694 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 695 { \
 696         struct w83627hf_data *data = w83627hf_update_device(dev); \
 697         return sprintf(buf,"%ld\n", \
 698                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 699 }
 700 show_beep_reg(ENABLE, enable)
 701 show_beep_reg(MASK, mask)
 702
 703 #define BEEP_ENABLE                     0       /* Store beep_enable */
 704 #define BEEP_MASK                       1       /* Store beep_mask */
 705
 706 static ssize_t
 707 store_beep_reg(struct device *dev, const char *buf, size_t count,
 708                int update_mask)
 709 {
 710         struct i2c_client *client = to_i2c_client(dev);
 711         struct w83627hf_data *data = i2c_get_clientdata(client);
 712         u32 val, val2;
 713
 714         val = simple_strtoul(buf, NULL, 10);
 715
 716         down(&data->update_lock);
 717
 718         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 719                 data->beep_mask = BEEP_MASK_TO_REG(val);
 720                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
 721                                     data->beep_mask & 0xff);
 722                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
 723                                     ((data->beep_mask) >> 16) & 0xff);
 724                 val2 = (data->beep_mask >> 8) & 0x7f;
 725         } else {                /* We are storing beep_enable */
 726                 val2 =
 727                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 728                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 729         }
 730
 731         w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
 732                             val2 | data->beep_enable << 7);
 733
 734         up(&data->update_lock);
 735         return count;
 736 }
 737
 738 #define sysfs_beep(REG, reg) \
 739 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 740 { \
 741         return show_beep_##reg(dev, attr, buf); \
 742 } \
 743 static ssize_t \
 744 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 745 { \
 746         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 747 } \
 748 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 749                   show_regs_beep_##reg, store_regs_beep_##reg);
 750
 751 sysfs_beep(ENABLE, enable);
 752 sysfs_beep(MASK, mask);
 753
 754 #define device_create_file_beep(client) \
 755 do { \
 756 device_create_file(&client->dev, &dev_attr_beep_enable); \
 757 device_create_file(&client->dev, &dev_attr_beep_mask); \
 758 } while (0)
 759
 760 static ssize_t
 761 show_fan_div_reg(struct device *dev, char *buf, int nr)
 762 {
 763         struct w83627hf_data *data = w83627hf_update_device(dev);
 764         return sprintf(buf, "%ld\n",
 765                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 766 }
 767
 768 /* Note: we save and restore the fan minimum here, because its value is
 769    determined in part by the fan divisor.  This follows the principle of
 770    least suprise; the user doesn't expect the fan minimum to change just
 771    because the divisor changed. */
 772 static ssize_t
 773 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 774 {
 775         struct i2c_client *client = to_i2c_client(dev);
 776         struct w83627hf_data *data = i2c_get_clientdata(client);
 777         unsigned long min;
 778         u8 reg;
 779         unsigned long val = simple_strtoul(buf, NULL, 10);
 780
 781         down(&data->update_lock);
 782
 783         /* Save fan_min */
 784         min = FAN_FROM_REG(data->fan_min[nr],
 785                            DIV_FROM_REG(data->fan_div[nr]));
 786
 787         data->fan_div[nr] = DIV_TO_REG(val);
 788
 789         reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 790                & (nr==0 ? 0xcf : 0x3f))
 791             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 792         w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 793
 794         reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
 795                & ~(1 << (5 + nr)))
 796             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 797         w83627hf_write_value(client, W83781D_REG_VBAT, reg);
 798
 799         /* Restore fan_min */
 800         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 801         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 802
 803         up(&data->update_lock);
 804         return count;
 805 }
 806
 807 #define sysfs_fan_div(offset) \
 808 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 809 { \
 810         return show_fan_div_reg(dev, buf, offset); \
 811 } \
 812 static ssize_t \
 813 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
 814                             const char *buf, size_t count) \
 815 { \
 816         return store_fan_div_reg(dev, buf, count, offset - 1); \
 817 } \
 818 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
 819                   show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 820
 821 sysfs_fan_div(1);
 822 sysfs_fan_div(2);
 823 sysfs_fan_div(3);
 824
 825 #define device_create_file_fan_div(client, offset) \
 826 do { \
 827 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 828 } while (0)
 829
 830 static ssize_t
 831 show_pwm_reg(struct device *dev, char *buf, int nr)
 832 {
 833         struct w83627hf_data *data = w83627hf_update_device(dev);
 834         return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
 835 }
 836
 837 static ssize_t
 838 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 839 {
 840         struct i2c_client *client = to_i2c_client(dev);
 841         struct w83627hf_data *data = i2c_get_clientdata(client);
 842         u32 val;
 843
 844         val = simple_strtoul(buf, NULL, 10);
 845
 846         down(&data->update_lock);
 847
 848         if (data->type == w83627thf) {
 849                 /* bits 0-3 are reserved  in 627THF */
 850                 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
 851                 w83627hf_write_value(client,
 852                                      W836X7HF_REG_PWM(data->type, nr),
 853                                      data->pwm[nr - 1] |
 854                                      (w83627hf_read_value(client,
 855                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 856         } else {
 857                 data->pwm[nr - 1] = PWM_TO_REG(val);
 858                 w83627hf_write_value(client,
 859                                      W836X7HF_REG_PWM(data->type, nr),
 860                                      data->pwm[nr - 1]);
 861         }
 862
 863         up(&data->update_lock);
 864         return count;
 865 }
 866
 867 #define sysfs_pwm(offset) \
 868 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 869 { \
 870         return show_pwm_reg(dev, buf, offset); \
 871 } \
 872 static ssize_t \
 873 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 874 { \
 875         return store_pwm_reg(dev, buf, count, offset); \
 876 } \
 877 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 878                   show_regs_pwm_##offset, store_regs_pwm_##offset);
 879
 880 sysfs_pwm(1);
 881 sysfs_pwm(2);
 882 sysfs_pwm(3);
 883
 884 #define device_create_file_pwm(client, offset) \
 885 do { \
 886 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 887 } while (0)
 888
 889 static ssize_t
 890 show_sensor_reg(struct device *dev, char *buf, int nr)
 891 {
 892         struct w83627hf_data *data = w83627hf_update_device(dev);
 893         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 894 }
 895
 896 static ssize_t
 897 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 898 {
 899         struct i2c_client *client = to_i2c_client(dev);
 900         struct w83627hf_data *data = i2c_get_clientdata(client);
 901         u32 val, tmp;
 902
 903         val = simple_strtoul(buf, NULL, 10);
 904
 905         down(&data->update_lock);
 906
 907         switch (val) {
 908         case 1:         /* PII/Celeron diode */
 909                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 910                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 911                                     tmp | BIT_SCFG1[nr - 1]);
 912                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 913                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 914                                     tmp | BIT_SCFG2[nr - 1]);
 915                 data->sens[nr - 1] = val;
 916                 break;
 917         case 2:         /* 3904 */
 918                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 919                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 920                                     tmp | BIT_SCFG1[nr - 1]);
 921                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 922                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 923                                     tmp & ~BIT_SCFG2[nr - 1]);
 924                 data->sens[nr - 1] = val;
 925                 break;
 926         case W83781D_DEFAULT_BETA:      /* thermistor */
 927                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 928                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 929                                     tmp & ~BIT_SCFG1[nr - 1]);
 930                 data->sens[nr - 1] = val;
 931                 break;
 932         default:
 933                 dev_err(&client->dev,
 934                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 935                        (long) val, W83781D_DEFAULT_BETA);
 936                 break;
 937         }
 938
 939         up(&data->update_lock);
 940         return count;
 941 }
 942
 943 #define sysfs_sensor(offset) \
 944 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 945 { \
 946     return show_sensor_reg(dev, buf, offset); \
 947 } \
 948 static ssize_t \
 949 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 950 { \
 951     return store_sensor_reg(dev, buf, count, offset); \
 952 } \
 953 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 954                   show_regs_sensor_##offset, store_regs_sensor_##offset);
 955
 956 sysfs_sensor(1);
 957 sysfs_sensor(2);
 958 sysfs_sensor(3);
 959
 960 #define device_create_file_sensor(client, offset) \
 961 do { \
 962 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 963 } while (0)
 964
 965
 966 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
 967 {
 968         u16 val;
 969
 970         REG = sioaddr;
 971         VAL = sioaddr + 1;
 972
 973         superio_enter();
 974         val= superio_inb(DEVID);
 975         if(val != W627_DEVID &&
 976            val != W627THF_DEVID &&
 977            val != W697_DEVID &&
 978            val != W637_DEVID) {
 979                 superio_exit();
 980                 return -ENODEV;
 981         }
 982
 983         superio_select(W83627HF_LD_HWM);
 984         val = (superio_inb(WINB_BASE_REG) << 8) |
 985                superio_inb(WINB_BASE_REG + 1);
 986         *addr = val & WINB_ALIGNMENT;
 987         if (*addr == 0 && force_addr == 0) {
 988                 superio_exit();
 989                 return -ENODEV;
 990         }
 991
 992         superio_exit();
 993         return 0;
 994 }
 995
 996 static int w83627hf_detect(struct i2c_adapter *adapter)
 997 {
 998         int val, kind;
 999         struct i2c_client *new_client;
1000         struct w83627hf_data *data;
1001         int err = 0;
1002         const char *client_name = "";
1003
1004         if(force_addr)
1005                 address = force_addr & WINB_ALIGNMENT;
1006
1007         if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1008                             w83627hf_driver.name)) {
1009                 err = -EBUSY;
1010                 goto ERROR0;
1011         }
1012
1013         if(force_addr) {
1014                 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1015                 superio_enter();
1016                 superio_select(W83627HF_LD_HWM);
1017                 superio_outb(WINB_BASE_REG, address >> 8);
1018                 superio_outb(WINB_BASE_REG+1, address & 0xff);
1019                 superio_exit();
1020         }
1021
1022         superio_enter();
1023         val= superio_inb(DEVID);
1024         if(val == W627_DEVID)
1025                 kind = w83627hf;
1026         else if(val == W697_DEVID)
1027                 kind = w83697hf;
1028         else if(val == W627THF_DEVID)
1029                 kind = w83627thf;
1030         else if(val == W637_DEVID)
1031                 kind = w83637hf;
1032         else {
1033                 dev_info(&adapter->dev,
1034                          "Unsupported chip (dev_id=0x%02X).\n", val);
1035                 goto ERROR1;
1036         }
1037
1038         superio_select(W83627HF_LD_HWM);
1039         if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1040                 superio_outb(WINB_ACT_REG, 1);
1041         superio_exit();
1042
1043         /* OK. For now, we presume we have a valid client. We now create the
1044            client structure, even though we cannot fill it completely yet.
1045            But it allows us to access w83627hf_{read,write}_value. */
1046
1047         if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1048                 err = -ENOMEM;
1049                 goto ERROR1;
1050         }
1051
1052         new_client = &data->client;
1053         i2c_set_clientdata(new_client, data);
1054         new_client->addr = address;
1055         init_MUTEX(&data->lock);
1056         new_client->adapter = adapter;
1057         new_client->driver = &w83627hf_driver;
1058         new_client->flags = 0;
1059
1060
1061         if (kind == w83627hf) {
1062                 client_name = "w83627hf";
1063         } else if (kind == w83627thf) {
1064                 client_name = "w83627thf";
1065         } else if (kind == w83697hf) {
1066                 client_name = "w83697hf";
1067         } else if (kind == w83637hf) {
1068                 client_name = "w83637hf";
1069         }
1070
1071         /* Fill in the remaining client fields and put into the global list */
1072         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1073         data->type = kind;
1074         data->valid = 0;
1075         init_MUTEX(&data->update_lock);
1076
1077         /* Tell the I2C layer a new client has arrived */
1078         if ((err = i2c_attach_client(new_client)))
1079                 goto ERROR2;
1080
1081         data->lm75 = NULL;
1082
1083         /* Initialize the chip */
1084         w83627hf_init_client(new_client);
1085
1086         /* A few vars need to be filled upon startup */
1087         data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1088         data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1089         data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1090
1091         /* Register sysfs hooks */
1092         data->class_dev = hwmon_device_register(&new_client->dev);
1093         if (IS_ERR(data->class_dev)) {
1094                 err = PTR_ERR(data->class_dev);
1095                 goto ERROR3;
1096         }
1097
1098         device_create_file_in(new_client, 0);
1099         if (kind != w83697hf)
1100                 device_create_file_in(new_client, 1);
1101         device_create_file_in(new_client, 2);
1102         device_create_file_in(new_client, 3);
1103         device_create_file_in(new_client, 4);
1104         if (kind != w83627thf && kind != w83637hf) {
1105                 device_create_file_in(new_client, 5);
1106                 device_create_file_in(new_client, 6);
1107         }
1108         device_create_file_in(new_client, 7);
1109         device_create_file_in(new_client, 8);
1110
1111         device_create_file_fan(new_client, 1);
1112         device_create_file_fan(new_client, 2);
1113         if (kind != w83697hf)
1114                 device_create_file_fan(new_client, 3);
1115
1116         device_create_file_temp(new_client, 1);
1117         device_create_file_temp(new_client, 2);
1118         if (kind != w83697hf)
1119                 device_create_file_temp(new_client, 3);
1120
1121         if (kind != w83697hf)
1122                 device_create_file_vid(new_client);
1123
1124         if (kind != w83697hf)
1125                 device_create_file_vrm(new_client);
1126
1127         device_create_file_fan_div(new_client, 1);
1128         device_create_file_fan_div(new_client, 2);
1129         if (kind != w83697hf)
1130                 device_create_file_fan_div(new_client, 3);
1131
1132         device_create_file_alarms(new_client);
1133
1134         device_create_file_beep(new_client);
1135
1136         device_create_file_pwm(new_client, 1);
1137         device_create_file_pwm(new_client, 2);
1138         if (kind == w83627thf || kind == w83637hf)
1139                 device_create_file_pwm(new_client, 3);
1140
1141         device_create_file_sensor(new_client, 1);
1142         device_create_file_sensor(new_client, 2);
1143         if (kind != w83697hf)
1144                 device_create_file_sensor(new_client, 3);
1145
1146         return 0;
1147
1148       ERROR3:
1149         i2c_detach_client(new_client);
1150       ERROR2:
1151         kfree(data);
1152       ERROR1:
1153         release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1154       ERROR0:
1155         return err;
1156 }
1157
1158 static int w83627hf_detach_client(struct i2c_client *client)
1159 {
1160         struct w83627hf_data *data = i2c_get_clientdata(client);
1161         int err;
1162
1163         hwmon_device_unregister(data->class_dev);
1164
1165         if ((err = i2c_detach_client(client)))
1166                 return err;
1167
1168         release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1169         kfree(data);
1170
1171         return 0;
1172 }
1173
1174
1175 /*
1176    ISA access must always be locked explicitly!
1177    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1178    would slow down the W83781D access and should not be necessary.
1179    There are some ugly typecasts here, but the good news is - they should
1180    nowhere else be necessary! */
1181 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1182 {
1183         struct w83627hf_data *data = i2c_get_clientdata(client);
1184         int res, word_sized;
1185
1186         down(&data->lock);
1187         word_sized = (((reg & 0xff00) == 0x100)
1188                    || ((reg & 0xff00) == 0x200))
1189                   && (((reg & 0x00ff) == 0x50)
1190                    || ((reg & 0x00ff) == 0x53)
1191                    || ((reg & 0x00ff) == 0x55));
1192         if (reg & 0xff00) {
1193                 outb_p(W83781D_REG_BANK,
1194                        client->addr + W83781D_ADDR_REG_OFFSET);
1195                 outb_p(reg >> 8,
1196                        client->addr + W83781D_DATA_REG_OFFSET);
1197         }
1198         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1199         res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1200         if (word_sized) {
1201                 outb_p((reg & 0xff) + 1,
1202                        client->addr + W83781D_ADDR_REG_OFFSET);
1203                 res =
1204                     (res << 8) + inb_p(client->addr +
1205                                        W83781D_DATA_REG_OFFSET);
1206         }
1207         if (reg & 0xff00) {
1208                 outb_p(W83781D_REG_BANK,
1209                        client->addr + W83781D_ADDR_REG_OFFSET);
1210                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1211         }
1212         up(&data->lock);
1213         return res;
1214 }
1215
1216 static int w83627thf_read_gpio5(struct i2c_client *client)
1217 {
1218         int res = 0xff, sel;
1219
1220         superio_enter();
1221         superio_select(W83627HF_LD_GPIO5);
1222
1223         /* Make sure these GPIO pins are enabled */
1224         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1225                 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1226                 goto exit;
1227         }
1228
1229         /* Make sure the pins are configured for input
1230            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1231         sel = superio_inb(W83627THF_GPIO5_IOSR);
1232         if ((sel & 0x1f) != 0x1f) {
1233                 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1234                         "function\n");
1235                 goto exit;
1236         }
1237
1238         dev_info(&client->dev, "Reading VID from GPIO5\n");
1239         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1240
1241 exit:
1242         superio_exit();
1243         return res;
1244 }
1245
1246 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1247 {
1248         struct w83627hf_data *data = i2c_get_clientdata(client);
1249         int word_sized;
1250
1251         down(&data->lock);
1252         word_sized = (((reg & 0xff00) == 0x100)
1253                    || ((reg & 0xff00) == 0x200))
1254                   && (((reg & 0x00ff) == 0x53)
1255                    || ((reg & 0x00ff) == 0x55));
1256         if (reg & 0xff00) {
1257                 outb_p(W83781D_REG_BANK,
1258                        client->addr + W83781D_ADDR_REG_OFFSET);
1259                 outb_p(reg >> 8,
1260                        client->addr + W83781D_DATA_REG_OFFSET);
1261         }
1262         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1263         if (word_sized) {
1264                 outb_p(value >> 8,
1265                        client->addr + W83781D_DATA_REG_OFFSET);
1266                 outb_p((reg & 0xff) + 1,
1267                        client->addr + W83781D_ADDR_REG_OFFSET);
1268         }
1269         outb_p(value & 0xff,
1270                client->addr + W83781D_DATA_REG_OFFSET);
1271         if (reg & 0xff00) {
1272                 outb_p(W83781D_REG_BANK,
1273                        client->addr + W83781D_ADDR_REG_OFFSET);
1274                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1275         }
1276         up(&data->lock);
1277         return 0;
1278 }
1279
1280 static void w83627hf_init_client(struct i2c_client *client)
1281 {
1282         struct w83627hf_data *data = i2c_get_clientdata(client);
1283         int i;
1284         int type = data->type;
1285         u8 tmp;
1286
1287         if (reset) {
1288                 /* Resetting the chip has been the default for a long time,
1289                    but repeatedly caused problems (fans going to full
1290                    speed...) so it is now optional. It might even go away if
1291                    nobody reports it as being useful, as I see very little
1292                    reason why this would be needed at all. */
1293                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1294                          "having, please report!\n");
1295
1296                 /* save this register */
1297                 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1298                 /* Reset all except Watchdog values and last conversion values
1299                    This sets fan-divs to 2, among others */
1300                 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1301                 /* Restore the register and disable power-on abnormal beep.
1302                    This saves FAN 1/2/3 input/output values set by BIOS. */
1303                 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1304                 /* Disable master beep-enable (reset turns it on).
1305                    Individual beeps should be reset to off but for some reason
1306                    disabling this bit helps some people not get beeped */
1307                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1308         }
1309
1310         /* Minimize conflicts with other winbond i2c-only clients...  */
1311         /* disable i2c subclients... how to disable main i2c client?? */
1312         /* force i2c address to relatively uncommon address */
1313         w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1314         w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1315
1316         /* Read VID only once */
1317         if (w83627hf == data->type || w83637hf == data->type) {
1318                 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1319                 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1320                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1321         } else if (w83627thf == data->type) {
1322                 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1323         }
1324
1325         /* Read VRM & OVT Config only once */
1326         if (w83627thf == data->type || w83637hf == data->type) {
1327                 data->vrm_ovt =
1328                         w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1329                 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1330         } else {
1331                 /* Convert VID to voltage based on default VRM */
1332                 data->vrm = vid_which_vrm();
1333         }
1334
1335         tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1336         for (i = 1; i <= 3; i++) {
1337                 if (!(tmp & BIT_SCFG1[i - 1])) {
1338                         data->sens[i - 1] = W83781D_DEFAULT_BETA;
1339                 } else {
1340                         if (w83627hf_read_value
1341                             (client,
1342                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1343                                 data->sens[i - 1] = 1;
1344                         else
1345                                 data->sens[i - 1] = 2;
1346                 }
1347                 if ((type == w83697hf) && (i == 2))
1348                         break;
1349         }
1350
1351         if(init) {
1352                 /* Enable temp2 */
1353                 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1354                 if (tmp & 0x01) {
1355                         dev_warn(&client->dev, "Enabling temp2, readings "
1356                                  "might not make sense\n");
1357                         w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1358                                 tmp & 0xfe);
1359                 }
1360
1361                 /* Enable temp3 */
1362                 if (type != w83697hf) {
1363                         tmp = w83627hf_read_value(client,
1364                                 W83781D_REG_TEMP3_CONFIG);
1365                         if (tmp & 0x01) {
1366                                 dev_warn(&client->dev, "Enabling temp3, "
1367                                          "readings might not make sense\n");
1368                                 w83627hf_write_value(client,
1369                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1370                         }
1371                 }
1372         }
1373
1374         /* Start monitoring */
1375         w83627hf_write_value(client, W83781D_REG_CONFIG,
1376                             (w83627hf_read_value(client,
1377                                                 W83781D_REG_CONFIG) & 0xf7)
1378                             | 0x01);
1379 }
1380
1381 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1382 {
1383         struct i2c_client *client = to_i2c_client(dev);
1384         struct w83627hf_data *data = i2c_get_clientdata(client);
1385         int i;
1386
1387         down(&data->update_lock);
1388
1389         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1390             || !data->valid) {
1391                 for (i = 0; i <= 8; i++) {
1392                         /* skip missing sensors */
1393                         if (((data->type == w83697hf) && (i == 1)) ||
1394                             ((data->type == w83627thf || data->type == w83637hf)
1395                             && (i == 5 || i == 6)))
1396                                 continue;
1397                         data->in[i] =
1398                             w83627hf_read_value(client, W83781D_REG_IN(i));
1399                         data->in_min[i] =
1400                             w83627hf_read_value(client,
1401                                                W83781D_REG_IN_MIN(i));
1402                         data->in_max[i] =
1403                             w83627hf_read_value(client,
1404                                                W83781D_REG_IN_MAX(i));
1405                 }
1406                 for (i = 1; i <= 3; i++) {
1407                         data->fan[i - 1] =
1408                             w83627hf_read_value(client, W83781D_REG_FAN(i));
1409                         data->fan_min[i - 1] =
1410                             w83627hf_read_value(client,
1411                                                W83781D_REG_FAN_MIN(i));
1412                 }
1413                 for (i = 1; i <= 3; i++) {
1414                         u8 tmp = w83627hf_read_value(client,
1415                                 W836X7HF_REG_PWM(data->type, i));
1416                         /* bits 0-3 are reserved  in 627THF */
1417                         if (data->type == w83627thf)
1418                                 tmp &= 0xf0;
1419                         data->pwm[i - 1] = tmp;
1420                         if(i == 2 &&
1421                            (data->type == w83627hf || data->type == w83697hf))
1422                                 break;
1423                 }
1424
1425                 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1426                 data->temp_max =
1427                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1428                 data->temp_max_hyst =
1429                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1430                 data->temp_add[0] =
1431                     w83627hf_read_value(client, W83781D_REG_TEMP(2));
1432                 data->temp_max_add[0] =
1433                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1434                 data->temp_max_hyst_add[0] =
1435                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1436                 if (data->type != w83697hf) {
1437                         data->temp_add[1] =
1438                           w83627hf_read_value(client, W83781D_REG_TEMP(3));
1439                         data->temp_max_add[1] =
1440                           w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1441                         data->temp_max_hyst_add[1] =
1442                           w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1443                 }
1444
1445                 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1446                 data->fan_div[0] = (i >> 4) & 0x03;
1447                 data->fan_div[1] = (i >> 6) & 0x03;
1448                 if (data->type != w83697hf) {
1449                         data->fan_div[2] = (w83627hf_read_value(client,
1450                                                W83781D_REG_PIN) >> 6) & 0x03;
1451                 }
1452                 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1453                 data->fan_div[0] |= (i >> 3) & 0x04;
1454                 data->fan_div[1] |= (i >> 4) & 0x04;
1455                 if (data->type != w83697hf)
1456                         data->fan_div[2] |= (i >> 5) & 0x04;
1457                 data->alarms =
1458                     w83627hf_read_value(client, W83781D_REG_ALARM1) |
1459                     (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1460                     (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1461                 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1462                 data->beep_enable = i >> 7;
1463                 data->beep_mask = ((i & 0x7f) << 8) |
1464                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1465                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1466                 data->last_updated = jiffies;
1467                 data->valid = 1;
1468         }
1469
1470         up(&data->update_lock);
1471
1472         return data;
1473 }
1474
1475 static int __init sensors_w83627hf_init(void)
1476 {
1477         if (w83627hf_find(0x2e, &address)
1478          && w83627hf_find(0x4e, &address)) {
1479                 return -ENODEV;
1480         }
1481
1482         return i2c_isa_add_driver(&w83627hf_driver);
1483 }
1484
1485 static void __exit sensors_w83627hf_exit(void)
1486 {
1487         i2c_isa_del_driver(&w83627hf_driver);
1488 }
1489
1490 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1491               "Philip Edelbrock <phil@netroedge.com>, "
1492               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1493 MODULE_DESCRIPTION("W83627HF driver");
1494 MODULE_LICENSE("GPL");
1495
1496 module_init(sensors_w83627hf_init);
1497 module_exit(sensors_w83627hf_exit);