drivers/hwmon/w83627ehf.c

   1 /*
   2  *  w83627ehf - Driver for the hardware monitoring functionality of
   3  *              the Winbond W83627EHF Super-I/O chip
   4  *  Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   5  *  Copyright (C) 2006  Yuan Mu (Winbond),
   6  *                      Rudolf Marek <r.marek@assembler.cz>
   7  *                      David Hubbard <david.c.hubbard@gmail.com>
   8  *                      Daniel J Blueman <daniel.blueman@gmail.com>
   9  *  Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  10  *
  11  *  Shamelessly ripped from the w83627hf driver
  12  *  Copyright (C) 2003  Mark Studebaker
  13  *
  14  *  Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  15  *  in testing and debugging this driver.
  16  *
  17  *  This driver also supports the W83627EHG, which is the lead-free
  18  *  version of the W83627EHF.
  19  *
  20  *  This program is free software; you can redistribute it and/or modify
  21  *  it under the terms of the GNU General Public License as published by
  22  *  the Free Software Foundation; either version 2 of the License, or
  23  *  (at your option) any later version.
  24  *
  25  *  This program is distributed in the hope that it will be useful,
  26  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  *  GNU General Public License for more details.
  29  *
  30  *  You should have received a copy of the GNU General Public License
  31  *  along with this program; if not, write to the Free Software
  32  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  33  *
  34  *  Supports the following chips:
  35  *
  36  *  Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  37  *  w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  38  *                                             0x8860 0xa1
  39  *  w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  40  *  w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  41  *  w83627uhg    8      2       2       3      0xa230 0xc1    0x5ca3
  42  *  w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  43  *  w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  44  *  nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  45  *  nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63
  64 enum kinds {
  65         w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
  66         w83667hg, w83667hg_b, nct6775, nct6776,
  67 };
  68
  69 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  70 static const char * const w83627ehf_device_names[] = {
  71         "w83627ehf",
  72         "w83627dhg",
  73         "w83627dhg",
  74         "w83627uhg",
  75         "w83667hg",
  76         "w83667hg",
  77         "nct6775",
  78         "nct6776",
  79 };
  80
  81 static unsigned short force_id;
  82 module_param(force_id, ushort, 0);
  83 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  84
  85 static unsigned short fan_debounce;
  86 module_param(fan_debounce, ushort, 0);
  87 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  88
  89 #define DRVNAME "w83627ehf"
  90
  91 /*
  92  * Super-I/O constants and functions
  93  */
  94
  95 #define W83627EHF_LD_HWM        0x0b
  96 #define W83667HG_LD_VID         0x0d
  97
  98 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  99 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 100 #define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
 101 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 102 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 103 #define SIO_REG_VID_CTRL        0xF0    /* VID control */
 104 #define SIO_REG_VID_DATA        0xF1    /* VID data */
 105
 106 #define SIO_W83627EHF_ID        0x8850
 107 #define SIO_W83627EHG_ID        0x8860
 108 #define SIO_W83627DHG_ID        0xa020
 109 #define SIO_W83627DHG_P_ID      0xb070
 110 #define SIO_W83627UHG_ID        0xa230
 111 #define SIO_W83667HG_ID         0xa510
 112 #define SIO_W83667HG_B_ID       0xb350
 113 #define SIO_NCT6775_ID          0xb470
 114 #define SIO_NCT6776_ID          0xc330
 115 #define SIO_ID_MASK             0xFFF0
 116
 117 static inline void
 118 superio_outb(int ioreg, int reg, int val)
 119 {
 120         outb(reg, ioreg);
 121         outb(val, ioreg + 1);
 122 }
 123
 124 static inline int
 125 superio_inb(int ioreg, int reg)
 126 {
 127         outb(reg, ioreg);
 128         return inb(ioreg + 1);
 129 }
 130
 131 static inline void
 132 superio_select(int ioreg, int ld)
 133 {
 134         outb(SIO_REG_LDSEL, ioreg);
 135         outb(ld, ioreg + 1);
 136 }
 137
 138 static inline int
 139 superio_enter(int ioreg)
 140 {
 141         if (!request_muxed_region(ioreg, 2, DRVNAME))
 142                 return -EBUSY;
 143
 144         outb(0x87, ioreg);
 145         outb(0x87, ioreg);
 146
 147         return 0;
 148 }
 149
 150 static inline void
 151 superio_exit(int ioreg)
 152 {
 153         outb(0xaa, ioreg);
 154         outb(0x02, ioreg);
 155         outb(0x02, ioreg + 1);
 156         release_region(ioreg, 2);
 157 }
 158
 159 /*
 160  * ISA constants
 161  */
 162
 163 #define IOREGION_ALIGNMENT      (~7)
 164 #define IOREGION_OFFSET         5
 165 #define IOREGION_LENGTH         2
 166 #define ADDR_REG_OFFSET         0
 167 #define DATA_REG_OFFSET         1
 168
 169 #define W83627EHF_REG_BANK              0x4E
 170 #define W83627EHF_REG_CONFIG            0x40
 171
 172 /*
 173  * Not currently used:
 174  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 175  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 176  * REG_MAN_ID is at port 0x4f
 177  * REG_CHIP_ID is at port 0x58
 178  */
 179
 180 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 181 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 182
 183 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 184 #define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 185                                          (0x554 + (((nr) - 7) * 2)))
 186 #define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 187                                          (0x555 + (((nr) - 7) * 2)))
 188 #define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 189                                          (0x550 + (nr) - 7))
 190
 191 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 192 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 193 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 194 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 195
 196 /* Fan clock dividers are spread over the following five registers */
 197 #define W83627EHF_REG_FANDIV1           0x47
 198 #define W83627EHF_REG_FANDIV2           0x4B
 199 #define W83627EHF_REG_VBAT              0x5D
 200 #define W83627EHF_REG_DIODE             0x59
 201 #define W83627EHF_REG_SMI_OVT           0x4C
 202
 203 /* NCT6775F has its own fan divider registers */
 204 #define NCT6775_REG_FANDIV1             0x506
 205 #define NCT6775_REG_FANDIV2             0x507
 206 #define NCT6775_REG_FAN_DEBOUNCE        0xf0
 207
 208 #define W83627EHF_REG_ALARM1            0x459
 209 #define W83627EHF_REG_ALARM2            0x45A
 210 #define W83627EHF_REG_ALARM3            0x45B
 211
 212 #define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 213 #define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 214
 215 /* SmartFan registers */
 216 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 217 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 218
 219 /* DC or PWM output fan configuration */
 220 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 221         0x04,                   /* SYS FAN0 output mode and PWM mode */
 222         0x04,                   /* CPU FAN0 output mode and PWM mode */
 223         0x12,                   /* AUX FAN mode */
 224         0x62,                   /* CPU FAN1 mode */
 225 };
 226
 227 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 228 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 229
 230 /* FAN Duty Cycle, be used to control */
 231 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 232 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 233 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 234
 235 /* Advanced Fan control, some values are common for all fans */
 236 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 237 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 238 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 239
 240 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 241                                                 = { 0xff, 0x67, 0xff, 0x69 };
 242 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 243                                                 = { 0xff, 0x68, 0xff, 0x6a };
 244
 245 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 246 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 247                                                 = { 0x68, 0x6a, 0x6c };
 248
 249 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 250
 251 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 252 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 253 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 254 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 255 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 256 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 257 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 258 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 259 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 260 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 261
 262 static const u16 NCT6775_REG_TEMP[]
 263         = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 264 static const u16 NCT6775_REG_TEMP_CONFIG[]
 265         = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 266 static const u16 NCT6775_REG_TEMP_HYST[]
 267         = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 268 static const u16 NCT6775_REG_TEMP_OVER[]
 269         = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 270 static const u16 NCT6775_REG_TEMP_SOURCE[]
 271         = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 272
 273 static const char *const w83667hg_b_temp_label[] = {
 274         "SYSTIN",
 275         "CPUTIN",
 276         "AUXTIN",
 277         "AMDTSI",
 278         "PECI Agent 1",
 279         "PECI Agent 2",
 280         "PECI Agent 3",
 281         "PECI Agent 4"
 282 };
 283
 284 static const char *const nct6775_temp_label[] = {
 285         "",
 286         "SYSTIN",
 287         "CPUTIN",
 288         "AUXTIN",
 289         "AMD SB-TSI",
 290         "PECI Agent 0",
 291         "PECI Agent 1",
 292         "PECI Agent 2",
 293         "PECI Agent 3",
 294         "PECI Agent 4",
 295         "PECI Agent 5",
 296         "PECI Agent 6",
 297         "PECI Agent 7",
 298         "PCH_CHIP_CPU_MAX_TEMP",
 299         "PCH_CHIP_TEMP",
 300         "PCH_CPU_TEMP",
 301         "PCH_MCH_TEMP",
 302         "PCH_DIM0_TEMP",
 303         "PCH_DIM1_TEMP",
 304         "PCH_DIM2_TEMP",
 305         "PCH_DIM3_TEMP"
 306 };
 307
 308 static const char *const nct6776_temp_label[] = {
 309         "",
 310         "SYSTIN",
 311         "CPUTIN",
 312         "AUXTIN",
 313         "SMBUSMASTER 0",
 314         "SMBUSMASTER 1",
 315         "SMBUSMASTER 2",
 316         "SMBUSMASTER 3",
 317         "SMBUSMASTER 4",
 318         "SMBUSMASTER 5",
 319         "SMBUSMASTER 6",
 320         "SMBUSMASTER 7",
 321         "PECI Agent 0",
 322         "PECI Agent 1",
 323         "PCH_CHIP_CPU_MAX_TEMP",
 324         "PCH_CHIP_TEMP",
 325         "PCH_CPU_TEMP",
 326         "PCH_MCH_TEMP",
 327         "PCH_DIM0_TEMP",
 328         "PCH_DIM1_TEMP",
 329         "PCH_DIM2_TEMP",
 330         "PCH_DIM3_TEMP",
 331         "BYTE_TEMP"
 332 };
 333
 334 #define NUM_REG_TEMP    ARRAY_SIZE(NCT6775_REG_TEMP)
 335
 336 static int is_word_sized(u16 reg)
 337 {
 338         return ((((reg & 0xff00) == 0x100
 339               || (reg & 0xff00) == 0x200)
 340              && ((reg & 0x00ff) == 0x50
 341               || (reg & 0x00ff) == 0x53
 342               || (reg & 0x00ff) == 0x55))
 343              || (reg & 0xfff0) == 0x630
 344              || reg == 0x640 || reg == 0x642
 345              || ((reg & 0xfff0) == 0x650
 346                  && (reg & 0x000f) >= 0x06)
 347              || reg == 0x73 || reg == 0x75 || reg == 0x77
 348                 );
 349 }
 350
 351 /*
 352  * Conversions
 353  */
 354
 355 /* 1 is PWM mode, output in ms */
 356 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 357 {
 358         return mode ? 100 * reg : 400 * reg;
 359 }
 360
 361 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 362 {
 363         return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),
 364                          1, 255);
 365 }
 366
 367 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 368 {
 369         if (reg == 0 || reg == 255)
 370                 return 0;
 371         return 1350000U / (reg << divreg);
 372 }
 373
 374 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 375 {
 376         if ((reg & 0xff1f) == 0xff1f)
 377                 return 0;
 378
 379         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 380
 381         if (reg == 0)
 382                 return 0;
 383
 384         return 1350000U / reg;
 385 }
 386
 387 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 388 {
 389         if (reg == 0 || reg == 0xffff)
 390                 return 0;
 391
 392         /*
 393          * Even though the registers are 16 bit wide, the fan divisor
 394          * still applies.
 395          */
 396         return 1350000U / (reg << divreg);
 397 }
 398
 399 static inline unsigned int
 400 div_from_reg(u8 reg)
 401 {
 402         return 1 << reg;
 403 }
 404
 405 /*
 406  * Some of the voltage inputs have internal scaling, the tables below
 407  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 408  */
 409 static const u16 scale_in_common[10] = {
 410         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
 411 };
 412 static const u16 scale_in_w83627uhg[9] = {
 413         800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
 414 };
 415
 416 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
 417 {
 418         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 419 }
 420
 421 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
 422 {
 423         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 424 }
 425
 426 /*
 427  * Data structures and manipulation thereof
 428  */
 429
 430 struct w83627ehf_data {
 431         int addr;       /* IO base of hw monitor block */
 432         const char *name;
 433
 434         struct device *hwmon_dev;
 435         struct mutex lock;
 436
 437         u16 reg_temp[NUM_REG_TEMP];
 438         u16 reg_temp_over[NUM_REG_TEMP];
 439         u16 reg_temp_hyst[NUM_REG_TEMP];
 440         u16 reg_temp_config[NUM_REG_TEMP];
 441         u8 temp_src[NUM_REG_TEMP];
 442         const char * const *temp_label;
 443
 444         const u16 *REG_PWM;
 445         const u16 *REG_TARGET;
 446         const u16 *REG_FAN;
 447         const u16 *REG_FAN_MIN;
 448         const u16 *REG_FAN_START_OUTPUT;
 449         const u16 *REG_FAN_STOP_OUTPUT;
 450         const u16 *REG_FAN_STOP_TIME;
 451         const u16 *REG_FAN_MAX_OUTPUT;
 452         const u16 *REG_FAN_STEP_OUTPUT;
 453         const u16 *scale_in;
 454
 455         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 456         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 457
 458         struct mutex update_lock;
 459         char valid;             /* !=0 if following fields are valid */
 460         unsigned long last_updated;     /* In jiffies */
 461
 462         /* Register values */
 463         u8 bank;                /* current register bank */
 464         u8 in_num;              /* number of in inputs we have */
 465         u8 in[10];              /* Register value */
 466         u8 in_max[10];          /* Register value */
 467         u8 in_min[10];          /* Register value */
 468         unsigned int rpm[5];
 469         u16 fan_min[5];
 470         u8 fan_div[5];
 471         u8 has_fan;             /* some fan inputs can be disabled */
 472         u8 has_fan_min;         /* some fans don't have min register */
 473         bool has_fan_div;
 474         u8 temp_type[3];
 475         s8 temp_offset[3];
 476         s16 temp[9];
 477         s16 temp_max[9];
 478         s16 temp_max_hyst[9];
 479         u32 alarms;
 480         u8 caseopen;
 481
 482         u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 483         u8 pwm_enable[4]; /* 1->manual
 484                            * 2->thermal cruise mode (also called SmartFan I)
 485                            * 3->fan speed cruise mode
 486                            * 4->variable thermal cruise (also called
 487                            * SmartFan III)
 488                            * 5->enhanced variable thermal cruise (also called
 489                            * SmartFan IV)
 490                            */
 491         u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 492         u8 pwm_num;             /* number of pwm */
 493         u8 pwm[4];
 494         u8 target_temp[4];
 495         u8 tolerance[4];
 496
 497         u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 498         u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 499         u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 500         u8 fan_max_output[4]; /* maximum fan speed */
 501         u8 fan_step_output[4]; /* rate of change output value */
 502
 503         u8 vid;
 504         u8 vrm;
 505
 506         u16 have_temp;
 507         u16 have_temp_offset;
 508         u8 in6_skip:1;
 509         u8 temp3_val_only:1;
 510
 511 #ifdef CONFIG_PM
 512         /* Remember extra register values over suspend/resume */
 513         u8 vbat;
 514         u8 fandiv1;
 515         u8 fandiv2;
 516 #endif
 517 };
 518
 519 struct w83627ehf_sio_data {
 520         int sioreg;
 521         enum kinds kind;
 522 };
 523
 524 /*
 525  * On older chips, only registers 0x50-0x5f are banked.
 526  * On more recent chips, all registers are banked.
 527  * Assume that is the case and set the bank number for each access.
 528  * Cache the bank number so it only needs to be set if it changes.
 529  */
 530 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 531 {
 532         u8 bank = reg >> 8;
 533         if (data->bank != bank) {
 534                 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 535                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 536                 data->bank = bank;
 537         }
 538 }
 539
 540 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 541 {
 542         int res, word_sized = is_word_sized(reg);
 543
 544         mutex_lock(&data->lock);
 545
 546         w83627ehf_set_bank(data, reg);
 547         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 548         res = inb_p(data->addr + DATA_REG_OFFSET);
 549         if (word_sized) {
 550                 outb_p((reg & 0xff) + 1,
 551                        data->addr + ADDR_REG_OFFSET);
 552                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 553         }
 554
 555         mutex_unlock(&data->lock);
 556         return res;
 557 }
 558
 559 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 560                                  u16 value)
 561 {
 562         int word_sized = is_word_sized(reg);
 563
 564         mutex_lock(&data->lock);
 565
 566         w83627ehf_set_bank(data, reg);
 567         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 568         if (word_sized) {
 569                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 570                 outb_p((reg & 0xff) + 1,
 571                        data->addr + ADDR_REG_OFFSET);
 572         }
 573         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 574
 575         mutex_unlock(&data->lock);
 576         return 0;
 577 }
 578
 579 /* We left-align 8-bit temperature values to make the code simpler */
 580 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 581 {
 582         u16 res;
 583
 584         res = w83627ehf_read_value(data, reg);
 585         if (!is_word_sized(reg))
 586                 res <<= 8;
 587
 588         return res;
 589 }
 590
 591 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 592                                        u16 value)
 593 {
 594         if (!is_word_sized(reg))
 595                 value >>= 8;
 596         return w83627ehf_write_value(data, reg, value);
 597 }
 598
 599 /* This function assumes that the caller holds data->update_lock */
 600 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 601 {
 602         u8 reg;
 603
 604         switch (nr) {
 605         case 0:
 606                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 607                     | (data->fan_div[0] & 0x7);
 608                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 609                 break;
 610         case 1:
 611                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 612                     | ((data->fan_div[1] << 4) & 0x70);
 613                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 614                 break;
 615         case 2:
 616                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 617                     | (data->fan_div[2] & 0x7);
 618                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 619                 break;
 620         case 3:
 621                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 622                     | ((data->fan_div[3] << 4) & 0x70);
 623                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 624                 break;
 625         }
 626 }
 627
 628 /* This function assumes that the caller holds data->update_lock */
 629 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 630 {
 631         u8 reg;
 632
 633         switch (nr) {
 634         case 0:
 635                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 636                     | ((data->fan_div[0] & 0x03) << 4);
 637                 /* fan5 input control bit is write only, compute the value */
 638                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 639                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 640                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 641                     | ((data->fan_div[0] & 0x04) << 3);
 642                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 643                 break;
 644         case 1:
 645                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 646                     | ((data->fan_div[1] & 0x03) << 6);
 647                 /* fan5 input control bit is write only, compute the value */
 648                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 649                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 650                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 651                     | ((data->fan_div[1] & 0x04) << 4);
 652                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 653                 break;
 654         case 2:
 655                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 656                     | ((data->fan_div[2] & 0x03) << 6);
 657                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 658                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 659                     | ((data->fan_div[2] & 0x04) << 5);
 660                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 661                 break;
 662         case 3:
 663                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 664                     | (data->fan_div[3] & 0x03);
 665                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 666                 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 667                     | ((data->fan_div[3] & 0x04) << 5);
 668                 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 669                 break;
 670         case 4:
 671                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 672                     | ((data->fan_div[4] & 0x03) << 2)
 673                     | ((data->fan_div[4] & 0x04) << 5);
 674                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 675                 break;
 676         }
 677 }
 678
 679 static void w83627ehf_write_fan_div_common(struct device *dev,
 680                                            struct w83627ehf_data *data, int nr)
 681 {
 682         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 683
 684         if (sio_data->kind == nct6776)
 685                 ; /* no dividers, do nothing */
 686         else if (sio_data->kind == nct6775)
 687                 nct6775_write_fan_div(data, nr);
 688         else
 689                 w83627ehf_write_fan_div(data, nr);
 690 }
 691
 692 static void nct6775_update_fan_div(struct w83627ehf_data *data)
 693 {
 694         u8 i;
 695
 696         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 697         data->fan_div[0] = i & 0x7;
 698         data->fan_div[1] = (i & 0x70) >> 4;
 699         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 700         data->fan_div[2] = i & 0x7;
 701         if (data->has_fan & (1<<3))
 702                 data->fan_div[3] = (i & 0x70) >> 4;
 703 }
 704
 705 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 706 {
 707         int i;
 708
 709         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 710         data->fan_div[0] = (i >> 4) & 0x03;
 711         data->fan_div[1] = (i >> 6) & 0x03;
 712         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 713         data->fan_div[2] = (i >> 6) & 0x03;
 714         i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 715         data->fan_div[0] |= (i >> 3) & 0x04;
 716         data->fan_div[1] |= (i >> 4) & 0x04;
 717         data->fan_div[2] |= (i >> 5) & 0x04;
 718         if (data->has_fan & ((1 << 3) | (1 << 4))) {
 719                 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 720                 data->fan_div[3] = i & 0x03;
 721                 data->fan_div[4] = ((i >> 2) & 0x03)
 722                                  | ((i >> 5) & 0x04);
 723         }
 724         if (data->has_fan & (1 << 3)) {
 725                 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 726                 data->fan_div[3] |= (i >> 5) & 0x04;
 727         }
 728 }
 729
 730 static void w83627ehf_update_fan_div_common(struct device *dev,
 731                                             struct w83627ehf_data *data)
 732 {
 733         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 734
 735         if (sio_data->kind == nct6776)
 736                 ; /* no dividers, do nothing */
 737         else if (sio_data->kind == nct6775)
 738                 nct6775_update_fan_div(data);
 739         else
 740                 w83627ehf_update_fan_div(data);
 741 }
 742
 743 static void nct6775_update_pwm(struct w83627ehf_data *data)
 744 {
 745         int i;
 746         int pwmcfg, fanmodecfg;
 747
 748         for (i = 0; i < data->pwm_num; i++) {
 749                 pwmcfg = w83627ehf_read_value(data,
 750                                               W83627EHF_REG_PWM_ENABLE[i]);
 751                 fanmodecfg = w83627ehf_read_value(data,
 752                                                   NCT6775_REG_FAN_MODE[i]);
 753                 data->pwm_mode[i] =
 754                   ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 755                 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 756                 data->tolerance[i] = fanmodecfg & 0x0f;
 757                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 758         }
 759 }
 760
 761 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 762 {
 763         int i;
 764         int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 765
 766         for (i = 0; i < data->pwm_num; i++) {
 767                 if (!(data->has_fan & (1 << i)))
 768                         continue;
 769
 770                 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 771                 if (i != 1) {
 772                         pwmcfg = w83627ehf_read_value(data,
 773                                         W83627EHF_REG_PWM_ENABLE[i]);
 774                         tolerance = w83627ehf_read_value(data,
 775                                         W83627EHF_REG_TOLERANCE[i]);
 776                 }
 777                 data->pwm_mode[i] =
 778                         ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 779                 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 780                                        & 3) + 1;
 781                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 782
 783                 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 784         }
 785 }
 786
 787 static void w83627ehf_update_pwm_common(struct device *dev,
 788                                         struct w83627ehf_data *data)
 789 {
 790         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 791
 792         if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 793                 nct6775_update_pwm(data);
 794         else
 795                 w83627ehf_update_pwm(data);
 796 }
 797
 798 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 799 {
 800         struct w83627ehf_data *data = dev_get_drvdata(dev);
 801         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 802
 803         int i;
 804
 805         mutex_lock(&data->update_lock);
 806
 807         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 808          || !data->valid) {
 809                 /* Fan clock dividers */
 810                 w83627ehf_update_fan_div_common(dev, data);
 811
 812                 /* Measured voltages and limits */
 813                 for (i = 0; i < data->in_num; i++) {
 814                         if ((i == 6) && data->in6_skip)
 815                                 continue;
 816
 817                         data->in[i] = w83627ehf_read_value(data,
 818                                       W83627EHF_REG_IN(i));
 819                         data->in_min[i] = w83627ehf_read_value(data,
 820                                           W83627EHF_REG_IN_MIN(i));
 821                         data->in_max[i] = w83627ehf_read_value(data,
 822                                           W83627EHF_REG_IN_MAX(i));
 823                 }
 824
 825                 /* Measured fan speeds and limits */
 826                 for (i = 0; i < 5; i++) {
 827                         u16 reg;
 828
 829                         if (!(data->has_fan & (1 << i)))
 830                                 continue;
 831
 832                         reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 833                         data->rpm[i] = data->fan_from_reg(reg,
 834                                                           data->fan_div[i]);
 835
 836                         if (data->has_fan_min & (1 << i))
 837                                 data->fan_min[i] = w83627ehf_read_value(data,
 838                                            data->REG_FAN_MIN[i]);
 839
 840                         /*
 841                          * If we failed to measure the fan speed and clock
 842                          * divider can be increased, let's try that for next
 843                          * time
 844                          */
 845                         if (data->has_fan_div
 846                             && (reg >= 0xff || (sio_data->kind == nct6775
 847                                                 && reg == 0x00))
 848                             && data->fan_div[i] < 0x07) {
 849                                 dev_dbg(dev,
 850                                         "Increasing fan%d clock divider from %u to %u\n",
 851                                         i + 1, div_from_reg(data->fan_div[i]),
 852                                         div_from_reg(data->fan_div[i] + 1));
 853                                 data->fan_div[i]++;
 854                                 w83627ehf_write_fan_div_common(dev, data, i);
 855                                 /* Preserve min limit if possible */
 856                                 if ((data->has_fan_min & (1 << i))
 857                                  && data->fan_min[i] >= 2
 858                                  && data->fan_min[i] != 255)
 859                                         w83627ehf_write_value(data,
 860                                                 data->REG_FAN_MIN[i],
 861                                                 (data->fan_min[i] /= 2));
 862                         }
 863                 }
 864
 865                 w83627ehf_update_pwm_common(dev, data);
 866
 867                 for (i = 0; i < data->pwm_num; i++) {
 868                         if (!(data->has_fan & (1 << i)))
 869                                 continue;
 870
 871                         data->fan_start_output[i] =
 872                           w83627ehf_read_value(data,
 873                                                data->REG_FAN_START_OUTPUT[i]);
 874                         data->fan_stop_output[i] =
 875                           w83627ehf_read_value(data,
 876                                                data->REG_FAN_STOP_OUTPUT[i]);
 877                         data->fan_stop_time[i] =
 878                           w83627ehf_read_value(data,
 879                                                data->REG_FAN_STOP_TIME[i]);
 880
 881                         if (data->REG_FAN_MAX_OUTPUT &&
 882                             data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 883                                 data->fan_max_output[i] =
 884                                   w83627ehf_read_value(data,
 885                                                 data->REG_FAN_MAX_OUTPUT[i]);
 886
 887                         if (data->REG_FAN_STEP_OUTPUT &&
 888                             data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 889                                 data->fan_step_output[i] =
 890                                   w83627ehf_read_value(data,
 891                                                 data->REG_FAN_STEP_OUTPUT[i]);
 892
 893                         data->target_temp[i] =
 894                                 w83627ehf_read_value(data,
 895                                         data->REG_TARGET[i]) &
 896                                         (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 897                 }
 898
 899                 /* Measured temperatures and limits */
 900                 for (i = 0; i < NUM_REG_TEMP; i++) {
 901                         if (!(data->have_temp & (1 << i)))
 902                                 continue;
 903                         data->temp[i] = w83627ehf_read_temp(data,
 904                                                 data->reg_temp[i]);
 905                         if (data->reg_temp_over[i])
 906                                 data->temp_max[i]
 907                                   = w83627ehf_read_temp(data,
 908                                                 data->reg_temp_over[i]);
 909                         if (data->reg_temp_hyst[i])
 910                                 data->temp_max_hyst[i]
 911                                   = w83627ehf_read_temp(data,
 912                                                 data->reg_temp_hyst[i]);
 913                         if (i > 2)
 914                                 continue;
 915                         if (data->have_temp_offset & (1 << i))
 916                                 data->temp_offset[i]
 917                                   = w83627ehf_read_value(data,
 918                                                 W83627EHF_REG_TEMP_OFFSET[i]);
 919                 }
 920
 921                 data->alarms = w83627ehf_read_value(data,
 922                                         W83627EHF_REG_ALARM1) |
 923                                (w83627ehf_read_value(data,
 924                                         W83627EHF_REG_ALARM2) << 8) |
 925                                (w83627ehf_read_value(data,
 926                                         W83627EHF_REG_ALARM3) << 16);
 927
 928                 data->caseopen = w83627ehf_read_value(data,
 929                                                 W83627EHF_REG_CASEOPEN_DET);
 930
 931                 data->last_updated = jiffies;
 932                 data->valid = 1;
 933         }
 934
 935         mutex_unlock(&data->update_lock);
 936         return data;
 937 }
 938
 939 /*
 940  * Sysfs callback functions
 941  */
 942 #define show_in_reg(reg) \
 943 static ssize_t \
 944 show_##reg(struct device *dev, struct device_attribute *attr, \
 945            char *buf) \
 946 { \
 947         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 948         struct sensor_device_attribute *sensor_attr = \
 949                 to_sensor_dev_attr(attr); \
 950         int nr = sensor_attr->index; \
 951         return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
 952                        data->scale_in)); \
 953 }
 954 show_in_reg(in)
 955 show_in_reg(in_min)
 956 show_in_reg(in_max)
 957
 958 #define store_in_reg(REG, reg) \
 959 static ssize_t \
 960 store_in_##reg(struct device *dev, struct device_attribute *attr, \
 961                const char *buf, size_t count) \
 962 { \
 963         struct w83627ehf_data *data = dev_get_drvdata(dev); \
 964         struct sensor_device_attribute *sensor_attr = \
 965                 to_sensor_dev_attr(attr); \
 966         int nr = sensor_attr->index; \
 967         unsigned long val; \
 968         int err; \
 969         err = kstrtoul(buf, 10, &val); \
 970         if (err < 0) \
 971                 return err; \
 972         mutex_lock(&data->update_lock); \
 973         data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
 974         w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 975                               data->in_##reg[nr]); \
 976         mutex_unlock(&data->update_lock); \
 977         return count; \
 978 }
 979
 980 store_in_reg(MIN, min)
 981 store_in_reg(MAX, max)
 982
 983 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 984                           char *buf)
 985 {
 986         struct w83627ehf_data *data = w83627ehf_update_device(dev);
 987         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 988         int nr = sensor_attr->index;
 989         return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 990 }
 991
 992 static struct sensor_device_attribute sda_in_input[] = {
 993         SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 994         SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 995         SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 996         SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 997         SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 998         SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 999         SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
1000         SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
1001         SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
1002         SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
1003 };
1004
1005 static struct sensor_device_attribute sda_in_alarm[] = {
1006         SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
1007         SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
1008         SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
1009         SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
1010         SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
1011         SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
1012         SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
1013         SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
1014         SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
1015         SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
1016 };
1017
1018 static struct sensor_device_attribute sda_in_min[] = {
1019         SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
1020         SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
1021         SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
1022         SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
1023         SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
1024         SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
1025         SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
1026         SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
1027         SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
1028         SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
1029 };
1030
1031 static struct sensor_device_attribute sda_in_max[] = {
1032         SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
1033         SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
1034         SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
1035         SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
1036         SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
1037         SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
1038         SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
1039         SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
1040         SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
1041         SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1042 };
1043
1044 static ssize_t
1045 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1046 {
1047         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1048         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1049         int nr = sensor_attr->index;
1050         return sprintf(buf, "%d\n", data->rpm[nr]);
1051 }
1052
1053 static ssize_t
1054 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1055 {
1056         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1057         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1058         int nr = sensor_attr->index;
1059         return sprintf(buf, "%d\n",
1060                        data->fan_from_reg_min(data->fan_min[nr],
1061                                               data->fan_div[nr]));
1062 }
1063
1064 static ssize_t
1065 show_fan_div(struct device *dev, struct device_attribute *attr,
1066              char *buf)
1067 {
1068         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1069         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1070         int nr = sensor_attr->index;
1071         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1072 }
1073
1074 static ssize_t
1075 store_fan_min(struct device *dev, struct device_attribute *attr,
1076               const char *buf, size_t count)
1077 {
1078         struct w83627ehf_data *data = dev_get_drvdata(dev);
1079         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1080         int nr = sensor_attr->index;
1081         unsigned long val;
1082         int err;
1083         unsigned int reg;
1084         u8 new_div;
1085
1086         err = kstrtoul(buf, 10, &val);
1087         if (err < 0)
1088                 return err;
1089
1090         mutex_lock(&data->update_lock);
1091         if (!data->has_fan_div) {
1092                 /*
1093                  * Only NCT6776F for now, so we know that this is a 13 bit
1094                  * register
1095                  */
1096                 if (!val) {
1097                         val = 0xff1f;
1098                 } else {
1099                         if (val > 1350000U)
1100                                 val = 135000U;
1101                         val = 1350000U / val;
1102                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1103                 }
1104                 data->fan_min[nr] = val;
1105                 goto done;      /* Leave fan divider alone */
1106         }
1107         if (!val) {
1108                 /* No min limit, alarm disabled */
1109                 data->fan_min[nr] = 255;
1110                 new_div = data->fan_div[nr]; /* No change */
1111                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1112         } else if ((reg = 1350000U / val) >= 128 * 255) {
1113                 /*
1114                  * Speed below this value cannot possibly be represented,
1115                  * even with the highest divider (128)
1116                  */
1117                 data->fan_min[nr] = 254;
1118                 new_div = 7; /* 128 == (1 << 7) */
1119                 dev_warn(dev,
1120                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1121                          nr + 1, val, data->fan_from_reg_min(254, 7));
1122         } else if (!reg) {
1123                 /*
1124                  * Speed above this value cannot possibly be represented,
1125                  * even with the lowest divider (1)
1126                  */
1127                 data->fan_min[nr] = 1;
1128                 new_div = 0; /* 1 == (1 << 0) */
1129                 dev_warn(dev,
1130                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1131                          nr + 1, val, data->fan_from_reg_min(1, 0));
1132         } else {
1133                 /*
1134                  * Automatically pick the best divider, i.e. the one such
1135                  * that the min limit will correspond to a register value
1136                  * in the 96..192 range
1137                  */
1138                 new_div = 0;
1139                 while (reg > 192 && new_div < 7) {
1140                         reg >>= 1;
1141                         new_div++;
1142                 }
1143                 data->fan_min[nr] = reg;
1144         }
1145
1146         /*
1147          * Write both the fan clock divider (if it changed) and the new
1148          * fan min (unconditionally)
1149          */
1150         if (new_div != data->fan_div[nr]) {
1151                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1152                         nr + 1, div_from_reg(data->fan_div[nr]),
1153                         div_from_reg(new_div));
1154                 data->fan_div[nr] = new_div;
1155                 w83627ehf_write_fan_div_common(dev, data, nr);
1156                 /* Give the chip time to sample a new speed value */
1157                 data->last_updated = jiffies;
1158         }
1159 done:
1160         w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1161                               data->fan_min[nr]);
1162         mutex_unlock(&data->update_lock);
1163
1164         return count;
1165 }
1166
1167 static struct sensor_device_attribute sda_fan_input[] = {
1168         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1169         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1170         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1171         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1172         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1173 };
1174
1175 static struct sensor_device_attribute sda_fan_alarm[] = {
1176         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1177         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1178         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1179         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1180         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1181 };
1182
1183 static struct sensor_device_attribute sda_fan_min[] = {
1184         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1185                     store_fan_min, 0),
1186         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1187                     store_fan_min, 1),
1188         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1189                     store_fan_min, 2),
1190         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1191                     store_fan_min, 3),
1192         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1193                     store_fan_min, 4),
1194 };
1195
1196 static struct sensor_device_attribute sda_fan_div[] = {
1197         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1198         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1199         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1200         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1201         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1202 };
1203
1204 static ssize_t
1205 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1206 {
1207         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1208         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1209         int nr = sensor_attr->index;
1210         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1211 }
1212
1213 #define show_temp_reg(addr, reg) \
1214 static ssize_t \
1215 show_##reg(struct device *dev, struct device_attribute *attr, \
1216            char *buf) \
1217 { \
1218         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1219         struct sensor_device_attribute *sensor_attr = \
1220                 to_sensor_dev_attr(attr); \
1221         int nr = sensor_attr->index; \
1222         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1223 }
1224 show_temp_reg(reg_temp, temp);
1225 show_temp_reg(reg_temp_over, temp_max);
1226 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1227
1228 #define store_temp_reg(addr, reg) \
1229 static ssize_t \
1230 store_##reg(struct device *dev, struct device_attribute *attr, \
1231             const char *buf, size_t count) \
1232 { \
1233         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1234         struct sensor_device_attribute *sensor_attr = \
1235                 to_sensor_dev_attr(attr); \
1236         int nr = sensor_attr->index; \
1237         int err; \
1238         long val; \
1239         err = kstrtol(buf, 10, &val); \
1240         if (err < 0) \
1241                 return err; \
1242         mutex_lock(&data->update_lock); \
1243         data->reg[nr] = LM75_TEMP_TO_REG(val); \
1244         w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1245         mutex_unlock(&data->update_lock); \
1246         return count; \
1247 }
1248 store_temp_reg(reg_temp_over, temp_max);
1249 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1250
1251 static ssize_t
1252 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1253 {
1254         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1255         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1256
1257         return sprintf(buf, "%d\n",
1258                        data->temp_offset[sensor_attr->index] * 1000);
1259 }
1260
1261 static ssize_t
1262 store_temp_offset(struct device *dev, struct device_attribute *attr,
1263                   const char *buf, size_t count)
1264 {
1265         struct w83627ehf_data *data = dev_get_drvdata(dev);
1266         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1267         int nr = sensor_attr->index;
1268         long val;
1269         int err;
1270
1271         err = kstrtol(buf, 10, &val);
1272         if (err < 0)
1273                 return err;
1274
1275         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1276
1277         mutex_lock(&data->update_lock);
1278         data->temp_offset[nr] = val;
1279         w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);
1280         mutex_unlock(&data->update_lock);
1281         return count;
1282 }
1283
1284 static ssize_t
1285 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1286 {
1287         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1288         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1289         int nr = sensor_attr->index;
1290         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1291 }
1292
1293 static struct sensor_device_attribute sda_temp_input[] = {
1294         SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1295         SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1296         SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1297         SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1298         SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1299         SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1300         SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1301         SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1302         SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1303 };
1304
1305 static struct sensor_device_attribute sda_temp_label[] = {
1306         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1307         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1308         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1309         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1310         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1311         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1312         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1313         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1314         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1315 };
1316
1317 static struct sensor_device_attribute sda_temp_max[] = {
1318         SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1319                     store_temp_max, 0),
1320         SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1321                     store_temp_max, 1),
1322         SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1323                     store_temp_max, 2),
1324         SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1325                     store_temp_max, 3),
1326         SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1327                     store_temp_max, 4),
1328         SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1329                     store_temp_max, 5),
1330         SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1331                     store_temp_max, 6),
1332         SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1333                     store_temp_max, 7),
1334         SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1335                     store_temp_max, 8),
1336 };
1337
1338 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1339         SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1340                     store_temp_max_hyst, 0),
1341         SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1342                     store_temp_max_hyst, 1),
1343         SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1344                     store_temp_max_hyst, 2),
1345         SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1346                     store_temp_max_hyst, 3),
1347         SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1348                     store_temp_max_hyst, 4),
1349         SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1350                     store_temp_max_hyst, 5),
1351         SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1352                     store_temp_max_hyst, 6),
1353         SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1354                     store_temp_max_hyst, 7),
1355         SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1356                     store_temp_max_hyst, 8),
1357 };
1358
1359 static struct sensor_device_attribute sda_temp_alarm[] = {
1360         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1361         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1362         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1363 };
1364
1365 static struct sensor_device_attribute sda_temp_type[] = {
1366         SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1367         SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1368         SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1369 };
1370
1371 static struct sensor_device_attribute sda_temp_offset[] = {
1372         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1373                     store_temp_offset, 0),
1374         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1375                     store_temp_offset, 1),
1376         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1377                     store_temp_offset, 2),
1378 };
1379
1380 #define show_pwm_reg(reg) \
1381 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1382                           char *buf) \
1383 { \
1384         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1385         struct sensor_device_attribute *sensor_attr = \
1386                 to_sensor_dev_attr(attr); \
1387         int nr = sensor_attr->index; \
1388         return sprintf(buf, "%d\n", data->reg[nr]); \
1389 }
1390
1391 show_pwm_reg(pwm_mode)
1392 show_pwm_reg(pwm_enable)
1393 show_pwm_reg(pwm)
1394
1395 static ssize_t
1396 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1397                         const char *buf, size_t count)
1398 {
1399         struct w83627ehf_data *data = dev_get_drvdata(dev);
1400         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1401         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1402         int nr = sensor_attr->index;
1403         unsigned long val;
1404         int err;
1405         u16 reg;
1406
1407         err = kstrtoul(buf, 10, &val);
1408         if (err < 0)
1409                 return err;
1410
1411         if (val > 1)
1412                 return -EINVAL;
1413
1414         /* On NCT67766F, DC mode is only supported for pwm1 */
1415         if (sio_data->kind == nct6776 && nr && val != 1)
1416                 return -EINVAL;
1417
1418         mutex_lock(&data->update_lock);
1419         reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1420         data->pwm_mode[nr] = val;
1421         reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1422         if (!val)
1423                 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1424         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1425         mutex_unlock(&data->update_lock);
1426         return count;
1427 }
1428
1429 static ssize_t
1430 store_pwm(struct device *dev, struct device_attribute *attr,
1431                         const char *buf, size_t count)
1432 {
1433         struct w83627ehf_data *data = dev_get_drvdata(dev);
1434         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1435         int nr = sensor_attr->index;
1436         unsigned long val;
1437         int err;
1438
1439         err = kstrtoul(buf, 10, &val);
1440         if (err < 0)
1441                 return err;
1442
1443         val = clamp_val(val, 0, 255);
1444
1445         mutex_lock(&data->update_lock);
1446         data->pwm[nr] = val;
1447         w83627ehf_write_value(data, data->REG_PWM[nr], val);
1448         mutex_unlock(&data->update_lock);
1449         return count;
1450 }
1451
1452 static ssize_t
1453 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1454                         const char *buf, size_t count)
1455 {
1456         struct w83627ehf_data *data = dev_get_drvdata(dev);
1457         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1458         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1459         int nr = sensor_attr->index;
1460         unsigned long val;
1461         int err;
1462         u16 reg;
1463
1464         err = kstrtoul(buf, 10, &val);
1465         if (err < 0)
1466                 return err;
1467
1468         if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1469                 return -EINVAL;
1470         /* SmartFan III mode is not supported on NCT6776F */
1471         if (sio_data->kind == nct6776 && val == 4)
1472                 return -EINVAL;
1473
1474         mutex_lock(&data->update_lock);
1475         data->pwm_enable[nr] = val;
1476         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1477                 reg = w83627ehf_read_value(data,
1478                                            NCT6775_REG_FAN_MODE[nr]);
1479                 reg &= 0x0f;
1480                 reg |= (val - 1) << 4;
1481                 w83627ehf_write_value(data,
1482                                       NCT6775_REG_FAN_MODE[nr], reg);
1483         } else {
1484                 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1485                 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1486                 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1487                 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1488         }
1489         mutex_unlock(&data->update_lock);
1490         return count;
1491 }
1492
1493
1494 #define show_tol_temp(reg) \
1495 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1496                                 char *buf) \
1497 { \
1498         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1499         struct sensor_device_attribute *sensor_attr = \
1500                 to_sensor_dev_attr(attr); \
1501         int nr = sensor_attr->index; \
1502         return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1503 }
1504
1505 show_tol_temp(tolerance)
1506 show_tol_temp(target_temp)
1507
1508 static ssize_t
1509 store_target_temp(struct device *dev, struct device_attribute *attr,
1510                         const char *buf, size_t count)
1511 {
1512         struct w83627ehf_data *data = dev_get_drvdata(dev);
1513         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1514         int nr = sensor_attr->index;
1515         long val;
1516         int err;
1517
1518         err = kstrtol(buf, 10, &val);
1519         if (err < 0)
1520                 return err;
1521
1522         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1523
1524         mutex_lock(&data->update_lock);
1525         data->target_temp[nr] = val;
1526         w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1527         mutex_unlock(&data->update_lock);
1528         return count;
1529 }
1530
1531 static ssize_t
1532 store_tolerance(struct device *dev, struct device_attribute *attr,
1533                         const char *buf, size_t count)
1534 {
1535         struct w83627ehf_data *data = dev_get_drvdata(dev);
1536         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1537         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1538         int nr = sensor_attr->index;
1539         u16 reg;
1540         long val;
1541         int err;
1542
1543         err = kstrtol(buf, 10, &val);
1544         if (err < 0)
1545                 return err;
1546
1547         /* Limit the temp to 0C - 15C */
1548         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1549
1550         mutex_lock(&data->update_lock);
1551         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1552                 /* Limit tolerance further for NCT6776F */
1553                 if (sio_data->kind == nct6776 && val > 7)
1554                         val = 7;
1555                 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1556                 reg = (reg & 0xf0) | val;
1557                 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1558         } else {
1559                 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1560                 if (nr == 1)
1561                         reg = (reg & 0x0f) | (val << 4);
1562                 else
1563                         reg = (reg & 0xf0) | val;
1564                 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1565         }
1566         data->tolerance[nr] = val;
1567         mutex_unlock(&data->update_lock);
1568         return count;
1569 }
1570
1571 static struct sensor_device_attribute sda_pwm[] = {
1572         SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1573         SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1574         SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1575         SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1576 };
1577
1578 static struct sensor_device_attribute sda_pwm_mode[] = {
1579         SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1580                     store_pwm_mode, 0),
1581         SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1582                     store_pwm_mode, 1),
1583         SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1584                     store_pwm_mode, 2),
1585         SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1586                     store_pwm_mode, 3),
1587 };
1588
1589 static struct sensor_device_attribute sda_pwm_enable[] = {
1590         SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1591                     store_pwm_enable, 0),
1592         SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1593                     store_pwm_enable, 1),
1594         SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1595                     store_pwm_enable, 2),
1596         SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1597                     store_pwm_enable, 3),
1598 };
1599
1600 static struct sensor_device_attribute sda_target_temp[] = {
1601         SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1602                     store_target_temp, 0),
1603         SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1604                     store_target_temp, 1),
1605         SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1606                     store_target_temp, 2),
1607         SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1608                     store_target_temp, 3),
1609 };
1610
1611 static struct sensor_device_attribute sda_tolerance[] = {
1612         SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1613                     store_tolerance, 0),
1614         SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1615                     store_tolerance, 1),
1616         SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1617                     store_tolerance, 2),
1618         SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1619                     store_tolerance, 3),
1620 };
1621
1622 /* Smart Fan registers */
1623
1624 #define fan_functions(reg, REG) \
1625 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1626                        char *buf) \
1627 { \
1628         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1629         struct sensor_device_attribute *sensor_attr = \
1630                 to_sensor_dev_attr(attr); \
1631         int nr = sensor_attr->index; \
1632         return sprintf(buf, "%d\n", data->reg[nr]); \
1633 } \
1634 static ssize_t \
1635 store_##reg(struct device *dev, struct device_attribute *attr, \
1636                             const char *buf, size_t count) \
1637 { \
1638         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1639         struct sensor_device_attribute *sensor_attr = \
1640                 to_sensor_dev_attr(attr); \
1641         int nr = sensor_attr->index; \
1642         unsigned long val; \
1643         int err; \
1644         err = kstrtoul(buf, 10, &val); \
1645         if (err < 0) \
1646                 return err; \
1647         val = clamp_val(val, 1, 255); \
1648         mutex_lock(&data->update_lock); \
1649         data->reg[nr] = val; \
1650         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1651         mutex_unlock(&data->update_lock); \
1652         return count; \
1653 }
1654
1655 fan_functions(fan_start_output, FAN_START_OUTPUT)
1656 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1657 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1658 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1659
1660 #define fan_time_functions(reg, REG) \
1661 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1662                                 char *buf) \
1663 { \
1664         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1665         struct sensor_device_attribute *sensor_attr = \
1666                 to_sensor_dev_attr(attr); \
1667         int nr = sensor_attr->index; \
1668         return sprintf(buf, "%d\n", \
1669                         step_time_from_reg(data->reg[nr], \
1670                                            data->pwm_mode[nr])); \
1671 } \
1672 \
1673 static ssize_t \
1674 store_##reg(struct device *dev, struct device_attribute *attr, \
1675                         const char *buf, size_t count) \
1676 { \
1677         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1678         struct sensor_device_attribute *sensor_attr = \
1679                 to_sensor_dev_attr(attr); \
1680         int nr = sensor_attr->index; \
1681         unsigned long val; \
1682         int err; \
1683         err = kstrtoul(buf, 10, &val); \
1684         if (err < 0) \
1685                 return err; \
1686         val = step_time_to_reg(val, data->pwm_mode[nr]); \
1687         mutex_lock(&data->update_lock); \
1688         data->reg[nr] = val; \
1689         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1690         mutex_unlock(&data->update_lock); \
1691         return count; \
1692 } \
1693
1694 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1695
1696 static ssize_t name_show(struct device *dev, struct device_attribute *attr,
1697                          char *buf)
1698 {
1699         struct w83627ehf_data *data = dev_get_drvdata(dev);
1700
1701         return sprintf(buf, "%s\n", data->name);
1702 }
1703 static DEVICE_ATTR_RO(name);
1704
1705 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1706         SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1707                     store_fan_stop_time, 3),
1708         SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1709                     store_fan_start_output, 3),
1710         SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1711                     store_fan_stop_output, 3),
1712         SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1713                     store_fan_max_output, 3),
1714         SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1715                     store_fan_step_output, 3),
1716 };
1717
1718 static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
1719         SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1720                     store_fan_stop_time, 2),
1721         SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1722                     store_fan_start_output, 2),
1723         SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1724                     store_fan_stop_output, 2),
1725 };
1726
1727 static struct sensor_device_attribute sda_sf3_arrays[] = {
1728         SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1729                     store_fan_stop_time, 0),
1730         SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1731                     store_fan_stop_time, 1),
1732         SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1733                     store_fan_start_output, 0),
1734         SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1735                     store_fan_start_output, 1),
1736         SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1737                     store_fan_stop_output, 0),
1738         SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1739                     store_fan_stop_output, 1),
1740 };
1741
1742
1743 /*
1744  * pwm1 and pwm3 don't support max and step settings on all chips.
1745  * Need to check support while generating/removing attribute files.
1746  */
1747 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1748         SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1749                     store_fan_max_output, 0),
1750         SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1751                     store_fan_step_output, 0),
1752         SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1753                     store_fan_max_output, 1),
1754         SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1755                     store_fan_step_output, 1),
1756         SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1757                     store_fan_max_output, 2),
1758         SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1759                     store_fan_step_output, 2),
1760 };
1761
1762 static ssize_t
1763 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
1764 {
1765         struct w83627ehf_data *data = dev_get_drvdata(dev);
1766         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1767 }
1768 static DEVICE_ATTR_RO(cpu0_vid);
1769
1770
1771 /* Case open detection */
1772
1773 static ssize_t
1774 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1775 {
1776         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1777
1778         return sprintf(buf, "%d\n",
1779                 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1780 }
1781
1782 static ssize_t
1783 clear_caseopen(struct device *dev, struct device_attribute *attr,
1784                         const char *buf, size_t count)
1785 {
1786         struct w83627ehf_data *data = dev_get_drvdata(dev);
1787         unsigned long val;
1788         u16 reg, mask;
1789
1790         if (kstrtoul(buf, 10, &val) || val != 0)
1791                 return -EINVAL;
1792
1793         mask = to_sensor_dev_attr_2(attr)->nr;
1794
1795         mutex_lock(&data->update_lock);
1796         reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1797         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1798         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1799         data->valid = 0;        /* Force cache refresh */
1800         mutex_unlock(&data->update_lock);
1801
1802         return count;
1803 }
1804
1805 static struct sensor_device_attribute_2 sda_caseopen[] = {
1806         SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1807                         clear_caseopen, 0x80, 0x10),
1808         SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1809                         clear_caseopen, 0x40, 0x40),
1810 };
1811
1812 /*
1813  * Driver and device management
1814  */
1815
1816 static void w83627ehf_device_remove_files(struct device *dev)
1817 {
1818         /*
1819          * some entries in the following arrays may not have been used in
1820          * device_create_file(), but device_remove_file() will ignore them
1821          */
1822         int i;
1823         struct w83627ehf_data *data = dev_get_drvdata(dev);
1824
1825         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1826                 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1827         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1828                 struct sensor_device_attribute *attr =
1829                   &sda_sf3_max_step_arrays[i];
1830                 if (data->REG_FAN_STEP_OUTPUT &&
1831                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1832                         device_remove_file(dev, &attr->dev_attr);
1833         }
1834         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
1835                 device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
1836         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1837                 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1838         for (i = 0; i < data->in_num; i++) {
1839                 if ((i == 6) && data->in6_skip)
1840                         continue;
1841                 device_remove_file(dev, &sda_in_input[i].dev_attr);
1842                 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1843                 device_remove_file(dev, &sda_in_min[i].dev_attr);
1844                 device_remove_file(dev, &sda_in_max[i].dev_attr);
1845         }
1846         for (i = 0; i < 5; i++) {
1847                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1848                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1849                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1850                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1851         }
1852         for (i = 0; i < data->pwm_num; i++) {
1853                 device_remove_file(dev, &sda_pwm[i].dev_attr);
1854                 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1855                 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1856                 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1857                 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1858         }
1859         for (i = 0; i < NUM_REG_TEMP; i++) {
1860                 if (!(data->have_temp & (1 << i)))
1861                         continue;
1862                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1863                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1864                 if (i == 2 && data->temp3_val_only)
1865                         continue;
1866                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1867                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1868                 if (i > 2)
1869                         continue;
1870                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1871                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1872                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1873         }
1874
1875         device_remove_file(dev, &sda_caseopen[0].dev_attr);
1876         device_remove_file(dev, &sda_caseopen[1].dev_attr);
1877
1878         device_remove_file(dev, &dev_attr_name);
1879         device_remove_file(dev, &dev_attr_cpu0_vid);
1880 }
1881
1882 /* Get the monitoring functions started */
1883 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1884                                                    enum kinds kind)
1885 {
1886         int i;
1887         u8 tmp, diode;
1888
1889         /* Start monitoring is needed */
1890         tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1891         if (!(tmp & 0x01))
1892                 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1893                                       tmp | 0x01);
1894
1895         /* Enable temperature sensors if needed */
1896         for (i = 0; i < NUM_REG_TEMP; i++) {
1897                 if (!(data->have_temp & (1 << i)))
1898                         continue;
1899                 if (!data->reg_temp_config[i])
1900                         continue;
1901                 tmp = w83627ehf_read_value(data,
1902                                            data->reg_temp_config[i]);
1903                 if (tmp & 0x01)
1904                         w83627ehf_write_value(data,
1905                                               data->reg_temp_config[i],
1906                                               tmp & 0xfe);
1907         }
1908
1909         /* Enable VBAT monitoring if needed */
1910         tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1911         if (!(tmp & 0x01))
1912                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1913
1914         /* Get thermal sensor types */
1915         switch (kind) {
1916         case w83627ehf:
1917                 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1918                 break;
1919         case w83627uhg:
1920                 diode = 0x00;
1921                 break;
1922         default:
1923                 diode = 0x70;
1924         }
1925         for (i = 0; i < 3; i++) {
1926                 const char *label = NULL;
1927
1928                 if (data->temp_label)
1929                         label = data->temp_label[data->temp_src[i]];
1930
1931                 /* Digital source overrides analog type */
1932                 if (label && strncmp(label, "PECI", 4) == 0)
1933                         data->temp_type[i] = 6;
1934                 else if (label && strncmp(label, "AMD", 3) == 0)
1935                         data->temp_type[i] = 5;
1936                 else if ((tmp & (0x02 << i)))
1937                         data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1938                 else
1939                         data->temp_type[i] = 4; /* thermistor */
1940         }
1941 }
1942
1943 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1944                                    int r1, int r2)
1945 {
1946         swap(data->temp_src[r1], data->temp_src[r2]);
1947         swap(data->reg_temp[r1], data->reg_temp[r2]);
1948         swap(data->reg_temp_over[r1], data->reg_temp_over[r2]);
1949         swap(data->reg_temp_hyst[r1], data->reg_temp_hyst[r2]);
1950         swap(data->reg_temp_config[r1], data->reg_temp_config[r2]);
1951 }
1952
1953 static void
1954 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1955 {
1956         int i;
1957
1958         for (i = 0; i < n_temp; i++) {
1959                 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1960                 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1961                 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1962                 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1963         }
1964 }
1965
1966 static void
1967 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1968                            struct w83627ehf_data *data)
1969 {
1970         int fan3pin, fan4pin, fan4min, fan5pin, regval;
1971
1972         /* The W83627UHG is simple, only two fan inputs, no config */
1973         if (sio_data->kind == w83627uhg) {
1974                 data->has_fan = 0x03; /* fan1 and fan2 */
1975                 data->has_fan_min = 0x03;
1976                 return;
1977         }
1978
1979         /* fan4 and fan5 share some pins with the GPIO and serial flash */
1980         if (sio_data->kind == nct6775) {
1981                 /* On NCT6775, fan4 shares pins with the fdc interface */
1982                 fan3pin = 1;
1983                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1984                 fan4min = 0;
1985                 fan5pin = 0;
1986         } else if (sio_data->kind == nct6776) {
1987                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1988
1989                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1990                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1991
1992                 if (regval & 0x80)
1993                         fan3pin = gpok;
1994                 else
1995                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1996
1997                 if (regval & 0x40)
1998                         fan4pin = gpok;
1999                 else
2000                         fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
2001
2002                 if (regval & 0x20)
2003                         fan5pin = gpok;
2004                 else
2005                         fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
2006
2007                 fan4min = fan4pin;
2008         } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2009                 fan3pin = 1;
2010                 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2011                 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2012                 fan4min = fan4pin;
2013         } else {
2014                 fan3pin = 1;
2015                 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2016                 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2017                 fan4min = fan4pin;
2018         }
2019
2020         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2021         data->has_fan |= (fan3pin << 2);
2022         data->has_fan_min |= (fan3pin << 2);
2023
2024         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2025                 /*
2026                  * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
2027                  * register
2028                  */
2029                 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2030                 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2031         } else {
2032                 /*
2033                  * It looks like fan4 and fan5 pins can be alternatively used
2034                  * as fan on/off switches, but fan5 control is write only :/
2035                  * We assume that if the serial interface is disabled, designers
2036                  * connected fan5 as input unless they are emitting log 1, which
2037                  * is not the default.
2038                  */
2039                 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2040                 if ((regval & (1 << 2)) && fan4pin) {
2041                         data->has_fan |= (1 << 3);
2042                         data->has_fan_min |= (1 << 3);
2043                 }
2044                 if (!(regval & (1 << 1)) && fan5pin) {
2045                         data->has_fan |= (1 << 4);
2046                         data->has_fan_min |= (1 << 4);
2047                 }
2048         }
2049 }
2050
2051 static int w83627ehf_probe(struct platform_device *pdev)
2052 {
2053         struct device *dev = &pdev->dev;
2054         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2055         struct w83627ehf_data *data;
2056         struct resource *res;
2057         u8 en_vrm10;
2058         int i, err = 0;
2059
2060         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2061         if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
2062                 err = -EBUSY;
2063                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2064                         (unsigned long)res->start,
2065                         (unsigned long)res->start + IOREGION_LENGTH - 1);
2066                 goto exit;
2067         }
2068
2069         data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
2070                             GFP_KERNEL);
2071         if (!data) {
2072                 err = -ENOMEM;
2073                 goto exit_release;
2074         }
2075
2076         data->addr = res->start;
2077         mutex_init(&data->lock);
2078         mutex_init(&data->update_lock);
2079         data->name = w83627ehf_device_names[sio_data->kind];
2080         data->bank = 0xff;              /* Force initial bank selection */
2081         platform_set_drvdata(pdev, data);
2082
2083         /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
2084         data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
2085         /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
2086         switch (sio_data->kind) {
2087         default:
2088                 data->pwm_num = 4;
2089                 break;
2090         case w83667hg:
2091         case w83667hg_b:
2092         case nct6775:
2093         case nct6776:
2094                 data->pwm_num = 3;
2095                 break;
2096         case w83627uhg:
2097                 data->pwm_num = 2;
2098                 break;
2099         }
2100
2101         /* Default to 3 temperature inputs, code below will adjust as needed */
2102         data->have_temp = 0x07;
2103
2104         /* Deal with temperature register setup first. */
2105         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2106                 int mask = 0;
2107
2108                 /*
2109                  * Display temperature sensor output only if it monitors
2110                  * a source other than one already reported. Always display
2111                  * first three temperature registers, though.
2112                  */
2113                 for (i = 0; i < NUM_REG_TEMP; i++) {
2114                         u8 src;
2115
2116                         data->reg_temp[i] = NCT6775_REG_TEMP[i];
2117                         data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
2118                         data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
2119                         data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
2120
2121                         src = w83627ehf_read_value(data,
2122                                                    NCT6775_REG_TEMP_SOURCE[i]);
2123                         src &= 0x1f;
2124                         if (src && !(mask & (1 << src))) {
2125                                 data->have_temp |= 1 << i;
2126                                 mask |= 1 << src;
2127                         }
2128
2129                         data->temp_src[i] = src;
2130
2131                         /*
2132                          * Now do some register swapping if index 0..2 don't
2133                          * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2134                          * Idea is to have the first three attributes
2135                          * report SYSTIN, CPUIN, and AUXIN if possible
2136                          * without overriding the basic system configuration.
2137                          */
2138                         if (i > 0 && data->temp_src[0] != 1
2139                             && data->temp_src[i] == 1)
2140                                 w82627ehf_swap_tempreg(data, 0, i);
2141                         if (i > 1 && data->temp_src[1] != 2
2142                             && data->temp_src[i] == 2)
2143                                 w82627ehf_swap_tempreg(data, 1, i);
2144                         if (i > 2 && data->temp_src[2] != 3
2145                             && data->temp_src[i] == 3)
2146                                 w82627ehf_swap_tempreg(data, 2, i);
2147                 }
2148                 if (sio_data->kind == nct6776) {
2149                         /*
2150                          * On NCT6776, AUXTIN and VIN3 pins are shared.
2151                          * Only way to detect it is to check if AUXTIN is used
2152                          * as a temperature source, and if that source is
2153                          * enabled.
2154                          *
2155                          * If that is the case, disable in6, which reports VIN3.
2156                          * Otherwise disable temp3.
2157                          */
2158                         if (data->temp_src[2] == 3) {
2159                                 u8 reg;
2160
2161                                 if (data->reg_temp_config[2])
2162                                         reg = w83627ehf_read_value(data,
2163                                                 data->reg_temp_config[2]);
2164                                 else
2165                                         reg = 0; /* Assume AUXTIN is used */
2166
2167                                 if (reg & 0x01)
2168                                         data->have_temp &= ~(1 << 2);
2169                                 else
2170                                         data->in6_skip = 1;
2171                         }
2172                         data->temp_label = nct6776_temp_label;
2173                 } else {
2174                         data->temp_label = nct6775_temp_label;
2175                 }
2176                 data->have_temp_offset = data->have_temp & 0x07;
2177                 for (i = 0; i < 3; i++) {
2178                         if (data->temp_src[i] > 3)
2179                                 data->have_temp_offset &= ~(1 << i);
2180                 }
2181         } else if (sio_data->kind == w83667hg_b) {
2182                 u8 reg;
2183
2184                 w83627ehf_set_temp_reg_ehf(data, 4);
2185
2186                 /*
2187                  * Temperature sources are selected with bank 0, registers 0x49
2188                  * and 0x4a.
2189                  */
2190                 reg = w83627ehf_read_value(data, 0x4a);
2191                 data->temp_src[0] = reg >> 5;
2192                 reg = w83627ehf_read_value(data, 0x49);
2193                 data->temp_src[1] = reg & 0x07;
2194                 data->temp_src[2] = (reg >> 4) & 0x07;
2195
2196                 /*
2197                  * W83667HG-B has another temperature register at 0x7e.
2198                  * The temperature source is selected with register 0x7d.
2199                  * Support it if the source differs from already reported
2200                  * sources.
2201                  */
2202                 reg = w83627ehf_read_value(data, 0x7d);
2203                 reg &= 0x07;
2204                 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2205                     && reg != data->temp_src[2]) {
2206                         data->temp_src[3] = reg;
2207                         data->have_temp |= 1 << 3;
2208                 }
2209
2210                 /*
2211                  * Chip supports either AUXTIN or VIN3. Try to find out which
2212                  * one.
2213                  */
2214                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2215                 if (data->temp_src[2] == 2 && (reg & 0x01))
2216                         data->have_temp &= ~(1 << 2);
2217
2218                 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2219                     || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2220                         data->in6_skip = 1;
2221
2222                 data->temp_label = w83667hg_b_temp_label;
2223                 data->have_temp_offset = data->have_temp & 0x07;
2224                 for (i = 0; i < 3; i++) {
2225                         if (data->temp_src[i] > 2)
2226                                 data->have_temp_offset &= ~(1 << i);
2227                 }
2228         } else if (sio_data->kind == w83627uhg) {
2229                 u8 reg;
2230
2231                 w83627ehf_set_temp_reg_ehf(data, 3);
2232
2233                 /*
2234                  * Temperature sources for temp2 and temp3 are selected with
2235                  * bank 0, registers 0x49 and 0x4a.
2236                  */
2237                 data->temp_src[0] = 0;  /* SYSTIN */
2238                 reg = w83627ehf_read_value(data, 0x49) & 0x07;
2239                 /* Adjust to have the same mapping as other source registers */
2240                 if (reg == 0)
2241                         data->temp_src[1] = 1;
2242                 else if (reg >= 2 && reg <= 5)
2243                         data->temp_src[1] = reg + 2;
2244                 else    /* should never happen */
2245                         data->have_temp &= ~(1 << 1);
2246                 reg = w83627ehf_read_value(data, 0x4a);
2247                 data->temp_src[2] = reg >> 5;
2248
2249                 /*
2250                  * Skip temp3 if source is invalid or the same as temp1
2251                  * or temp2.
2252                  */
2253                 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
2254                     data->temp_src[2] == data->temp_src[0] ||
2255                     ((data->have_temp & (1 << 1)) &&
2256                      data->temp_src[2] == data->temp_src[1]))
2257                         data->have_temp &= ~(1 << 2);
2258                 else
2259                         data->temp3_val_only = 1;       /* No limit regs */
2260
2261                 data->in6_skip = 1;                     /* No VIN3 */
2262
2263                 data->temp_label = w83667hg_b_temp_label;
2264                 data->have_temp_offset = data->have_temp & 0x03;
2265                 for (i = 0; i < 3; i++) {
2266                         if (data->temp_src[i] > 1)
2267                                 data->have_temp_offset &= ~(1 << i);
2268                 }
2269         } else {
2270                 w83627ehf_set_temp_reg_ehf(data, 3);
2271
2272                 /* Temperature sources are fixed */
2273
2274                 if (sio_data->kind == w83667hg) {
2275                         u8 reg;
2276
2277                         /*
2278                          * Chip supports either AUXTIN or VIN3. Try to find
2279                          * out which one.
2280                          */
2281                         reg = w83627ehf_read_value(data,
2282                                                 W83627EHF_REG_TEMP_CONFIG[2]);
2283                         if (reg & 0x01)
2284                                 data->have_temp &= ~(1 << 2);
2285                         else
2286                                 data->in6_skip = 1;
2287                 }
2288                 data->have_temp_offset = data->have_temp & 0x07;
2289         }
2290
2291         if (sio_data->kind == nct6775) {
2292                 data->has_fan_div = true;
2293                 data->fan_from_reg = fan_from_reg16;
2294                 data->fan_from_reg_min = fan_from_reg8;
2295                 data->REG_PWM = NCT6775_REG_PWM;
2296                 data->REG_TARGET = NCT6775_REG_TARGET;
2297                 data->REG_FAN = NCT6775_REG_FAN;
2298                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2299                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2300                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2301                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2302                 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2303                 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2304         } else if (sio_data->kind == nct6776) {
2305                 data->has_fan_div = false;
2306                 data->fan_from_reg = fan_from_reg13;
2307                 data->fan_from_reg_min = fan_from_reg13;
2308                 data->REG_PWM = NCT6775_REG_PWM;
2309                 data->REG_TARGET = NCT6775_REG_TARGET;
2310                 data->REG_FAN = NCT6775_REG_FAN;
2311                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2312                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2313                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2314                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2315         } else if (sio_data->kind == w83667hg_b) {
2316                 data->has_fan_div = true;
2317                 data->fan_from_reg = fan_from_reg8;
2318                 data->fan_from_reg_min = fan_from_reg8;
2319                 data->REG_PWM = W83627EHF_REG_PWM;
2320                 data->REG_TARGET = W83627EHF_REG_TARGET;
2321                 data->REG_FAN = W83627EHF_REG_FAN;
2322                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2323                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2324                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2325                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2326                 data->REG_FAN_MAX_OUTPUT =
2327                   W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2328                 data->REG_FAN_STEP_OUTPUT =
2329                   W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2330         } else {
2331                 data->has_fan_div = true;
2332                 data->fan_from_reg = fan_from_reg8;
2333                 data->fan_from_reg_min = fan_from_reg8;
2334                 data->REG_PWM = W83627EHF_REG_PWM;
2335                 data->REG_TARGET = W83627EHF_REG_TARGET;
2336                 data->REG_FAN = W83627EHF_REG_FAN;
2337                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2338                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2339                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2340                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2341                 data->REG_FAN_MAX_OUTPUT =
2342                   W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2343                 data->REG_FAN_STEP_OUTPUT =
2344                   W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2345         }
2346
2347         /* Setup input voltage scaling factors */
2348         if (sio_data->kind == w83627uhg)
2349                 data->scale_in = scale_in_w83627uhg;
2350         else
2351                 data->scale_in = scale_in_common;
2352
2353         /* Initialize the chip */
2354         w83627ehf_init_device(data, sio_data->kind);
2355
2356         data->vrm = vid_which_vrm();
2357
2358         err = superio_enter(sio_data->sioreg);
2359         if (err)
2360                 goto exit_release;
2361
2362         /* Read VID value */
2363         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2364             sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2365                 /*
2366                  * W83667HG has different pins for VID input and output, so
2367                  * we can get the VID input values directly at logical device D
2368                  * 0xe3.
2369                  */
2370                 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2371                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2372                 err = device_create_file(dev, &dev_attr_cpu0_vid);
2373                 if (err) {
2374                         superio_exit(sio_data->sioreg);
2375                         goto exit_release;
2376                 }
2377         } else if (sio_data->kind != w83627uhg) {
2378                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2379                 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2380                         /*
2381                          * Set VID input sensibility if needed. In theory the
2382                          * BIOS should have set it, but in practice it's not
2383                          * always the case. We only do it for the W83627EHF/EHG
2384                          * because the W83627DHG is more complex in this
2385                          * respect.
2386                          */
2387                         if (sio_data->kind == w83627ehf) {
2388                                 en_vrm10 = superio_inb(sio_data->sioreg,
2389                                                        SIO_REG_EN_VRM10);
2390                                 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2391                                         dev_warn(dev,
2392                                                  "Setting VID input voltage to TTL\n");
2393                                         superio_outb(sio_data->sioreg,
2394                                                      SIO_REG_EN_VRM10,
2395                                                      en_vrm10 & ~0x08);
2396                                 } else if (!(en_vrm10 & 0x08)
2397                                            && data->vrm == 100) {
2398                                         dev_warn(dev,
2399                                                  "Setting VID input voltage to VRM10\n");
2400                                         superio_outb(sio_data->sioreg,
2401                                                      SIO_REG_EN_VRM10,
2402                                                      en_vrm10 | 0x08);
2403                                 }
2404                         }
2405
2406                         data->vid = superio_inb(sio_data->sioreg,
2407                                                 SIO_REG_VID_DATA);
2408                         if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2409                                 data->vid &= 0x3f;
2410
2411                         err = device_create_file(dev, &dev_attr_cpu0_vid);
2412                         if (err) {
2413                                 superio_exit(sio_data->sioreg);
2414                                 goto exit_release;
2415                         }
2416                 } else {
2417                         dev_info(dev,
2418                                  "VID pins in output mode, CPU VID not available\n");
2419                 }
2420         }
2421
2422         if (fan_debounce &&
2423             (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2424                 u8 tmp;
2425
2426                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2427                 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2428                 if (sio_data->kind == nct6776)
2429                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2430                                      0x3e | tmp);
2431                 else
2432                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2433                                      0x1e | tmp);
2434                 pr_info("Enabled fan debounce for chip %s\n", data->name);
2435         }
2436
2437         w83627ehf_check_fan_inputs(sio_data, data);
2438
2439         superio_exit(sio_data->sioreg);
2440
2441         /* Read fan clock dividers immediately */
2442         w83627ehf_update_fan_div_common(dev, data);
2443
2444         /* Read pwm data to save original values */
2445         w83627ehf_update_pwm_common(dev, data);
2446         for (i = 0; i < data->pwm_num; i++)
2447                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2448
2449         /* Register sysfs hooks */
2450         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2451                 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2452                 if (err)
2453                         goto exit_remove;
2454         }
2455
2456         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2457                 struct sensor_device_attribute *attr =
2458                   &sda_sf3_max_step_arrays[i];
2459                 if (data->REG_FAN_STEP_OUTPUT &&
2460                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2461                         err = device_create_file(dev, &attr->dev_attr);
2462                         if (err)
2463                                 goto exit_remove;
2464                 }
2465         }
2466         /* if fan3 and fan4 are enabled create the sf3 files for them */
2467         if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
2468                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
2469                         err = device_create_file(dev,
2470                                         &sda_sf3_arrays_fan3[i].dev_attr);
2471                         if (err)
2472                                 goto exit_remove;
2473                 }
2474         if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2475                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2476                         err = device_create_file(dev,
2477                                         &sda_sf3_arrays_fan4[i].dev_attr);
2478                         if (err)
2479                                 goto exit_remove;
2480                 }
2481
2482         for (i = 0; i < data->in_num; i++) {
2483                 if ((i == 6) && data->in6_skip)
2484                         continue;
2485                 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2486                         || (err = device_create_file(dev,
2487                                 &sda_in_alarm[i].dev_attr))
2488                         || (err = device_create_file(dev,
2489                                 &sda_in_min[i].dev_attr))
2490                         || (err = device_create_file(dev,
2491                                 &sda_in_max[i].dev_attr)))
2492                         goto exit_remove;
2493         }
2494
2495         for (i = 0; i < 5; i++) {
2496                 if (data->has_fan & (1 << i)) {
2497                         if ((err = device_create_file(dev,
2498                                         &sda_fan_input[i].dev_attr))
2499                                 || (err = device_create_file(dev,
2500                                         &sda_fan_alarm[i].dev_attr)))
2501                                 goto exit_remove;
2502                         if (sio_data->kind != nct6776) {
2503                                 err = device_create_file(dev,
2504                                                 &sda_fan_div[i].dev_attr);
2505                                 if (err)
2506                                         goto exit_remove;
2507                         }
2508                         if (data->has_fan_min & (1 << i)) {
2509                                 err = device_create_file(dev,
2510                                                 &sda_fan_min[i].dev_attr);
2511                                 if (err)
2512                                         goto exit_remove;
2513                         }
2514                         if (i < data->pwm_num &&
2515                                 ((err = device_create_file(dev,
2516                                         &sda_pwm[i].dev_attr))
2517                                 || (err = device_create_file(dev,
2518                                         &sda_pwm_mode[i].dev_attr))
2519                                 || (err = device_create_file(dev,
2520                                         &sda_pwm_enable[i].dev_attr))
2521                                 || (err = device_create_file(dev,
2522                                         &sda_target_temp[i].dev_attr))
2523                                 || (err = device_create_file(dev,
2524                                         &sda_tolerance[i].dev_attr))))
2525                                 goto exit_remove;
2526                 }
2527         }
2528
2529         for (i = 0; i < NUM_REG_TEMP; i++) {
2530                 if (!(data->have_temp & (1 << i)))
2531                         continue;
2532                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2533                 if (err)
2534                         goto exit_remove;
2535                 if (data->temp_label) {
2536                         err = device_create_file(dev,
2537                                                  &sda_temp_label[i].dev_attr);
2538                         if (err)
2539                                 goto exit_remove;
2540                 }
2541                 if (i == 2 && data->temp3_val_only)
2542                         continue;
2543                 if (data->reg_temp_over[i]) {
2544                         err = device_create_file(dev,
2545                                 &sda_temp_max[i].dev_attr);
2546                         if (err)
2547                                 goto exit_remove;
2548                 }
2549                 if (data->reg_temp_hyst[i]) {
2550                         err = device_create_file(dev,
2551                                 &sda_temp_max_hyst[i].dev_attr);
2552                         if (err)
2553                                 goto exit_remove;
2554                 }
2555                 if (i > 2)
2556                         continue;
2557                 if ((err = device_create_file(dev,
2558                                 &sda_temp_alarm[i].dev_attr))
2559                         || (err = device_create_file(dev,
2560                                 &sda_temp_type[i].dev_attr)))
2561                         goto exit_remove;
2562                 if (data->have_temp_offset & (1 << i)) {
2563                         err = device_create_file(dev,
2564                                                  &sda_temp_offset[i].dev_attr);
2565                         if (err)
2566                                 goto exit_remove;
2567                 }
2568         }
2569
2570         err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2571         if (err)
2572                 goto exit_remove;
2573
2574         if (sio_data->kind == nct6776) {
2575                 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2576                 if (err)
2577                         goto exit_remove;
2578         }
2579
2580         err = device_create_file(dev, &dev_attr_name);
2581         if (err)
2582                 goto exit_remove;
2583
2584         data->hwmon_dev = hwmon_device_register(dev);
2585         if (IS_ERR(data->hwmon_dev)) {
2586                 err = PTR_ERR(data->hwmon_dev);
2587                 goto exit_remove;
2588         }
2589
2590         return 0;
2591
2592 exit_remove:
2593         w83627ehf_device_remove_files(dev);
2594 exit_release:
2595         release_region(res->start, IOREGION_LENGTH);
2596 exit:
2597         return err;
2598 }
2599
2600 static int w83627ehf_remove(struct platform_device *pdev)
2601 {
2602         struct w83627ehf_data *data = platform_get_drvdata(pdev);
2603
2604         hwmon_device_unregister(data->hwmon_dev);
2605         w83627ehf_device_remove_files(&pdev->dev);
2606         release_region(data->addr, IOREGION_LENGTH);
2607
2608         return 0;
2609 }
2610
2611 #ifdef CONFIG_PM
2612 static int w83627ehf_suspend(struct device *dev)
2613 {
2614         struct w83627ehf_data *data = w83627ehf_update_device(dev);
2615         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2616
2617         mutex_lock(&data->update_lock);
2618         data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
2619         if (sio_data->kind == nct6775) {
2620                 data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
2621                 data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
2622         }
2623         mutex_unlock(&data->update_lock);
2624
2625         return 0;
2626 }
2627
2628 static int w83627ehf_resume(struct device *dev)
2629 {
2630         struct w83627ehf_data *data = dev_get_drvdata(dev);
2631         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2632         int i;
2633
2634         mutex_lock(&data->update_lock);
2635         data->bank = 0xff;              /* Force initial bank selection */
2636
2637         /* Restore limits */
2638         for (i = 0; i < data->in_num; i++) {
2639                 if ((i == 6) && data->in6_skip)
2640                         continue;
2641
2642                 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
2643                                       data->in_min[i]);
2644                 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
2645                                       data->in_max[i]);
2646         }
2647
2648         for (i = 0; i < 5; i++) {
2649                 if (!(data->has_fan_min & (1 << i)))
2650                         continue;
2651
2652                 w83627ehf_write_value(data, data->REG_FAN_MIN[i],
2653                                       data->fan_min[i]);
2654         }
2655
2656         for (i = 0; i < NUM_REG_TEMP; i++) {
2657                 if (!(data->have_temp & (1 << i)))
2658                         continue;
2659
2660                 if (data->reg_temp_over[i])
2661                         w83627ehf_write_temp(data, data->reg_temp_over[i],
2662                                              data->temp_max[i]);
2663                 if (data->reg_temp_hyst[i])
2664                         w83627ehf_write_temp(data, data->reg_temp_hyst[i],
2665                                              data->temp_max_hyst[i]);
2666                 if (i > 2)
2667                         continue;
2668                 if (data->have_temp_offset & (1 << i))
2669                         w83627ehf_write_value(data,
2670                                               W83627EHF_REG_TEMP_OFFSET[i],
2671                                               data->temp_offset[i]);
2672         }
2673
2674         /* Restore other settings */
2675         w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2676         if (sio_data->kind == nct6775) {
2677                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
2678                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
2679         }
2680
2681         /* Force re-reading all values */
2682         data->valid = 0;
2683         mutex_unlock(&data->update_lock);
2684
2685         return 0;
2686 }
2687
2688 static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
2689         .suspend = w83627ehf_suspend,
2690         .resume = w83627ehf_resume,
2691         .freeze = w83627ehf_suspend,
2692         .restore = w83627ehf_resume,
2693 };
2694
2695 #define W83627EHF_DEV_PM_OPS    (&w83627ehf_dev_pm_ops)
2696 #else
2697 #define W83627EHF_DEV_PM_OPS    NULL
2698 #endif /* CONFIG_PM */
2699
2700 static struct platform_driver w83627ehf_driver = {
2701         .driver = {
2702                 .name   = DRVNAME,
2703                 .pm     = W83627EHF_DEV_PM_OPS,
2704         },
2705         .probe          = w83627ehf_probe,
2706         .remove         = w83627ehf_remove,
2707 };
2708
2709 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2710 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2711                                  struct w83627ehf_sio_data *sio_data)
2712 {
2713         static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
2714         static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
2715         static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
2716         static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
2717         static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
2718         static const char sio_name_W83667HG[] __initconst = "W83667HG";
2719         static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
2720         static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2721         static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2722
2723         u16 val;
2724         const char *sio_name;
2725         int err;
2726
2727         err = superio_enter(sioaddr);
2728         if (err)
2729                 return err;
2730
2731         if (force_id)
2732                 val = force_id;
2733         else
2734                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2735                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2736         switch (val & SIO_ID_MASK) {
2737         case SIO_W83627EHF_ID:
2738                 sio_data->kind = w83627ehf;
2739                 sio_name = sio_name_W83627EHF;
2740                 break;
2741         case SIO_W83627EHG_ID:
2742                 sio_data->kind = w83627ehf;
2743                 sio_name = sio_name_W83627EHG;
2744                 break;
2745         case SIO_W83627DHG_ID:
2746                 sio_data->kind = w83627dhg;
2747                 sio_name = sio_name_W83627DHG;
2748                 break;
2749         case SIO_W83627DHG_P_ID:
2750                 sio_data->kind = w83627dhg_p;
2751                 sio_name = sio_name_W83627DHG_P;
2752                 break;
2753         case SIO_W83627UHG_ID:
2754                 sio_data->kind = w83627uhg;
2755                 sio_name = sio_name_W83627UHG;
2756                 break;
2757         case SIO_W83667HG_ID:
2758                 sio_data->kind = w83667hg;
2759                 sio_name = sio_name_W83667HG;
2760                 break;
2761         case SIO_W83667HG_B_ID:
2762                 sio_data->kind = w83667hg_b;
2763                 sio_name = sio_name_W83667HG_B;
2764                 break;
2765         case SIO_NCT6775_ID:
2766                 sio_data->kind = nct6775;
2767                 sio_name = sio_name_NCT6775;
2768                 break;
2769         case SIO_NCT6776_ID:
2770                 sio_data->kind = nct6776;
2771                 sio_name = sio_name_NCT6776;
2772                 break;
2773         default:
2774                 if (val != 0xffff)
2775                         pr_debug("unsupported chip ID: 0x%04x\n", val);
2776                 superio_exit(sioaddr);
2777                 return -ENODEV;
2778         }
2779
2780         /* We have a known chip, find the HWM I/O address */
2781         superio_select(sioaddr, W83627EHF_LD_HWM);
2782         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2783             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2784         *addr = val & IOREGION_ALIGNMENT;
2785         if (*addr == 0) {
2786                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2787                 superio_exit(sioaddr);
2788                 return -ENODEV;
2789         }
2790
2791         /* Activate logical device if needed */
2792         val = superio_inb(sioaddr, SIO_REG_ENABLE);
2793         if (!(val & 0x01)) {
2794                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2795                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2796         }
2797
2798         superio_exit(sioaddr);
2799         pr_info("Found %s chip at %#x\n", sio_name, *addr);
2800         sio_data->sioreg = sioaddr;
2801
2802         return 0;
2803 }
2804
2805 /*
2806  * when Super-I/O functions move to a separate file, the Super-I/O
2807  * bus will manage the lifetime of the device and this module will only keep
2808  * track of the w83627ehf driver. But since we platform_device_alloc(), we
2809  * must keep track of the device
2810  */
2811 static struct platform_device *pdev;
2812
2813 static int __init sensors_w83627ehf_init(void)
2814 {
2815         int err;
2816         unsigned short address;
2817         struct resource res;
2818         struct w83627ehf_sio_data sio_data;
2819
2820         /*
2821          * initialize sio_data->kind and sio_data->sioreg.
2822          *
2823          * when Super-I/O functions move to a separate file, the Super-I/O
2824          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2825          * w83627ehf hardware monitor, and call probe()
2826          */
2827         if (w83627ehf_find(0x2e, &address, &sio_data) &&
2828             w83627ehf_find(0x4e, &address, &sio_data))
2829                 return -ENODEV;
2830
2831         err = platform_driver_register(&w83627ehf_driver);
2832         if (err)
2833                 goto exit;
2834
2835         pdev = platform_device_alloc(DRVNAME, address);
2836         if (!pdev) {
2837                 err = -ENOMEM;
2838                 pr_err("Device allocation failed\n");
2839                 goto exit_unregister;
2840         }
2841
2842         err = platform_device_add_data(pdev, &sio_data,
2843                                        sizeof(struct w83627ehf_sio_data));
2844         if (err) {
2845                 pr_err("Platform data allocation failed\n");
2846                 goto exit_device_put;
2847         }
2848
2849         memset(&res, 0, sizeof(res));
2850         res.name = DRVNAME;
2851         res.start = address + IOREGION_OFFSET;
2852         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2853         res.flags = IORESOURCE_IO;
2854
2855         err = acpi_check_resource_conflict(&res);
2856         if (err)
2857                 goto exit_device_put;
2858
2859         err = platform_device_add_resources(pdev, &res, 1);
2860         if (err) {
2861                 pr_err("Device resource addition failed (%d)\n", err);
2862                 goto exit_device_put;
2863         }
2864
2865         /* platform_device_add calls probe() */
2866         err = platform_device_add(pdev);
2867         if (err) {
2868                 pr_err("Device addition failed (%d)\n", err);
2869                 goto exit_device_put;
2870         }
2871
2872         return 0;
2873
2874 exit_device_put:
2875         platform_device_put(pdev);
2876 exit_unregister:
2877         platform_driver_unregister(&w83627ehf_driver);
2878 exit:
2879         return err;
2880 }
2881
2882 static void __exit sensors_w83627ehf_exit(void)
2883 {
2884         platform_device_unregister(pdev);
2885         platform_driver_unregister(&w83627ehf_driver);
2886 }
2887
2888 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2889 MODULE_DESCRIPTION("W83627EHF driver");
2890 MODULE_LICENSE("GPL");
2891
2892 module_init(sensors_w83627ehf_init);
2893 module_exit(sensors_w83627ehf_exit);