drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "drmP.h"
  29 #include "vmwgfx_drv.h"
  30 #include "ttm/ttm_placement.h"
  31 #include "ttm/ttm_bo_driver.h"
  32 #include "ttm/ttm_object.h"
  33 #include "ttm/ttm_module.h"
  34
  35 #define VMWGFX_DRIVER_NAME "vmwgfx"
  36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
  37 #define VMWGFX_CHIP_SVGAII 0
  38 #define VMW_FB_RESERVATION 0
  39
  40 /**
  41  * Fully encoded drm commands. Might move to vmw_drm.h
  42  */
  43
  44 #define DRM_IOCTL_VMW_GET_PARAM                                 \
  45         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM,          \
  46                  struct drm_vmw_getparam_arg)
  47 #define DRM_IOCTL_VMW_ALLOC_DMABUF                              \
  48         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF,       \
  49                 union drm_vmw_alloc_dmabuf_arg)
  50 #define DRM_IOCTL_VMW_UNREF_DMABUF                              \
  51         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF,        \
  52                 struct drm_vmw_unref_dmabuf_arg)
  53 #define DRM_IOCTL_VMW_CURSOR_BYPASS                             \
  54         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS,       \
  55                  struct drm_vmw_cursor_bypass_arg)
  56
  57 #define DRM_IOCTL_VMW_CONTROL_STREAM                            \
  58         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM,      \
  59                  struct drm_vmw_control_stream_arg)
  60 #define DRM_IOCTL_VMW_CLAIM_STREAM                              \
  61         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM,        \
  62                  struct drm_vmw_stream_arg)
  63 #define DRM_IOCTL_VMW_UNREF_STREAM                              \
  64         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM,        \
  65                  struct drm_vmw_stream_arg)
  66
  67 #define DRM_IOCTL_VMW_CREATE_CONTEXT                            \
  68         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT,      \
  69                 struct drm_vmw_context_arg)
  70 #define DRM_IOCTL_VMW_UNREF_CONTEXT                             \
  71         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT,       \
  72                 struct drm_vmw_context_arg)
  73 #define DRM_IOCTL_VMW_CREATE_SURFACE                            \
  74         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE,     \
  75                  union drm_vmw_surface_create_arg)
  76 #define DRM_IOCTL_VMW_UNREF_SURFACE                             \
  77         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE,       \
  78                  struct drm_vmw_surface_arg)
  79 #define DRM_IOCTL_VMW_REF_SURFACE                               \
  80         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE,        \
  81                  union drm_vmw_surface_reference_arg)
  82 #define DRM_IOCTL_VMW_EXECBUF                                   \
  83         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF,             \
  84                 struct drm_vmw_execbuf_arg)
  85 #define DRM_IOCTL_VMW_FIFO_DEBUG                                \
  86         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG,         \
  87                  struct drm_vmw_fifo_debug_arg)
  88 #define DRM_IOCTL_VMW_FENCE_WAIT                                \
  89         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT,         \
  90                  struct drm_vmw_fence_wait_arg)
  91
  92
  93 /**
  94  * The core DRM version of this macro doesn't account for
  95  * DRM_COMMAND_BASE.
  96  */
  97
  98 #define VMW_IOCTL_DEF(ioctl, func, flags) \
  99         [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
 100
 101 /**
 102  * Ioctl definitions.
 103  */
 104
 105 static struct drm_ioctl_desc vmw_ioctls[] = {
 106         VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
 107                       DRM_AUTH | DRM_UNLOCKED),
 108         VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
 109                       DRM_AUTH | DRM_UNLOCKED),
 110         VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
 111                       DRM_AUTH | DRM_UNLOCKED),
 112         VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
 113                       vmw_kms_cursor_bypass_ioctl,
 114                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 115
 116         VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
 117                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 118         VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
 119                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 120         VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
 121                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 122
 123         VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
 124                       DRM_AUTH | DRM_UNLOCKED),
 125         VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
 126                       DRM_AUTH | DRM_UNLOCKED),
 127         VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
 128                       DRM_AUTH | DRM_UNLOCKED),
 129         VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
 130                       DRM_AUTH | DRM_UNLOCKED),
 131         VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
 132                       DRM_AUTH | DRM_UNLOCKED),
 133         VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
 134                       DRM_AUTH | DRM_UNLOCKED),
 135         VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
 136                       DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
 137         VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
 138                       DRM_AUTH | DRM_UNLOCKED)
 139 };
 140
 141 static struct pci_device_id vmw_pci_id_list[] = {
 142         {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
 143         {0, 0, 0}
 144 };
 145
 146 static char *vmw_devname = "vmwgfx";
 147
 148 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
 149 static void vmw_master_init(struct vmw_master *);
 150 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 151                               void *ptr);
 152
 153 static void vmw_print_capabilities(uint32_t capabilities)
 154 {
 155         DRM_INFO("Capabilities:\n");
 156         if (capabilities & SVGA_CAP_RECT_COPY)
 157                 DRM_INFO("  Rect copy.\n");
 158         if (capabilities & SVGA_CAP_CURSOR)
 159                 DRM_INFO("  Cursor.\n");
 160         if (capabilities & SVGA_CAP_CURSOR_BYPASS)
 161                 DRM_INFO("  Cursor bypass.\n");
 162         if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
 163                 DRM_INFO("  Cursor bypass 2.\n");
 164         if (capabilities & SVGA_CAP_8BIT_EMULATION)
 165                 DRM_INFO("  8bit emulation.\n");
 166         if (capabilities & SVGA_CAP_ALPHA_CURSOR)
 167                 DRM_INFO("  Alpha cursor.\n");
 168         if (capabilities & SVGA_CAP_3D)
 169                 DRM_INFO("  3D.\n");
 170         if (capabilities & SVGA_CAP_EXTENDED_FIFO)
 171                 DRM_INFO("  Extended Fifo.\n");
 172         if (capabilities & SVGA_CAP_MULTIMON)
 173                 DRM_INFO("  Multimon.\n");
 174         if (capabilities & SVGA_CAP_PITCHLOCK)
 175                 DRM_INFO("  Pitchlock.\n");
 176         if (capabilities & SVGA_CAP_IRQMASK)
 177                 DRM_INFO("  Irq mask.\n");
 178         if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
 179                 DRM_INFO("  Display Topology.\n");
 180         if (capabilities & SVGA_CAP_GMR)
 181                 DRM_INFO("  GMR.\n");
 182         if (capabilities & SVGA_CAP_TRACES)
 183                 DRM_INFO("  Traces.\n");
 184 }
 185
 186 static int vmw_request_device(struct vmw_private *dev_priv)
 187 {
 188         int ret;
 189
 190         vmw_kms_save_vga(dev_priv);
 191
 192         ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
 193         if (unlikely(ret != 0)) {
 194                 DRM_ERROR("Unable to initialize FIFO.\n");
 195                 return ret;
 196         }
 197
 198         return 0;
 199 }
 200
 201 static void vmw_release_device(struct vmw_private *dev_priv)
 202 {
 203         vmw_fifo_release(dev_priv, &dev_priv->fifo);
 204         vmw_kms_restore_vga(dev_priv);
 205 }
 206
 207
 208 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 209 {
 210         struct vmw_private *dev_priv;
 211         int ret;
 212         uint32_t svga_id;
 213
 214         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 215         if (unlikely(dev_priv == NULL)) {
 216                 DRM_ERROR("Failed allocating a device private struct.\n");
 217                 return -ENOMEM;
 218         }
 219         memset(dev_priv, 0, sizeof(*dev_priv));
 220
 221         dev_priv->dev = dev;
 222         dev_priv->vmw_chipset = chipset;
 223         dev_priv->last_read_sequence = (uint32_t) -100;
 224         mutex_init(&dev_priv->hw_mutex);
 225         mutex_init(&dev_priv->cmdbuf_mutex);
 226         rwlock_init(&dev_priv->resource_lock);
 227         idr_init(&dev_priv->context_idr);
 228         idr_init(&dev_priv->surface_idr);
 229         idr_init(&dev_priv->stream_idr);
 230         ida_init(&dev_priv->gmr_ida);
 231         mutex_init(&dev_priv->init_mutex);
 232         init_waitqueue_head(&dev_priv->fence_queue);
 233         init_waitqueue_head(&dev_priv->fifo_queue);
 234         atomic_set(&dev_priv->fence_queue_waiters, 0);
 235         atomic_set(&dev_priv->fifo_queue_waiters, 0);
 236         INIT_LIST_HEAD(&dev_priv->gmr_lru);
 237
 238         dev_priv->io_start = pci_resource_start(dev->pdev, 0);
 239         dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
 240         dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
 241
 242         mutex_lock(&dev_priv->hw_mutex);
 243
 244         vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
 245         svga_id = vmw_read(dev_priv, SVGA_REG_ID);
 246         if (svga_id != SVGA_ID_2) {
 247                 ret = -ENOSYS;
 248                 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
 249                 mutex_unlock(&dev_priv->hw_mutex);
 250                 goto out_err0;
 251         }
 252
 253         dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
 254
 255         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 256                 dev_priv->max_gmr_descriptors =
 257                         vmw_read(dev_priv,
 258                                  SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
 259                 dev_priv->max_gmr_ids =
 260                         vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
 261         }
 262
 263         dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
 264         dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
 265         dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
 266         dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
 267
 268         mutex_unlock(&dev_priv->hw_mutex);
 269
 270         vmw_print_capabilities(dev_priv->capabilities);
 271
 272         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 273                 DRM_INFO("Max GMR ids is %u\n",
 274                          (unsigned)dev_priv->max_gmr_ids);
 275                 DRM_INFO("Max GMR descriptors is %u\n",
 276                          (unsigned)dev_priv->max_gmr_descriptors);
 277         }
 278         DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
 279                  dev_priv->vram_start, dev_priv->vram_size / 1024);
 280         DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
 281                  dev_priv->mmio_start, dev_priv->mmio_size / 1024);
 282
 283         ret = vmw_ttm_global_init(dev_priv);
 284         if (unlikely(ret != 0))
 285                 goto out_err0;
 286
 287
 288         vmw_master_init(&dev_priv->fbdev_master);
 289         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 290         dev_priv->active_master = &dev_priv->fbdev_master;
 291
 292
 293         ret = ttm_bo_device_init(&dev_priv->bdev,
 294                                  dev_priv->bo_global_ref.ref.object,
 295                                  &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
 296                                  false);
 297         if (unlikely(ret != 0)) {
 298                 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
 299                 goto out_err1;
 300         }
 301
 302         ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
 303                              (dev_priv->vram_size >> PAGE_SHIFT));
 304         if (unlikely(ret != 0)) {
 305                 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
 306                 goto out_err2;
 307         }
 308
 309         dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
 310                                            dev_priv->mmio_size, DRM_MTRR_WC);
 311
 312         dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
 313                                          dev_priv->mmio_size);
 314
 315         if (unlikely(dev_priv->mmio_virt == NULL)) {
 316                 ret = -ENOMEM;
 317                 DRM_ERROR("Failed mapping MMIO.\n");
 318                 goto out_err3;
 319         }
 320
 321         dev_priv->tdev = ttm_object_device_init
 322             (dev_priv->mem_global_ref.object, 12);
 323
 324         if (unlikely(dev_priv->tdev == NULL)) {
 325                 DRM_ERROR("Unable to initialize TTM object management.\n");
 326                 ret = -ENOMEM;
 327                 goto out_err4;
 328         }
 329
 330         dev->dev_private = dev_priv;
 331
 332         if (!dev->devname)
 333                 dev->devname = vmw_devname;
 334
 335         if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
 336                 ret = drm_irq_install(dev);
 337                 if (unlikely(ret != 0)) {
 338                         DRM_ERROR("Failed installing irq: %d\n", ret);
 339                         goto out_no_irq;
 340                 }
 341         }
 342
 343         ret = pci_request_regions(dev->pdev, "vmwgfx probe");
 344         dev_priv->stealth = (ret != 0);
 345         if (dev_priv->stealth) {
 346                 /**
 347                  * Request at least the mmio PCI resource.
 348                  */
 349
 350                 DRM_INFO("It appears like vesafb is loaded. "
 351                          "Ignore above error if any. Entering stealth mode.\n");
 352                 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
 353                 if (unlikely(ret != 0)) {
 354                         DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
 355                         goto out_no_device;
 356                 }
 357                 vmw_kms_init(dev_priv);
 358                 vmw_overlay_init(dev_priv);
 359         } else {
 360                 ret = vmw_request_device(dev_priv);
 361                 if (unlikely(ret != 0))
 362                         goto out_no_device;
 363                 vmw_kms_init(dev_priv);
 364                 vmw_overlay_init(dev_priv);
 365                 vmw_fb_init(dev_priv);
 366         }
 367
 368         dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
 369         register_pm_notifier(&dev_priv->pm_nb);
 370
 371         DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
 372
 373         return 0;
 374
 375 out_no_device:
 376         if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
 377                 drm_irq_uninstall(dev_priv->dev);
 378         if (dev->devname == vmw_devname)
 379                 dev->devname = NULL;
 380 out_no_irq:
 381         ttm_object_device_release(&dev_priv->tdev);
 382 out_err4:
 383         iounmap(dev_priv->mmio_virt);
 384 out_err3:
 385         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 386                      dev_priv->mmio_size, DRM_MTRR_WC);
 387         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 388 out_err2:
 389         (void)ttm_bo_device_release(&dev_priv->bdev);
 390 out_err1:
 391         vmw_ttm_global_release(dev_priv);
 392 out_err0:
 393         ida_destroy(&dev_priv->gmr_ida);
 394         idr_destroy(&dev_priv->surface_idr);
 395         idr_destroy(&dev_priv->context_idr);
 396         idr_destroy(&dev_priv->stream_idr);
 397         kfree(dev_priv);
 398         return ret;
 399 }
 400
 401 static int vmw_driver_unload(struct drm_device *dev)
 402 {
 403         struct vmw_private *dev_priv = vmw_priv(dev);
 404
 405         DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
 406
 407         unregister_pm_notifier(&dev_priv->pm_nb);
 408
 409         if (!dev_priv->stealth) {
 410                 vmw_fb_close(dev_priv);
 411                 vmw_kms_close(dev_priv);
 412                 vmw_overlay_close(dev_priv);
 413                 vmw_release_device(dev_priv);
 414                 pci_release_regions(dev->pdev);
 415         } else {
 416                 vmw_kms_close(dev_priv);
 417                 vmw_overlay_close(dev_priv);
 418                 pci_release_region(dev->pdev, 2);
 419         }
 420         if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
 421                 drm_irq_uninstall(dev_priv->dev);
 422         if (dev->devname == vmw_devname)
 423                 dev->devname = NULL;
 424         ttm_object_device_release(&dev_priv->tdev);
 425         iounmap(dev_priv->mmio_virt);
 426         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 427                      dev_priv->mmio_size, DRM_MTRR_WC);
 428         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 429         (void)ttm_bo_device_release(&dev_priv->bdev);
 430         vmw_ttm_global_release(dev_priv);
 431         ida_destroy(&dev_priv->gmr_ida);
 432         idr_destroy(&dev_priv->surface_idr);
 433         idr_destroy(&dev_priv->context_idr);
 434         idr_destroy(&dev_priv->stream_idr);
 435
 436         kfree(dev_priv);
 437
 438         return 0;
 439 }
 440
 441 static void vmw_postclose(struct drm_device *dev,
 442                          struct drm_file *file_priv)
 443 {
 444         struct vmw_fpriv *vmw_fp;
 445
 446         vmw_fp = vmw_fpriv(file_priv);
 447         ttm_object_file_release(&vmw_fp->tfile);
 448         if (vmw_fp->locked_master)
 449                 drm_master_put(&vmw_fp->locked_master);
 450         kfree(vmw_fp);
 451 }
 452
 453 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
 454 {
 455         struct vmw_private *dev_priv = vmw_priv(dev);
 456         struct vmw_fpriv *vmw_fp;
 457         int ret = -ENOMEM;
 458
 459         vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
 460         if (unlikely(vmw_fp == NULL))
 461                 return ret;
 462
 463         vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
 464         if (unlikely(vmw_fp->tfile == NULL))
 465                 goto out_no_tfile;
 466
 467         file_priv->driver_priv = vmw_fp;
 468
 469         if (unlikely(dev_priv->bdev.dev_mapping == NULL))
 470                 dev_priv->bdev.dev_mapping =
 471                         file_priv->filp->f_path.dentry->d_inode->i_mapping;
 472
 473         return 0;
 474
 475 out_no_tfile:
 476         kfree(vmw_fp);
 477         return ret;
 478 }
 479
 480 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
 481                                unsigned long arg)
 482 {
 483         struct drm_file *file_priv = filp->private_data;
 484         struct drm_device *dev = file_priv->minor->dev;
 485         unsigned int nr = DRM_IOCTL_NR(cmd);
 486
 487         /*
 488          * Do extra checking on driver private ioctls.
 489          */
 490
 491         if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
 492             && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
 493                 struct drm_ioctl_desc *ioctl =
 494                     &vmw_ioctls[nr - DRM_COMMAND_BASE];
 495
 496                 if (unlikely(ioctl->cmd != cmd)) {
 497                         DRM_ERROR("Invalid command format, ioctl %d\n",
 498                                   nr - DRM_COMMAND_BASE);
 499                         return -EINVAL;
 500                 }
 501         }
 502
 503         return drm_ioctl(filp, cmd, arg);
 504 }
 505
 506 static int vmw_firstopen(struct drm_device *dev)
 507 {
 508         struct vmw_private *dev_priv = vmw_priv(dev);
 509         dev_priv->is_opened = true;
 510
 511         return 0;
 512 }
 513
 514 static void vmw_lastclose(struct drm_device *dev)
 515 {
 516         struct vmw_private *dev_priv = vmw_priv(dev);
 517         struct drm_crtc *crtc;
 518         struct drm_mode_set set;
 519         int ret;
 520
 521         /**
 522          * Do nothing on the lastclose call from drm_unload.
 523          */
 524
 525         if (!dev_priv->is_opened)
 526                 return;
 527
 528         dev_priv->is_opened = false;
 529         set.x = 0;
 530         set.y = 0;
 531         set.fb = NULL;
 532         set.mode = NULL;
 533         set.connectors = NULL;
 534         set.num_connectors = 0;
 535
 536         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 537                 set.crtc = crtc;
 538                 ret = crtc->funcs->set_config(&set);
 539                 WARN_ON(ret != 0);
 540         }
 541
 542 }
 543
 544 static void vmw_master_init(struct vmw_master *vmaster)
 545 {
 546         ttm_lock_init(&vmaster->lock);
 547 }
 548
 549 static int vmw_master_create(struct drm_device *dev,
 550                              struct drm_master *master)
 551 {
 552         struct vmw_master *vmaster;
 553
 554         DRM_INFO("Master create.\n");
 555         vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
 556         if (unlikely(vmaster == NULL))
 557                 return -ENOMEM;
 558
 559         ttm_lock_init(&vmaster->lock);
 560         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 561         master->driver_priv = vmaster;
 562
 563         return 0;
 564 }
 565
 566 static void vmw_master_destroy(struct drm_device *dev,
 567                                struct drm_master *master)
 568 {
 569         struct vmw_master *vmaster = vmw_master(master);
 570
 571         DRM_INFO("Master destroy.\n");
 572         master->driver_priv = NULL;
 573         kfree(vmaster);
 574 }
 575
 576
 577 static int vmw_master_set(struct drm_device *dev,
 578                           struct drm_file *file_priv,
 579                           bool from_open)
 580 {
 581         struct vmw_private *dev_priv = vmw_priv(dev);
 582         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 583         struct vmw_master *active = dev_priv->active_master;
 584         struct vmw_master *vmaster = vmw_master(file_priv->master);
 585         int ret = 0;
 586
 587         DRM_INFO("Master set.\n");
 588         if (dev_priv->stealth) {
 589                 ret = vmw_request_device(dev_priv);
 590                 if (unlikely(ret != 0))
 591                         return ret;
 592         }
 593
 594         if (active) {
 595                 BUG_ON(active != &dev_priv->fbdev_master);
 596                 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
 597                 if (unlikely(ret != 0))
 598                         goto out_no_active_lock;
 599
 600                 ttm_lock_set_kill(&active->lock, true, SIGTERM);
 601                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 602                 if (unlikely(ret != 0)) {
 603                         DRM_ERROR("Unable to clean VRAM on "
 604                                   "master drop.\n");
 605                 }
 606
 607                 dev_priv->active_master = NULL;
 608         }
 609
 610         ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
 611         if (!from_open) {
 612                 ttm_vt_unlock(&vmaster->lock);
 613                 BUG_ON(vmw_fp->locked_master != file_priv->master);
 614                 drm_master_put(&vmw_fp->locked_master);
 615         }
 616
 617         dev_priv->active_master = vmaster;
 618
 619         return 0;
 620
 621 out_no_active_lock:
 622         vmw_release_device(dev_priv);
 623         return ret;
 624 }
 625
 626 static void vmw_master_drop(struct drm_device *dev,
 627                             struct drm_file *file_priv,
 628                             bool from_release)
 629 {
 630         struct vmw_private *dev_priv = vmw_priv(dev);
 631         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 632         struct vmw_master *vmaster = vmw_master(file_priv->master);
 633         int ret;
 634
 635         DRM_INFO("Master drop.\n");
 636
 637         /**
 638          * Make sure the master doesn't disappear while we have
 639          * it locked.
 640          */
 641
 642         vmw_fp->locked_master = drm_master_get(file_priv->master);
 643         ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
 644
 645         if (unlikely((ret != 0))) {
 646                 DRM_ERROR("Unable to lock TTM at VT switch.\n");
 647                 drm_master_put(&vmw_fp->locked_master);
 648         }
 649
 650         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 651
 652         if (dev_priv->stealth) {
 653                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 654                 if (unlikely(ret != 0))
 655                         DRM_ERROR("Unable to clean VRAM on master drop.\n");
 656                 vmw_release_device(dev_priv);
 657         }
 658         dev_priv->active_master = &dev_priv->fbdev_master;
 659         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 660         ttm_vt_unlock(&dev_priv->fbdev_master.lock);
 661
 662         if (!dev_priv->stealth)
 663                 vmw_fb_on(dev_priv);
 664 }
 665
 666
 667 static void vmw_remove(struct pci_dev *pdev)
 668 {
 669         struct drm_device *dev = pci_get_drvdata(pdev);
 670
 671         drm_put_dev(dev);
 672 }
 673
 674 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 675                               void *ptr)
 676 {
 677         struct vmw_private *dev_priv =
 678                 container_of(nb, struct vmw_private, pm_nb);
 679         struct vmw_master *vmaster = dev_priv->active_master;
 680
 681         switch (val) {
 682         case PM_HIBERNATION_PREPARE:
 683         case PM_SUSPEND_PREPARE:
 684                 ttm_suspend_lock(&vmaster->lock);
 685
 686                 /**
 687                  * This empties VRAM and unbinds all GMR bindings.
 688                  * Buffer contents is moved to swappable memory.
 689                  */
 690                 ttm_bo_swapout_all(&dev_priv->bdev);
 691                 break;
 692         case PM_POST_HIBERNATION:
 693         case PM_POST_SUSPEND:
 694                 ttm_suspend_unlock(&vmaster->lock);
 695                 break;
 696         case PM_RESTORE_PREPARE:
 697                 break;
 698         case PM_POST_RESTORE:
 699                 break;
 700         default:
 701                 break;
 702         }
 703         return 0;
 704 }
 705
 706 /**
 707  * These might not be needed with the virtual SVGA device.
 708  */
 709
 710 int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 711 {
 712         pci_save_state(pdev);
 713         pci_disable_device(pdev);
 714         pci_set_power_state(pdev, PCI_D3hot);
 715         return 0;
 716 }
 717
 718 int vmw_pci_resume(struct pci_dev *pdev)
 719 {
 720         pci_set_power_state(pdev, PCI_D0);
 721         pci_restore_state(pdev);
 722         return pci_enable_device(pdev);
 723 }
 724
 725 static struct drm_driver driver = {
 726         .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
 727         DRIVER_MODESET,
 728         .load = vmw_driver_load,
 729         .unload = vmw_driver_unload,
 730         .firstopen = vmw_firstopen,
 731         .lastclose = vmw_lastclose,
 732         .irq_preinstall = vmw_irq_preinstall,
 733         .irq_postinstall = vmw_irq_postinstall,
 734         .irq_uninstall = vmw_irq_uninstall,
 735         .irq_handler = vmw_irq_handler,
 736         .reclaim_buffers_locked = NULL,
 737         .get_map_ofs = drm_core_get_map_ofs,
 738         .get_reg_ofs = drm_core_get_reg_ofs,
 739         .ioctls = vmw_ioctls,
 740         .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
 741         .dma_quiescent = NULL,  /*vmw_dma_quiescent, */
 742         .master_create = vmw_master_create,
 743         .master_destroy = vmw_master_destroy,
 744         .master_set = vmw_master_set,
 745         .master_drop = vmw_master_drop,
 746         .open = vmw_driver_open,
 747         .postclose = vmw_postclose,
 748         .fops = {
 749                  .owner = THIS_MODULE,
 750                  .open = drm_open,
 751                  .release = drm_release,
 752                  .unlocked_ioctl = vmw_unlocked_ioctl,
 753                  .mmap = vmw_mmap,
 754                  .poll = drm_poll,
 755                  .fasync = drm_fasync,
 756 #if defined(CONFIG_COMPAT)
 757                  .compat_ioctl = drm_compat_ioctl,
 758 #endif
 759                  },
 760         .pci_driver = {
 761                        .name = VMWGFX_DRIVER_NAME,
 762                        .id_table = vmw_pci_id_list,
 763                        .probe = vmw_probe,
 764                        .remove = vmw_remove,
 765                        .suspend = vmw_pci_suspend,
 766                        .resume = vmw_pci_resume
 767                        },
 768         .name = VMWGFX_DRIVER_NAME,
 769         .desc = VMWGFX_DRIVER_DESC,
 770         .date = VMWGFX_DRIVER_DATE,
 771         .major = VMWGFX_DRIVER_MAJOR,
 772         .minor = VMWGFX_DRIVER_MINOR,
 773         .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
 774 };
 775
 776 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 777 {
 778         return drm_get_dev(pdev, ent, &driver);
 779 }
 780
 781 static int __init vmwgfx_init(void)
 782 {
 783         int ret;
 784         ret = drm_init(&driver);
 785         if (ret)
 786                 DRM_ERROR("Failed initializing DRM.\n");
 787         return ret;
 788 }
 789
 790 static void __exit vmwgfx_exit(void)
 791 {
 792         drm_exit(&driver);
 793 }
 794
 795 module_init(vmwgfx_init);
 796 module_exit(vmwgfx_exit);
 797
 798 MODULE_AUTHOR("VMware Inc. and others");
 799 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
 800 MODULE_LICENSE("GPL and additional rights");