2 * Copyright (C) 2015 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
34 #include <drm/drm_atomic.h>
35 #include <drm/drm_encoder.h>
36 #include <drm/drm_fb_helper.h>
37 #include <drm/drm_gem.h>
38 #include <drm/drm_gem_shmem_helper.h>
39 #include <drm/drm_ioctl.h>
40 #include <drm/drm_probe_helper.h>
42 #define DRIVER_NAME "virtio_gpu"
43 #define DRIVER_DESC "virtio GPU"
44 #define DRIVER_DATE "0"
46 #define DRIVER_MAJOR 0
47 #define DRIVER_MINOR 1
48 #define DRIVER_PATCHLEVEL 0
50 struct virtio_gpu_object_params {
67 struct virtio_gpu_object {
68 struct drm_gem_shmem_object base;
69 uint32_t hw_res_handle;
71 struct sg_table *pages;
76 #define gem_to_virtio_gpu_obj(gobj) \
77 container_of((gobj), struct virtio_gpu_object, base.base)
79 struct virtio_gpu_object_array {
80 struct ww_acquire_ctx ticket;
82 struct drm_gem_object *objs[];
85 struct virtio_gpu_vbuffer;
86 struct virtio_gpu_device;
88 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
89 struct virtio_gpu_vbuffer *vbuf);
91 struct virtio_gpu_fence_driver {
95 struct list_head fences;
99 struct virtio_gpu_fence {
101 struct virtio_gpu_fence_driver *drv;
102 struct list_head node;
104 #define to_virtio_fence(x) \
105 container_of(x, struct virtio_gpu_fence, f)
107 struct virtio_gpu_vbuffer {
116 virtio_gpu_resp_cb resp_cb;
118 struct virtio_gpu_object_array *objs;
119 struct list_head list;
122 struct virtio_gpu_output {
124 struct drm_crtc crtc;
125 struct drm_connector conn;
126 struct drm_encoder enc;
127 struct virtio_gpu_display_one info;
128 struct virtio_gpu_update_cursor cursor;
134 #define drm_crtc_to_virtio_gpu_output(x) \
135 container_of(x, struct virtio_gpu_output, crtc)
136 #define drm_connector_to_virtio_gpu_output(x) \
137 container_of(x, struct virtio_gpu_output, conn)
138 #define drm_encoder_to_virtio_gpu_output(x) \
139 container_of(x, struct virtio_gpu_output, enc)
141 struct virtio_gpu_framebuffer {
142 struct drm_framebuffer base;
143 struct virtio_gpu_fence *fence;
145 #define to_virtio_gpu_framebuffer(x) \
146 container_of(x, struct virtio_gpu_framebuffer, base)
148 struct virtio_gpu_queue {
149 struct virtqueue *vq;
151 wait_queue_head_t ack_queue;
152 struct work_struct dequeue_work;
155 struct virtio_gpu_drv_capset {
157 uint32_t max_version;
161 struct virtio_gpu_drv_cap_cache {
162 struct list_head head;
170 struct virtio_gpu_device {
172 struct drm_device *ddev;
174 struct virtio_device *vdev;
176 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
177 uint32_t num_scanouts;
179 struct virtio_gpu_queue ctrlq;
180 struct virtio_gpu_queue cursorq;
181 struct kmem_cache *vbufs;
184 struct ida resource_ida;
186 wait_queue_head_t resp_wq;
187 /* current display info */
188 spinlock_t display_info_lock;
189 bool display_info_pending;
191 struct virtio_gpu_fence_driver fence_drv;
193 struct ida ctx_id_ida;
198 struct work_struct config_changed_work;
200 struct virtio_gpu_drv_capset *capsets;
201 uint32_t num_capsets;
202 struct list_head cap_cache;
205 struct virtio_gpu_fpriv {
210 #define DRM_VIRTIO_NUM_IOCTLS 10
211 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
214 int virtio_gpu_init(struct drm_device *dev);
215 void virtio_gpu_deinit(struct drm_device *dev);
216 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
217 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
220 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
221 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
222 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
223 int virtio_gpu_gem_create(struct drm_file *file,
224 struct drm_device *dev,
225 struct virtio_gpu_object_params *params,
226 struct drm_gem_object **obj_p,
228 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
229 struct drm_file *file);
230 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
231 struct drm_file *file);
232 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
233 struct drm_device *dev,
234 struct drm_mode_create_dumb *args);
235 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
236 struct drm_device *dev,
237 uint32_t handle, uint64_t *offset_p);
239 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
240 struct virtio_gpu_object_array*
241 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
242 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
243 struct drm_gem_object *obj);
244 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
245 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
246 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
247 struct dma_fence *fence);
248 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
251 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
252 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
253 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
254 struct virtio_gpu_object *bo,
255 struct virtio_gpu_object_params *params,
256 struct virtio_gpu_object_array *objs,
257 struct virtio_gpu_fence *fence);
258 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
259 uint32_t resource_id);
260 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
262 __le32 width, __le32 height,
264 struct virtio_gpu_object_array *objs,
265 struct virtio_gpu_fence *fence);
266 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
267 uint32_t resource_id,
268 uint32_t x, uint32_t y,
269 uint32_t width, uint32_t height);
270 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
271 uint32_t scanout_id, uint32_t resource_id,
272 uint32_t width, uint32_t height,
273 uint32_t x, uint32_t y);
274 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
275 struct virtio_gpu_object *obj,
276 struct virtio_gpu_fence *fence);
277 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
278 struct virtio_gpu_object *obj);
279 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
280 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
281 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
282 struct virtio_gpu_output *output);
283 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
284 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
285 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
286 int idx, int version,
287 struct virtio_gpu_drv_cap_cache **cache_p);
288 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
289 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
290 uint32_t nlen, const char *name);
291 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
293 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
295 struct virtio_gpu_object_array *objs);
296 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
298 struct virtio_gpu_object_array *objs);
299 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
300 void *data, uint32_t data_size,
302 struct virtio_gpu_object_array *objs,
303 struct virtio_gpu_fence *fence);
304 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
306 uint64_t offset, uint32_t level,
307 struct virtio_gpu_box *box,
308 struct virtio_gpu_object_array *objs,
309 struct virtio_gpu_fence *fence);
310 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
312 uint64_t offset, uint32_t level,
313 struct virtio_gpu_box *box,
314 struct virtio_gpu_object_array *objs,
315 struct virtio_gpu_fence *fence);
317 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
318 struct virtio_gpu_object *bo,
319 struct virtio_gpu_object_params *params,
320 struct virtio_gpu_object_array *objs,
321 struct virtio_gpu_fence *fence);
322 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
323 void virtio_gpu_cursor_ack(struct virtqueue *vq);
324 void virtio_gpu_fence_ack(struct virtqueue *vq);
325 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
326 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
327 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
329 /* virtio_gpu_display.c */
330 int virtio_gpu_framebuffer_init(struct drm_device *dev,
331 struct virtio_gpu_framebuffer *vgfb,
332 const struct drm_mode_fb_cmd2 *mode_cmd,
333 struct drm_gem_object *obj);
334 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
335 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
337 /* virtio_gpu_plane.c */
338 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
339 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
340 enum drm_plane_type type,
343 /* virtio_gpu_fence.c */
344 bool virtio_fence_signaled(struct dma_fence *f);
345 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
346 struct virtio_gpu_device *vgdev);
347 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
348 struct virtio_gpu_ctrl_hdr *cmd_hdr,
349 struct virtio_gpu_fence *fence);
350 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
353 /* virtio_gpu_object */
354 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
356 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
357 struct virtio_gpu_object_params *params,
358 struct virtio_gpu_object **bo_ptr,
359 struct virtio_gpu_fence *fence);
361 /* virtgpu_prime.c */
362 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
363 struct drm_device *dev, struct dma_buf_attachment *attach,
364 struct sg_table *sgt);
366 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
368 return drm_vma_node_offset_addr(&bo->base.base.vma_node);
371 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo)
375 r = dma_resv_lock_interruptible(bo->base.base.resv, NULL);
376 if (unlikely(r != 0)) {
378 struct virtio_gpu_device *qdev =
379 bo->base.base.dev->dev_private;
380 dev_err(qdev->dev, "%p reserve failed\n", bo);
387 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
389 dma_resv_unlock(bo->base.base.resv);
393 int virtio_gpu_debugfs_init(struct drm_minor *minor);