2 * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
13 #include <drm/drm_plane.h>
19 struct tegra_windowgroup {
20 unsigned int usecount;
24 struct device *parent;
25 struct reset_control *rst;
28 struct tegra_shared_plane {
29 struct tegra_plane base;
30 struct tegra_windowgroup *wgrp;
33 static inline struct tegra_shared_plane *
34 to_tegra_shared_plane(struct drm_plane *plane)
36 return container_of(plane, struct tegra_shared_plane, base.base);
39 struct tegra_display_hub_soc {
40 unsigned int num_wgrps;
44 struct tegra_display_hub {
45 struct drm_private_obj base;
46 struct host1x_client client;
50 struct reset_control *rst;
52 unsigned int num_heads;
53 struct clk **clk_heads;
55 const struct tegra_display_hub_soc *soc;
56 struct tegra_windowgroup *wgrps;
59 static inline struct tegra_display_hub *
60 to_tegra_display_hub(struct host1x_client *client)
62 return container_of(client, struct tegra_display_hub, client);
65 struct tegra_display_hub_state {
66 struct drm_private_state base;
73 static inline struct tegra_display_hub_state *
74 to_tegra_display_hub_state(struct drm_private_state *priv)
76 return container_of(priv, struct tegra_display_hub_state, base);
82 int tegra_display_hub_prepare(struct tegra_display_hub *hub);
83 void tegra_display_hub_cleanup(struct tegra_display_hub *hub);
85 struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
90 int tegra_display_hub_atomic_check(struct drm_device *drm,
91 struct drm_atomic_state *state);
92 void tegra_display_hub_atomic_commit(struct drm_device *drm,
93 struct drm_atomic_state *state);
95 #define DC_CMD_IHUB_COMMON_MISC_CTL 0x068
96 #define LATENCY_EVENT (1 << 3)
98 #define DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER 0x451
99 #define CURS_SLOTS(x) (((x) & 0xff) << 8)
100 #define WGRP_SLOTS(x) (((x) & 0xff) << 0)
102 #endif /* TEGRA_HUB_H */