drivers/gpu/drm/nouveau/include/nvif/cl0080.h

   1 #ifndef __NVIF_CL0080_H__
   2 #define __NVIF_CL0080_H__
   3
   4 struct nv_device_v0 {
   5         __u8  version;
   6         __u8  pad01[7];
   7         __u64 device;   /* device identifier, ~0 for client default */
   8 };
   9
  10 #define NV_DEVICE_V0_INFO                                                  0x00
  11 #define NV_DEVICE_V0_TIME                                                  0x01
  12
  13 struct nv_device_info_v0 {
  14         __u8  version;
  15 #define NV_DEVICE_INFO_V0_IGP                                              0x00
  16 #define NV_DEVICE_INFO_V0_PCI                                              0x01
  17 #define NV_DEVICE_INFO_V0_AGP                                              0x02
  18 #define NV_DEVICE_INFO_V0_PCIE                                             0x03
  19 #define NV_DEVICE_INFO_V0_SOC                                              0x04
  20         __u8  platform;
  21         __u16 chipset;  /* from NV_PMC_BOOT_0 */
  22         __u8  revision; /* from NV_PMC_BOOT_0 */
  23 #define NV_DEVICE_INFO_V0_TNT                                              0x01
  24 #define NV_DEVICE_INFO_V0_CELSIUS                                          0x02
  25 #define NV_DEVICE_INFO_V0_KELVIN                                           0x03
  26 #define NV_DEVICE_INFO_V0_RANKINE                                          0x04
  27 #define NV_DEVICE_INFO_V0_CURIE                                            0x05
  28 #define NV_DEVICE_INFO_V0_TESLA                                            0x06
  29 #define NV_DEVICE_INFO_V0_FERMI                                            0x07
  30 #define NV_DEVICE_INFO_V0_KEPLER                                           0x08
  31 #define NV_DEVICE_INFO_V0_MAXWELL                                          0x09
  32 #define NV_DEVICE_INFO_V0_PASCAL                                           0x0a
  33         __u8  family;
  34         __u8  pad06[2];
  35         __u64 ram_size;
  36         __u64 ram_user;
  37         char  chip[16];
  38         char  name[64];
  39 };
  40
  41 struct nv_device_time_v0 {
  42         __u8  version;
  43         __u8  pad01[7];
  44         __u64 time;
  45 };
  46 #endif