2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <core/class.h>
27 #include <core/engctx.h>
29 #include <subdev/fb.h>
30 #include <subdev/timer.h>
31 #include <subdev/instmem.h>
33 #include <engine/mpeg.h>
34 #include <engine/mpeg/nv31.h>
36 /*******************************************************************************
38 ******************************************************************************/
41 nv40_mpeg_mthd_dma(struct nouveau_object *object, u32 mthd, void *arg, u32 len)
43 struct nouveau_instmem *imem = nouveau_instmem(object);
44 struct nv31_mpeg_priv *priv = (void *)object->engine;
45 u32 inst = *(u32 *)arg << 4;
46 u32 dma0 = nv_ro32(imem, inst + 0);
47 u32 dma1 = nv_ro32(imem, inst + 4);
48 u32 dma2 = nv_ro32(imem, inst + 8);
49 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20);
52 /* only allow linear DMA objects */
53 if (!(dma0 & 0x00002000))
58 nv_mask(priv, 0x00b300, 0x00030000, (dma0 & 0x00030000));
59 nv_wr32(priv, 0x00b334, base);
60 nv_wr32(priv, 0x00b324, size);
64 nv_mask(priv, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);
65 nv_wr32(priv, 0x00b360, base);
66 nv_wr32(priv, 0x00b364, size);
68 /* DMA_IMAGE, VRAM only */
69 if (dma0 & 0x00030000)
72 nv_wr32(priv, 0x00b370, base);
73 nv_wr32(priv, 0x00b374, size);
79 static struct nouveau_omthds
80 nv40_mpeg_omthds[] = {
81 { 0x0190, 0x0190, nv40_mpeg_mthd_dma },
82 { 0x01a0, 0x01a0, nv40_mpeg_mthd_dma },
83 { 0x01b0, 0x01b0, nv40_mpeg_mthd_dma },
88 nv40_mpeg_sclass[] = {
89 { 0x3174, &nv31_mpeg_ofuncs, nv40_mpeg_omthds },
93 /*******************************************************************************
94 * PMPEG engine/subdev functions
95 ******************************************************************************/
98 nv40_mpeg_intr(struct nouveau_subdev *subdev)
100 struct nv31_mpeg_priv *priv = (void *)subdev;
103 if ((stat = nv_rd32(priv, 0x00b100)))
104 nv31_mpeg_intr(subdev);
106 if ((stat = nv_rd32(priv, 0x00b800))) {
107 nv_error(priv, "PMSRCH 0x%08x\n", stat);
108 nv_wr32(priv, 0x00b800, stat);
113 nv40_mpeg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
114 struct nouveau_oclass *oclass, void *data, u32 size,
115 struct nouveau_object **pobject)
117 struct nv31_mpeg_priv *priv;
120 ret = nouveau_mpeg_create(parent, engine, oclass, &priv);
121 *pobject = nv_object(priv);
125 nv_subdev(priv)->unit = 0x00000002;
126 nv_subdev(priv)->intr = nv40_mpeg_intr;
127 nv_engine(priv)->cclass = &nv31_mpeg_cclass;
128 nv_engine(priv)->sclass = nv40_mpeg_sclass;
129 nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;
133 struct nouveau_oclass
135 .handle = NV_ENGINE(MPEG, 0x40),
136 .ofuncs = &(struct nouveau_ofuncs) {
137 .ctor = nv40_mpeg_ctor,
138 .dtor = _nouveau_mpeg_dtor,
139 .init = nv31_mpeg_init,
140 .fini = _nouveau_mpeg_fini,