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25 #ifndef __I915_GEM_OBJECT_H__
26 #define __I915_GEM_OBJECT_H__
28 #include <linux/reservation.h>
30 #include <drm/drm_vma_manager.h>
31 #include <drm/drm_gem.h>
34 #include <drm/i915_drm.h>
36 #include "i915_request.h"
37 #include "i915_selftest.h"
39 struct drm_i915_gem_object;
42 * struct i915_lut_handle tracks the fast lookups from handle to vma used
43 * for execbuf. Although we use a radixtree for that mapping, in order to
44 * remove them as the object or context is closed, we need a secondary list
45 * and a translation entry (i915_lut_handle).
47 struct i915_lut_handle {
48 struct list_head obj_link;
49 struct list_head ctx_link;
50 struct i915_gem_context *ctx;
54 struct drm_i915_gem_object_ops {
56 #define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
57 #define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)
58 #define I915_GEM_OBJECT_IS_PROXY BIT(2)
60 /* Interface between the GEM object and its backing storage.
61 * get_pages() is called once prior to the use of the associated set
62 * of pages before to binding them into the GTT, and put_pages() is
63 * called after we no longer need them. As we expect there to be
64 * associated cost with migrating pages between the backing storage
65 * and making them available for the GPU (e.g. clflush), we may hold
66 * onto the pages after they are no longer referenced by the GPU
67 * in case they may be used again shortly (for example migrating the
68 * pages to a different memory domain within the GTT). put_pages()
69 * will therefore most likely be called when the object itself is
70 * being released or under memory pressure (where we attempt to
71 * reap pages for the shrinker).
73 int (*get_pages)(struct drm_i915_gem_object *);
74 void (*put_pages)(struct drm_i915_gem_object *, struct sg_table *);
76 int (*pwrite)(struct drm_i915_gem_object *,
77 const struct drm_i915_gem_pwrite *);
79 int (*dmabuf_export)(struct drm_i915_gem_object *);
80 void (*release)(struct drm_i915_gem_object *);
83 struct drm_i915_gem_object {
84 struct drm_gem_object base;
86 const struct drm_i915_gem_object_ops *ops;
89 * @vma_list: List of VMAs backed by this object
91 * The VMA on this list are ordered by type, all GGTT vma are placed
92 * at the head and all ppGTT vma are placed at the tail. The different
93 * types of GGTT vma are unordered between themselves, use the
94 * @vma_tree (which has a defined order between all VMA) to find an
97 struct list_head vma_list;
99 * @vma_tree: Ordered tree of VMAs backed by this object
101 * All VMA created for this object are placed in the @vma_tree for
102 * fast retrieval via a binary search in i915_vma_instance().
103 * They are also added to @vma_list for easy iteration.
105 struct rb_root vma_tree;
108 * @lut_list: List of vma lookup entries in use for this object.
110 * If this object is closed, we need to remove all of its VMA from
111 * the fast lookup index in associated contexts; @lut_list provides
112 * this translation from object to context->handles_vma.
114 struct list_head lut_list;
116 /** Stolen memory for this object, instead of being backed by shmem. */
117 struct drm_mm_node *stolen;
120 struct llist_node freed;
124 * Whether the object is currently in the GGTT mmap.
126 unsigned int userfault_count;
127 struct list_head userfault_link;
129 struct list_head batch_pool_link;
130 I915_SELFTEST_DECLARE(struct list_head st_link);
135 * Have we taken a reference for the object for incomplete GPU
138 #define I915_BO_ACTIVE_REF 0
141 * Is the object to be mapped as read-only to the GPU
142 * Only honoured if hardware has relevant pte bit
144 unsigned long gt_ro:1;
145 unsigned int cache_level:3;
146 unsigned int cache_coherent:2;
147 #define I915_BO_CACHE_COHERENT_FOR_READ BIT(0)
148 #define I915_BO_CACHE_COHERENT_FOR_WRITE BIT(1)
149 unsigned int cache_dirty:1;
152 * @read_domains: Read memory domains.
154 * These monitor which caches contain read/write data related to the
155 * object. When transitioning from one set of domains to another,
156 * the driver is called to ensure that caches are suitably flushed and
162 * @write_domain: Corresponding unique write memory domain.
166 atomic_t frontbuffer_bits;
167 unsigned int frontbuffer_ggtt_origin; /* write once */
168 struct i915_gem_active frontbuffer_write;
170 /** Current tiling stride for the object, if it's tiled. */
171 unsigned int tiling_and_stride;
172 #define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
173 #define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
174 #define STRIDE_MASK (~TILING_MASK)
176 /** Count of VMA actually bound by this object */
177 unsigned int bind_count;
178 unsigned int active_count;
179 /** Count of how many global VMA are currently pinned for use by HW */
180 unsigned int pin_global;
183 struct mutex lock; /* protects the pages and their use */
184 atomic_t pages_pin_count;
186 struct sg_table *pages;
189 /* TODO: whack some of this into the error state */
190 struct i915_page_sizes {
192 * The sg mask of the pages sg_table. i.e the mask of
193 * of the lengths for each sg entry.
198 * The gtt page sizes we are allowed to use given the
199 * sg mask and the supported page sizes. This will
200 * express the smallest unit we can use for the whole
201 * object, as well as the larger sizes we may be able
202 * to use opportunistically.
207 * The actual gtt page size usage. Since we can have
208 * multiple vma associated with this object we need to
209 * prevent any trampling of state, hence a copy of this
210 * struct also lives in each vma, therefore the gtt
211 * value here should only be read/write through the vma.
216 I915_SELFTEST_DECLARE(unsigned int page_mask);
218 struct i915_gem_object_page_iter {
219 struct scatterlist *sg_pos;
220 unsigned int sg_idx; /* in pages, but 32bit eek! */
222 struct radix_tree_root radix;
223 struct mutex lock; /* protects this cache */
227 * Element within i915->mm.unbound_list or i915->mm.bound_list,
228 * locked by i915->mm.obj_lock.
230 struct list_head link;
233 * Advice: are the backing pages purgeable?
238 * This is set if the object has been written to since the
239 * pages were last acquired.
244 * This is set if the object has been pinned due to unknown
250 /** Breadcrumb of last rendering to the buffer.
251 * There can only be one writer, but we allow for multiple readers.
252 * If there is a writer that necessarily implies that all other
253 * read requests are complete - but we may only be lazily clearing
254 * the read requests. A read request is naturally the most recent
255 * request on a ring, so we may have two different write and read
256 * requests on one ring where the write request is older than the
257 * read request. This allows for the CPU to read from an active
258 * buffer by only waiting for the write to complete.
260 struct reservation_object *resv;
262 /** References from framebuffers, locks out tiling changes. */
263 unsigned int framebuffer_references;
265 /** Record of address bit 17 of each page at last unbind. */
266 unsigned long *bit_17;
269 struct i915_gem_userptr {
271 unsigned read_only :1;
273 struct i915_mm_struct *mm;
274 struct i915_mmu_object *mmu_object;
275 struct work_struct *work;
278 unsigned long scratch;
283 /** for phys allocated objects */
284 struct drm_dma_handle *phys_handle;
286 struct reservation_object __builtin_resv;
289 static inline struct drm_i915_gem_object *
290 to_intel_bo(struct drm_gem_object *gem)
292 /* Assert that to_intel_bo(NULL) == NULL */
293 BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));
295 return container_of(gem, struct drm_i915_gem_object, base);
299 * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
300 * @filp: DRM file private date
301 * @handle: userspace handle
305 * A pointer to the object named by the handle if such exists on @filp, NULL
306 * otherwise. This object is only valid whilst under the RCU read lock, and
307 * note carefully the object may be in the process of being destroyed.
309 static inline struct drm_i915_gem_object *
310 i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
312 #ifdef CONFIG_LOCKDEP
313 WARN_ON(debug_locks && !lock_is_held(&rcu_lock_map));
315 return idr_find(&file->object_idr, handle);
318 static inline struct drm_i915_gem_object *
319 i915_gem_object_lookup(struct drm_file *file, u32 handle)
321 struct drm_i915_gem_object *obj;
324 obj = i915_gem_object_lookup_rcu(file, handle);
325 if (obj && !kref_get_unless_zero(&obj->base.refcount))
333 extern struct drm_gem_object *
334 drm_gem_object_lookup(struct drm_file *file, u32 handle);
336 __attribute__((nonnull))
337 static inline struct drm_i915_gem_object *
338 i915_gem_object_get(struct drm_i915_gem_object *obj)
340 drm_gem_object_reference(&obj->base);
345 extern void drm_gem_object_reference(struct drm_gem_object *);
347 __attribute__((nonnull))
349 i915_gem_object_put(struct drm_i915_gem_object *obj)
351 __drm_gem_object_unreference(&obj->base);
355 extern void drm_gem_object_unreference(struct drm_gem_object *);
358 extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);
360 static inline void i915_gem_object_lock(struct drm_i915_gem_object *obj)
362 reservation_object_lock(obj->resv, NULL);
365 static inline void i915_gem_object_unlock(struct drm_i915_gem_object *obj)
367 reservation_object_unlock(obj->resv);
371 i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj)
373 return obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE;
377 i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj)
379 return obj->ops->flags & I915_GEM_OBJECT_IS_SHRINKABLE;
383 i915_gem_object_is_proxy(const struct drm_i915_gem_object *obj)
385 return obj->ops->flags & I915_GEM_OBJECT_IS_PROXY;
389 i915_gem_object_is_active(const struct drm_i915_gem_object *obj)
391 return obj->active_count;
395 i915_gem_object_has_active_reference(const struct drm_i915_gem_object *obj)
397 return test_bit(I915_BO_ACTIVE_REF, &obj->flags);
401 i915_gem_object_set_active_reference(struct drm_i915_gem_object *obj)
403 lockdep_assert_held(&obj->base.dev->struct_mutex);
404 __set_bit(I915_BO_ACTIVE_REF, &obj->flags);
408 i915_gem_object_clear_active_reference(struct drm_i915_gem_object *obj)
410 lockdep_assert_held(&obj->base.dev->struct_mutex);
411 __clear_bit(I915_BO_ACTIVE_REF, &obj->flags);
414 void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj);
417 i915_gem_object_is_framebuffer(const struct drm_i915_gem_object *obj)
419 return READ_ONCE(obj->framebuffer_references);
422 static inline unsigned int
423 i915_gem_object_get_tiling(struct drm_i915_gem_object *obj)
425 return obj->tiling_and_stride & TILING_MASK;
429 i915_gem_object_is_tiled(struct drm_i915_gem_object *obj)
431 return i915_gem_object_get_tiling(obj) != I915_TILING_NONE;
434 static inline unsigned int
435 i915_gem_object_get_stride(struct drm_i915_gem_object *obj)
437 return obj->tiling_and_stride & STRIDE_MASK;
440 static inline unsigned int
441 i915_gem_tile_height(unsigned int tiling)
444 return tiling == I915_TILING_Y ? 32 : 8;
447 static inline unsigned int
448 i915_gem_object_get_tile_height(struct drm_i915_gem_object *obj)
450 return i915_gem_tile_height(i915_gem_object_get_tiling(obj));
453 static inline unsigned int
454 i915_gem_object_get_tile_row_size(struct drm_i915_gem_object *obj)
456 return (i915_gem_object_get_stride(obj) *
457 i915_gem_object_get_tile_height(obj));
460 int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
461 unsigned int tiling, unsigned int stride);
463 static inline struct intel_engine_cs *
464 i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj)
466 struct intel_engine_cs *engine = NULL;
467 struct dma_fence *fence;
470 fence = reservation_object_get_excl_rcu(obj->resv);
473 if (fence && dma_fence_is_i915(fence) && !dma_fence_is_signaled(fence))
474 engine = to_request(fence)->engine;
475 dma_fence_put(fence);
480 void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
481 unsigned int cache_level);
482 void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);