drivers/gpu/drm/i915/gvt/kvmgt.c

   1 /*
   2  * KVMGT - the implementation of Intel mediated pass-through framework for KVM
   3  *
   4  * Copyright(c) 2014-2016 Intel Corporation. All rights reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Kevin Tian <kevin.tian@intel.com>
  27  *    Jike Song <jike.song@intel.com>
  28  *    Xiaoguang Chen <xiaoguang.chen@intel.com>
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/device.h>
  33 #include <linux/mm.h>
  34 #include <linux/mmu_context.h>
  35 #include <linux/types.h>
  36 #include <linux/list.h>
  37 #include <linux/rbtree.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/eventfd.h>
  40 #include <linux/uuid.h>
  41 #include <linux/kvm_host.h>
  42 #include <linux/vfio.h>
  43 #include <linux/mdev.h>
  44
  45 #include "i915_drv.h"
  46 #include "gvt.h"
  47
  48 static const struct intel_gvt_ops *intel_gvt_ops;
  49
  50 /* helper macros copied from vfio-pci */
  51 #define VFIO_PCI_OFFSET_SHIFT   40
  52 #define VFIO_PCI_OFFSET_TO_INDEX(off)   (off >> VFIO_PCI_OFFSET_SHIFT)
  53 #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
  54 #define VFIO_PCI_OFFSET_MASK    (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
  55
  56 struct vfio_region {
  57         u32                             type;
  58         u32                             subtype;
  59         size_t                          size;
  60         u32                             flags;
  61 };
  62
  63 struct kvmgt_pgfn {
  64         gfn_t gfn;
  65         struct hlist_node hnode;
  66 };
  67
  68 struct kvmgt_guest_info {
  69         struct kvm *kvm;
  70         struct intel_vgpu *vgpu;
  71         struct kvm_page_track_notifier_node track_node;
  72 #define NR_BKT (1 << 18)
  73         struct hlist_head ptable[NR_BKT];
  74 #undef NR_BKT
  75 };
  76
  77 struct gvt_dma {
  78         struct rb_node node;
  79         gfn_t gfn;
  80         unsigned long iova;
  81 };
  82
  83 static inline bool handle_valid(unsigned long handle)
  84 {
  85         return !!(handle & ~0xff);
  86 }
  87
  88 static int kvmgt_guest_init(struct mdev_device *mdev);
  89 static void intel_vgpu_release_work(struct work_struct *work);
  90 static bool kvmgt_guest_exit(struct kvmgt_guest_info *info);
  91
  92 static int gvt_dma_map_iova(struct intel_vgpu *vgpu, kvm_pfn_t pfn,
  93                 unsigned long *iova)
  94 {
  95         struct page *page;
  96         struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
  97         dma_addr_t daddr;
  98
  99         if (unlikely(!pfn_valid(pfn)))
 100                 return -EFAULT;
 101
 102         page = pfn_to_page(pfn);
 103         daddr = dma_map_page(dev, page, 0, PAGE_SIZE,
 104                         PCI_DMA_BIDIRECTIONAL);
 105         if (dma_mapping_error(dev, daddr))
 106                 return -ENOMEM;
 107
 108         *iova = (unsigned long)(daddr >> PAGE_SHIFT);
 109         return 0;
 110 }
 111
 112 static void gvt_dma_unmap_iova(struct intel_vgpu *vgpu, unsigned long iova)
 113 {
 114         struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
 115         dma_addr_t daddr;
 116
 117         daddr = (dma_addr_t)(iova << PAGE_SHIFT);
 118         dma_unmap_page(dev, daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 119 }
 120
 121 static struct gvt_dma *__gvt_cache_find(struct intel_vgpu *vgpu, gfn_t gfn)
 122 {
 123         struct rb_node *node = vgpu->vdev.cache.rb_node;
 124         struct gvt_dma *ret = NULL;
 125
 126         while (node) {
 127                 struct gvt_dma *itr = rb_entry(node, struct gvt_dma, node);
 128
 129                 if (gfn < itr->gfn)
 130                         node = node->rb_left;
 131                 else if (gfn > itr->gfn)
 132                         node = node->rb_right;
 133                 else {
 134                         ret = itr;
 135                         goto out;
 136                 }
 137         }
 138
 139 out:
 140         return ret;
 141 }
 142
 143 static unsigned long gvt_cache_find(struct intel_vgpu *vgpu, gfn_t gfn)
 144 {
 145         struct gvt_dma *entry;
 146         unsigned long iova;
 147
 148         mutex_lock(&vgpu->vdev.cache_lock);
 149
 150         entry = __gvt_cache_find(vgpu, gfn);
 151         iova = (entry == NULL) ? INTEL_GVT_INVALID_ADDR : entry->iova;
 152
 153         mutex_unlock(&vgpu->vdev.cache_lock);
 154         return iova;
 155 }
 156
 157 static void gvt_cache_add(struct intel_vgpu *vgpu, gfn_t gfn,
 158                 unsigned long iova)
 159 {
 160         struct gvt_dma *new, *itr;
 161         struct rb_node **link = &vgpu->vdev.cache.rb_node, *parent = NULL;
 162
 163         new = kzalloc(sizeof(struct gvt_dma), GFP_KERNEL);
 164         if (!new)
 165                 return;
 166
 167         new->gfn = gfn;
 168         new->iova = iova;
 169
 170         mutex_lock(&vgpu->vdev.cache_lock);
 171         while (*link) {
 172                 parent = *link;
 173                 itr = rb_entry(parent, struct gvt_dma, node);
 174
 175                 if (gfn == itr->gfn)
 176                         goto out;
 177                 else if (gfn < itr->gfn)
 178                         link = &parent->rb_left;
 179                 else
 180                         link = &parent->rb_right;
 181         }
 182
 183         rb_link_node(&new->node, parent, link);
 184         rb_insert_color(&new->node, &vgpu->vdev.cache);
 185         mutex_unlock(&vgpu->vdev.cache_lock);
 186         return;
 187
 188 out:
 189         mutex_unlock(&vgpu->vdev.cache_lock);
 190         kfree(new);
 191 }
 192
 193 static void __gvt_cache_remove_entry(struct intel_vgpu *vgpu,
 194                                 struct gvt_dma *entry)
 195 {
 196         rb_erase(&entry->node, &vgpu->vdev.cache);
 197         kfree(entry);
 198 }
 199
 200 static void gvt_cache_remove(struct intel_vgpu *vgpu, gfn_t gfn)
 201 {
 202         struct device *dev = mdev_dev(vgpu->vdev.mdev);
 203         struct gvt_dma *this;
 204         unsigned long g1;
 205         int rc;
 206
 207         mutex_lock(&vgpu->vdev.cache_lock);
 208         this  = __gvt_cache_find(vgpu, gfn);
 209         if (!this) {
 210                 mutex_unlock(&vgpu->vdev.cache_lock);
 211                 return;
 212         }
 213
 214         g1 = gfn;
 215         gvt_dma_unmap_iova(vgpu, this->iova);
 216         rc = vfio_unpin_pages(dev, &g1, 1);
 217         WARN_ON(rc != 1);
 218         __gvt_cache_remove_entry(vgpu, this);
 219         mutex_unlock(&vgpu->vdev.cache_lock);
 220 }
 221
 222 static void gvt_cache_init(struct intel_vgpu *vgpu)
 223 {
 224         vgpu->vdev.cache = RB_ROOT;
 225         mutex_init(&vgpu->vdev.cache_lock);
 226 }
 227
 228 static void gvt_cache_destroy(struct intel_vgpu *vgpu)
 229 {
 230         struct gvt_dma *dma;
 231         struct rb_node *node = NULL;
 232         struct device *dev = mdev_dev(vgpu->vdev.mdev);
 233         unsigned long gfn;
 234
 235         for (;;) {
 236                 mutex_lock(&vgpu->vdev.cache_lock);
 237                 node = rb_first(&vgpu->vdev.cache);
 238                 if (!node) {
 239                         mutex_unlock(&vgpu->vdev.cache_lock);
 240                         break;
 241                 }
 242                 dma = rb_entry(node, struct gvt_dma, node);
 243                 gvt_dma_unmap_iova(vgpu, dma->iova);
 244                 gfn = dma->gfn;
 245                 __gvt_cache_remove_entry(vgpu, dma);
 246                 mutex_unlock(&vgpu->vdev.cache_lock);
 247                 vfio_unpin_pages(dev, &gfn, 1);
 248         }
 249 }
 250
 251 static struct intel_vgpu_type *intel_gvt_find_vgpu_type(struct intel_gvt *gvt,
 252                 const char *name)
 253 {
 254         int i;
 255         struct intel_vgpu_type *t;
 256         const char *driver_name = dev_driver_string(
 257                         &gvt->dev_priv->drm.pdev->dev);
 258
 259         for (i = 0; i < gvt->num_types; i++) {
 260                 t = &gvt->types[i];
 261                 if (!strncmp(t->name, name + strlen(driver_name) + 1,
 262                         sizeof(t->name)))
 263                         return t;
 264         }
 265
 266         return NULL;
 267 }
 268
 269 static ssize_t available_instances_show(struct kobject *kobj,
 270                                         struct device *dev, char *buf)
 271 {
 272         struct intel_vgpu_type *type;
 273         unsigned int num = 0;
 274         void *gvt = kdev_to_i915(dev)->gvt;
 275
 276         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 277         if (!type)
 278                 num = 0;
 279         else
 280                 num = type->avail_instance;
 281
 282         return sprintf(buf, "%u\n", num);
 283 }
 284
 285 static ssize_t device_api_show(struct kobject *kobj, struct device *dev,
 286                 char *buf)
 287 {
 288         return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
 289 }
 290
 291 static ssize_t description_show(struct kobject *kobj, struct device *dev,
 292                 char *buf)
 293 {
 294         struct intel_vgpu_type *type;
 295         void *gvt = kdev_to_i915(dev)->gvt;
 296
 297         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 298         if (!type)
 299                 return 0;
 300
 301         return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
 302                        "fence: %d\nresolution: %s\n"
 303                        "weight: %d\n",
 304                        BYTES_TO_MB(type->low_gm_size),
 305                        BYTES_TO_MB(type->high_gm_size),
 306                        type->fence, vgpu_edid_str(type->resolution),
 307                        type->weight);
 308 }
 309
 310 static MDEV_TYPE_ATTR_RO(available_instances);
 311 static MDEV_TYPE_ATTR_RO(device_api);
 312 static MDEV_TYPE_ATTR_RO(description);
 313
 314 static struct attribute *type_attrs[] = {
 315         &mdev_type_attr_available_instances.attr,
 316         &mdev_type_attr_device_api.attr,
 317         &mdev_type_attr_description.attr,
 318         NULL,
 319 };
 320
 321 static struct attribute_group *intel_vgpu_type_groups[] = {
 322         [0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
 323 };
 324
 325 static bool intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
 326 {
 327         int i, j;
 328         struct intel_vgpu_type *type;
 329         struct attribute_group *group;
 330
 331         for (i = 0; i < gvt->num_types; i++) {
 332                 type = &gvt->types[i];
 333
 334                 group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
 335                 if (WARN_ON(!group))
 336                         goto unwind;
 337
 338                 group->name = type->name;
 339                 group->attrs = type_attrs;
 340                 intel_vgpu_type_groups[i] = group;
 341         }
 342
 343         return true;
 344
 345 unwind:
 346         for (j = 0; j < i; j++) {
 347                 group = intel_vgpu_type_groups[j];
 348                 kfree(group);
 349         }
 350
 351         return false;
 352 }
 353
 354 static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)
 355 {
 356         int i;
 357         struct attribute_group *group;
 358
 359         for (i = 0; i < gvt->num_types; i++) {
 360                 group = intel_vgpu_type_groups[i];
 361                 kfree(group);
 362         }
 363 }
 364
 365 static void kvmgt_protect_table_init(struct kvmgt_guest_info *info)
 366 {
 367         hash_init(info->ptable);
 368 }
 369
 370 static void kvmgt_protect_table_destroy(struct kvmgt_guest_info *info)
 371 {
 372         struct kvmgt_pgfn *p;
 373         struct hlist_node *tmp;
 374         int i;
 375
 376         hash_for_each_safe(info->ptable, i, tmp, p, hnode) {
 377                 hash_del(&p->hnode);
 378                 kfree(p);
 379         }
 380 }
 381
 382 static struct kvmgt_pgfn *
 383 __kvmgt_protect_table_find(struct kvmgt_guest_info *info, gfn_t gfn)
 384 {
 385         struct kvmgt_pgfn *p, *res = NULL;
 386
 387         hash_for_each_possible(info->ptable, p, hnode, gfn) {
 388                 if (gfn == p->gfn) {
 389                         res = p;
 390                         break;
 391                 }
 392         }
 393
 394         return res;
 395 }
 396
 397 static bool kvmgt_gfn_is_write_protected(struct kvmgt_guest_info *info,
 398                                 gfn_t gfn)
 399 {
 400         struct kvmgt_pgfn *p;
 401
 402         p = __kvmgt_protect_table_find(info, gfn);
 403         return !!p;
 404 }
 405
 406 static void kvmgt_protect_table_add(struct kvmgt_guest_info *info, gfn_t gfn)
 407 {
 408         struct kvmgt_pgfn *p;
 409
 410         if (kvmgt_gfn_is_write_protected(info, gfn))
 411                 return;
 412
 413         p = kzalloc(sizeof(struct kvmgt_pgfn), GFP_ATOMIC);
 414         if (WARN(!p, "gfn: 0x%llx\n", gfn))
 415                 return;
 416
 417         p->gfn = gfn;
 418         hash_add(info->ptable, &p->hnode, gfn);
 419 }
 420
 421 static void kvmgt_protect_table_del(struct kvmgt_guest_info *info,
 422                                 gfn_t gfn)
 423 {
 424         struct kvmgt_pgfn *p;
 425
 426         p = __kvmgt_protect_table_find(info, gfn);
 427         if (p) {
 428                 hash_del(&p->hnode);
 429                 kfree(p);
 430         }
 431 }
 432
 433 static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 434 {
 435         struct intel_vgpu *vgpu = NULL;
 436         struct intel_vgpu_type *type;
 437         struct device *pdev;
 438         void *gvt;
 439         int ret;
 440
 441         pdev = mdev_parent_dev(mdev);
 442         gvt = kdev_to_i915(pdev)->gvt;
 443
 444         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 445         if (!type) {
 446                 gvt_vgpu_err("failed to find type %s to create\n",
 447                                                 kobject_name(kobj));
 448                 ret = -EINVAL;
 449                 goto out;
 450         }
 451
 452         vgpu = intel_gvt_ops->vgpu_create(gvt, type);
 453         if (IS_ERR_OR_NULL(vgpu)) {
 454                 ret = vgpu == NULL ? -EFAULT : PTR_ERR(vgpu);
 455                 gvt_vgpu_err("failed to create intel vgpu: %d\n", ret);
 456                 goto out;
 457         }
 458
 459         INIT_WORK(&vgpu->vdev.release_work, intel_vgpu_release_work);
 460
 461         vgpu->vdev.mdev = mdev;
 462         mdev_set_drvdata(mdev, vgpu);
 463
 464         gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
 465                      dev_name(mdev_dev(mdev)));
 466         ret = 0;
 467
 468 out:
 469         return ret;
 470 }
 471
 472 static int intel_vgpu_remove(struct mdev_device *mdev)
 473 {
 474         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 475
 476         if (handle_valid(vgpu->handle))
 477                 return -EBUSY;
 478
 479         intel_gvt_ops->vgpu_destroy(vgpu);
 480         return 0;
 481 }
 482
 483 static int intel_vgpu_iommu_notifier(struct notifier_block *nb,
 484                                      unsigned long action, void *data)
 485 {
 486         struct intel_vgpu *vgpu = container_of(nb,
 487                                         struct intel_vgpu,
 488                                         vdev.iommu_notifier);
 489
 490         if (action == VFIO_IOMMU_NOTIFY_DMA_UNMAP) {
 491                 struct vfio_iommu_type1_dma_unmap *unmap = data;
 492                 unsigned long gfn, end_gfn;
 493
 494                 gfn = unmap->iova >> PAGE_SHIFT;
 495                 end_gfn = gfn + unmap->size / PAGE_SIZE;
 496
 497                 while (gfn < end_gfn)
 498                         gvt_cache_remove(vgpu, gfn++);
 499         }
 500
 501         return NOTIFY_OK;
 502 }
 503
 504 static int intel_vgpu_group_notifier(struct notifier_block *nb,
 505                                      unsigned long action, void *data)
 506 {
 507         struct intel_vgpu *vgpu = container_of(nb,
 508                                         struct intel_vgpu,
 509                                         vdev.group_notifier);
 510
 511         /* the only action we care about */
 512         if (action == VFIO_GROUP_NOTIFY_SET_KVM) {
 513                 vgpu->vdev.kvm = data;
 514
 515                 if (!data)
 516                         schedule_work(&vgpu->vdev.release_work);
 517         }
 518
 519         return NOTIFY_OK;
 520 }
 521
 522 static int intel_vgpu_open(struct mdev_device *mdev)
 523 {
 524         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 525         unsigned long events;
 526         int ret;
 527
 528         vgpu->vdev.iommu_notifier.notifier_call = intel_vgpu_iommu_notifier;
 529         vgpu->vdev.group_notifier.notifier_call = intel_vgpu_group_notifier;
 530
 531         events = VFIO_IOMMU_NOTIFY_DMA_UNMAP;
 532         ret = vfio_register_notifier(mdev_dev(mdev), VFIO_IOMMU_NOTIFY, &events,
 533                                 &vgpu->vdev.iommu_notifier);
 534         if (ret != 0) {
 535                 gvt_vgpu_err("vfio_register_notifier for iommu failed: %d\n",
 536                         ret);
 537                 goto out;
 538         }
 539
 540         events = VFIO_GROUP_NOTIFY_SET_KVM;
 541         ret = vfio_register_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY, &events,
 542                                 &vgpu->vdev.group_notifier);
 543         if (ret != 0) {
 544                 gvt_vgpu_err("vfio_register_notifier for group failed: %d\n",
 545                         ret);
 546                 goto undo_iommu;
 547         }
 548
 549         ret = kvmgt_guest_init(mdev);
 550         if (ret)
 551                 goto undo_group;
 552
 553         intel_gvt_ops->vgpu_activate(vgpu);
 554
 555         atomic_set(&vgpu->vdev.released, 0);
 556         return ret;
 557
 558 undo_group:
 559         vfio_unregister_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY,
 560                                         &vgpu->vdev.group_notifier);
 561
 562 undo_iommu:
 563         vfio_unregister_notifier(mdev_dev(mdev), VFIO_IOMMU_NOTIFY,
 564                                         &vgpu->vdev.iommu_notifier);
 565 out:
 566         return ret;
 567 }
 568
 569 static void __intel_vgpu_release(struct intel_vgpu *vgpu)
 570 {
 571         struct kvmgt_guest_info *info;
 572         int ret;
 573
 574         if (!handle_valid(vgpu->handle))
 575                 return;
 576
 577         if (atomic_cmpxchg(&vgpu->vdev.released, 0, 1))
 578                 return;
 579
 580         intel_gvt_ops->vgpu_deactivate(vgpu);
 581
 582         ret = vfio_unregister_notifier(mdev_dev(vgpu->vdev.mdev), VFIO_IOMMU_NOTIFY,
 583                                         &vgpu->vdev.iommu_notifier);
 584         WARN(ret, "vfio_unregister_notifier for iommu failed: %d\n", ret);
 585
 586         ret = vfio_unregister_notifier(mdev_dev(vgpu->vdev.mdev), VFIO_GROUP_NOTIFY,
 587                                         &vgpu->vdev.group_notifier);
 588         WARN(ret, "vfio_unregister_notifier for group failed: %d\n", ret);
 589
 590         info = (struct kvmgt_guest_info *)vgpu->handle;
 591         kvmgt_guest_exit(info);
 592
 593         vgpu->vdev.kvm = NULL;
 594         vgpu->handle = 0;
 595 }
 596
 597 static void intel_vgpu_release(struct mdev_device *mdev)
 598 {
 599         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 600
 601         __intel_vgpu_release(vgpu);
 602 }
 603
 604 static void intel_vgpu_release_work(struct work_struct *work)
 605 {
 606         struct intel_vgpu *vgpu = container_of(work, struct intel_vgpu,
 607                                         vdev.release_work);
 608
 609         __intel_vgpu_release(vgpu);
 610 }
 611
 612 static uint64_t intel_vgpu_get_bar_addr(struct intel_vgpu *vgpu, int bar)
 613 {
 614         u32 start_lo, start_hi;
 615         u32 mem_type;
 616
 617         start_lo = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + bar)) &
 618                         PCI_BASE_ADDRESS_MEM_MASK;
 619         mem_type = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + bar)) &
 620                         PCI_BASE_ADDRESS_MEM_TYPE_MASK;
 621
 622         switch (mem_type) {
 623         case PCI_BASE_ADDRESS_MEM_TYPE_64:
 624                 start_hi = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space
 625                                                 + bar + 4));
 626                 break;
 627         case PCI_BASE_ADDRESS_MEM_TYPE_32:
 628         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
 629                 /* 1M mem BAR treated as 32-bit BAR */
 630         default:
 631                 /* mem unknown type treated as 32-bit BAR */
 632                 start_hi = 0;
 633                 break;
 634         }
 635
 636         return ((u64)start_hi << 32) | start_lo;
 637 }
 638
 639 static int intel_vgpu_bar_rw(struct intel_vgpu *vgpu, int bar, uint64_t off,
 640                              void *buf, unsigned int count, bool is_write)
 641 {
 642         uint64_t bar_start = intel_vgpu_get_bar_addr(vgpu, bar);
 643         int ret;
 644
 645         if (is_write)
 646                 ret = intel_gvt_ops->emulate_mmio_write(vgpu,
 647                                         bar_start + off, buf, count);
 648         else
 649                 ret = intel_gvt_ops->emulate_mmio_read(vgpu,
 650                                         bar_start + off, buf, count);
 651         return ret;
 652 }
 653
 654 static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf,
 655                         size_t count, loff_t *ppos, bool is_write)
 656 {
 657         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 658         unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
 659         uint64_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
 660         int ret = -EINVAL;
 661
 662
 663         if (index >= VFIO_PCI_NUM_REGIONS) {
 664                 gvt_vgpu_err("invalid index: %u\n", index);
 665                 return -EINVAL;
 666         }
 667
 668         switch (index) {
 669         case VFIO_PCI_CONFIG_REGION_INDEX:
 670                 if (is_write)
 671                         ret = intel_gvt_ops->emulate_cfg_write(vgpu, pos,
 672                                                 buf, count);
 673                 else
 674                         ret = intel_gvt_ops->emulate_cfg_read(vgpu, pos,
 675                                                 buf, count);
 676                 break;
 677         case VFIO_PCI_BAR0_REGION_INDEX:
 678                 ret = intel_vgpu_bar_rw(vgpu, PCI_BASE_ADDRESS_0, pos,
 679                                         buf, count, is_write);
 680                 break;
 681         case VFIO_PCI_BAR2_REGION_INDEX:
 682                 ret = intel_vgpu_bar_rw(vgpu, PCI_BASE_ADDRESS_2, pos,
 683                                         buf, count, is_write);
 684                 break;
 685         case VFIO_PCI_BAR1_REGION_INDEX:
 686         case VFIO_PCI_BAR3_REGION_INDEX:
 687         case VFIO_PCI_BAR4_REGION_INDEX:
 688         case VFIO_PCI_BAR5_REGION_INDEX:
 689         case VFIO_PCI_VGA_REGION_INDEX:
 690         case VFIO_PCI_ROM_REGION_INDEX:
 691         default:
 692                 gvt_vgpu_err("unsupported region: %u\n", index);
 693         }
 694
 695         return ret == 0 ? count : ret;
 696 }
 697
 698 static ssize_t intel_vgpu_read(struct mdev_device *mdev, char __user *buf,
 699                         size_t count, loff_t *ppos)
 700 {
 701         unsigned int done = 0;
 702         int ret;
 703
 704         while (count) {
 705                 size_t filled;
 706
 707                 if (count >= 4 && !(*ppos % 4)) {
 708                         u32 val;
 709
 710                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 711                                         ppos, false);
 712                         if (ret <= 0)
 713                                 goto read_err;
 714
 715                         if (copy_to_user(buf, &val, sizeof(val)))
 716                                 goto read_err;
 717
 718                         filled = 4;
 719                 } else if (count >= 2 && !(*ppos % 2)) {
 720                         u16 val;
 721
 722                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 723                                         ppos, false);
 724                         if (ret <= 0)
 725                                 goto read_err;
 726
 727                         if (copy_to_user(buf, &val, sizeof(val)))
 728                                 goto read_err;
 729
 730                         filled = 2;
 731                 } else {
 732                         u8 val;
 733
 734                         ret = intel_vgpu_rw(mdev, &val, sizeof(val), ppos,
 735                                         false);
 736                         if (ret <= 0)
 737                                 goto read_err;
 738
 739                         if (copy_to_user(buf, &val, sizeof(val)))
 740                                 goto read_err;
 741
 742                         filled = 1;
 743                 }
 744
 745                 count -= filled;
 746                 done += filled;
 747                 *ppos += filled;
 748                 buf += filled;
 749         }
 750
 751         return done;
 752
 753 read_err:
 754         return -EFAULT;
 755 }
 756
 757 static ssize_t intel_vgpu_write(struct mdev_device *mdev,
 758                                 const char __user *buf,
 759                                 size_t count, loff_t *ppos)
 760 {
 761         unsigned int done = 0;
 762         int ret;
 763
 764         while (count) {
 765                 size_t filled;
 766
 767                 if (count >= 4 && !(*ppos % 4)) {
 768                         u32 val;
 769
 770                         if (copy_from_user(&val, buf, sizeof(val)))
 771                                 goto write_err;
 772
 773                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 774                                         ppos, true);
 775                         if (ret <= 0)
 776                                 goto write_err;
 777
 778                         filled = 4;
 779                 } else if (count >= 2 && !(*ppos % 2)) {
 780                         u16 val;
 781
 782                         if (copy_from_user(&val, buf, sizeof(val)))
 783                                 goto write_err;
 784
 785                         ret = intel_vgpu_rw(mdev, (char *)&val,
 786                                         sizeof(val), ppos, true);
 787                         if (ret <= 0)
 788                                 goto write_err;
 789
 790                         filled = 2;
 791                 } else {
 792                         u8 val;
 793
 794                         if (copy_from_user(&val, buf, sizeof(val)))
 795                                 goto write_err;
 796
 797                         ret = intel_vgpu_rw(mdev, &val, sizeof(val),
 798                                         ppos, true);
 799                         if (ret <= 0)
 800                                 goto write_err;
 801
 802                         filled = 1;
 803                 }
 804
 805                 count -= filled;
 806                 done += filled;
 807                 *ppos += filled;
 808                 buf += filled;
 809         }
 810
 811         return done;
 812 write_err:
 813         return -EFAULT;
 814 }
 815
 816 static int intel_vgpu_mmap(struct mdev_device *mdev, struct vm_area_struct *vma)
 817 {
 818         unsigned int index;
 819         u64 virtaddr;
 820         unsigned long req_size, pgoff = 0;
 821         pgprot_t pg_prot;
 822         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 823
 824         index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
 825         if (index >= VFIO_PCI_ROM_REGION_INDEX)
 826                 return -EINVAL;
 827
 828         if (vma->vm_end < vma->vm_start)
 829                 return -EINVAL;
 830         if ((vma->vm_flags & VM_SHARED) == 0)
 831                 return -EINVAL;
 832         if (index != VFIO_PCI_BAR2_REGION_INDEX)
 833                 return -EINVAL;
 834
 835         pg_prot = vma->vm_page_prot;
 836         virtaddr = vma->vm_start;
 837         req_size = vma->vm_end - vma->vm_start;
 838         pgoff = vgpu_aperture_pa_base(vgpu) >> PAGE_SHIFT;
 839
 840         return remap_pfn_range(vma, virtaddr, pgoff, req_size, pg_prot);
 841 }
 842
 843 static int intel_vgpu_get_irq_count(struct intel_vgpu *vgpu, int type)
 844 {
 845         if (type == VFIO_PCI_INTX_IRQ_INDEX || type == VFIO_PCI_MSI_IRQ_INDEX)
 846                 return 1;
 847
 848         return 0;
 849 }
 850
 851 static int intel_vgpu_set_intx_mask(struct intel_vgpu *vgpu,
 852                         unsigned int index, unsigned int start,
 853                         unsigned int count, uint32_t flags,
 854                         void *data)
 855 {
 856         return 0;
 857 }
 858
 859 static int intel_vgpu_set_intx_unmask(struct intel_vgpu *vgpu,
 860                         unsigned int index, unsigned int start,
 861                         unsigned int count, uint32_t flags, void *data)
 862 {
 863         return 0;
 864 }
 865
 866 static int intel_vgpu_set_intx_trigger(struct intel_vgpu *vgpu,
 867                 unsigned int index, unsigned int start, unsigned int count,
 868                 uint32_t flags, void *data)
 869 {
 870         return 0;
 871 }
 872
 873 static int intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu,
 874                 unsigned int index, unsigned int start, unsigned int count,
 875                 uint32_t flags, void *data)
 876 {
 877         struct eventfd_ctx *trigger;
 878
 879         if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
 880                 int fd = *(int *)data;
 881
 882                 trigger = eventfd_ctx_fdget(fd);
 883                 if (IS_ERR(trigger)) {
 884                         gvt_vgpu_err("eventfd_ctx_fdget failed\n");
 885                         return PTR_ERR(trigger);
 886                 }
 887                 vgpu->vdev.msi_trigger = trigger;
 888         }
 889
 890         return 0;
 891 }
 892
 893 static int intel_vgpu_set_irqs(struct intel_vgpu *vgpu, uint32_t flags,
 894                 unsigned int index, unsigned int start, unsigned int count,
 895                 void *data)
 896 {
 897         int (*func)(struct intel_vgpu *vgpu, unsigned int index,
 898                         unsigned int start, unsigned int count, uint32_t flags,
 899                         void *data) = NULL;
 900
 901         switch (index) {
 902         case VFIO_PCI_INTX_IRQ_INDEX:
 903                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
 904                 case VFIO_IRQ_SET_ACTION_MASK:
 905                         func = intel_vgpu_set_intx_mask;
 906                         break;
 907                 case VFIO_IRQ_SET_ACTION_UNMASK:
 908                         func = intel_vgpu_set_intx_unmask;
 909                         break;
 910                 case VFIO_IRQ_SET_ACTION_TRIGGER:
 911                         func = intel_vgpu_set_intx_trigger;
 912                         break;
 913                 }
 914                 break;
 915         case VFIO_PCI_MSI_IRQ_INDEX:
 916                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
 917                 case VFIO_IRQ_SET_ACTION_MASK:
 918                 case VFIO_IRQ_SET_ACTION_UNMASK:
 919                         /* XXX Need masking support exported */
 920                         break;
 921                 case VFIO_IRQ_SET_ACTION_TRIGGER:
 922                         func = intel_vgpu_set_msi_trigger;
 923                         break;
 924                 }
 925                 break;
 926         }
 927
 928         if (!func)
 929                 return -ENOTTY;
 930
 931         return func(vgpu, index, start, count, flags, data);
 932 }
 933
 934 static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd,
 935                              unsigned long arg)
 936 {
 937         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 938         unsigned long minsz;
 939
 940         gvt_dbg_core("vgpu%d ioctl, cmd: %d\n", vgpu->id, cmd);
 941
 942         if (cmd == VFIO_DEVICE_GET_INFO) {
 943                 struct vfio_device_info info;
 944
 945                 minsz = offsetofend(struct vfio_device_info, num_irqs);
 946
 947                 if (copy_from_user(&info, (void __user *)arg, minsz))
 948                         return -EFAULT;
 949
 950                 if (info.argsz < minsz)
 951                         return -EINVAL;
 952
 953                 info.flags = VFIO_DEVICE_FLAGS_PCI;
 954                 info.flags |= VFIO_DEVICE_FLAGS_RESET;
 955                 info.num_regions = VFIO_PCI_NUM_REGIONS;
 956                 info.num_irqs = VFIO_PCI_NUM_IRQS;
 957
 958                 return copy_to_user((void __user *)arg, &info, minsz) ?
 959                         -EFAULT : 0;
 960
 961         } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
 962                 struct vfio_region_info info;
 963                 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
 964                 int i, ret;
 965                 struct vfio_region_info_cap_sparse_mmap *sparse = NULL;
 966                 size_t size;
 967                 int nr_areas = 1;
 968                 int cap_type_id;
 969
 970                 minsz = offsetofend(struct vfio_region_info, offset);
 971
 972                 if (copy_from_user(&info, (void __user *)arg, minsz))
 973                         return -EFAULT;
 974
 975                 if (info.argsz < minsz)
 976                         return -EINVAL;
 977
 978                 switch (info.index) {
 979                 case VFIO_PCI_CONFIG_REGION_INDEX:
 980                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 981                         info.size = vgpu->gvt->device_info.cfg_space_size;
 982                         info.flags = VFIO_REGION_INFO_FLAG_READ |
 983                                      VFIO_REGION_INFO_FLAG_WRITE;
 984                         break;
 985                 case VFIO_PCI_BAR0_REGION_INDEX:
 986                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 987                         info.size = vgpu->cfg_space.bar[info.index].size;
 988                         if (!info.size) {
 989                                 info.flags = 0;
 990                                 break;
 991                         }
 992
 993                         info.flags = VFIO_REGION_INFO_FLAG_READ |
 994                                      VFIO_REGION_INFO_FLAG_WRITE;
 995                         break;
 996                 case VFIO_PCI_BAR1_REGION_INDEX:
 997                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 998                         info.size = 0;
 999                         info.flags = 0;
1000                         break;
1001                 case VFIO_PCI_BAR2_REGION_INDEX:
1002                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1003                         info.flags = VFIO_REGION_INFO_FLAG_CAPS |
1004                                         VFIO_REGION_INFO_FLAG_MMAP |
1005                                         VFIO_REGION_INFO_FLAG_READ |
1006                                         VFIO_REGION_INFO_FLAG_WRITE;
1007                         info.size = gvt_aperture_sz(vgpu->gvt);
1008
1009                         size = sizeof(*sparse) +
1010                                         (nr_areas * sizeof(*sparse->areas));
1011                         sparse = kzalloc(size, GFP_KERNEL);
1012                         if (!sparse)
1013                                 return -ENOMEM;
1014
1015                         sparse->nr_areas = nr_areas;
1016                         cap_type_id = VFIO_REGION_INFO_CAP_SPARSE_MMAP;
1017                         sparse->areas[0].offset =
1018                                         PAGE_ALIGN(vgpu_aperture_offset(vgpu));
1019                         sparse->areas[0].size = vgpu_aperture_sz(vgpu);
1020                         break;
1021
1022                 case VFIO_PCI_BAR3_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1023                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1024                         info.size = 0;
1025
1026                         info.flags = 0;
1027                         gvt_dbg_core("get region info bar:%d\n", info.index);
1028                         break;
1029
1030                 case VFIO_PCI_ROM_REGION_INDEX:
1031                 case VFIO_PCI_VGA_REGION_INDEX:
1032                         gvt_dbg_core("get region info index:%d\n", info.index);
1033                         break;
1034                 default:
1035                         {
1036                                 struct vfio_region_info_cap_type cap_type;
1037
1038                                 if (info.index >= VFIO_PCI_NUM_REGIONS +
1039                                                 vgpu->vdev.num_regions)
1040                                         return -EINVAL;
1041
1042                                 i = info.index - VFIO_PCI_NUM_REGIONS;
1043
1044                                 info.offset =
1045                                         VFIO_PCI_INDEX_TO_OFFSET(info.index);
1046                                 info.size = vgpu->vdev.region[i].size;
1047                                 info.flags = vgpu->vdev.region[i].flags;
1048
1049                                 cap_type.type = vgpu->vdev.region[i].type;
1050                                 cap_type.subtype = vgpu->vdev.region[i].subtype;
1051
1052                                 ret = vfio_info_add_capability(&caps,
1053                                                 VFIO_REGION_INFO_CAP_TYPE,
1054                                                 &cap_type);
1055                                 if (ret)
1056                                         return ret;
1057                         }
1058                 }
1059
1060                 if ((info.flags & VFIO_REGION_INFO_FLAG_CAPS) && sparse) {
1061                         switch (cap_type_id) {
1062                         case VFIO_REGION_INFO_CAP_SPARSE_MMAP:
1063                                 ret = vfio_info_add_capability(&caps,
1064                                         VFIO_REGION_INFO_CAP_SPARSE_MMAP,
1065                                         sparse);
1066                                 kfree(sparse);
1067                                 if (ret)
1068                                         return ret;
1069                                 break;
1070                         default:
1071                                 return -EINVAL;
1072                         }
1073                 }
1074
1075                 if (caps.size) {
1076                         if (info.argsz < sizeof(info) + caps.size) {
1077                                 info.argsz = sizeof(info) + caps.size;
1078                                 info.cap_offset = 0;
1079                         } else {
1080                                 vfio_info_cap_shift(&caps, sizeof(info));
1081                                 if (copy_to_user((void __user *)arg +
1082                                                   sizeof(info), caps.buf,
1083                                                   caps.size)) {
1084                                         kfree(caps.buf);
1085                                         return -EFAULT;
1086                                 }
1087                                 info.cap_offset = sizeof(info);
1088                         }
1089
1090                         kfree(caps.buf);
1091                 }
1092
1093                 return copy_to_user((void __user *)arg, &info, minsz) ?
1094                         -EFAULT : 0;
1095         } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
1096                 struct vfio_irq_info info;
1097
1098                 minsz = offsetofend(struct vfio_irq_info, count);
1099
1100                 if (copy_from_user(&info, (void __user *)arg, minsz))
1101                         return -EFAULT;
1102
1103                 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1104                         return -EINVAL;
1105
1106                 switch (info.index) {
1107                 case VFIO_PCI_INTX_IRQ_INDEX:
1108                 case VFIO_PCI_MSI_IRQ_INDEX:
1109                         break;
1110                 default:
1111                         return -EINVAL;
1112                 }
1113
1114                 info.flags = VFIO_IRQ_INFO_EVENTFD;
1115
1116                 info.count = intel_vgpu_get_irq_count(vgpu, info.index);
1117
1118                 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1119                         info.flags |= (VFIO_IRQ_INFO_MASKABLE |
1120                                        VFIO_IRQ_INFO_AUTOMASKED);
1121                 else
1122                         info.flags |= VFIO_IRQ_INFO_NORESIZE;
1123
1124                 return copy_to_user((void __user *)arg, &info, minsz) ?
1125                         -EFAULT : 0;
1126         } else if (cmd == VFIO_DEVICE_SET_IRQS) {
1127                 struct vfio_irq_set hdr;
1128                 u8 *data = NULL;
1129                 int ret = 0;
1130                 size_t data_size = 0;
1131
1132                 minsz = offsetofend(struct vfio_irq_set, count);
1133
1134                 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1135                         return -EFAULT;
1136
1137                 if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
1138                         int max = intel_vgpu_get_irq_count(vgpu, hdr.index);
1139
1140                         ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
1141                                                 VFIO_PCI_NUM_IRQS, &data_size);
1142                         if (ret) {
1143                                 gvt_vgpu_err("intel:vfio_set_irqs_validate_and_prepare failed\n");
1144                                 return -EINVAL;
1145                         }
1146                         if (data_size) {
1147                                 data = memdup_user((void __user *)(arg + minsz),
1148                                                    data_size);
1149                                 if (IS_ERR(data))
1150                                         return PTR_ERR(data);
1151                         }
1152                 }
1153
1154                 ret = intel_vgpu_set_irqs(vgpu, hdr.flags, hdr.index,
1155                                         hdr.start, hdr.count, data);
1156                 kfree(data);
1157
1158                 return ret;
1159         } else if (cmd == VFIO_DEVICE_RESET) {
1160                 intel_gvt_ops->vgpu_reset(vgpu);
1161                 return 0;
1162         }
1163
1164         return 0;
1165 }
1166
1167 static ssize_t
1168 vgpu_id_show(struct device *dev, struct device_attribute *attr,
1169              char *buf)
1170 {
1171         struct mdev_device *mdev = mdev_from_dev(dev);
1172
1173         if (mdev) {
1174                 struct intel_vgpu *vgpu = (struct intel_vgpu *)
1175                         mdev_get_drvdata(mdev);
1176                 return sprintf(buf, "%d\n", vgpu->id);
1177         }
1178         return sprintf(buf, "\n");
1179 }
1180
1181 static ssize_t
1182 hw_id_show(struct device *dev, struct device_attribute *attr,
1183            char *buf)
1184 {
1185         struct mdev_device *mdev = mdev_from_dev(dev);
1186
1187         if (mdev) {
1188                 struct intel_vgpu *vgpu = (struct intel_vgpu *)
1189                         mdev_get_drvdata(mdev);
1190                 return sprintf(buf, "%u\n",
1191                                vgpu->shadow_ctx->hw_id);
1192         }
1193         return sprintf(buf, "\n");
1194 }
1195
1196 static DEVICE_ATTR_RO(vgpu_id);
1197 static DEVICE_ATTR_RO(hw_id);
1198
1199 static struct attribute *intel_vgpu_attrs[] = {
1200         &dev_attr_vgpu_id.attr,
1201         &dev_attr_hw_id.attr,
1202         NULL
1203 };
1204
1205 static const struct attribute_group intel_vgpu_group = {
1206         .name = "intel_vgpu",
1207         .attrs = intel_vgpu_attrs,
1208 };
1209
1210 static const struct attribute_group *intel_vgpu_groups[] = {
1211         &intel_vgpu_group,
1212         NULL,
1213 };
1214
1215 static const struct mdev_parent_ops intel_vgpu_ops = {
1216         .supported_type_groups  = intel_vgpu_type_groups,
1217         .mdev_attr_groups       = intel_vgpu_groups,
1218         .create                 = intel_vgpu_create,
1219         .remove                 = intel_vgpu_remove,
1220
1221         .open                   = intel_vgpu_open,
1222         .release                = intel_vgpu_release,
1223
1224         .read                   = intel_vgpu_read,
1225         .write                  = intel_vgpu_write,
1226         .mmap                   = intel_vgpu_mmap,
1227         .ioctl                  = intel_vgpu_ioctl,
1228 };
1229
1230 static int kvmgt_host_init(struct device *dev, void *gvt, const void *ops)
1231 {
1232         if (!intel_gvt_init_vgpu_type_groups(gvt))
1233                 return -EFAULT;
1234
1235         intel_gvt_ops = ops;
1236
1237         return mdev_register_device(dev, &intel_vgpu_ops);
1238 }
1239
1240 static void kvmgt_host_exit(struct device *dev, void *gvt)
1241 {
1242         intel_gvt_cleanup_vgpu_type_groups(gvt);
1243         mdev_unregister_device(dev);
1244 }
1245
1246 static int kvmgt_write_protect_add(unsigned long handle, u64 gfn)
1247 {
1248         struct kvmgt_guest_info *info;
1249         struct kvm *kvm;
1250         struct kvm_memory_slot *slot;
1251         int idx;
1252
1253         if (!handle_valid(handle))
1254                 return -ESRCH;
1255
1256         info = (struct kvmgt_guest_info *)handle;
1257         kvm = info->kvm;
1258
1259         idx = srcu_read_lock(&kvm->srcu);
1260         slot = gfn_to_memslot(kvm, gfn);
1261         if (!slot) {
1262                 srcu_read_unlock(&kvm->srcu, idx);
1263                 return -EINVAL;
1264         }
1265
1266         spin_lock(&kvm->mmu_lock);
1267
1268         if (kvmgt_gfn_is_write_protected(info, gfn))
1269                 goto out;
1270
1271         kvm_slot_page_track_add_page(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE);
1272         kvmgt_protect_table_add(info, gfn);
1273
1274 out:
1275         spin_unlock(&kvm->mmu_lock);
1276         srcu_read_unlock(&kvm->srcu, idx);
1277         return 0;
1278 }
1279
1280 static int kvmgt_write_protect_remove(unsigned long handle, u64 gfn)
1281 {
1282         struct kvmgt_guest_info *info;
1283         struct kvm *kvm;
1284         struct kvm_memory_slot *slot;
1285         int idx;
1286
1287         if (!handle_valid(handle))
1288                 return 0;
1289
1290         info = (struct kvmgt_guest_info *)handle;
1291         kvm = info->kvm;
1292
1293         idx = srcu_read_lock(&kvm->srcu);
1294         slot = gfn_to_memslot(kvm, gfn);
1295         if (!slot) {
1296                 srcu_read_unlock(&kvm->srcu, idx);
1297                 return -EINVAL;
1298         }
1299
1300         spin_lock(&kvm->mmu_lock);
1301
1302         if (!kvmgt_gfn_is_write_protected(info, gfn))
1303                 goto out;
1304
1305         kvm_slot_page_track_remove_page(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE);
1306         kvmgt_protect_table_del(info, gfn);
1307
1308 out:
1309         spin_unlock(&kvm->mmu_lock);
1310         srcu_read_unlock(&kvm->srcu, idx);
1311         return 0;
1312 }
1313
1314 static void kvmgt_page_track_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1315                 const u8 *val, int len,
1316                 struct kvm_page_track_notifier_node *node)
1317 {
1318         struct kvmgt_guest_info *info = container_of(node,
1319                                         struct kvmgt_guest_info, track_node);
1320
1321         if (kvmgt_gfn_is_write_protected(info, gpa_to_gfn(gpa)))
1322                 intel_gvt_ops->emulate_mmio_write(info->vgpu, gpa,
1323                                         (void *)val, len);
1324 }
1325
1326 static void kvmgt_page_track_flush_slot(struct kvm *kvm,
1327                 struct kvm_memory_slot *slot,
1328                 struct kvm_page_track_notifier_node *node)
1329 {
1330         int i;
1331         gfn_t gfn;
1332         struct kvmgt_guest_info *info = container_of(node,
1333                                         struct kvmgt_guest_info, track_node);
1334
1335         spin_lock(&kvm->mmu_lock);
1336         for (i = 0; i < slot->npages; i++) {
1337                 gfn = slot->base_gfn + i;
1338                 if (kvmgt_gfn_is_write_protected(info, gfn)) {
1339                         kvm_slot_page_track_remove_page(kvm, slot, gfn,
1340                                                 KVM_PAGE_TRACK_WRITE);
1341                         kvmgt_protect_table_del(info, gfn);
1342                 }
1343         }
1344         spin_unlock(&kvm->mmu_lock);
1345 }
1346
1347 static bool __kvmgt_vgpu_exist(struct intel_vgpu *vgpu, struct kvm *kvm)
1348 {
1349         struct intel_vgpu *itr;
1350         struct kvmgt_guest_info *info;
1351         int id;
1352         bool ret = false;
1353
1354         mutex_lock(&vgpu->gvt->lock);
1355         for_each_active_vgpu(vgpu->gvt, itr, id) {
1356                 if (!handle_valid(itr->handle))
1357                         continue;
1358
1359                 info = (struct kvmgt_guest_info *)itr->handle;
1360                 if (kvm && kvm == info->kvm) {
1361                         ret = true;
1362                         goto out;
1363                 }
1364         }
1365 out:
1366         mutex_unlock(&vgpu->gvt->lock);
1367         return ret;
1368 }
1369
1370 static int kvmgt_guest_init(struct mdev_device *mdev)
1371 {
1372         struct kvmgt_guest_info *info;
1373         struct intel_vgpu *vgpu;
1374         struct kvm *kvm;
1375
1376         vgpu = mdev_get_drvdata(mdev);
1377         if (handle_valid(vgpu->handle))
1378                 return -EEXIST;
1379
1380         kvm = vgpu->vdev.kvm;
1381         if (!kvm || kvm->mm != current->mm) {
1382                 gvt_vgpu_err("KVM is required to use Intel vGPU\n");
1383                 return -ESRCH;
1384         }
1385
1386         if (__kvmgt_vgpu_exist(vgpu, kvm))
1387                 return -EEXIST;
1388
1389         info = vzalloc(sizeof(struct kvmgt_guest_info));
1390         if (!info)
1391                 return -ENOMEM;
1392
1393         vgpu->handle = (unsigned long)info;
1394         info->vgpu = vgpu;
1395         info->kvm = kvm;
1396         kvm_get_kvm(info->kvm);
1397
1398         kvmgt_protect_table_init(info);
1399         gvt_cache_init(vgpu);
1400
1401         info->track_node.track_write = kvmgt_page_track_write;
1402         info->track_node.track_flush_slot = kvmgt_page_track_flush_slot;
1403         kvm_page_track_register_notifier(kvm, &info->track_node);
1404
1405         return 0;
1406 }
1407
1408 static bool kvmgt_guest_exit(struct kvmgt_guest_info *info)
1409 {
1410         kvm_page_track_unregister_notifier(info->kvm, &info->track_node);
1411         kvm_put_kvm(info->kvm);
1412         kvmgt_protect_table_destroy(info);
1413         gvt_cache_destroy(info->vgpu);
1414         vfree(info);
1415
1416         return true;
1417 }
1418
1419 static int kvmgt_attach_vgpu(void *vgpu, unsigned long *handle)
1420 {
1421         /* nothing to do here */
1422         return 0;
1423 }
1424
1425 static void kvmgt_detach_vgpu(unsigned long handle)
1426 {
1427         /* nothing to do here */
1428 }
1429
1430 static int kvmgt_inject_msi(unsigned long handle, u32 addr, u16 data)
1431 {
1432         struct kvmgt_guest_info *info;
1433         struct intel_vgpu *vgpu;
1434
1435         if (!handle_valid(handle))
1436                 return -ESRCH;
1437
1438         info = (struct kvmgt_guest_info *)handle;
1439         vgpu = info->vgpu;
1440
1441         if (eventfd_signal(vgpu->vdev.msi_trigger, 1) == 1)
1442                 return 0;
1443
1444         return -EFAULT;
1445 }
1446
1447 static unsigned long kvmgt_gfn_to_pfn(unsigned long handle, unsigned long gfn)
1448 {
1449         unsigned long iova, pfn;
1450         struct kvmgt_guest_info *info;
1451         struct device *dev;
1452         struct intel_vgpu *vgpu;
1453         int rc;
1454
1455         if (!handle_valid(handle))
1456                 return INTEL_GVT_INVALID_ADDR;
1457
1458         info = (struct kvmgt_guest_info *)handle;
1459         vgpu = info->vgpu;
1460         iova = gvt_cache_find(info->vgpu, gfn);
1461         if (iova != INTEL_GVT_INVALID_ADDR)
1462                 return iova;
1463
1464         pfn = INTEL_GVT_INVALID_ADDR;
1465         dev = mdev_dev(info->vgpu->vdev.mdev);
1466         rc = vfio_pin_pages(dev, &gfn, 1, IOMMU_READ | IOMMU_WRITE, &pfn);
1467         if (rc != 1) {
1468                 gvt_vgpu_err("vfio_pin_pages failed for gfn 0x%lx: %d\n",
1469                         gfn, rc);
1470                 return INTEL_GVT_INVALID_ADDR;
1471         }
1472         /* transfer to host iova for GFX to use DMA */
1473         rc = gvt_dma_map_iova(info->vgpu, pfn, &iova);
1474         if (rc) {
1475                 gvt_vgpu_err("gvt_dma_map_iova failed for gfn: 0x%lx\n", gfn);
1476                 vfio_unpin_pages(dev, &gfn, 1);
1477                 return INTEL_GVT_INVALID_ADDR;
1478         }
1479
1480         gvt_cache_add(info->vgpu, gfn, iova);
1481         return iova;
1482 }
1483
1484 static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa,
1485                         void *buf, unsigned long len, bool write)
1486 {
1487         struct kvmgt_guest_info *info;
1488         struct kvm *kvm;
1489         int idx, ret;
1490         bool kthread = current->mm == NULL;
1491
1492         if (!handle_valid(handle))
1493                 return -ESRCH;
1494
1495         info = (struct kvmgt_guest_info *)handle;
1496         kvm = info->kvm;
1497
1498         if (kthread)
1499                 use_mm(kvm->mm);
1500
1501         idx = srcu_read_lock(&kvm->srcu);
1502         ret = write ? kvm_write_guest(kvm, gpa, buf, len) :
1503                       kvm_read_guest(kvm, gpa, buf, len);
1504         srcu_read_unlock(&kvm->srcu, idx);
1505
1506         if (kthread)
1507                 unuse_mm(kvm->mm);
1508
1509         return ret;
1510 }
1511
1512 static int kvmgt_read_gpa(unsigned long handle, unsigned long gpa,
1513                         void *buf, unsigned long len)
1514 {
1515         return kvmgt_rw_gpa(handle, gpa, buf, len, false);
1516 }
1517
1518 static int kvmgt_write_gpa(unsigned long handle, unsigned long gpa,
1519                         void *buf, unsigned long len)
1520 {
1521         return kvmgt_rw_gpa(handle, gpa, buf, len, true);
1522 }
1523
1524 static unsigned long kvmgt_virt_to_pfn(void *addr)
1525 {
1526         return PFN_DOWN(__pa(addr));
1527 }
1528
1529 struct intel_gvt_mpt kvmgt_mpt = {
1530         .host_init = kvmgt_host_init,
1531         .host_exit = kvmgt_host_exit,
1532         .attach_vgpu = kvmgt_attach_vgpu,
1533         .detach_vgpu = kvmgt_detach_vgpu,
1534         .inject_msi = kvmgt_inject_msi,
1535         .from_virt_to_mfn = kvmgt_virt_to_pfn,
1536         .set_wp_page = kvmgt_write_protect_add,
1537         .unset_wp_page = kvmgt_write_protect_remove,
1538         .read_gpa = kvmgt_read_gpa,
1539         .write_gpa = kvmgt_write_gpa,
1540         .gfn_to_mfn = kvmgt_gfn_to_pfn,
1541 };
1542 EXPORT_SYMBOL_GPL(kvmgt_mpt);
1543
1544 static int __init kvmgt_init(void)
1545 {
1546         return 0;
1547 }
1548
1549 static void __exit kvmgt_exit(void)
1550 {
1551 }
1552
1553 module_init(kvmgt_init);
1554 module_exit(kvmgt_exit);
1555
1556 MODULE_LICENSE("GPL and additional rights");
1557 MODULE_AUTHOR("Intel Corporation");