2 * SPDX-License-Identifier: MIT
4 * Copyright © 2018 Intel Corporation
7 #include <linux/prime_numbers.h>
9 #include "gem/i915_gem_pm.h"
10 #include "gt/intel_reset.h"
12 #include "i915_selftest.h"
13 #include "selftests/i915_random.h"
14 #include "selftests/igt_flush_test.h"
15 #include "selftests/igt_live_test.h"
16 #include "selftests/igt_spinner.h"
17 #include "selftests/lib_sw_fence.h"
19 #include "gem/selftests/igt_gem_utils.h"
20 #include "gem/selftests/mock_context.h"
22 static int live_sanitycheck(void *arg)
24 struct drm_i915_private *i915 = arg;
25 struct intel_engine_cs *engine;
26 struct i915_gem_context *ctx;
27 enum intel_engine_id id;
28 struct igt_spinner spin;
29 intel_wakeref_t wakeref;
32 if (!HAS_LOGICAL_RING_CONTEXTS(i915))
35 mutex_lock(&i915->drm.struct_mutex);
36 wakeref = intel_runtime_pm_get(i915);
38 if (igt_spinner_init(&spin, i915))
41 ctx = kernel_context(i915);
45 for_each_engine(engine, i915, id) {
46 struct i915_request *rq;
48 rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
55 if (!igt_wait_for_spinner(&spin, rq)) {
56 GEM_TRACE("spinner failed to start\n");
58 i915_gem_set_wedged(i915);
63 igt_spinner_end(&spin);
64 if (igt_flush_test(i915, I915_WAIT_LOCKED)) {
72 kernel_context_close(ctx);
74 igt_spinner_fini(&spin);
76 igt_flush_test(i915, I915_WAIT_LOCKED);
77 intel_runtime_pm_put(i915, wakeref);
78 mutex_unlock(&i915->drm.struct_mutex);
82 static int live_busywait_preempt(void *arg)
84 struct drm_i915_private *i915 = arg;
85 struct i915_gem_context *ctx_hi, *ctx_lo;
86 struct intel_engine_cs *engine;
87 struct drm_i915_gem_object *obj;
89 enum intel_engine_id id;
90 intel_wakeref_t wakeref;
95 * Verify that even without HAS_LOGICAL_RING_PREEMPTION, we can
96 * preempt the busywaits used to synchronise between rings.
99 mutex_lock(&i915->drm.struct_mutex);
100 wakeref = intel_runtime_pm_get(i915);
102 ctx_hi = kernel_context(i915);
105 ctx_hi->sched.priority =
106 I915_USER_PRIORITY(I915_CONTEXT_MAX_USER_PRIORITY);
108 ctx_lo = kernel_context(i915);
111 ctx_lo->sched.priority =
112 I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY);
114 obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
120 map = i915_gem_object_pin_map(obj, I915_MAP_WC);
126 vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
132 err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL);
136 for_each_engine(engine, i915, id) {
137 struct i915_request *lo, *hi;
138 struct igt_live_test t;
141 if (!intel_engine_can_store_dword(engine))
144 if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
150 * We create two requests. The low priority request
151 * busywaits on a semaphore (inside the ringbuffer where
152 * is should be preemptible) and the high priority requests
153 * uses a MI_STORE_DWORD_IMM to update the semaphore value
154 * allowing the first request to complete. If preemption
155 * fails, we hang instead.
158 lo = igt_request_alloc(ctx_lo, engine);
164 cs = intel_ring_begin(lo, 8);
167 i915_request_add(lo);
171 *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
172 *cs++ = i915_ggtt_offset(vma);
176 /* XXX Do we need a flush + invalidate here? */
178 *cs++ = MI_SEMAPHORE_WAIT |
179 MI_SEMAPHORE_GLOBAL_GTT |
181 MI_SEMAPHORE_SAD_EQ_SDD;
183 *cs++ = i915_ggtt_offset(vma);
186 intel_ring_advance(lo, cs);
187 i915_request_add(lo);
189 if (wait_for(READ_ONCE(*map), 10)) {
194 /* Low priority request should be busywaiting now */
195 if (i915_request_wait(lo, I915_WAIT_LOCKED, 1) != -ETIME) {
196 pr_err("%s: Busywaiting request did not!\n",
202 hi = igt_request_alloc(ctx_hi, engine);
208 cs = intel_ring_begin(hi, 4);
211 i915_request_add(hi);
215 *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
216 *cs++ = i915_ggtt_offset(vma);
220 intel_ring_advance(hi, cs);
221 i915_request_add(hi);
223 if (i915_request_wait(lo, I915_WAIT_LOCKED, HZ / 5) < 0) {
224 struct drm_printer p = drm_info_printer(i915->drm.dev);
226 pr_err("%s: Failed to preempt semaphore busywait!\n",
229 intel_engine_dump(engine, &p, "%s\n", engine->name);
232 i915_gem_set_wedged(i915);
236 GEM_BUG_ON(READ_ONCE(*map));
238 if (igt_live_test_end(&t)) {
248 i915_gem_object_unpin_map(obj);
250 i915_gem_object_put(obj);
252 kernel_context_close(ctx_lo);
254 kernel_context_close(ctx_hi);
256 if (igt_flush_test(i915, I915_WAIT_LOCKED))
258 intel_runtime_pm_put(i915, wakeref);
259 mutex_unlock(&i915->drm.struct_mutex);
263 static int live_preempt(void *arg)
265 struct drm_i915_private *i915 = arg;
266 struct i915_gem_context *ctx_hi, *ctx_lo;
267 struct igt_spinner spin_hi, spin_lo;
268 struct intel_engine_cs *engine;
269 enum intel_engine_id id;
270 intel_wakeref_t wakeref;
273 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
276 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
277 pr_err("Logical preemption supported, but not exposed\n");
279 mutex_lock(&i915->drm.struct_mutex);
280 wakeref = intel_runtime_pm_get(i915);
282 if (igt_spinner_init(&spin_hi, i915))
285 if (igt_spinner_init(&spin_lo, i915))
288 ctx_hi = kernel_context(i915);
291 ctx_hi->sched.priority =
292 I915_USER_PRIORITY(I915_CONTEXT_MAX_USER_PRIORITY);
294 ctx_lo = kernel_context(i915);
297 ctx_lo->sched.priority =
298 I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY);
300 for_each_engine(engine, i915, id) {
301 struct igt_live_test t;
302 struct i915_request *rq;
304 if (!intel_engine_has_preemption(engine))
307 if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
312 rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
319 i915_request_add(rq);
320 if (!igt_wait_for_spinner(&spin_lo, rq)) {
321 GEM_TRACE("lo spinner failed to start\n");
323 i915_gem_set_wedged(i915);
328 rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
331 igt_spinner_end(&spin_lo);
336 i915_request_add(rq);
337 if (!igt_wait_for_spinner(&spin_hi, rq)) {
338 GEM_TRACE("hi spinner failed to start\n");
340 i915_gem_set_wedged(i915);
345 igt_spinner_end(&spin_hi);
346 igt_spinner_end(&spin_lo);
348 if (igt_live_test_end(&t)) {
356 kernel_context_close(ctx_lo);
358 kernel_context_close(ctx_hi);
360 igt_spinner_fini(&spin_lo);
362 igt_spinner_fini(&spin_hi);
364 igt_flush_test(i915, I915_WAIT_LOCKED);
365 intel_runtime_pm_put(i915, wakeref);
366 mutex_unlock(&i915->drm.struct_mutex);
370 static int live_late_preempt(void *arg)
372 struct drm_i915_private *i915 = arg;
373 struct i915_gem_context *ctx_hi, *ctx_lo;
374 struct igt_spinner spin_hi, spin_lo;
375 struct intel_engine_cs *engine;
376 struct i915_sched_attr attr = {};
377 enum intel_engine_id id;
378 intel_wakeref_t wakeref;
381 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
384 mutex_lock(&i915->drm.struct_mutex);
385 wakeref = intel_runtime_pm_get(i915);
387 if (igt_spinner_init(&spin_hi, i915))
390 if (igt_spinner_init(&spin_lo, i915))
393 ctx_hi = kernel_context(i915);
397 ctx_lo = kernel_context(i915);
401 for_each_engine(engine, i915, id) {
402 struct igt_live_test t;
403 struct i915_request *rq;
405 if (!intel_engine_has_preemption(engine))
408 if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
413 rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
420 i915_request_add(rq);
421 if (!igt_wait_for_spinner(&spin_lo, rq)) {
422 pr_err("First context failed to start\n");
426 rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
429 igt_spinner_end(&spin_lo);
434 i915_request_add(rq);
435 if (igt_wait_for_spinner(&spin_hi, rq)) {
436 pr_err("Second context overtook first?\n");
440 attr.priority = I915_USER_PRIORITY(I915_PRIORITY_MAX);
441 engine->schedule(rq, &attr);
443 if (!igt_wait_for_spinner(&spin_hi, rq)) {
444 pr_err("High priority context failed to preempt the low priority context\n");
449 igt_spinner_end(&spin_hi);
450 igt_spinner_end(&spin_lo);
452 if (igt_live_test_end(&t)) {
460 kernel_context_close(ctx_lo);
462 kernel_context_close(ctx_hi);
464 igt_spinner_fini(&spin_lo);
466 igt_spinner_fini(&spin_hi);
468 igt_flush_test(i915, I915_WAIT_LOCKED);
469 intel_runtime_pm_put(i915, wakeref);
470 mutex_unlock(&i915->drm.struct_mutex);
474 igt_spinner_end(&spin_hi);
475 igt_spinner_end(&spin_lo);
476 i915_gem_set_wedged(i915);
481 struct preempt_client {
482 struct igt_spinner spin;
483 struct i915_gem_context *ctx;
486 static int preempt_client_init(struct drm_i915_private *i915,
487 struct preempt_client *c)
489 c->ctx = kernel_context(i915);
493 if (igt_spinner_init(&c->spin, i915))
499 kernel_context_close(c->ctx);
503 static void preempt_client_fini(struct preempt_client *c)
505 igt_spinner_fini(&c->spin);
506 kernel_context_close(c->ctx);
509 static int live_suppress_self_preempt(void *arg)
511 struct drm_i915_private *i915 = arg;
512 struct intel_engine_cs *engine;
513 struct i915_sched_attr attr = {
514 .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX)
516 struct preempt_client a, b;
517 enum intel_engine_id id;
518 intel_wakeref_t wakeref;
522 * Verify that if a preemption request does not cause a change in
523 * the current execution order, the preempt-to-idle injection is
524 * skipped and that we do not accidentally apply it after the CS
528 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
531 if (USES_GUC_SUBMISSION(i915))
532 return 0; /* presume black blox */
534 mutex_lock(&i915->drm.struct_mutex);
535 wakeref = intel_runtime_pm_get(i915);
537 if (preempt_client_init(i915, &a))
539 if (preempt_client_init(i915, &b))
542 for_each_engine(engine, i915, id) {
543 struct i915_request *rq_a, *rq_b;
546 if (!intel_engine_has_preemption(engine))
549 engine->execlists.preempt_hang.count = 0;
551 rq_a = igt_spinner_create_request(&a.spin,
559 i915_request_add(rq_a);
560 if (!igt_wait_for_spinner(&a.spin, rq_a)) {
561 pr_err("First client failed to start\n");
565 for (depth = 0; depth < 8; depth++) {
566 rq_b = igt_spinner_create_request(&b.spin,
573 i915_request_add(rq_b);
575 GEM_BUG_ON(i915_request_completed(rq_a));
576 engine->schedule(rq_a, &attr);
577 igt_spinner_end(&a.spin);
579 if (!igt_wait_for_spinner(&b.spin, rq_b)) {
580 pr_err("Second client failed to start\n");
587 igt_spinner_end(&a.spin);
589 if (engine->execlists.preempt_hang.count) {
590 pr_err("Preemption recorded x%d, depth %d; should have been suppressed!\n",
591 engine->execlists.preempt_hang.count,
597 if (igt_flush_test(i915, I915_WAIT_LOCKED))
603 preempt_client_fini(&b);
605 preempt_client_fini(&a);
607 if (igt_flush_test(i915, I915_WAIT_LOCKED))
609 intel_runtime_pm_put(i915, wakeref);
610 mutex_unlock(&i915->drm.struct_mutex);
614 igt_spinner_end(&b.spin);
615 igt_spinner_end(&a.spin);
616 i915_gem_set_wedged(i915);
621 static int __i915_sw_fence_call
622 dummy_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
627 static struct i915_request *dummy_request(struct intel_engine_cs *engine)
629 struct i915_request *rq;
631 rq = kzalloc(sizeof(*rq), GFP_KERNEL);
635 INIT_LIST_HEAD(&rq->active_list);
638 i915_sched_node_init(&rq->sched);
640 /* mark this request as permanently incomplete */
642 BUILD_BUG_ON(sizeof(rq->fence.seqno) != 8); /* upper 32b == 0 */
643 rq->hwsp_seqno = (u32 *)&rq->fence.seqno + 1;
644 GEM_BUG_ON(i915_request_completed(rq));
646 i915_sw_fence_init(&rq->submit, dummy_notify);
647 set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);
652 static void dummy_request_free(struct i915_request *dummy)
654 /* We have to fake the CS interrupt to kick the next request */
655 i915_sw_fence_commit(&dummy->submit);
657 i915_request_mark_complete(dummy);
658 dma_fence_signal(&dummy->fence);
660 i915_sched_node_fini(&dummy->sched);
661 i915_sw_fence_fini(&dummy->submit);
663 dma_fence_free(&dummy->fence);
666 static int live_suppress_wait_preempt(void *arg)
668 struct drm_i915_private *i915 = arg;
669 struct preempt_client client[4];
670 struct intel_engine_cs *engine;
671 enum intel_engine_id id;
672 intel_wakeref_t wakeref;
677 * Waiters are given a little priority nudge, but not enough
678 * to actually cause any preemption. Double check that we do
679 * not needlessly generate preempt-to-idle cycles.
682 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
685 mutex_lock(&i915->drm.struct_mutex);
686 wakeref = intel_runtime_pm_get(i915);
688 if (preempt_client_init(i915, &client[0])) /* ELSP[0] */
690 if (preempt_client_init(i915, &client[1])) /* ELSP[1] */
692 if (preempt_client_init(i915, &client[2])) /* head of queue */
694 if (preempt_client_init(i915, &client[3])) /* bystander */
697 for_each_engine(engine, i915, id) {
700 if (!intel_engine_has_preemption(engine))
703 if (!engine->emit_init_breadcrumb)
706 for (depth = 0; depth < ARRAY_SIZE(client); depth++) {
707 struct i915_request *rq[ARRAY_SIZE(client)];
708 struct i915_request *dummy;
710 engine->execlists.preempt_hang.count = 0;
712 dummy = dummy_request(engine);
716 for (i = 0; i < ARRAY_SIZE(client); i++) {
717 rq[i] = igt_spinner_create_request(&client[i].spin,
718 client[i].ctx, engine,
721 err = PTR_ERR(rq[i]);
725 /* Disable NEWCLIENT promotion */
726 __i915_active_request_set(&rq[i]->timeline->last_request,
728 i915_request_add(rq[i]);
731 dummy_request_free(dummy);
733 GEM_BUG_ON(i915_request_completed(rq[0]));
734 if (!igt_wait_for_spinner(&client[0].spin, rq[0])) {
735 pr_err("%s: First client failed to start\n",
739 GEM_BUG_ON(!i915_request_started(rq[0]));
741 if (i915_request_wait(rq[depth],
745 pr_err("%s: Waiter depth:%d completed!\n",
746 engine->name, depth);
750 for (i = 0; i < ARRAY_SIZE(client); i++)
751 igt_spinner_end(&client[i].spin);
753 if (igt_flush_test(i915, I915_WAIT_LOCKED))
756 if (engine->execlists.preempt_hang.count) {
757 pr_err("%s: Preemption recorded x%d, depth %d; should have been suppressed!\n",
759 engine->execlists.preempt_hang.count,
769 preempt_client_fini(&client[3]);
771 preempt_client_fini(&client[2]);
773 preempt_client_fini(&client[1]);
775 preempt_client_fini(&client[0]);
777 if (igt_flush_test(i915, I915_WAIT_LOCKED))
779 intel_runtime_pm_put(i915, wakeref);
780 mutex_unlock(&i915->drm.struct_mutex);
784 for (i = 0; i < ARRAY_SIZE(client); i++)
785 igt_spinner_end(&client[i].spin);
786 i915_gem_set_wedged(i915);
791 static int live_chain_preempt(void *arg)
793 struct drm_i915_private *i915 = arg;
794 struct intel_engine_cs *engine;
795 struct preempt_client hi, lo;
796 enum intel_engine_id id;
797 intel_wakeref_t wakeref;
801 * Build a chain AB...BA between two contexts (A, B) and request
802 * preemption of the last request. It should then complete before
803 * the previously submitted spinner in B.
806 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
809 mutex_lock(&i915->drm.struct_mutex);
810 wakeref = intel_runtime_pm_get(i915);
812 if (preempt_client_init(i915, &hi))
815 if (preempt_client_init(i915, &lo))
818 for_each_engine(engine, i915, id) {
819 struct i915_sched_attr attr = {
820 .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX),
822 struct igt_live_test t;
823 struct i915_request *rq;
824 int ring_size, count, i;
826 if (!intel_engine_has_preemption(engine))
829 rq = igt_spinner_create_request(&lo.spin,
834 i915_request_add(rq);
836 ring_size = rq->wa_tail - rq->head;
838 ring_size += rq->ring->size;
839 ring_size = rq->ring->size / ring_size;
840 pr_debug("%s(%s): Using maximum of %d requests\n",
841 __func__, engine->name, ring_size);
843 igt_spinner_end(&lo.spin);
844 if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 2) < 0) {
845 pr_err("Timed out waiting to flush %s\n", engine->name);
849 if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
854 for_each_prime_number_from(count, 1, ring_size) {
855 rq = igt_spinner_create_request(&hi.spin,
860 i915_request_add(rq);
861 if (!igt_wait_for_spinner(&hi.spin, rq))
864 rq = igt_spinner_create_request(&lo.spin,
869 i915_request_add(rq);
871 for (i = 0; i < count; i++) {
872 rq = igt_request_alloc(lo.ctx, engine);
875 i915_request_add(rq);
878 rq = igt_request_alloc(hi.ctx, engine);
881 i915_request_add(rq);
882 engine->schedule(rq, &attr);
884 igt_spinner_end(&hi.spin);
885 if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
886 struct drm_printer p =
887 drm_info_printer(i915->drm.dev);
889 pr_err("Failed to preempt over chain of %d\n",
891 intel_engine_dump(engine, &p,
892 "%s\n", engine->name);
895 igt_spinner_end(&lo.spin);
897 rq = igt_request_alloc(lo.ctx, engine);
900 i915_request_add(rq);
901 if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
902 struct drm_printer p =
903 drm_info_printer(i915->drm.dev);
905 pr_err("Failed to flush low priority chain of %d requests\n",
907 intel_engine_dump(engine, &p,
908 "%s\n", engine->name);
913 if (igt_live_test_end(&t)) {
921 preempt_client_fini(&lo);
923 preempt_client_fini(&hi);
925 if (igt_flush_test(i915, I915_WAIT_LOCKED))
927 intel_runtime_pm_put(i915, wakeref);
928 mutex_unlock(&i915->drm.struct_mutex);
932 igt_spinner_end(&hi.spin);
933 igt_spinner_end(&lo.spin);
934 i915_gem_set_wedged(i915);
939 static int live_preempt_hang(void *arg)
941 struct drm_i915_private *i915 = arg;
942 struct i915_gem_context *ctx_hi, *ctx_lo;
943 struct igt_spinner spin_hi, spin_lo;
944 struct intel_engine_cs *engine;
945 enum intel_engine_id id;
946 intel_wakeref_t wakeref;
949 if (!HAS_LOGICAL_RING_PREEMPTION(i915))
952 if (!intel_has_reset_engine(i915))
955 mutex_lock(&i915->drm.struct_mutex);
956 wakeref = intel_runtime_pm_get(i915);
958 if (igt_spinner_init(&spin_hi, i915))
961 if (igt_spinner_init(&spin_lo, i915))
964 ctx_hi = kernel_context(i915);
967 ctx_hi->sched.priority =
968 I915_USER_PRIORITY(I915_CONTEXT_MAX_USER_PRIORITY);
970 ctx_lo = kernel_context(i915);
973 ctx_lo->sched.priority =
974 I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY);
976 for_each_engine(engine, i915, id) {
977 struct i915_request *rq;
979 if (!intel_engine_has_preemption(engine))
982 rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
989 i915_request_add(rq);
990 if (!igt_wait_for_spinner(&spin_lo, rq)) {
991 GEM_TRACE("lo spinner failed to start\n");
993 i915_gem_set_wedged(i915);
998 rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
1001 igt_spinner_end(&spin_lo);
1006 init_completion(&engine->execlists.preempt_hang.completion);
1007 engine->execlists.preempt_hang.inject_hang = true;
1009 i915_request_add(rq);
1011 if (!wait_for_completion_timeout(&engine->execlists.preempt_hang.completion,
1013 pr_err("Preemption did not occur within timeout!");
1015 i915_gem_set_wedged(i915);
1020 set_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);
1021 i915_reset_engine(engine, NULL);
1022 clear_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);
1024 engine->execlists.preempt_hang.inject_hang = false;
1026 if (!igt_wait_for_spinner(&spin_hi, rq)) {
1027 GEM_TRACE("hi spinner failed to start\n");
1029 i915_gem_set_wedged(i915);
1034 igt_spinner_end(&spin_hi);
1035 igt_spinner_end(&spin_lo);
1036 if (igt_flush_test(i915, I915_WAIT_LOCKED)) {
1044 kernel_context_close(ctx_lo);
1046 kernel_context_close(ctx_hi);
1048 igt_spinner_fini(&spin_lo);
1050 igt_spinner_fini(&spin_hi);
1052 igt_flush_test(i915, I915_WAIT_LOCKED);
1053 intel_runtime_pm_put(i915, wakeref);
1054 mutex_unlock(&i915->drm.struct_mutex);
1058 static int random_range(struct rnd_state *rnd, int min, int max)
1060 return i915_prandom_u32_max_state(max - min, rnd) + min;
1063 static int random_priority(struct rnd_state *rnd)
1065 return random_range(rnd, I915_PRIORITY_MIN, I915_PRIORITY_MAX);
1068 struct preempt_smoke {
1069 struct drm_i915_private *i915;
1070 struct i915_gem_context **contexts;
1071 struct intel_engine_cs *engine;
1072 struct drm_i915_gem_object *batch;
1073 unsigned int ncontext;
1074 struct rnd_state prng;
1075 unsigned long count;
1078 static struct i915_gem_context *smoke_context(struct preempt_smoke *smoke)
1080 return smoke->contexts[i915_prandom_u32_max_state(smoke->ncontext,
1084 static int smoke_submit(struct preempt_smoke *smoke,
1085 struct i915_gem_context *ctx, int prio,
1086 struct drm_i915_gem_object *batch)
1088 struct i915_request *rq;
1089 struct i915_vma *vma = NULL;
1093 vma = i915_vma_instance(batch, &ctx->ppgtt->vm, NULL);
1095 return PTR_ERR(vma);
1097 err = i915_vma_pin(vma, 0, 0, PIN_USER);
1102 ctx->sched.priority = prio;
1104 rq = igt_request_alloc(ctx, smoke->engine);
1111 err = rq->engine->emit_bb_start(rq,
1115 err = i915_vma_move_to_active(vma, rq, 0);
1118 i915_request_add(rq);
1122 i915_vma_unpin(vma);
1127 static int smoke_crescendo_thread(void *arg)
1129 struct preempt_smoke *smoke = arg;
1130 IGT_TIMEOUT(end_time);
1131 unsigned long count;
1135 struct i915_gem_context *ctx = smoke_context(smoke);
1138 mutex_lock(&smoke->i915->drm.struct_mutex);
1139 err = smoke_submit(smoke,
1140 ctx, count % I915_PRIORITY_MAX,
1142 mutex_unlock(&smoke->i915->drm.struct_mutex);
1147 } while (!__igt_timeout(end_time, NULL));
1149 smoke->count = count;
1153 static int smoke_crescendo(struct preempt_smoke *smoke, unsigned int flags)
1154 #define BATCH BIT(0)
1156 struct task_struct *tsk[I915_NUM_ENGINES] = {};
1157 struct preempt_smoke arg[I915_NUM_ENGINES];
1158 struct intel_engine_cs *engine;
1159 enum intel_engine_id id;
1160 unsigned long count;
1163 mutex_unlock(&smoke->i915->drm.struct_mutex);
1165 for_each_engine(engine, smoke->i915, id) {
1167 arg[id].engine = engine;
1168 if (!(flags & BATCH))
1169 arg[id].batch = NULL;
1172 tsk[id] = kthread_run(smoke_crescendo_thread, &arg,
1173 "igt/smoke:%d", id);
1174 if (IS_ERR(tsk[id])) {
1175 err = PTR_ERR(tsk[id]);
1178 get_task_struct(tsk[id]);
1182 for_each_engine(engine, smoke->i915, id) {
1185 if (IS_ERR_OR_NULL(tsk[id]))
1188 status = kthread_stop(tsk[id]);
1192 count += arg[id].count;
1194 put_task_struct(tsk[id]);
1197 mutex_lock(&smoke->i915->drm.struct_mutex);
1199 pr_info("Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
1201 RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext);
1205 static int smoke_random(struct preempt_smoke *smoke, unsigned int flags)
1207 enum intel_engine_id id;
1208 IGT_TIMEOUT(end_time);
1209 unsigned long count;
1213 for_each_engine(smoke->engine, smoke->i915, id) {
1214 struct i915_gem_context *ctx = smoke_context(smoke);
1217 err = smoke_submit(smoke,
1218 ctx, random_priority(&smoke->prng),
1219 flags & BATCH ? smoke->batch : NULL);
1225 } while (!__igt_timeout(end_time, NULL));
1227 pr_info("Submitted %lu random:%x requests across %d engines and %d contexts\n",
1229 RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext);
1233 static int live_preempt_smoke(void *arg)
1235 struct preempt_smoke smoke = {
1237 .prng = I915_RND_STATE_INITIALIZER(i915_selftest.random_seed),
1240 const unsigned int phase[] = { 0, BATCH };
1241 intel_wakeref_t wakeref;
1242 struct igt_live_test t;
1247 if (!HAS_LOGICAL_RING_PREEMPTION(smoke.i915))
1250 smoke.contexts = kmalloc_array(smoke.ncontext,
1251 sizeof(*smoke.contexts),
1253 if (!smoke.contexts)
1256 mutex_lock(&smoke.i915->drm.struct_mutex);
1257 wakeref = intel_runtime_pm_get(smoke.i915);
1259 smoke.batch = i915_gem_object_create_internal(smoke.i915, PAGE_SIZE);
1260 if (IS_ERR(smoke.batch)) {
1261 err = PTR_ERR(smoke.batch);
1265 cs = i915_gem_object_pin_map(smoke.batch, I915_MAP_WB);
1270 for (n = 0; n < PAGE_SIZE / sizeof(*cs) - 1; n++)
1271 cs[n] = MI_ARB_CHECK;
1272 cs[n] = MI_BATCH_BUFFER_END;
1273 i915_gem_object_flush_map(smoke.batch);
1274 i915_gem_object_unpin_map(smoke.batch);
1276 if (igt_live_test_begin(&t, smoke.i915, __func__, "all")) {
1281 for (n = 0; n < smoke.ncontext; n++) {
1282 smoke.contexts[n] = kernel_context(smoke.i915);
1283 if (!smoke.contexts[n])
1287 for (n = 0; n < ARRAY_SIZE(phase); n++) {
1288 err = smoke_crescendo(&smoke, phase[n]);
1292 err = smoke_random(&smoke, phase[n]);
1298 if (igt_live_test_end(&t))
1301 for (n = 0; n < smoke.ncontext; n++) {
1302 if (!smoke.contexts[n])
1304 kernel_context_close(smoke.contexts[n]);
1308 i915_gem_object_put(smoke.batch);
1310 intel_runtime_pm_put(smoke.i915, wakeref);
1311 mutex_unlock(&smoke.i915->drm.struct_mutex);
1312 kfree(smoke.contexts);
1317 static int nop_virtual_engine(struct drm_i915_private *i915,
1318 struct intel_engine_cs **siblings,
1319 unsigned int nsibling,
1322 #define CHAIN BIT(0)
1324 IGT_TIMEOUT(end_time);
1325 struct i915_request *request[16];
1326 struct i915_gem_context *ctx[16];
1327 struct intel_context *ve[16];
1328 unsigned long n, prime, nc;
1329 struct igt_live_test t;
1330 ktime_t times[2] = {};
1333 GEM_BUG_ON(!nctx || nctx > ARRAY_SIZE(ctx));
1335 for (n = 0; n < nctx; n++) {
1336 ctx[n] = kernel_context(i915);
1343 ve[n] = intel_execlists_create_virtual(ctx[n],
1344 siblings, nsibling);
1345 if (IS_ERR(ve[n])) {
1346 kernel_context_close(ctx[n]);
1347 err = PTR_ERR(ve[n]);
1352 err = intel_context_pin(ve[n]);
1354 intel_context_put(ve[n]);
1355 kernel_context_close(ctx[n]);
1361 err = igt_live_test_begin(&t, i915, __func__, ve[0]->engine->name);
1365 for_each_prime_number_from(prime, 1, 8192) {
1366 times[1] = ktime_get_raw();
1368 if (flags & CHAIN) {
1369 for (nc = 0; nc < nctx; nc++) {
1370 for (n = 0; n < prime; n++) {
1372 i915_request_create(ve[nc]);
1373 if (IS_ERR(request[nc])) {
1374 err = PTR_ERR(request[nc]);
1378 i915_request_add(request[nc]);
1382 for (n = 0; n < prime; n++) {
1383 for (nc = 0; nc < nctx; nc++) {
1385 i915_request_create(ve[nc]);
1386 if (IS_ERR(request[nc])) {
1387 err = PTR_ERR(request[nc]);
1391 i915_request_add(request[nc]);
1396 for (nc = 0; nc < nctx; nc++) {
1397 if (i915_request_wait(request[nc],
1400 pr_err("%s(%s): wait for %llx:%lld timed out\n",
1401 __func__, ve[0]->engine->name,
1402 request[nc]->fence.context,
1403 request[nc]->fence.seqno);
1405 GEM_TRACE("%s(%s) failed at request %llx:%lld\n",
1406 __func__, ve[0]->engine->name,
1407 request[nc]->fence.context,
1408 request[nc]->fence.seqno);
1410 i915_gem_set_wedged(i915);
1415 times[1] = ktime_sub(ktime_get_raw(), times[1]);
1417 times[0] = times[1];
1419 if (__igt_timeout(end_time, NULL))
1423 err = igt_live_test_end(&t);
1427 pr_info("Requestx%d latencies on %s: 1 = %lluns, %lu = %lluns\n",
1428 nctx, ve[0]->engine->name, ktime_to_ns(times[0]),
1429 prime, div64_u64(ktime_to_ns(times[1]), prime));
1432 if (igt_flush_test(i915, I915_WAIT_LOCKED))
1435 for (nc = 0; nc < nctx; nc++) {
1436 intel_context_unpin(ve[nc]);
1437 intel_context_put(ve[nc]);
1438 kernel_context_close(ctx[nc]);
1443 static int live_virtual_engine(void *arg)
1445 struct drm_i915_private *i915 = arg;
1446 struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
1447 struct intel_engine_cs *engine;
1448 enum intel_engine_id id;
1449 unsigned int class, inst;
1452 if (USES_GUC_SUBMISSION(i915))
1455 mutex_lock(&i915->drm.struct_mutex);
1457 for_each_engine(engine, i915, id) {
1458 err = nop_virtual_engine(i915, &engine, 1, 1, 0);
1460 pr_err("Failed to wrap engine %s: err=%d\n",
1466 for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
1470 for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
1471 if (!i915->engine_class[class][inst])
1474 siblings[nsibling++] = i915->engine_class[class][inst];
1479 for (n = 1; n <= nsibling + 1; n++) {
1480 err = nop_virtual_engine(i915, siblings, nsibling,
1486 err = nop_virtual_engine(i915, siblings, nsibling, n, CHAIN);
1492 mutex_unlock(&i915->drm.struct_mutex);
1496 static int mask_virtual_engine(struct drm_i915_private *i915,
1497 struct intel_engine_cs **siblings,
1498 unsigned int nsibling)
1500 struct i915_request *request[MAX_ENGINE_INSTANCE + 1];
1501 struct i915_gem_context *ctx;
1502 struct intel_context *ve;
1503 struct igt_live_test t;
1508 * Check that by setting the execution mask on a request, we can
1509 * restrict it to our desired engine within the virtual engine.
1512 ctx = kernel_context(i915);
1516 ve = intel_execlists_create_virtual(ctx, siblings, nsibling);
1522 err = intel_context_pin(ve);
1526 err = igt_live_test_begin(&t, i915, __func__, ve->engine->name);
1530 for (n = 0; n < nsibling; n++) {
1531 request[n] = i915_request_create(ve);
1532 if (IS_ERR(request)) {
1533 err = PTR_ERR(request);
1538 /* Reverse order as it's more likely to be unnatural */
1539 request[n]->execution_mask = siblings[nsibling - n - 1]->mask;
1541 i915_request_get(request[n]);
1542 i915_request_add(request[n]);
1545 for (n = 0; n < nsibling; n++) {
1546 if (i915_request_wait(request[n], I915_WAIT_LOCKED, HZ / 10) < 0) {
1547 pr_err("%s(%s): wait for %llx:%lld timed out\n",
1548 __func__, ve->engine->name,
1549 request[n]->fence.context,
1550 request[n]->fence.seqno);
1552 GEM_TRACE("%s(%s) failed at request %llx:%lld\n",
1553 __func__, ve->engine->name,
1554 request[n]->fence.context,
1555 request[n]->fence.seqno);
1557 i915_gem_set_wedged(i915);
1562 if (request[n]->engine != siblings[nsibling - n - 1]) {
1563 pr_err("Executed on wrong sibling '%s', expected '%s'\n",
1564 request[n]->engine->name,
1565 siblings[nsibling - n - 1]->name);
1571 err = igt_live_test_end(&t);
1576 if (igt_flush_test(i915, I915_WAIT_LOCKED))
1579 for (n = 0; n < nsibling; n++)
1580 i915_request_put(request[n]);
1583 intel_context_unpin(ve);
1585 intel_context_put(ve);
1587 kernel_context_close(ctx);
1591 static int live_virtual_mask(void *arg)
1593 struct drm_i915_private *i915 = arg;
1594 struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
1595 unsigned int class, inst;
1598 if (USES_GUC_SUBMISSION(i915))
1601 mutex_lock(&i915->drm.struct_mutex);
1603 for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
1604 unsigned int nsibling;
1607 for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
1608 if (!i915->engine_class[class][inst])
1611 siblings[nsibling++] = i915->engine_class[class][inst];
1616 err = mask_virtual_engine(i915, siblings, nsibling);
1622 mutex_unlock(&i915->drm.struct_mutex);
1626 static int bond_virtual_engine(struct drm_i915_private *i915,
1628 struct intel_engine_cs **siblings,
1629 unsigned int nsibling,
1631 #define BOND_SCHEDULE BIT(0)
1633 struct intel_engine_cs *master;
1634 struct i915_gem_context *ctx;
1635 struct i915_request *rq[16];
1636 enum intel_engine_id id;
1640 GEM_BUG_ON(nsibling >= ARRAY_SIZE(rq) - 1);
1642 ctx = kernel_context(i915);
1647 rq[0] = ERR_PTR(-ENOMEM);
1648 for_each_engine(master, i915, id) {
1649 struct i915_sw_fence fence = {};
1651 if (master->class == class)
1654 memset_p((void *)rq, ERR_PTR(-EINVAL), ARRAY_SIZE(rq));
1656 rq[0] = igt_request_alloc(ctx, master);
1657 if (IS_ERR(rq[0])) {
1658 err = PTR_ERR(rq[0]);
1661 i915_request_get(rq[0]);
1663 if (flags & BOND_SCHEDULE) {
1664 onstack_fence_init(&fence);
1665 err = i915_sw_fence_await_sw_fence_gfp(&rq[0]->submit,
1669 i915_request_add(rq[0]);
1673 for (n = 0; n < nsibling; n++) {
1674 struct intel_context *ve;
1676 ve = intel_execlists_create_virtual(ctx,
1681 onstack_fence_fini(&fence);
1685 err = intel_virtual_engine_attach_bond(ve->engine,
1689 intel_context_put(ve);
1690 onstack_fence_fini(&fence);
1694 err = intel_context_pin(ve);
1695 intel_context_put(ve);
1697 onstack_fence_fini(&fence);
1701 rq[n + 1] = i915_request_create(ve);
1702 intel_context_unpin(ve);
1703 if (IS_ERR(rq[n + 1])) {
1704 err = PTR_ERR(rq[n + 1]);
1705 onstack_fence_fini(&fence);
1708 i915_request_get(rq[n + 1]);
1710 err = i915_request_await_execution(rq[n + 1],
1712 ve->engine->bond_execute);
1713 i915_request_add(rq[n + 1]);
1715 onstack_fence_fini(&fence);
1719 onstack_fence_fini(&fence);
1721 if (i915_request_wait(rq[0],
1724 pr_err("Master request did not execute (on %s)!\n",
1725 rq[0]->engine->name);
1730 for (n = 0; n < nsibling; n++) {
1731 if (i915_request_wait(rq[n + 1],
1733 MAX_SCHEDULE_TIMEOUT) < 0) {
1738 if (rq[n + 1]->engine != siblings[n]) {
1739 pr_err("Bonded request did not execute on target engine: expected %s, used %s; master was %s\n",
1741 rq[n + 1]->engine->name,
1742 rq[0]->engine->name);
1748 for (n = 0; !IS_ERR(rq[n]); n++)
1749 i915_request_put(rq[n]);
1750 rq[0] = ERR_PTR(-ENOMEM);
1754 for (n = 0; !IS_ERR(rq[n]); n++)
1755 i915_request_put(rq[n]);
1756 if (igt_flush_test(i915, I915_WAIT_LOCKED))
1759 kernel_context_close(ctx);
1763 static int live_virtual_bond(void *arg)
1765 static const struct phase {
1770 { "schedule", BOND_SCHEDULE },
1773 struct drm_i915_private *i915 = arg;
1774 struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
1775 unsigned int class, inst;
1778 if (USES_GUC_SUBMISSION(i915))
1781 mutex_lock(&i915->drm.struct_mutex);
1783 for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
1784 const struct phase *p;
1788 for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
1789 if (!i915->engine_class[class][inst])
1792 GEM_BUG_ON(nsibling == ARRAY_SIZE(siblings));
1793 siblings[nsibling++] = i915->engine_class[class][inst];
1798 for (p = phases; p->name; p++) {
1799 err = bond_virtual_engine(i915,
1800 class, siblings, nsibling,
1803 pr_err("%s(%s): failed class=%d, nsibling=%d, err=%d\n",
1804 __func__, p->name, class, nsibling, err);
1811 mutex_unlock(&i915->drm.struct_mutex);
1815 int intel_execlists_live_selftests(struct drm_i915_private *i915)
1817 static const struct i915_subtest tests[] = {
1818 SUBTEST(live_sanitycheck),
1819 SUBTEST(live_busywait_preempt),
1820 SUBTEST(live_preempt),
1821 SUBTEST(live_late_preempt),
1822 SUBTEST(live_suppress_self_preempt),
1823 SUBTEST(live_suppress_wait_preempt),
1824 SUBTEST(live_chain_preempt),
1825 SUBTEST(live_preempt_hang),
1826 SUBTEST(live_preempt_smoke),
1827 SUBTEST(live_virtual_engine),
1828 SUBTEST(live_virtual_mask),
1829 SUBTEST(live_virtual_bond),
1832 if (!HAS_EXECLISTS(i915))
1835 if (i915_terminally_wedged(i915))
1838 return i915_subtests(tests, i915);