drivers/gpu/drm/ast/ast_mode.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  * Parts based on xf86-video-ast
   4  * Copyright (c) 2005 ASPEED Technology Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  */
  27 /*
  28  * Authors: Dave Airlie <airlied@redhat.com>
  29  */
  30
  31 #include <linux/export.h>
  32 #include <linux/pci.h>
  33
  34 #include <drm/drm_atomic.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_atomic_state_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_crtc_helper.h>
  39 #include <drm/drm_fourcc.h>
  40 #include <drm/drm_gem_atomic_helper.h>
  41 #include <drm/drm_gem_framebuffer_helper.h>
  42 #include <drm/drm_gem_vram_helper.h>
  43 #include <drm/drm_managed.h>
  44 #include <drm/drm_plane_helper.h>
  45 #include <drm/drm_probe_helper.h>
  46 #include <drm/drm_simple_kms_helper.h>
  47
  48 #include "ast_drv.h"
  49 #include "ast_tables.h"
  50
  51 static inline void ast_load_palette_index(struct ast_private *ast,
  52                                      u8 index, u8 red, u8 green,
  53                                      u8 blue)
  54 {
  55         ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
  56         ast_io_read8(ast, AST_IO_SEQ_PORT);
  57         ast_io_write8(ast, AST_IO_DAC_DATA, red);
  58         ast_io_read8(ast, AST_IO_SEQ_PORT);
  59         ast_io_write8(ast, AST_IO_DAC_DATA, green);
  60         ast_io_read8(ast, AST_IO_SEQ_PORT);
  61         ast_io_write8(ast, AST_IO_DAC_DATA, blue);
  62         ast_io_read8(ast, AST_IO_SEQ_PORT);
  63 }
  64
  65 static void ast_crtc_load_lut(struct ast_private *ast, struct drm_crtc *crtc)
  66 {
  67         u16 *r, *g, *b;
  68         int i;
  69
  70         if (!crtc->enabled)
  71                 return;
  72
  73         r = crtc->gamma_store;
  74         g = r + crtc->gamma_size;
  75         b = g + crtc->gamma_size;
  76
  77         for (i = 0; i < 256; i++)
  78                 ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
  79 }
  80
  81 static bool ast_get_vbios_mode_info(const struct drm_format_info *format,
  82                                     const struct drm_display_mode *mode,
  83                                     struct drm_display_mode *adjusted_mode,
  84                                     struct ast_vbios_mode_info *vbios_mode)
  85 {
  86         u32 refresh_rate_index = 0, refresh_rate;
  87         const struct ast_vbios_enhtable *best = NULL;
  88         u32 hborder, vborder;
  89         bool check_sync;
  90
  91         switch (format->cpp[0] * 8) {
  92         case 8:
  93                 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
  94                 break;
  95         case 16:
  96                 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
  97                 break;
  98         case 24:
  99         case 32:
 100                 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
 101                 break;
 102         default:
 103                 return false;
 104         }
 105
 106         switch (mode->crtc_hdisplay) {
 107         case 640:
 108                 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
 109                 break;
 110         case 800:
 111                 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
 112                 break;
 113         case 1024:
 114                 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
 115                 break;
 116         case 1280:
 117                 if (mode->crtc_vdisplay == 800)
 118                         vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
 119                 else
 120                         vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
 121                 break;
 122         case 1360:
 123                 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
 124                 break;
 125         case 1440:
 126                 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
 127                 break;
 128         case 1600:
 129                 if (mode->crtc_vdisplay == 900)
 130                         vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
 131                 else
 132                         vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
 133                 break;
 134         case 1680:
 135                 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
 136                 break;
 137         case 1920:
 138                 if (mode->crtc_vdisplay == 1080)
 139                         vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
 140                 else
 141                         vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
 142                 break;
 143         default:
 144                 return false;
 145         }
 146
 147         refresh_rate = drm_mode_vrefresh(mode);
 148         check_sync = vbios_mode->enh_table->flags & WideScreenMode;
 149
 150         while (1) {
 151                 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
 152
 153                 while (loop->refresh_rate != 0xff) {
 154                         if ((check_sync) &&
 155                             (((mode->flags & DRM_MODE_FLAG_NVSYNC)  &&
 156                               (loop->flags & PVSync))  ||
 157                              ((mode->flags & DRM_MODE_FLAG_PVSYNC)  &&
 158                               (loop->flags & NVSync))  ||
 159                              ((mode->flags & DRM_MODE_FLAG_NHSYNC)  &&
 160                               (loop->flags & PHSync))  ||
 161                              ((mode->flags & DRM_MODE_FLAG_PHSYNC)  &&
 162                               (loop->flags & NHSync)))) {
 163                                 loop++;
 164                                 continue;
 165                         }
 166                         if (loop->refresh_rate <= refresh_rate
 167                             && (!best || loop->refresh_rate > best->refresh_rate))
 168                                 best = loop;
 169                         loop++;
 170                 }
 171                 if (best || !check_sync)
 172                         break;
 173                 check_sync = 0;
 174         }
 175
 176         if (best)
 177                 vbios_mode->enh_table = best;
 178
 179         hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
 180         vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
 181
 182         adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
 183         adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
 184         adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
 185         adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
 186                 vbios_mode->enh_table->hfp;
 187         adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
 188                                          vbios_mode->enh_table->hfp +
 189                                          vbios_mode->enh_table->hsync);
 190
 191         adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
 192         adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
 193         adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
 194         adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
 195                 vbios_mode->enh_table->vfp;
 196         adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
 197                                          vbios_mode->enh_table->vfp +
 198                                          vbios_mode->enh_table->vsync);
 199
 200         return true;
 201 }
 202
 203 static void ast_set_vbios_color_reg(struct ast_private *ast,
 204                                     const struct drm_format_info *format,
 205                                     const struct ast_vbios_mode_info *vbios_mode)
 206 {
 207         u32 color_index;
 208
 209         switch (format->cpp[0]) {
 210         case 1:
 211                 color_index = VGAModeIndex - 1;
 212                 break;
 213         case 2:
 214                 color_index = HiCModeIndex;
 215                 break;
 216         case 3:
 217         case 4:
 218                 color_index = TrueCModeIndex;
 219                 break;
 220         default:
 221                 return;
 222         }
 223
 224         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4));
 225
 226         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 227
 228         if (vbios_mode->enh_table->flags & NewModeInfo) {
 229                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 230                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8);
 231         }
 232 }
 233
 234 static void ast_set_vbios_mode_reg(struct ast_private *ast,
 235                                    const struct drm_display_mode *adjusted_mode,
 236                                    const struct ast_vbios_mode_info *vbios_mode)
 237 {
 238         u32 refresh_rate_index, mode_id;
 239
 240         refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
 241         mode_id = vbios_mode->enh_table->mode_id;
 242
 243         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
 244         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
 245
 246         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 247
 248         if (vbios_mode->enh_table->flags & NewModeInfo) {
 249                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 250                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
 251                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
 252                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
 253                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
 254                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
 255         }
 256 }
 257
 258 static void ast_set_std_reg(struct ast_private *ast,
 259                             struct drm_display_mode *mode,
 260                             struct ast_vbios_mode_info *vbios_mode)
 261 {
 262         const struct ast_vbios_stdtable *stdtable;
 263         u32 i;
 264         u8 jreg;
 265
 266         stdtable = vbios_mode->std_table;
 267
 268         jreg = stdtable->misc;
 269         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 270
 271         /* Set SEQ; except Screen Disable field */
 272         ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
 273         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]);
 274         for (i = 1; i < 4; i++) {
 275                 jreg = stdtable->seq[i];
 276                 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg);
 277         }
 278
 279         /* Set CRTC; except base address and offset */
 280         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 281         for (i = 0; i < 12; i++)
 282                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 283         for (i = 14; i < 19; i++)
 284                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 285         for (i = 20; i < 25; i++)
 286                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 287
 288         /* set AR */
 289         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 290         for (i = 0; i < 20; i++) {
 291                 jreg = stdtable->ar[i];
 292                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
 293                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
 294         }
 295         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
 296         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
 297
 298         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 299         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
 300
 301         /* Set GR */
 302         for (i = 0; i < 9; i++)
 303                 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
 304 }
 305
 306 static void ast_set_crtc_reg(struct ast_private *ast,
 307                              struct drm_display_mode *mode,
 308                              struct ast_vbios_mode_info *vbios_mode)
 309 {
 310         u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
 311         u16 temp, precache = 0;
 312
 313         if ((ast->chip == AST2500) &&
 314             (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
 315                 precache = 40;
 316
 317         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 318
 319         temp = (mode->crtc_htotal >> 3) - 5;
 320         if (temp & 0x100)
 321                 jregAC |= 0x01; /* HT D[8] */
 322         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
 323
 324         temp = (mode->crtc_hdisplay >> 3) - 1;
 325         if (temp & 0x100)
 326                 jregAC |= 0x04; /* HDE D[8] */
 327         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
 328
 329         temp = (mode->crtc_hblank_start >> 3) - 1;
 330         if (temp & 0x100)
 331                 jregAC |= 0x10; /* HBS D[8] */
 332         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
 333
 334         temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
 335         if (temp & 0x20)
 336                 jreg05 |= 0x80;  /* HBE D[5] */
 337         if (temp & 0x40)
 338                 jregAD |= 0x01;  /* HBE D[5] */
 339         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
 340
 341         temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
 342         if (temp & 0x100)
 343                 jregAC |= 0x40; /* HRS D[5] */
 344         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
 345
 346         temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
 347         if (temp & 0x20)
 348                 jregAD |= 0x04; /* HRE D[5] */
 349         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
 350
 351         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
 352         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
 353
 354         /* vert timings */
 355         temp = (mode->crtc_vtotal) - 2;
 356         if (temp & 0x100)
 357                 jreg07 |= 0x01;
 358         if (temp & 0x200)
 359                 jreg07 |= 0x20;
 360         if (temp & 0x400)
 361                 jregAE |= 0x01;
 362         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
 363
 364         temp = (mode->crtc_vsync_start) - 1;
 365         if (temp & 0x100)
 366                 jreg07 |= 0x04;
 367         if (temp & 0x200)
 368                 jreg07 |= 0x80;
 369         if (temp & 0x400)
 370                 jregAE |= 0x08;
 371         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
 372
 373         temp = (mode->crtc_vsync_end - 1) & 0x3f;
 374         if (temp & 0x10)
 375                 jregAE |= 0x20;
 376         if (temp & 0x20)
 377                 jregAE |= 0x40;
 378         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
 379
 380         temp = mode->crtc_vdisplay - 1;
 381         if (temp & 0x100)
 382                 jreg07 |= 0x02;
 383         if (temp & 0x200)
 384                 jreg07 |= 0x40;
 385         if (temp & 0x400)
 386                 jregAE |= 0x02;
 387         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
 388
 389         temp = mode->crtc_vblank_start - 1;
 390         if (temp & 0x100)
 391                 jreg07 |= 0x08;
 392         if (temp & 0x200)
 393                 jreg09 |= 0x20;
 394         if (temp & 0x400)
 395                 jregAE |= 0x04;
 396         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
 397
 398         temp = mode->crtc_vblank_end - 1;
 399         if (temp & 0x100)
 400                 jregAE |= 0x10;
 401         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
 402
 403         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
 404         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
 405         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
 406
 407         if (precache)
 408                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
 409         else
 410                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
 411
 412         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
 413 }
 414
 415 static void ast_set_offset_reg(struct ast_private *ast,
 416                                struct drm_framebuffer *fb)
 417 {
 418         u16 offset;
 419
 420         offset = fb->pitches[0] >> 3;
 421         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
 422         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
 423 }
 424
 425 static void ast_set_dclk_reg(struct ast_private *ast,
 426                              struct drm_display_mode *mode,
 427                              struct ast_vbios_mode_info *vbios_mode)
 428 {
 429         const struct ast_vbios_dclk_info *clk_info;
 430
 431         if (ast->chip == AST2500)
 432                 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
 433         else
 434                 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
 435
 436         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
 437         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
 438         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
 439                                (clk_info->param3 & 0xc0) |
 440                                ((clk_info->param3 & 0x3) << 4));
 441 }
 442
 443 static void ast_set_color_reg(struct ast_private *ast,
 444                               const struct drm_format_info *format)
 445 {
 446         u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
 447
 448         switch (format->cpp[0] * 8) {
 449         case 8:
 450                 jregA0 = 0x70;
 451                 jregA3 = 0x01;
 452                 jregA8 = 0x00;
 453                 break;
 454         case 15:
 455         case 16:
 456                 jregA0 = 0x70;
 457                 jregA3 = 0x04;
 458                 jregA8 = 0x02;
 459                 break;
 460         case 32:
 461                 jregA0 = 0x70;
 462                 jregA3 = 0x08;
 463                 jregA8 = 0x02;
 464                 break;
 465         }
 466
 467         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
 468         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
 469         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
 470 }
 471
 472 static void ast_set_crtthd_reg(struct ast_private *ast)
 473 {
 474         /* Set Threshold */
 475         if (ast->chip == AST2600) {
 476                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0xe0);
 477                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0xa0);
 478         } else if (ast->chip == AST2300 || ast->chip == AST2400 ||
 479             ast->chip == AST2500) {
 480                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
 481                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
 482         } else if (ast->chip == AST2100 ||
 483                    ast->chip == AST1100 ||
 484                    ast->chip == AST2200 ||
 485                    ast->chip == AST2150) {
 486                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
 487                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
 488         } else {
 489                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
 490                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
 491         }
 492 }
 493
 494 static void ast_set_sync_reg(struct ast_private *ast,
 495                              struct drm_display_mode *mode,
 496                              struct ast_vbios_mode_info *vbios_mode)
 497 {
 498         u8 jreg;
 499
 500         jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
 501         jreg &= ~0xC0;
 502         if (vbios_mode->enh_table->flags & NVSync)
 503                 jreg |= 0x80;
 504         if (vbios_mode->enh_table->flags & NHSync)
 505                 jreg |= 0x40;
 506         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 507 }
 508
 509 static void ast_set_start_address_crt1(struct ast_private *ast,
 510                                        unsigned int offset)
 511 {
 512         u32 addr;
 513
 514         addr = offset >> 2;
 515         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
 516         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
 517         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
 518
 519 }
 520
 521 static void ast_wait_for_vretrace(struct ast_private *ast)
 522 {
 523         unsigned long timeout = jiffies + HZ;
 524         u8 vgair1;
 525
 526         do {
 527                 vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 528         } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
 529 }
 530
 531 /*
 532  * Primary plane
 533  */
 534
 535 static const uint32_t ast_primary_plane_formats[] = {
 536         DRM_FORMAT_XRGB8888,
 537         DRM_FORMAT_RGB565,
 538         DRM_FORMAT_C8,
 539 };
 540
 541 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,
 542                                                  struct drm_atomic_state *state)
 543 {
 544         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
 545                                                                                  plane);
 546         struct drm_crtc_state *crtc_state;
 547         struct ast_crtc_state *ast_crtc_state;
 548         int ret;
 549
 550         if (!new_plane_state->crtc)
 551                 return 0;
 552
 553         crtc_state = drm_atomic_get_new_crtc_state(state,
 554                                                    new_plane_state->crtc);
 555
 556         ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
 557                                                   DRM_PLANE_HELPER_NO_SCALING,
 558                                                   DRM_PLANE_HELPER_NO_SCALING,
 559                                                   false, true);
 560         if (ret)
 561                 return ret;
 562
 563         if (!new_plane_state->visible)
 564                 return 0;
 565
 566         ast_crtc_state = to_ast_crtc_state(crtc_state);
 567
 568         ast_crtc_state->format = new_plane_state->fb->format;
 569
 570         return 0;
 571 }
 572
 573 static void
 574 ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
 575                                        struct drm_atomic_state *state)
 576 {
 577         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 578                                                                            plane);
 579         struct drm_device *dev = plane->dev;
 580         struct ast_private *ast = to_ast_private(dev);
 581         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 582                                                                            plane);
 583         struct drm_gem_vram_object *gbo;
 584         s64 gpu_addr;
 585         struct drm_framebuffer *fb = new_state->fb;
 586         struct drm_framebuffer *old_fb = old_state->fb;
 587
 588         if (!old_fb || (fb->format != old_fb->format)) {
 589                 struct drm_crtc_state *crtc_state = new_state->crtc->state;
 590                 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
 591                 struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;
 592
 593                 ast_set_color_reg(ast, fb->format);
 594                 ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info);
 595         }
 596
 597         gbo = drm_gem_vram_of_gem(fb->obj[0]);
 598         gpu_addr = drm_gem_vram_offset(gbo);
 599         if (drm_WARN_ON_ONCE(dev, gpu_addr < 0))
 600                 return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */
 601
 602         ast_set_offset_reg(ast, fb);
 603         ast_set_start_address_crt1(ast, (u32)gpu_addr);
 604
 605         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00);
 606 }
 607
 608 static void
 609 ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,
 610                                         struct drm_atomic_state *state)
 611 {
 612         struct ast_private *ast = to_ast_private(plane->dev);
 613
 614         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
 615 }
 616
 617 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {
 618         DRM_GEM_VRAM_PLANE_HELPER_FUNCS,
 619         .atomic_check = ast_primary_plane_helper_atomic_check,
 620         .atomic_update = ast_primary_plane_helper_atomic_update,
 621         .atomic_disable = ast_primary_plane_helper_atomic_disable,
 622 };
 623
 624 static const struct drm_plane_funcs ast_primary_plane_funcs = {
 625         .update_plane = drm_atomic_helper_update_plane,
 626         .disable_plane = drm_atomic_helper_disable_plane,
 627         .destroy = drm_plane_cleanup,
 628         .reset = drm_atomic_helper_plane_reset,
 629         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
 630         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
 631 };
 632
 633 static int ast_primary_plane_init(struct ast_private *ast)
 634 {
 635         struct drm_device *dev = &ast->base;
 636         struct drm_plane *primary_plane = &ast->primary_plane;
 637         int ret;
 638
 639         ret = drm_universal_plane_init(dev, primary_plane, 0x01,
 640                                        &ast_primary_plane_funcs,
 641                                        ast_primary_plane_formats,
 642                                        ARRAY_SIZE(ast_primary_plane_formats),
 643                                        NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
 644         if (ret) {
 645                 drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret);
 646                 return ret;
 647         }
 648         drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs);
 649
 650         return 0;
 651 }
 652
 653 /*
 654  * Cursor plane
 655  */
 656
 657 static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height)
 658 {
 659         union {
 660                 u32 ul;
 661                 u8 b[4];
 662         } srcdata32[2], data32;
 663         union {
 664                 u16 us;
 665                 u8 b[2];
 666         } data16;
 667         u32 csum = 0;
 668         s32 alpha_dst_delta, last_alpha_dst_delta;
 669         u8 __iomem *dstxor;
 670         const u8 *srcxor;
 671         int i, j;
 672         u32 per_pixel_copy, two_pixel_copy;
 673
 674         alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
 675         last_alpha_dst_delta = alpha_dst_delta - (width << 1);
 676
 677         srcxor = src;
 678         dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
 679         per_pixel_copy = width & 1;
 680         two_pixel_copy = width >> 1;
 681
 682         for (j = 0; j < height; j++) {
 683                 for (i = 0; i < two_pixel_copy; i++) {
 684                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
 685                         srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
 686                         data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
 687                         data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
 688                         data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
 689                         data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
 690
 691                         writel(data32.ul, dstxor);
 692                         csum += data32.ul;
 693
 694                         dstxor += 4;
 695                         srcxor += 8;
 696
 697                 }
 698
 699                 for (i = 0; i < per_pixel_copy; i++) {
 700                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
 701                         data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
 702                         data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
 703                         writew(data16.us, dstxor);
 704                         csum += (u32)data16.us;
 705
 706                         dstxor += 2;
 707                         srcxor += 4;
 708                 }
 709                 dstxor += last_alpha_dst_delta;
 710         }
 711
 712         /* write checksum + signature */
 713         dst += AST_HWC_SIZE;
 714         writel(csum, dst);
 715         writel(width, dst + AST_HWC_SIGNATURE_SizeX);
 716         writel(height, dst + AST_HWC_SIGNATURE_SizeY);
 717         writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
 718         writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
 719 }
 720
 721 static void ast_set_cursor_base(struct ast_private *ast, u64 address)
 722 {
 723         u8 addr0 = (address >> 3) & 0xff;
 724         u8 addr1 = (address >> 11) & 0xff;
 725         u8 addr2 = (address >> 19) & 0xff;
 726
 727         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);
 728         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);
 729         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);
 730 }
 731
 732 static void ast_set_cursor_location(struct ast_private *ast, u16 x, u16 y,
 733                                     u8 x_offset, u8 y_offset)
 734 {
 735         u8 x0 = (x & 0x00ff);
 736         u8 x1 = (x & 0x0f00) >> 8;
 737         u8 y0 = (y & 0x00ff);
 738         u8 y1 = (y & 0x0700) >> 8;
 739
 740         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
 741         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
 742         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0);
 743         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1);
 744         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0);
 745         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1);
 746 }
 747
 748 static void ast_set_cursor_enabled(struct ast_private *ast, bool enabled)
 749 {
 750         static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP |
 751                                      AST_IO_VGACRCB_HWC_ENABLED);
 752
 753         u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP;
 754
 755         if (enabled)
 756                 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED;
 757
 758         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, mask, vgacrcb);
 759 }
 760
 761 static const uint32_t ast_cursor_plane_formats[] = {
 762         DRM_FORMAT_ARGB8888,
 763 };
 764
 765 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane,
 766                                                 struct drm_atomic_state *state)
 767 {
 768         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
 769                                                                                  plane);
 770         struct drm_framebuffer *fb = new_plane_state->fb;
 771         struct drm_crtc_state *crtc_state;
 772         int ret;
 773
 774         if (!new_plane_state->crtc)
 775                 return 0;
 776
 777         crtc_state = drm_atomic_get_new_crtc_state(state,
 778                                                    new_plane_state->crtc);
 779
 780         ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
 781                                                   DRM_PLANE_HELPER_NO_SCALING,
 782                                                   DRM_PLANE_HELPER_NO_SCALING,
 783                                                   true, true);
 784         if (ret)
 785                 return ret;
 786
 787         if (!new_plane_state->visible)
 788                 return 0;
 789
 790         if (fb->width > AST_MAX_HWC_WIDTH || fb->height > AST_MAX_HWC_HEIGHT)
 791                 return -EINVAL;
 792
 793         return 0;
 794 }
 795
 796 static void
 797 ast_cursor_plane_helper_atomic_update(struct drm_plane *plane,
 798                                       struct drm_atomic_state *state)
 799 {
 800         struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane);
 801         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 802                                                                            plane);
 803         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 804                                                                            plane);
 805         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(new_state);
 806         struct drm_framebuffer *fb = new_state->fb;
 807         struct ast_private *ast = to_ast_private(plane->dev);
 808         struct iosys_map dst_map =
 809                 ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].map;
 810         u64 dst_off =
 811                 ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].off;
 812         struct iosys_map src_map = shadow_plane_state->data[0];
 813         unsigned int offset_x, offset_y;
 814         u16 x, y;
 815         u8 x_offset, y_offset;
 816         u8 __iomem *dst;
 817         u8 __iomem *sig;
 818         const u8 *src;
 819
 820         src = src_map.vaddr; /* TODO: Use mapping abstraction properly */
 821         dst = dst_map.vaddr_iomem; /* TODO: Use mapping abstraction properly */
 822         sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */
 823
 824         /*
 825          * Do data transfer to HW cursor BO. If a new cursor image was installed,
 826          * point the scanout engine to dst_gbo's offset and page-flip the HWC buffers.
 827          */
 828
 829         ast_update_cursor_image(dst, src, fb->width, fb->height);
 830
 831         if (new_state->fb != old_state->fb) {
 832                 ast_set_cursor_base(ast, dst_off);
 833
 834                 ++ast_cursor_plane->next_hwc_index;
 835                 ast_cursor_plane->next_hwc_index %= ARRAY_SIZE(ast_cursor_plane->hwc);
 836         }
 837
 838         /*
 839          * Update location in HWC signature and registers.
 840          */
 841
 842         writel(new_state->crtc_x, sig + AST_HWC_SIGNATURE_X);
 843         writel(new_state->crtc_y, sig + AST_HWC_SIGNATURE_Y);
 844
 845         offset_x = AST_MAX_HWC_WIDTH - fb->width;
 846         offset_y = AST_MAX_HWC_HEIGHT - fb->height;
 847
 848         if (new_state->crtc_x < 0) {
 849                 x_offset = (-new_state->crtc_x) + offset_x;
 850                 x = 0;
 851         } else {
 852                 x_offset = offset_x;
 853                 x = new_state->crtc_x;
 854         }
 855         if (new_state->crtc_y < 0) {
 856                 y_offset = (-new_state->crtc_y) + offset_y;
 857                 y = 0;
 858         } else {
 859                 y_offset = offset_y;
 860                 y = new_state->crtc_y;
 861         }
 862
 863         ast_set_cursor_location(ast, x, y, x_offset, y_offset);
 864
 865         /* Dummy write to enable HWC and make the HW pick-up the changes. */
 866         ast_set_cursor_enabled(ast, true);
 867 }
 868
 869 static void
 870 ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane,
 871                                        struct drm_atomic_state *state)
 872 {
 873         struct ast_private *ast = to_ast_private(plane->dev);
 874
 875         ast_set_cursor_enabled(ast, false);
 876 }
 877
 878 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = {
 879         DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
 880         .atomic_check = ast_cursor_plane_helper_atomic_check,
 881         .atomic_update = ast_cursor_plane_helper_atomic_update,
 882         .atomic_disable = ast_cursor_plane_helper_atomic_disable,
 883 };
 884
 885 static void ast_cursor_plane_destroy(struct drm_plane *plane)
 886 {
 887         struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane);
 888         size_t i;
 889         struct drm_gem_vram_object *gbo;
 890         struct iosys_map map;
 891
 892         for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) {
 893                 gbo = ast_cursor_plane->hwc[i].gbo;
 894                 map = ast_cursor_plane->hwc[i].map;
 895                 drm_gem_vram_vunmap(gbo, &map);
 896                 drm_gem_vram_unpin(gbo);
 897                 drm_gem_vram_put(gbo);
 898         }
 899
 900         drm_plane_cleanup(plane);
 901 }
 902
 903 static const struct drm_plane_funcs ast_cursor_plane_funcs = {
 904         .update_plane = drm_atomic_helper_update_plane,
 905         .disable_plane = drm_atomic_helper_disable_plane,
 906         .destroy = ast_cursor_plane_destroy,
 907         DRM_GEM_SHADOW_PLANE_FUNCS,
 908 };
 909
 910 static int ast_cursor_plane_init(struct ast_private *ast)
 911 {
 912         struct drm_device *dev = &ast->base;
 913         struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane;
 914         struct drm_plane *cursor_plane = &ast_cursor_plane->base;
 915         size_t size, i;
 916         struct drm_gem_vram_object *gbo;
 917         struct iosys_map map;
 918         int ret;
 919         s64 off;
 920
 921         /*
 922          * Allocate backing storage for cursors. The BOs are permanently
 923          * pinned to the top end of the VRAM.
 924          */
 925
 926         size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
 927
 928         for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) {
 929                 gbo = drm_gem_vram_create(dev, size, 0);
 930                 if (IS_ERR(gbo)) {
 931                         ret = PTR_ERR(gbo);
 932                         goto err_hwc;
 933                 }
 934                 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM |
 935                                             DRM_GEM_VRAM_PL_FLAG_TOPDOWN);
 936                 if (ret)
 937                         goto err_drm_gem_vram_put;
 938                 ret = drm_gem_vram_vmap(gbo, &map);
 939                 if (ret)
 940                         goto err_drm_gem_vram_unpin;
 941                 off = drm_gem_vram_offset(gbo);
 942                 if (off < 0) {
 943                         ret = off;
 944                         goto err_drm_gem_vram_vunmap;
 945                 }
 946                 ast_cursor_plane->hwc[i].gbo = gbo;
 947                 ast_cursor_plane->hwc[i].map = map;
 948                 ast_cursor_plane->hwc[i].off = off;
 949         }
 950
 951         /*
 952          * Create the cursor plane. The plane's destroy callback will release
 953          * the backing storages' BO memory.
 954          */
 955
 956         ret = drm_universal_plane_init(dev, cursor_plane, 0x01,
 957                                        &ast_cursor_plane_funcs,
 958                                        ast_cursor_plane_formats,
 959                                        ARRAY_SIZE(ast_cursor_plane_formats),
 960                                        NULL, DRM_PLANE_TYPE_CURSOR, NULL);
 961         if (ret) {
 962                 drm_err(dev, "drm_universal_plane failed(): %d\n", ret);
 963                 goto err_hwc;
 964         }
 965         drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs);
 966
 967         return 0;
 968
 969 err_hwc:
 970         while (i) {
 971                 --i;
 972                 gbo = ast_cursor_plane->hwc[i].gbo;
 973                 map = ast_cursor_plane->hwc[i].map;
 974 err_drm_gem_vram_vunmap:
 975                 drm_gem_vram_vunmap(gbo, &map);
 976 err_drm_gem_vram_unpin:
 977                 drm_gem_vram_unpin(gbo);
 978 err_drm_gem_vram_put:
 979                 drm_gem_vram_put(gbo);
 980         }
 981         return ret;
 982 }
 983
 984 /*
 985  * CRTC
 986  */
 987
 988 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
 989 {
 990         struct ast_private *ast = to_ast_private(crtc->dev);
 991
 992         /* TODO: Maybe control display signal generation with
 993          *       Sync Enable (bit CR17.7).
 994          */
 995         switch (mode) {
 996         case DRM_MODE_DPMS_ON:
 997         case DRM_MODE_DPMS_STANDBY:
 998         case DRM_MODE_DPMS_SUSPEND:
 999                 if (ast->tx_chip_type == AST_TX_DP501)
1000                         ast_set_dp501_video_output(crtc->dev, 1);
1001                 break;
1002         case DRM_MODE_DPMS_OFF:
1003                 if (ast->tx_chip_type == AST_TX_DP501)
1004                         ast_set_dp501_video_output(crtc->dev, 0);
1005                 break;
1006         }
1007 }
1008
1009 static enum drm_mode_status
1010 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
1011 {
1012         struct ast_private *ast = to_ast_private(crtc->dev);
1013         enum drm_mode_status status;
1014         uint32_t jtemp;
1015
1016         if (ast->support_wide_screen) {
1017                 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
1018                         return MODE_OK;
1019                 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
1020                         return MODE_OK;
1021                 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
1022                         return MODE_OK;
1023                 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
1024                         return MODE_OK;
1025                 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
1026                         return MODE_OK;
1027
1028                 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
1029                     (ast->chip == AST2300) || (ast->chip == AST2400) ||
1030                     (ast->chip == AST2500)) {
1031                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
1032                                 return MODE_OK;
1033
1034                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
1035                                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
1036                                 if (jtemp & 0x01)
1037                                         return MODE_NOMODE;
1038                                 else
1039                                         return MODE_OK;
1040                         }
1041                 }
1042         }
1043
1044         status = MODE_NOMODE;
1045
1046         switch (mode->hdisplay) {
1047         case 640:
1048                 if (mode->vdisplay == 480)
1049                         status = MODE_OK;
1050                 break;
1051         case 800:
1052                 if (mode->vdisplay == 600)
1053                         status = MODE_OK;
1054                 break;
1055         case 1024:
1056                 if (mode->vdisplay == 768)
1057                         status = MODE_OK;
1058                 break;
1059         case 1280:
1060                 if (mode->vdisplay == 1024)
1061                         status = MODE_OK;
1062                 break;
1063         case 1600:
1064                 if (mode->vdisplay == 1200)
1065                         status = MODE_OK;
1066                 break;
1067         default:
1068                 break;
1069         }
1070
1071         return status;
1072 }
1073
1074 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,
1075                                         struct drm_atomic_state *state)
1076 {
1077         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1078                                                                           crtc);
1079         struct drm_device *dev = crtc->dev;
1080         struct ast_crtc_state *ast_state;
1081         const struct drm_format_info *format;
1082         bool succ;
1083
1084         if (!crtc_state->enable)
1085                 return 0; /* no mode checks if CRTC is being disabled */
1086
1087         ast_state = to_ast_crtc_state(crtc_state);
1088
1089         format = ast_state->format;
1090         if (drm_WARN_ON_ONCE(dev, !format))
1091                 return -EINVAL; /* BUG: We didn't set format in primary check(). */
1092
1093         succ = ast_get_vbios_mode_info(format, &crtc_state->mode,
1094                                        &crtc_state->adjusted_mode,
1095                                        &ast_state->vbios_mode_info);
1096         if (!succ)
1097                 return -EINVAL;
1098
1099         return 0;
1100 }
1101
1102 static void
1103 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,
1104                              struct drm_atomic_state *state)
1105 {
1106         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1107                                                                           crtc);
1108         struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
1109                                                                               crtc);
1110         struct ast_private *ast = to_ast_private(crtc->dev);
1111         struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1112         struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);
1113
1114         /*
1115          * The gamma LUT has to be reloaded after changing the primary
1116          * plane's color format.
1117          */
1118         if (old_ast_crtc_state->format != ast_crtc_state->format)
1119                 ast_crtc_load_lut(ast, crtc);
1120 }
1121
1122 static void
1123 ast_crtc_helper_atomic_enable(struct drm_crtc *crtc,
1124                               struct drm_atomic_state *state)
1125 {
1126         struct drm_device *dev = crtc->dev;
1127         struct ast_private *ast = to_ast_private(dev);
1128         struct drm_crtc_state *crtc_state = crtc->state;
1129         struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1130         struct ast_vbios_mode_info *vbios_mode_info =
1131                 &ast_crtc_state->vbios_mode_info;
1132         struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
1133
1134         ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info);
1135         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
1136         ast_set_std_reg(ast, adjusted_mode, vbios_mode_info);
1137         ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info);
1138         ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info);
1139         ast_set_crtthd_reg(ast);
1140         ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info);
1141
1142         ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
1143 }
1144
1145 static void
1146 ast_crtc_helper_atomic_disable(struct drm_crtc *crtc,
1147                                struct drm_atomic_state *state)
1148 {
1149         struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
1150                                                                               crtc);
1151         struct drm_device *dev = crtc->dev;
1152         struct ast_private *ast = to_ast_private(dev);
1153
1154         ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1155
1156         /*
1157          * HW cursors require the underlying primary plane and CRTC to
1158          * display a valid mode and image. This is not the case during
1159          * full modeset operations. So we temporarily disable any active
1160          * plane, including the HW cursor. Each plane's atomic_update()
1161          * helper will re-enable it if necessary.
1162          *
1163          * We only do this during *full* modesets. It does not affect
1164          * simple pageflips on the planes.
1165          */
1166         drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
1167
1168         /*
1169          * Ensure that no scanout takes place before reprogramming mode
1170          * and format registers.
1171          */
1172         ast_wait_for_vretrace(ast);
1173 }
1174
1175 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
1176         .mode_valid = ast_crtc_helper_mode_valid,
1177         .atomic_check = ast_crtc_helper_atomic_check,
1178         .atomic_flush = ast_crtc_helper_atomic_flush,
1179         .atomic_enable = ast_crtc_helper_atomic_enable,
1180         .atomic_disable = ast_crtc_helper_atomic_disable,
1181 };
1182
1183 static void ast_crtc_reset(struct drm_crtc *crtc)
1184 {
1185         struct ast_crtc_state *ast_state =
1186                 kzalloc(sizeof(*ast_state), GFP_KERNEL);
1187
1188         if (crtc->state)
1189                 crtc->funcs->atomic_destroy_state(crtc, crtc->state);
1190
1191         if (ast_state)
1192                 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base);
1193         else
1194                 __drm_atomic_helper_crtc_reset(crtc, NULL);
1195 }
1196
1197 static struct drm_crtc_state *
1198 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
1199 {
1200         struct ast_crtc_state *new_ast_state, *ast_state;
1201         struct drm_device *dev = crtc->dev;
1202
1203         if (drm_WARN_ON(dev, !crtc->state))
1204                 return NULL;
1205
1206         new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL);
1207         if (!new_ast_state)
1208                 return NULL;
1209         __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);
1210
1211         ast_state = to_ast_crtc_state(crtc->state);
1212
1213         new_ast_state->format = ast_state->format;
1214         memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info,
1215                sizeof(new_ast_state->vbios_mode_info));
1216
1217         return &new_ast_state->base;
1218 }
1219
1220 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,
1221                                           struct drm_crtc_state *state)
1222 {
1223         struct ast_crtc_state *ast_state = to_ast_crtc_state(state);
1224
1225         __drm_atomic_helper_crtc_destroy_state(&ast_state->base);
1226         kfree(ast_state);
1227 }
1228
1229 static const struct drm_crtc_funcs ast_crtc_funcs = {
1230         .reset = ast_crtc_reset,
1231         .destroy = drm_crtc_cleanup,
1232         .set_config = drm_atomic_helper_set_config,
1233         .page_flip = drm_atomic_helper_page_flip,
1234         .atomic_duplicate_state = ast_crtc_atomic_duplicate_state,
1235         .atomic_destroy_state = ast_crtc_atomic_destroy_state,
1236 };
1237
1238 static int ast_crtc_init(struct drm_device *dev)
1239 {
1240         struct ast_private *ast = to_ast_private(dev);
1241         struct drm_crtc *crtc = &ast->crtc;
1242         int ret;
1243
1244         ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane,
1245                                         &ast->cursor_plane.base, &ast_crtc_funcs,
1246                                         NULL);
1247         if (ret)
1248                 return ret;
1249
1250         drm_mode_crtc_set_gamma_size(crtc, 256);
1251         drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);
1252
1253         return 0;
1254 }
1255
1256 /*
1257  * VGA Connector
1258  */
1259
1260 static int ast_vga_connector_helper_get_modes(struct drm_connector *connector)
1261 {
1262         struct ast_vga_connector *ast_vga_connector = to_ast_vga_connector(connector);
1263         struct edid *edid;
1264         int count;
1265
1266         if (!ast_vga_connector->i2c)
1267                 goto err_drm_connector_update_edid_property;
1268
1269         edid = drm_get_edid(connector, &ast_vga_connector->i2c->adapter);
1270         if (!edid)
1271                 goto err_drm_connector_update_edid_property;
1272
1273         count = drm_add_edid_modes(connector, edid);
1274         kfree(edid);
1275
1276         return count;
1277
1278 err_drm_connector_update_edid_property:
1279         drm_connector_update_edid_property(connector, NULL);
1280         return 0;
1281 }
1282
1283 static const struct drm_connector_helper_funcs ast_vga_connector_helper_funcs = {
1284         .get_modes = ast_vga_connector_helper_get_modes,
1285 };
1286
1287 static const struct drm_connector_funcs ast_vga_connector_funcs = {
1288         .reset = drm_atomic_helper_connector_reset,
1289         .fill_modes = drm_helper_probe_single_connector_modes,
1290         .destroy = drm_connector_cleanup,
1291         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1292         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1293 };
1294
1295 static int ast_vga_connector_init(struct drm_device *dev,
1296                                   struct ast_vga_connector *ast_vga_connector)
1297 {
1298         struct drm_connector *connector = &ast_vga_connector->base;
1299         int ret;
1300
1301         ast_vga_connector->i2c = ast_i2c_create(dev);
1302         if (!ast_vga_connector->i2c)
1303                 drm_err(dev, "failed to add ddc bus for connector\n");
1304
1305         if (ast_vga_connector->i2c)
1306                 ret = drm_connector_init_with_ddc(dev, connector, &ast_vga_connector_funcs,
1307                                                   DRM_MODE_CONNECTOR_VGA,
1308                                                   &ast_vga_connector->i2c->adapter);
1309         else
1310                 ret = drm_connector_init(dev, connector, &ast_vga_connector_funcs,
1311                                          DRM_MODE_CONNECTOR_VGA);
1312         if (ret)
1313                 return ret;
1314
1315         drm_connector_helper_add(connector, &ast_vga_connector_helper_funcs);
1316
1317         connector->interlace_allowed = 0;
1318         connector->doublescan_allowed = 0;
1319
1320         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1321
1322         return 0;
1323 }
1324
1325 static int ast_vga_output_init(struct ast_private *ast)
1326 {
1327         struct drm_device *dev = &ast->base;
1328         struct drm_crtc *crtc = &ast->crtc;
1329         struct drm_encoder *encoder = &ast->output.vga.encoder;
1330         struct ast_vga_connector *ast_vga_connector = &ast->output.vga.vga_connector;
1331         struct drm_connector *connector = &ast_vga_connector->base;
1332         int ret;
1333
1334         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
1335         if (ret)
1336                 return ret;
1337         encoder->possible_crtcs = drm_crtc_mask(crtc);
1338
1339         ret = ast_vga_connector_init(dev, ast_vga_connector);
1340         if (ret)
1341                 return ret;
1342
1343         ret = drm_connector_attach_encoder(connector, encoder);
1344         if (ret)
1345                 return ret;
1346
1347         return 0;
1348 }
1349
1350 /*
1351  * SIL164 Connector
1352  */
1353
1354 static int ast_sil164_connector_helper_get_modes(struct drm_connector *connector)
1355 {
1356         struct ast_sil164_connector *ast_sil164_connector = to_ast_sil164_connector(connector);
1357         struct edid *edid;
1358         int count;
1359
1360         if (!ast_sil164_connector->i2c)
1361                 goto err_drm_connector_update_edid_property;
1362
1363         edid = drm_get_edid(connector, &ast_sil164_connector->i2c->adapter);
1364         if (!edid)
1365                 goto err_drm_connector_update_edid_property;
1366
1367         count = drm_add_edid_modes(connector, edid);
1368         kfree(edid);
1369
1370         return count;
1371
1372 err_drm_connector_update_edid_property:
1373         drm_connector_update_edid_property(connector, NULL);
1374         return 0;
1375 }
1376
1377 static const struct drm_connector_helper_funcs ast_sil164_connector_helper_funcs = {
1378         .get_modes = ast_sil164_connector_helper_get_modes,
1379 };
1380
1381 static const struct drm_connector_funcs ast_sil164_connector_funcs = {
1382         .reset = drm_atomic_helper_connector_reset,
1383         .fill_modes = drm_helper_probe_single_connector_modes,
1384         .destroy = drm_connector_cleanup,
1385         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1386         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1387 };
1388
1389 static int ast_sil164_connector_init(struct drm_device *dev,
1390                                      struct ast_sil164_connector *ast_sil164_connector)
1391 {
1392         struct drm_connector *connector = &ast_sil164_connector->base;
1393         int ret;
1394
1395         ast_sil164_connector->i2c = ast_i2c_create(dev);
1396         if (!ast_sil164_connector->i2c)
1397                 drm_err(dev, "failed to add ddc bus for connector\n");
1398
1399         if (ast_sil164_connector->i2c)
1400                 ret = drm_connector_init_with_ddc(dev, connector, &ast_sil164_connector_funcs,
1401                                                   DRM_MODE_CONNECTOR_DVII,
1402                                                   &ast_sil164_connector->i2c->adapter);
1403         else
1404                 ret = drm_connector_init(dev, connector, &ast_sil164_connector_funcs,
1405                                          DRM_MODE_CONNECTOR_DVII);
1406         if (ret)
1407                 return ret;
1408
1409         drm_connector_helper_add(connector, &ast_sil164_connector_helper_funcs);
1410
1411         connector->interlace_allowed = 0;
1412         connector->doublescan_allowed = 0;
1413
1414         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1415
1416         return 0;
1417 }
1418
1419 static int ast_sil164_output_init(struct ast_private *ast)
1420 {
1421         struct drm_device *dev = &ast->base;
1422         struct drm_crtc *crtc = &ast->crtc;
1423         struct drm_encoder *encoder = &ast->output.sil164.encoder;
1424         struct ast_sil164_connector *ast_sil164_connector = &ast->output.sil164.sil164_connector;
1425         struct drm_connector *connector = &ast_sil164_connector->base;
1426         int ret;
1427
1428         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);
1429         if (ret)
1430                 return ret;
1431         encoder->possible_crtcs = drm_crtc_mask(crtc);
1432
1433         ret = ast_sil164_connector_init(dev, ast_sil164_connector);
1434         if (ret)
1435                 return ret;
1436
1437         ret = drm_connector_attach_encoder(connector, encoder);
1438         if (ret)
1439                 return ret;
1440
1441         return 0;
1442 }
1443
1444 /*
1445  * DP501 Connector
1446  */
1447
1448 static int ast_dp501_connector_helper_get_modes(struct drm_connector *connector)
1449 {
1450         void *edid;
1451         bool succ;
1452         int count;
1453
1454         edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
1455         if (!edid)
1456                 goto err_drm_connector_update_edid_property;
1457
1458         succ = ast_dp501_read_edid(connector->dev, edid);
1459         if (!succ)
1460                 goto err_kfree;
1461
1462         drm_connector_update_edid_property(connector, edid);
1463         count = drm_add_edid_modes(connector, edid);
1464         kfree(edid);
1465
1466         return count;
1467
1468 err_kfree:
1469         kfree(edid);
1470 err_drm_connector_update_edid_property:
1471         drm_connector_update_edid_property(connector, NULL);
1472         return 0;
1473 }
1474
1475 static const struct drm_connector_helper_funcs ast_dp501_connector_helper_funcs = {
1476         .get_modes = ast_dp501_connector_helper_get_modes,
1477 };
1478
1479 static const struct drm_connector_funcs ast_dp501_connector_funcs = {
1480         .reset = drm_atomic_helper_connector_reset,
1481         .fill_modes = drm_helper_probe_single_connector_modes,
1482         .destroy = drm_connector_cleanup,
1483         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1484         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1485 };
1486
1487 static int ast_dp501_connector_init(struct drm_device *dev, struct drm_connector *connector)
1488 {
1489         int ret;
1490
1491         ret = drm_connector_init(dev, connector, &ast_dp501_connector_funcs,
1492                                  DRM_MODE_CONNECTOR_DisplayPort);
1493         if (ret)
1494                 return ret;
1495
1496         drm_connector_helper_add(connector, &ast_dp501_connector_helper_funcs);
1497
1498         connector->interlace_allowed = 0;
1499         connector->doublescan_allowed = 0;
1500
1501         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1502
1503         return 0;
1504 }
1505
1506 static int ast_dp501_output_init(struct ast_private *ast)
1507 {
1508         struct drm_device *dev = &ast->base;
1509         struct drm_crtc *crtc = &ast->crtc;
1510         struct drm_encoder *encoder = &ast->output.dp501.encoder;
1511         struct drm_connector *connector = &ast->output.dp501.connector;
1512         int ret;
1513
1514         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);
1515         if (ret)
1516                 return ret;
1517         encoder->possible_crtcs = drm_crtc_mask(crtc);
1518
1519         ret = ast_dp501_connector_init(dev, connector);
1520         if (ret)
1521                 return ret;
1522
1523         ret = drm_connector_attach_encoder(connector, encoder);
1524         if (ret)
1525                 return ret;
1526
1527         return 0;
1528 }
1529
1530 /*
1531  * Mode config
1532  */
1533
1534 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = {
1535         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
1536 };
1537
1538 static const struct drm_mode_config_funcs ast_mode_config_funcs = {
1539         .fb_create = drm_gem_fb_create,
1540         .mode_valid = drm_vram_helper_mode_valid,
1541         .atomic_check = drm_atomic_helper_check,
1542         .atomic_commit = drm_atomic_helper_commit,
1543 };
1544
1545 int ast_mode_config_init(struct ast_private *ast)
1546 {
1547         struct drm_device *dev = &ast->base;
1548         struct pci_dev *pdev = to_pci_dev(dev->dev);
1549         int ret;
1550
1551         ret = drmm_mode_config_init(dev);
1552         if (ret)
1553                 return ret;
1554
1555         dev->mode_config.funcs = &ast_mode_config_funcs;
1556         dev->mode_config.min_width = 0;
1557         dev->mode_config.min_height = 0;
1558         dev->mode_config.preferred_depth = 24;
1559         dev->mode_config.prefer_shadow = 1;
1560         dev->mode_config.fb_base = pci_resource_start(pdev, 0);
1561
1562         if (ast->chip == AST2100 ||
1563             ast->chip == AST2200 ||
1564             ast->chip == AST2300 ||
1565             ast->chip == AST2400 ||
1566             ast->chip == AST2500) {
1567                 dev->mode_config.max_width = 1920;
1568                 dev->mode_config.max_height = 2048;
1569         } else {
1570                 dev->mode_config.max_width = 1600;
1571                 dev->mode_config.max_height = 1200;
1572         }
1573
1574         dev->mode_config.helper_private = &ast_mode_config_helper_funcs;
1575
1576
1577         ret = ast_primary_plane_init(ast);
1578         if (ret)
1579                 return ret;
1580
1581         ret = ast_cursor_plane_init(ast);
1582         if (ret)
1583                 return ret;
1584
1585         ast_crtc_init(dev);
1586
1587         switch (ast->tx_chip_type) {
1588         case AST_TX_NONE:
1589                 ret = ast_vga_output_init(ast);
1590                 break;
1591         case AST_TX_SIL164:
1592                 ret = ast_sil164_output_init(ast);
1593                 break;
1594         case AST_TX_DP501:
1595                 ret = ast_dp501_output_init(ast);
1596                 break;
1597         }
1598         if (ret)
1599                 return ret;
1600
1601         drm_mode_config_reset(dev);
1602
1603         return 0;
1604 }