drivers/gpu/drm/amd/display/dc/core/dc_resource.c

   1 /*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 #include "dm_services.h"
  26
  27 #include "resource.h"
  28 #include "include/irq_service_interface.h"
  29 #include "link_encoder.h"
  30 #include "stream_encoder.h"
  31 #include "opp.h"
  32 #include "timing_generator.h"
  33 #include "transform.h"
  34 #include "dpp.h"
  35 #include "core_types.h"
  36 #include "set_mode_types.h"
  37 #include "virtual/virtual_stream_encoder.h"
  38
  39 #include "dce80/dce80_resource.h"
  40 #include "dce100/dce100_resource.h"
  41 #include "dce110/dce110_resource.h"
  42 #include "dce112/dce112_resource.h"
  43 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  44 #include "dcn10/dcn10_resource.h"
  45 #endif
  46 #include "dce120/dce120_resource.h"
  47
  48 enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
  49 {
  50         enum dce_version dc_version = DCE_VERSION_UNKNOWN;
  51         switch (asic_id.chip_family) {
  52
  53         case FAMILY_CI:
  54                 dc_version = DCE_VERSION_8_0;
  55                 break;
  56         case FAMILY_KV:
  57                 if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) ||
  58                     ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) ||
  59                     ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev))
  60                         dc_version = DCE_VERSION_8_3;
  61                 else
  62                         dc_version = DCE_VERSION_8_1;
  63                 break;
  64         case FAMILY_CZ:
  65                 dc_version = DCE_VERSION_11_0;
  66                 break;
  67
  68         case FAMILY_VI:
  69                 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) ||
  70                                 ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) {
  71                         dc_version = DCE_VERSION_10_0;
  72                         break;
  73                 }
  74                 if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) ||
  75                                 ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) ||
  76                                 ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
  77                         dc_version = DCE_VERSION_11_2;
  78                 }
  79                 break;
  80         case FAMILY_AI:
  81                 dc_version = DCE_VERSION_12_0;
  82                 break;
  83 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  84         case FAMILY_RV:
  85                 dc_version = DCN_VERSION_1_0;
  86                 break;
  87 #endif
  88         default:
  89                 dc_version = DCE_VERSION_UNKNOWN;
  90                 break;
  91         }
  92         return dc_version;
  93 }
  94
  95 struct resource_pool *dc_create_resource_pool(
  96                                 struct dc  *dc,
  97                                 int num_virtual_links,
  98                                 enum dce_version dc_version,
  99                                 struct hw_asic_id asic_id)
 100 {
 101         struct resource_pool *res_pool = NULL;
 102
 103         switch (dc_version) {
 104         case DCE_VERSION_8_0:
 105                 res_pool = dce80_create_resource_pool(
 106                         num_virtual_links, dc);
 107                 break;
 108         case DCE_VERSION_8_1:
 109                 res_pool = dce81_create_resource_pool(
 110                         num_virtual_links, dc);
 111                 break;
 112         case DCE_VERSION_8_3:
 113                 res_pool = dce83_create_resource_pool(
 114                         num_virtual_links, dc);
 115                 break;
 116         case DCE_VERSION_10_0:
 117                 res_pool = dce100_create_resource_pool(
 118                                 num_virtual_links, dc);
 119                 break;
 120         case DCE_VERSION_11_0:
 121                 res_pool = dce110_create_resource_pool(
 122                         num_virtual_links, dc, asic_id);
 123                 break;
 124         case DCE_VERSION_11_2:
 125                 res_pool = dce112_create_resource_pool(
 126                         num_virtual_links, dc);
 127                 break;
 128         case DCE_VERSION_12_0:
 129                 res_pool = dce120_create_resource_pool(
 130                         num_virtual_links, dc);
 131                 break;
 132
 133 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 134         case DCN_VERSION_1_0:
 135                 res_pool = dcn10_create_resource_pool(
 136                                 num_virtual_links, dc);
 137                 break;
 138 #endif
 139
 140
 141         default:
 142                 break;
 143         }
 144         if (res_pool != NULL) {
 145                 struct dc_firmware_info fw_info = { { 0 } };
 146
 147                 if (dc->ctx->dc_bios->funcs->get_firmware_info(
 148                                 dc->ctx->dc_bios, &fw_info) == BP_RESULT_OK) {
 149                                 res_pool->ref_clock_inKhz = fw_info.pll_info.crystal_frequency;
 150                         } else
 151                                 ASSERT_CRITICAL(false);
 152         }
 153
 154         return res_pool;
 155 }
 156
 157 void dc_destroy_resource_pool(struct dc  *dc)
 158 {
 159         if (dc) {
 160                 if (dc->res_pool)
 161                         dc->res_pool->funcs->destroy(&dc->res_pool);
 162
 163                 kfree(dc->hwseq);
 164         }
 165 }
 166
 167 static void update_num_audio(
 168         const struct resource_straps *straps,
 169         unsigned int *num_audio,
 170         struct audio_support *aud_support)
 171 {
 172         aud_support->dp_audio = true;
 173         aud_support->hdmi_audio_native = false;
 174         aud_support->hdmi_audio_on_dongle = false;
 175
 176         if (straps->hdmi_disable == 0) {
 177                 if (straps->dc_pinstraps_audio & 0x2) {
 178                         aud_support->hdmi_audio_on_dongle = true;
 179                         aud_support->hdmi_audio_native = true;
 180                 }
 181         }
 182
 183         switch (straps->audio_stream_number) {
 184         case 0: /* multi streams supported */
 185                 break;
 186         case 1: /* multi streams not supported */
 187                 *num_audio = 1;
 188                 break;
 189         default:
 190                 DC_ERR("DC: unexpected audio fuse!\n");
 191         }
 192 }
 193
 194 bool resource_construct(
 195         unsigned int num_virtual_links,
 196         struct dc  *dc,
 197         struct resource_pool *pool,
 198         const struct resource_create_funcs *create_funcs)
 199 {
 200         struct dc_context *ctx = dc->ctx;
 201         const struct resource_caps *caps = pool->res_cap;
 202         int i;
 203         unsigned int num_audio = caps->num_audio;
 204         struct resource_straps straps = {0};
 205
 206         if (create_funcs->read_dce_straps)
 207                 create_funcs->read_dce_straps(dc->ctx, &straps);
 208
 209         pool->audio_count = 0;
 210         if (create_funcs->create_audio) {
 211                 /* find the total number of streams available via the
 212                  * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT
 213                  * registers (one for each pin) starting from pin 1
 214                  * up to the max number of audio pins.
 215                  * We stop on the first pin where
 216                  * PORT_CONNECTIVITY == 1 (as instructed by HW team).
 217                  */
 218                 update_num_audio(&straps, &num_audio, &pool->audio_support);
 219                 for (i = 0; i < pool->pipe_count && i < num_audio; i++) {
 220                         struct audio *aud = create_funcs->create_audio(ctx, i);
 221
 222                         if (aud == NULL) {
 223                                 DC_ERR("DC: failed to create audio!\n");
 224                                 return false;
 225                         }
 226
 227                         if (!aud->funcs->endpoint_valid(aud)) {
 228                                 aud->funcs->destroy(&aud);
 229                                 break;
 230                         }
 231
 232                         pool->audios[i] = aud;
 233                         pool->audio_count++;
 234                 }
 235         }
 236
 237         pool->stream_enc_count = 0;
 238         if (create_funcs->create_stream_encoder) {
 239                 for (i = 0; i < caps->num_stream_encoder; i++) {
 240                         pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx);
 241                         if (pool->stream_enc[i] == NULL)
 242                                 DC_ERR("DC: failed to create stream_encoder!\n");
 243                         pool->stream_enc_count++;
 244                 }
 245         }
 246         dc->caps.dynamic_audio = false;
 247         if (pool->audio_count < pool->stream_enc_count) {
 248                 dc->caps.dynamic_audio = true;
 249         }
 250         for (i = 0; i < num_virtual_links; i++) {
 251                 pool->stream_enc[pool->stream_enc_count] =
 252                         virtual_stream_encoder_create(
 253                                         ctx, ctx->dc_bios);
 254                 if (pool->stream_enc[pool->stream_enc_count] == NULL) {
 255                         DC_ERR("DC: failed to create stream_encoder!\n");
 256                         return false;
 257                 }
 258                 pool->stream_enc_count++;
 259         }
 260
 261         dc->hwseq = create_funcs->create_hwseq(ctx);
 262
 263         return true;
 264 }
 265
 266
 267 void resource_unreference_clock_source(
 268                 struct resource_context *res_ctx,
 269                 const struct resource_pool *pool,
 270                 struct clock_source *clock_source)
 271 {
 272         int i;
 273
 274         for (i = 0; i < pool->clk_src_count; i++) {
 275                 if (pool->clock_sources[i] != clock_source)
 276                         continue;
 277
 278                 res_ctx->clock_source_ref_count[i]--;
 279
 280                 break;
 281         }
 282
 283         if (pool->dp_clock_source == clock_source)
 284                 res_ctx->dp_clock_source_ref_count--;
 285 }
 286
 287 void resource_reference_clock_source(
 288                 struct resource_context *res_ctx,
 289                 const struct resource_pool *pool,
 290                 struct clock_source *clock_source)
 291 {
 292         int i;
 293         for (i = 0; i < pool->clk_src_count; i++) {
 294                 if (pool->clock_sources[i] != clock_source)
 295                         continue;
 296
 297                 res_ctx->clock_source_ref_count[i]++;
 298                 break;
 299         }
 300
 301         if (pool->dp_clock_source == clock_source)
 302                 res_ctx->dp_clock_source_ref_count++;
 303 }
 304
 305 bool resource_are_streams_timing_synchronizable(
 306         struct dc_stream_state *stream1,
 307         struct dc_stream_state *stream2)
 308 {
 309         if (stream1->timing.h_total != stream2->timing.h_total)
 310                 return false;
 311
 312         if (stream1->timing.v_total != stream2->timing.v_total)
 313                 return false;
 314
 315         if (stream1->timing.h_addressable
 316                                 != stream2->timing.h_addressable)
 317                 return false;
 318
 319         if (stream1->timing.v_addressable
 320                                 != stream2->timing.v_addressable)
 321                 return false;
 322
 323         if (stream1->timing.pix_clk_khz
 324                                 != stream2->timing.pix_clk_khz)
 325                 return false;
 326
 327         if (stream1->phy_pix_clk != stream2->phy_pix_clk
 328                         && (!dc_is_dp_signal(stream1->signal)
 329                         || !dc_is_dp_signal(stream2->signal)))
 330                 return false;
 331
 332         return true;
 333 }
 334
 335 static bool is_sharable_clk_src(
 336         const struct pipe_ctx *pipe_with_clk_src,
 337         const struct pipe_ctx *pipe)
 338 {
 339         if (pipe_with_clk_src->clock_source == NULL)
 340                 return false;
 341
 342         if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)
 343                 return false;
 344
 345         if (dc_is_dp_signal(pipe_with_clk_src->stream->signal))
 346                 return false;
 347
 348         if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
 349                         && dc_is_dvi_signal(pipe->stream->signal))
 350                 return false;
 351
 352         if (dc_is_hdmi_signal(pipe->stream->signal)
 353                         && dc_is_dvi_signal(pipe_with_clk_src->stream->signal))
 354                 return false;
 355
 356         if (!resource_are_streams_timing_synchronizable(
 357                         pipe_with_clk_src->stream, pipe->stream))
 358                 return false;
 359
 360         return true;
 361 }
 362
 363 struct clock_source *resource_find_used_clk_src_for_sharing(
 364                                         struct resource_context *res_ctx,
 365                                         struct pipe_ctx *pipe_ctx)
 366 {
 367         int i;
 368
 369         for (i = 0; i < MAX_PIPES; i++) {
 370                 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx))
 371                         return res_ctx->pipe_ctx[i].clock_source;
 372         }
 373
 374         return NULL;
 375 }
 376
 377 static enum pixel_format convert_pixel_format_to_dalsurface(
 378                 enum surface_pixel_format surface_pixel_format)
 379 {
 380         enum pixel_format dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
 381
 382         switch (surface_pixel_format) {
 383         case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
 384                 dal_pixel_format = PIXEL_FORMAT_INDEX8;
 385                 break;
 386         case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
 387                 dal_pixel_format = PIXEL_FORMAT_RGB565;
 388                 break;
 389         case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
 390                 dal_pixel_format = PIXEL_FORMAT_RGB565;
 391                 break;
 392         case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
 393                 dal_pixel_format = PIXEL_FORMAT_ARGB8888;
 394                 break;
 395         case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
 396                 dal_pixel_format = PIXEL_FORMAT_ARGB8888;
 397                 break;
 398         case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
 399                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
 400                 break;
 401         case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
 402                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
 403                 break;
 404         case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
 405                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010_XRBIAS;
 406                 break;
 407         case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
 408         case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
 409                 dal_pixel_format = PIXEL_FORMAT_FP16;
 410                 break;
 411         case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
 412         case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
 413                 dal_pixel_format = PIXEL_FORMAT_420BPP8;
 414                 break;
 415         case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
 416         case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
 417                 dal_pixel_format = PIXEL_FORMAT_420BPP10;
 418                 break;
 419         case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
 420         default:
 421                 dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
 422                 break;
 423         }
 424         return dal_pixel_format;
 425 }
 426
 427 static void rect_swap_helper(struct rect *rect)
 428 {
 429         uint32_t temp = 0;
 430
 431         temp = rect->height;
 432         rect->height = rect->width;
 433         rect->width = temp;
 434
 435         temp = rect->x;
 436         rect->x = rect->y;
 437         rect->y = temp;
 438 }
 439
 440 static void calculate_viewport(struct pipe_ctx *pipe_ctx)
 441 {
 442         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 443         const struct dc_stream_state *stream = pipe_ctx->stream;
 444         struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
 445         struct rect surf_src = plane_state->src_rect;
 446         struct rect clip = { 0 };
 447         int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
 448                         || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
 449         bool pri_split = pipe_ctx->bottom_pipe &&
 450                         pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state;
 451         bool sec_split = pipe_ctx->top_pipe &&
 452                         pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state;
 453
 454         if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE ||
 455                 stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
 456                 pri_split = false;
 457                 sec_split = false;
 458         }
 459
 460         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 461                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 462                 rect_swap_helper(&surf_src);
 463
 464         /* The actual clip is an intersection between stream
 465          * source and surface clip
 466          */
 467         clip.x = stream->src.x > plane_state->clip_rect.x ?
 468                         stream->src.x : plane_state->clip_rect.x;
 469
 470         clip.width = stream->src.x + stream->src.width <
 471                         plane_state->clip_rect.x + plane_state->clip_rect.width ?
 472                         stream->src.x + stream->src.width - clip.x :
 473                         plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ;
 474
 475         clip.y = stream->src.y > plane_state->clip_rect.y ?
 476                         stream->src.y : plane_state->clip_rect.y;
 477
 478         clip.height = stream->src.y + stream->src.height <
 479                         plane_state->clip_rect.y + plane_state->clip_rect.height ?
 480                         stream->src.y + stream->src.height - clip.y :
 481                         plane_state->clip_rect.y + plane_state->clip_rect.height - clip.y ;
 482
 483         /* offset = surf_src.ofs + (clip.ofs - surface->dst_rect.ofs) * scl_ratio
 484          * num_pixels = clip.num_pix * scl_ratio
 485          */
 486         data->viewport.x = surf_src.x + (clip.x - plane_state->dst_rect.x) *
 487                         surf_src.width / plane_state->dst_rect.width;
 488         data->viewport.width = clip.width *
 489                         surf_src.width / plane_state->dst_rect.width;
 490
 491         data->viewport.y = surf_src.y + (clip.y - plane_state->dst_rect.y) *
 492                         surf_src.height / plane_state->dst_rect.height;
 493         data->viewport.height = clip.height *
 494                         surf_src.height / plane_state->dst_rect.height;
 495
 496         /* Round down, compensate in init */
 497         data->viewport_c.x = data->viewport.x / vpc_div;
 498         data->viewport_c.y = data->viewport.y / vpc_div;
 499         data->inits.h_c = (data->viewport.x % vpc_div) != 0 ?
 500                         dal_fixed31_32_half : dal_fixed31_32_zero;
 501         data->inits.v_c = (data->viewport.y % vpc_div) != 0 ?
 502                         dal_fixed31_32_half : dal_fixed31_32_zero;
 503         /* Round up, assume original video size always even dimensions */
 504         data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div;
 505         data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div;
 506
 507         /* Handle hsplit */
 508         if (pri_split || sec_split) {
 509                 /* HMirror XOR Secondary_pipe XOR Rotation_180 */
 510                 bool right_view = (sec_split != plane_state->horizontal_mirror) !=
 511                                         (plane_state->rotation == ROTATION_ANGLE_180);
 512
 513                 if (plane_state->rotation == ROTATION_ANGLE_90
 514                                 || plane_state->rotation == ROTATION_ANGLE_270)
 515                         /* Secondary_pipe XOR Rotation_270 */
 516                         right_view = (plane_state->rotation == ROTATION_ANGLE_270) != sec_split;
 517
 518                 if (right_view) {
 519                         data->viewport.width /= 2;
 520                         data->viewport_c.width /= 2;
 521                         data->viewport.x +=  data->viewport.width;
 522                         data->viewport_c.x +=  data->viewport_c.width;
 523                         /* Ceil offset pipe */
 524                         data->viewport.width += data->viewport.width % 2;
 525                         data->viewport_c.width += data->viewport_c.width % 2;
 526                 } else {
 527                         data->viewport.width /= 2;
 528                         data->viewport_c.width /= 2;
 529                 }
 530         }
 531
 532         if (plane_state->rotation == ROTATION_ANGLE_90 ||
 533                         plane_state->rotation == ROTATION_ANGLE_270) {
 534                 rect_swap_helper(&data->viewport_c);
 535                 rect_swap_helper(&data->viewport);
 536         }
 537 }
 538
 539 static void calculate_recout(struct pipe_ctx *pipe_ctx, struct view *recout_skip)
 540 {
 541         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 542         const struct dc_stream_state *stream = pipe_ctx->stream;
 543         struct rect surf_src = plane_state->src_rect;
 544         struct rect surf_clip = plane_state->clip_rect;
 545         int recout_full_x, recout_full_y;
 546
 547         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 548                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 549                 rect_swap_helper(&surf_src);
 550
 551         pipe_ctx->plane_res.scl_data.recout.x = stream->dst.x;
 552         if (stream->src.x < surf_clip.x)
 553                 pipe_ctx->plane_res.scl_data.recout.x += (surf_clip.x
 554                         - stream->src.x) * stream->dst.width
 555                                                 / stream->src.width;
 556
 557         pipe_ctx->plane_res.scl_data.recout.width = surf_clip.width *
 558                         stream->dst.width / stream->src.width;
 559         if (pipe_ctx->plane_res.scl_data.recout.width + pipe_ctx->plane_res.scl_data.recout.x >
 560                         stream->dst.x + stream->dst.width)
 561                 pipe_ctx->plane_res.scl_data.recout.width =
 562                         stream->dst.x + stream->dst.width
 563                                                 - pipe_ctx->plane_res.scl_data.recout.x;
 564
 565         pipe_ctx->plane_res.scl_data.recout.y = stream->dst.y;
 566         if (stream->src.y < surf_clip.y)
 567                 pipe_ctx->plane_res.scl_data.recout.y += (surf_clip.y
 568                         - stream->src.y) * stream->dst.height
 569                                                 / stream->src.height;
 570
 571         pipe_ctx->plane_res.scl_data.recout.height = surf_clip.height *
 572                         stream->dst.height / stream->src.height;
 573         if (pipe_ctx->plane_res.scl_data.recout.height + pipe_ctx->plane_res.scl_data.recout.y >
 574                         stream->dst.y + stream->dst.height)
 575                 pipe_ctx->plane_res.scl_data.recout.height =
 576                         stream->dst.y + stream->dst.height
 577                                                 - pipe_ctx->plane_res.scl_data.recout.y;
 578
 579         /* Handle h & vsplit */
 580         if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state ==
 581                 pipe_ctx->plane_state) {
 582                 if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
 583                         pipe_ctx->plane_res.scl_data.recout.height /= 2;
 584                         pipe_ctx->plane_res.scl_data.recout.y += pipe_ctx->plane_res.scl_data.recout.height;
 585                         /* Floor primary pipe, ceil 2ndary pipe */
 586                         pipe_ctx->plane_res.scl_data.recout.height += pipe_ctx->plane_res.scl_data.recout.height % 2;
 587                 } else {
 588                         pipe_ctx->plane_res.scl_data.recout.width /= 2;
 589                         pipe_ctx->plane_res.scl_data.recout.x += pipe_ctx->plane_res.scl_data.recout.width;
 590                         pipe_ctx->plane_res.scl_data.recout.width += pipe_ctx->plane_res.scl_data.recout.width % 2;
 591                 }
 592         } else if (pipe_ctx->bottom_pipe &&
 593                         pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state) {
 594                 if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
 595                         pipe_ctx->plane_res.scl_data.recout.height /= 2;
 596                 else
 597                         pipe_ctx->plane_res.scl_data.recout.width /= 2;
 598         }
 599
 600         /* Unclipped recout offset = stream dst offset + ((surf dst offset - stream surf_src offset)
 601          *                              * 1/ stream scaling ratio) - (surf surf_src offset * 1/ full scl
 602          *                              ratio)
 603          */
 604         recout_full_x = stream->dst.x + (plane_state->dst_rect.x -  stream->src.x)
 605                                         * stream->dst.width / stream->src.width -
 606                         surf_src.x * plane_state->dst_rect.width / surf_src.width
 607                                         * stream->dst.width / stream->src.width;
 608         recout_full_y = stream->dst.y + (plane_state->dst_rect.y -  stream->src.y)
 609                                         * stream->dst.height / stream->src.height -
 610                         surf_src.y * plane_state->dst_rect.height / surf_src.height
 611                                         * stream->dst.height / stream->src.height;
 612
 613         recout_skip->width = pipe_ctx->plane_res.scl_data.recout.x - recout_full_x;
 614         recout_skip->height = pipe_ctx->plane_res.scl_data.recout.y - recout_full_y;
 615 }
 616
 617 static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
 618 {
 619         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 620         const struct dc_stream_state *stream = pipe_ctx->stream;
 621         struct rect surf_src = plane_state->src_rect;
 622         const int in_w = stream->src.width;
 623         const int in_h = stream->src.height;
 624         const int out_w = stream->dst.width;
 625         const int out_h = stream->dst.height;
 626
 627         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 628                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 629                 rect_swap_helper(&surf_src);
 630
 631         pipe_ctx->plane_res.scl_data.ratios.horz = dal_fixed31_32_from_fraction(
 632                                         surf_src.width,
 633                                         plane_state->dst_rect.width);
 634         pipe_ctx->plane_res.scl_data.ratios.vert = dal_fixed31_32_from_fraction(
 635                                         surf_src.height,
 636                                         plane_state->dst_rect.height);
 637
 638         if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
 639                 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
 640         else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
 641                 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;
 642
 643         pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(
 644                 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);
 645         pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
 646                 pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);
 647
 648         pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz;
 649         pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert;
 650
 651         if (pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP8
 652                         || pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP10) {
 653                 pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2;
 654                 pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2;
 655         }
 656 }
 657
 658 static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *recout_skip)
 659 {
 660         struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
 661         struct rect src = pipe_ctx->plane_state->src_rect;
 662         int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
 663                         || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
 664
 665
 666         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 667                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {
 668                 rect_swap_helper(&src);
 669                 rect_swap_helper(&data->viewport_c);
 670                 rect_swap_helper(&data->viewport);
 671         }
 672
 673         /*
 674          * Init calculated according to formula:
 675          *      init = (scaling_ratio + number_of_taps + 1) / 2
 676          *      init_bot = init + scaling_ratio
 677          *      init_c = init + truncated_vp_c_offset(from calculate viewport)
 678          */
 679         data->inits.h = dal_fixed31_32_div_int(
 680                         dal_fixed31_32_add_int(data->ratios.horz, data->taps.h_taps + 1), 2);
 681
 682         data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_div_int(
 683                         dal_fixed31_32_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2));
 684
 685         data->inits.v = dal_fixed31_32_div_int(
 686                         dal_fixed31_32_add_int(data->ratios.vert, data->taps.v_taps + 1), 2);
 687
 688         data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_div_int(
 689                         dal_fixed31_32_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2));
 690
 691
 692         /* Adjust for viewport end clip-off */
 693         if ((data->viewport.x + data->viewport.width) < (src.x + src.width)) {
 694                 int vp_clip = src.x + src.width - data->viewport.width - data->viewport.x;
 695                 int int_part = dal_fixed31_32_floor(
 696                                 dal_fixed31_32_sub(data->inits.h, data->ratios.horz));
 697
 698                 int_part = int_part > 0 ? int_part : 0;
 699                 data->viewport.width += int_part < vp_clip ? int_part : vp_clip;
 700         }
 701         if ((data->viewport.y + data->viewport.height) < (src.y + src.height)) {
 702                 int vp_clip = src.y + src.height - data->viewport.height - data->viewport.y;
 703                 int int_part = dal_fixed31_32_floor(
 704                                 dal_fixed31_32_sub(data->inits.v, data->ratios.vert));
 705
 706                 int_part = int_part > 0 ? int_part : 0;
 707                 data->viewport.height += int_part < vp_clip ? int_part : vp_clip;
 708         }
 709         if ((data->viewport_c.x + data->viewport_c.width) < (src.x + src.width) / vpc_div) {
 710                 int vp_clip = (src.x + src.width) / vpc_div -
 711                                 data->viewport_c.width - data->viewport_c.x;
 712                 int int_part = dal_fixed31_32_floor(
 713                                 dal_fixed31_32_sub(data->inits.h_c, data->ratios.horz_c));
 714
 715                 int_part = int_part > 0 ? int_part : 0;
 716                 data->viewport_c.width += int_part < vp_clip ? int_part : vp_clip;
 717         }
 718         if ((data->viewport_c.y + data->viewport_c.height) < (src.y + src.height) / vpc_div) {
 719                 int vp_clip = (src.y + src.height) / vpc_div -
 720                                 data->viewport_c.height - data->viewport_c.y;
 721                 int int_part = dal_fixed31_32_floor(
 722                                 dal_fixed31_32_sub(data->inits.v_c, data->ratios.vert_c));
 723
 724                 int_part = int_part > 0 ? int_part : 0;
 725                 data->viewport_c.height += int_part < vp_clip ? int_part : vp_clip;
 726         }
 727
 728         /* Adjust for non-0 viewport offset */
 729         if (data->viewport.x) {
 730                 int int_part;
 731
 732                 data->inits.h = dal_fixed31_32_add(data->inits.h, dal_fixed31_32_mul_int(
 733                                 data->ratios.horz, recout_skip->width));
 734                 int_part = dal_fixed31_32_floor(data->inits.h) - data->viewport.x;
 735                 if (int_part < data->taps.h_taps) {
 736                         int int_adj = data->viewport.x >= (data->taps.h_taps - int_part) ?
 737                                                 (data->taps.h_taps - int_part) : data->viewport.x;
 738                         data->viewport.x -= int_adj;
 739                         data->viewport.width += int_adj;
 740                         int_part += int_adj;
 741                 } else if (int_part > data->taps.h_taps) {
 742                         data->viewport.x += int_part - data->taps.h_taps;
 743                         data->viewport.width -= int_part - data->taps.h_taps;
 744                         int_part = data->taps.h_taps;
 745                 }
 746                 data->inits.h.value &= 0xffffffff;
 747                 data->inits.h = dal_fixed31_32_add_int(data->inits.h, int_part);
 748         }
 749
 750         if (data->viewport_c.x) {
 751                 int int_part;
 752
 753                 data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_mul_int(
 754                                 data->ratios.horz_c, recout_skip->width));
 755                 int_part = dal_fixed31_32_floor(data->inits.h_c) - data->viewport_c.x;
 756                 if (int_part < data->taps.h_taps_c) {
 757                         int int_adj = data->viewport_c.x >= (data->taps.h_taps_c - int_part) ?
 758                                         (data->taps.h_taps_c - int_part) : data->viewport_c.x;
 759                         data->viewport_c.x -= int_adj;
 760                         data->viewport_c.width += int_adj;
 761                         int_part += int_adj;
 762                 } else if (int_part > data->taps.h_taps_c) {
 763                         data->viewport_c.x += int_part - data->taps.h_taps_c;
 764                         data->viewport_c.width -= int_part - data->taps.h_taps_c;
 765                         int_part = data->taps.h_taps_c;
 766                 }
 767                 data->inits.h_c.value &= 0xffffffff;
 768                 data->inits.h_c = dal_fixed31_32_add_int(data->inits.h_c, int_part);
 769         }
 770
 771         if (data->viewport.y) {
 772                 int int_part;
 773
 774                 data->inits.v = dal_fixed31_32_add(data->inits.v, dal_fixed31_32_mul_int(
 775                                 data->ratios.vert, recout_skip->height));
 776                 int_part = dal_fixed31_32_floor(data->inits.v) - data->viewport.y;
 777                 if (int_part < data->taps.v_taps) {
 778                         int int_adj = data->viewport.y >= (data->taps.v_taps - int_part) ?
 779                                                 (data->taps.v_taps - int_part) : data->viewport.y;
 780                         data->viewport.y -= int_adj;
 781                         data->viewport.height += int_adj;
 782                         int_part += int_adj;
 783                 } else if (int_part > data->taps.v_taps) {
 784                         data->viewport.y += int_part - data->taps.v_taps;
 785                         data->viewport.height -= int_part - data->taps.v_taps;
 786                         int_part = data->taps.v_taps;
 787                 }
 788                 data->inits.v.value &= 0xffffffff;
 789                 data->inits.v = dal_fixed31_32_add_int(data->inits.v, int_part);
 790         }
 791
 792         if (data->viewport_c.y) {
 793                 int int_part;
 794
 795                 data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_mul_int(
 796                                 data->ratios.vert_c, recout_skip->height));
 797                 int_part = dal_fixed31_32_floor(data->inits.v_c) - data->viewport_c.y;
 798                 if (int_part < data->taps.v_taps_c) {
 799                         int int_adj = data->viewport_c.y >= (data->taps.v_taps_c - int_part) ?
 800                                         (data->taps.v_taps_c - int_part) : data->viewport_c.y;
 801                         data->viewport_c.y -= int_adj;
 802                         data->viewport_c.height += int_adj;
 803                         int_part += int_adj;
 804                 } else if (int_part > data->taps.v_taps_c) {
 805                         data->viewport_c.y += int_part - data->taps.v_taps_c;
 806                         data->viewport_c.height -= int_part - data->taps.v_taps_c;
 807                         int_part = data->taps.v_taps_c;
 808                 }
 809                 data->inits.v_c.value &= 0xffffffff;
 810                 data->inits.v_c = dal_fixed31_32_add_int(data->inits.v_c, int_part);
 811         }
 812
 813         /* Interlaced inits based on final vert inits */
 814         data->inits.v_bot = dal_fixed31_32_add(data->inits.v, data->ratios.vert);
 815         data->inits.v_c_bot = dal_fixed31_32_add(data->inits.v_c, data->ratios.vert_c);
 816
 817         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 818                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {
 819                 rect_swap_helper(&data->viewport_c);
 820                 rect_swap_helper(&data->viewport);
 821         }
 822 }
 823
 824 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
 825 {
 826         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 827         struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
 828         struct view recout_skip = { 0 };
 829         bool res = false;
 830
 831         /* Important: scaling ratio calculation requires pixel format,
 832          * lb depth calculation requires recout and taps require scaling ratios.
 833          * Inits require viewport, taps, ratios and recout of split pipe
 834          */
 835         pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(
 836                         pipe_ctx->plane_state->format);
 837
 838         calculate_scaling_ratios(pipe_ctx);
 839
 840         calculate_viewport(pipe_ctx);
 841
 842         if (pipe_ctx->plane_res.scl_data.viewport.height < 16 || pipe_ctx->plane_res.scl_data.viewport.width < 16)
 843                 return false;
 844
 845         calculate_recout(pipe_ctx, &recout_skip);
 846
 847         /**
 848          * Setting line buffer pixel depth to 24bpp yields banding
 849          * on certain displays, such as the Sharp 4k
 850          */
 851         pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;
 852
 853         pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left;
 854         pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top;
 855
 856         pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right;
 857         pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
 858
 859         /* Taps calculations */
 860         if (pipe_ctx->plane_res.xfm != NULL)
 861                 res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
 862                                 pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 863
 864         if (pipe_ctx->plane_res.dpp != NULL)
 865                 res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
 866                                 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 867
 868         if (!res) {
 869                 /* Try 24 bpp linebuffer */
 870                 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;
 871
 872                 res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
 873                         pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 874
 875                 res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
 876                         pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 877         }
 878
 879         if (res)
 880                 /* May need to re-check lb size after this in some obscure scenario */
 881                 calculate_inits_and_adj_vp(pipe_ctx, &recout_skip);
 882
 883         dm_logger_write(pipe_ctx->stream->ctx->logger, LOG_SCALER,
 884                                 "%s: Viewport:\nheight:%d width:%d x:%d "
 885                                 "y:%d\n dst_rect:\nheight:%d width:%d x:%d "
 886                                 "y:%d\n",
 887                                 __func__,
 888                                 pipe_ctx->plane_res.scl_data.viewport.height,
 889                                 pipe_ctx->plane_res.scl_data.viewport.width,
 890                                 pipe_ctx->plane_res.scl_data.viewport.x,
 891                                 pipe_ctx->plane_res.scl_data.viewport.y,
 892                                 plane_state->dst_rect.height,
 893                                 plane_state->dst_rect.width,
 894                                 plane_state->dst_rect.x,
 895                                 plane_state->dst_rect.y);
 896
 897         return res;
 898 }
 899
 900
 901 enum dc_status resource_build_scaling_params_for_context(
 902         const struct dc  *dc,
 903         struct dc_state *context)
 904 {
 905         int i;
 906
 907         for (i = 0; i < MAX_PIPES; i++) {
 908                 if (context->res_ctx.pipe_ctx[i].plane_state != NULL &&
 909                                 context->res_ctx.pipe_ctx[i].stream != NULL)
 910                         if (!resource_build_scaling_params(&context->res_ctx.pipe_ctx[i]))
 911                                 return DC_FAIL_SCALING;
 912         }
 913
 914         return DC_OK;
 915 }
 916
 917 struct pipe_ctx *find_idle_secondary_pipe(
 918                 struct resource_context *res_ctx,
 919                 const struct resource_pool *pool)
 920 {
 921         int i;
 922         struct pipe_ctx *secondary_pipe = NULL;
 923
 924         /*
 925          * search backwards for the second pipe to keep pipe
 926          * assignment more consistent
 927          */
 928
 929         for (i = pool->pipe_count - 1; i >= 0; i--) {
 930                 if (res_ctx->pipe_ctx[i].stream == NULL) {
 931                         secondary_pipe = &res_ctx->pipe_ctx[i];
 932                         secondary_pipe->pipe_idx = i;
 933                         break;
 934                 }
 935         }
 936
 937
 938         return secondary_pipe;
 939 }
 940
 941 struct pipe_ctx *resource_get_head_pipe_for_stream(
 942                 struct resource_context *res_ctx,
 943                 struct dc_stream_state *stream)
 944 {
 945         int i;
 946         for (i = 0; i < MAX_PIPES; i++) {
 947                 if (res_ctx->pipe_ctx[i].stream == stream &&
 948                                 !res_ctx->pipe_ctx[i].top_pipe) {
 949                         return &res_ctx->pipe_ctx[i];
 950                         break;
 951                 }
 952         }
 953         return NULL;
 954 }
 955
 956 static struct pipe_ctx *resource_get_tail_pipe_for_stream(
 957                 struct resource_context *res_ctx,
 958                 struct dc_stream_state *stream)
 959 {
 960         struct pipe_ctx *head_pipe, *tail_pipe;
 961         head_pipe = resource_get_head_pipe_for_stream(res_ctx, stream);
 962
 963         if (!head_pipe)
 964                 return NULL;
 965
 966         tail_pipe = head_pipe->bottom_pipe;
 967
 968         while (tail_pipe) {
 969                 head_pipe = tail_pipe;
 970                 tail_pipe = tail_pipe->bottom_pipe;
 971         }
 972
 973         return head_pipe;
 974 }
 975
 976 /*
 977  * A free_pipe for a stream is defined here as a pipe
 978  * that has no surface attached yet
 979  */
 980 static struct pipe_ctx *acquire_free_pipe_for_stream(
 981                 struct dc_state *context,
 982                 const struct resource_pool *pool,
 983                 struct dc_stream_state *stream)
 984 {
 985         int i;
 986         struct resource_context *res_ctx = &context->res_ctx;
 987
 988         struct pipe_ctx *head_pipe = NULL;
 989
 990         /* Find head pipe, which has the back end set up*/
 991
 992         head_pipe = resource_get_head_pipe_for_stream(res_ctx, stream);
 993
 994         if (!head_pipe)
 995                 ASSERT(0);
 996
 997         if (!head_pipe->plane_state)
 998                 return head_pipe;
 999
1000         /* Re-use pipe already acquired for this stream if available*/
1001         for (i = pool->pipe_count - 1; i >= 0; i--) {
1002                 if (res_ctx->pipe_ctx[i].stream == stream &&
1003                                 !res_ctx->pipe_ctx[i].plane_state) {
1004                         return &res_ctx->pipe_ctx[i];
1005                 }
1006         }
1007
1008         /*
1009          * At this point we have no re-useable pipe for this stream and we need
1010          * to acquire an idle one to satisfy the request
1011          */
1012
1013         if (!pool->funcs->acquire_idle_pipe_for_layer)
1014                 return NULL;
1015
1016         return pool->funcs->acquire_idle_pipe_for_layer(context, pool, stream);
1017
1018 }
1019
1020 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
1021 static int acquire_first_split_pipe(
1022                 struct resource_context *res_ctx,
1023                 const struct resource_pool *pool,
1024                 struct dc_stream_state *stream)
1025 {
1026         int i;
1027
1028         for (i = 0; i < pool->pipe_count; i++) {
1029                 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
1030
1031                 if (pipe_ctx->top_pipe &&
1032                                 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state) {
1033                         pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;
1034                         if (pipe_ctx->bottom_pipe)
1035                                 pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;
1036
1037                         memset(pipe_ctx, 0, sizeof(*pipe_ctx));
1038                         pipe_ctx->stream_res.tg = pool->timing_generators[i];
1039                         pipe_ctx->plane_res.hubp = pool->hubps[i];
1040                         pipe_ctx->plane_res.ipp = pool->ipps[i];
1041                         pipe_ctx->plane_res.dpp = pool->dpps[i];
1042                         pipe_ctx->stream_res.opp = pool->opps[i];
1043                         pipe_ctx->pipe_idx = i;
1044
1045                         pipe_ctx->stream = stream;
1046                         return i;
1047                 }
1048         }
1049         return -1;
1050 }
1051 #endif
1052
1053 bool dc_add_plane_to_context(
1054                 const struct dc *dc,
1055                 struct dc_stream_state *stream,
1056                 struct dc_plane_state *plane_state,
1057                 struct dc_state *context)
1058 {
1059         int i;
1060         struct resource_pool *pool = dc->res_pool;
1061         struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe;
1062         struct dc_stream_status *stream_status = NULL;
1063
1064         for (i = 0; i < context->stream_count; i++)
1065                 if (context->streams[i] == stream) {
1066                         stream_status = &context->stream_status[i];
1067                         break;
1068                 }
1069         if (stream_status == NULL) {
1070                 dm_error("Existing stream not found; failed to attach surface!\n");
1071                 return false;
1072         }
1073
1074
1075         if (stream_status->plane_count == MAX_SURFACE_NUM) {
1076                 dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n",
1077                                 plane_state, MAX_SURFACE_NUM);
1078                 return false;
1079         }
1080
1081         head_pipe = resource_get_head_pipe_for_stream(&context->res_ctx, stream);
1082
1083         if (!head_pipe) {
1084                 dm_error("Head pipe not found for stream_state %p !\n", stream);
1085                 return false;
1086         }
1087
1088         free_pipe = acquire_free_pipe_for_stream(context, pool, stream);
1089
1090 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
1091         if (!free_pipe) {
1092                 int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
1093                 if (pipe_idx >= 0)
1094                         free_pipe = &context->res_ctx.pipe_ctx[pipe_idx];
1095         }
1096 #endif
1097         if (!free_pipe)
1098                 return false;
1099
1100         /* retain new surfaces */
1101         dc_plane_state_retain(plane_state);
1102         free_pipe->plane_state = plane_state;
1103
1104         if (head_pipe != free_pipe) {
1105
1106                 tail_pipe = resource_get_tail_pipe_for_stream(&context->res_ctx, stream);
1107                 ASSERT(tail_pipe);
1108
1109                 free_pipe->stream_res.tg = tail_pipe->stream_res.tg;
1110                 free_pipe->stream_res.opp = tail_pipe->stream_res.opp;
1111                 free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc;
1112                 free_pipe->stream_res.audio = tail_pipe->stream_res.audio;
1113                 free_pipe->clock_source = tail_pipe->clock_source;
1114                 free_pipe->top_pipe = tail_pipe;
1115                 tail_pipe->bottom_pipe = free_pipe;
1116         }
1117
1118         /* assign new surfaces*/
1119         stream_status->plane_states[stream_status->plane_count] = plane_state;
1120
1121         stream_status->plane_count++;
1122
1123         return true;
1124 }
1125
1126 bool dc_remove_plane_from_context(
1127                 const struct dc *dc,
1128                 struct dc_stream_state *stream,
1129                 struct dc_plane_state *plane_state,
1130                 struct dc_state *context)
1131 {
1132         int i;
1133         struct dc_stream_status *stream_status = NULL;
1134         struct resource_pool *pool = dc->res_pool;
1135
1136         for (i = 0; i < context->stream_count; i++)
1137                 if (context->streams[i] == stream) {
1138                         stream_status = &context->stream_status[i];
1139                         break;
1140                 }
1141
1142         if (stream_status == NULL) {
1143                 dm_error("Existing stream not found; failed to remove plane.\n");
1144                 return false;
1145         }
1146
1147         /* release pipe for plane*/
1148         for (i = pool->pipe_count - 1; i >= 0; i--) {
1149                 struct pipe_ctx *pipe_ctx;
1150
1151                 if (context->res_ctx.pipe_ctx[i].plane_state == plane_state) {
1152                         pipe_ctx = &context->res_ctx.pipe_ctx[i];
1153
1154                         if (pipe_ctx->top_pipe)
1155                                 pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;
1156
1157                         /* Second condition is to avoid setting NULL to top pipe
1158                          * of tail pipe making it look like head pipe in subsequent
1159                          * deletes
1160                          */
1161                         if (pipe_ctx->bottom_pipe && pipe_ctx->top_pipe)
1162                                 pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;
1163
1164                         /*
1165                          * For head pipe detach surfaces from pipe for tail
1166                          * pipe just zero it out
1167                          */
1168                         if (!pipe_ctx->top_pipe) {
1169                                 pipe_ctx->plane_state = NULL;
1170                                 pipe_ctx->bottom_pipe = NULL;
1171                         } else  {
1172                                 memset(pipe_ctx, 0, sizeof(*pipe_ctx));
1173                         }
1174                 }
1175         }
1176
1177
1178         for (i = 0; i < stream_status->plane_count; i++) {
1179                 if (stream_status->plane_states[i] == plane_state) {
1180
1181                         dc_plane_state_release(stream_status->plane_states[i]);
1182                         break;
1183                 }
1184         }
1185
1186         if (i == stream_status->plane_count) {
1187                 dm_error("Existing plane_state not found; failed to detach it!\n");
1188                 return false;
1189         }
1190
1191         stream_status->plane_count--;
1192
1193         /* Start at the plane we've just released, and move all the planes one index forward to "trim" the array */
1194         for (; i < stream_status->plane_count; i++)
1195                 stream_status->plane_states[i] = stream_status->plane_states[i + 1];
1196
1197         stream_status->plane_states[stream_status->plane_count] = NULL;
1198
1199         return true;
1200 }
1201
1202 bool dc_rem_all_planes_for_stream(
1203                 const struct dc *dc,
1204                 struct dc_stream_state *stream,
1205                 struct dc_state *context)
1206 {
1207         int i, old_plane_count;
1208         struct dc_stream_status *stream_status = NULL;
1209         struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };
1210
1211         for (i = 0; i < context->stream_count; i++)
1212                         if (context->streams[i] == stream) {
1213                                 stream_status = &context->stream_status[i];
1214                                 break;
1215                         }
1216
1217         if (stream_status == NULL) {
1218                 dm_error("Existing stream %p not found!\n", stream);
1219                 return false;
1220         }
1221
1222         old_plane_count = stream_status->plane_count;
1223
1224         for (i = 0; i < old_plane_count; i++)
1225                 del_planes[i] = stream_status->plane_states[i];
1226
1227         for (i = 0; i < old_plane_count; i++)
1228                 if (!dc_remove_plane_from_context(dc, stream, del_planes[i], context))
1229                         return false;
1230
1231         return true;
1232 }
1233
1234 static bool add_all_planes_for_stream(
1235                 const struct dc *dc,
1236                 struct dc_stream_state *stream,
1237                 const struct dc_validation_set set[],
1238                 int set_count,
1239                 struct dc_state *context)
1240 {
1241         int i, j;
1242
1243         for (i = 0; i < set_count; i++)
1244                 if (set[i].stream == stream)
1245                         break;
1246
1247         if (i == set_count) {
1248                 dm_error("Stream %p not found in set!\n", stream);
1249                 return false;
1250         }
1251
1252         for (j = 0; j < set[i].plane_count; j++)
1253                 if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context))
1254                         return false;
1255
1256         return true;
1257 }
1258
1259 bool dc_add_all_planes_for_stream(
1260                 const struct dc *dc,
1261                 struct dc_stream_state *stream,
1262                 struct dc_plane_state * const *plane_states,
1263                 int plane_count,
1264                 struct dc_state *context)
1265 {
1266         struct dc_validation_set set;
1267         int i;
1268
1269         set.stream = stream;
1270         set.plane_count = plane_count;
1271
1272         for (i = 0; i < plane_count; i++)
1273                 set.plane_states[i] = plane_states[i];
1274
1275         return add_all_planes_for_stream(dc, stream, &set, 1, context);
1276 }
1277
1278
1279
1280 static bool is_timing_changed(struct dc_stream_state *cur_stream,
1281                 struct dc_stream_state *new_stream)
1282 {
1283         if (cur_stream == NULL)
1284                 return true;
1285
1286         /* If sink pointer changed, it means this is a hotplug, we should do
1287          * full hw setting.
1288          */
1289         if (cur_stream->sink != new_stream->sink)
1290                 return true;
1291
1292         /* If output color space is changed, need to reprogram info frames */
1293         if (cur_stream->output_color_space != new_stream->output_color_space)
1294                 return true;
1295
1296         return memcmp(
1297                 &cur_stream->timing,
1298                 &new_stream->timing,
1299                 sizeof(struct dc_crtc_timing)) != 0;
1300 }
1301
1302 static bool are_stream_backends_same(
1303         struct dc_stream_state *stream_a, struct dc_stream_state *stream_b)
1304 {
1305         if (stream_a == stream_b)
1306                 return true;
1307
1308         if (stream_a == NULL || stream_b == NULL)
1309                 return false;
1310
1311         if (is_timing_changed(stream_a, stream_b))
1312                 return false;
1313
1314         return true;
1315 }
1316
1317 bool dc_is_stream_unchanged(
1318         struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1319 {
1320
1321         if (!are_stream_backends_same(old_stream, stream))
1322                 return false;
1323
1324         return true;
1325 }
1326
1327 bool dc_is_stream_scaling_unchanged(
1328         struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1329 {
1330         if (old_stream == stream)
1331                 return true;
1332
1333         if (old_stream == NULL || stream == NULL)
1334                 return false;
1335
1336         if (memcmp(&old_stream->src,
1337                         &stream->src,
1338                         sizeof(struct rect)) != 0)
1339                 return false;
1340
1341         if (memcmp(&old_stream->dst,
1342                         &stream->dst,
1343                         sizeof(struct rect)) != 0)
1344                 return false;
1345
1346         return true;
1347 }
1348
1349 /* Maximum TMDS single link pixel clock 165MHz */
1350 #define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000
1351
1352 static void update_stream_engine_usage(
1353                 struct resource_context *res_ctx,
1354                 const struct resource_pool *pool,
1355                 struct stream_encoder *stream_enc,
1356                 bool acquired)
1357 {
1358         int i;
1359
1360         for (i = 0; i < pool->stream_enc_count; i++) {
1361                 if (pool->stream_enc[i] == stream_enc)
1362                         res_ctx->is_stream_enc_acquired[i] = acquired;
1363         }
1364 }
1365
1366 /* TODO: release audio object */
1367 void update_audio_usage(
1368                 struct resource_context *res_ctx,
1369                 const struct resource_pool *pool,
1370                 struct audio *audio,
1371                 bool acquired)
1372 {
1373         int i;
1374         for (i = 0; i < pool->audio_count; i++) {
1375                 if (pool->audios[i] == audio)
1376                         res_ctx->is_audio_acquired[i] = acquired;
1377         }
1378 }
1379
1380 static int acquire_first_free_pipe(
1381                 struct resource_context *res_ctx,
1382                 const struct resource_pool *pool,
1383                 struct dc_stream_state *stream)
1384 {
1385         int i;
1386
1387         for (i = 0; i < pool->pipe_count; i++) {
1388                 if (!res_ctx->pipe_ctx[i].stream) {
1389                         struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
1390
1391                         pipe_ctx->stream_res.tg = pool->timing_generators[i];
1392                         pipe_ctx->plane_res.mi = pool->mis[i];
1393                         pipe_ctx->plane_res.hubp = pool->hubps[i];
1394                         pipe_ctx->plane_res.ipp = pool->ipps[i];
1395                         pipe_ctx->plane_res.xfm = pool->transforms[i];
1396                         pipe_ctx->plane_res.dpp = pool->dpps[i];
1397                         pipe_ctx->stream_res.opp = pool->opps[i];
1398                         pipe_ctx->pipe_idx = i;
1399
1400
1401                         pipe_ctx->stream = stream;
1402                         return i;
1403                 }
1404         }
1405         return -1;
1406 }
1407
1408 static struct stream_encoder *find_first_free_match_stream_enc_for_link(
1409                 struct resource_context *res_ctx,
1410                 const struct resource_pool *pool,
1411                 struct dc_stream_state *stream)
1412 {
1413         int i;
1414         int j = -1;
1415         struct dc_link *link = stream->sink->link;
1416
1417         for (i = 0; i < pool->stream_enc_count; i++) {
1418                 if (!res_ctx->is_stream_enc_acquired[i] &&
1419                                 pool->stream_enc[i]) {
1420                         /* Store first available for MST second display
1421                          * in daisy chain use case */
1422                         j = i;
1423                         if (pool->stream_enc[i]->id ==
1424                                         link->link_enc->preferred_engine)
1425                                 return pool->stream_enc[i];
1426                 }
1427         }
1428
1429         /*
1430          * below can happen in cases when stream encoder is acquired:
1431          * 1) for second MST display in chain, so preferred engine already
1432          * acquired;
1433          * 2) for another link, which preferred engine already acquired by any
1434          * MST configuration.
1435          *
1436          * If signal is of DP type and preferred engine not found, return last available
1437          *
1438          * TODO - This is just a patch up and a generic solution is
1439          * required for non DP connectors.
1440          */
1441
1442         if (j >= 0 && dc_is_dp_signal(stream->signal))
1443                 return pool->stream_enc[j];
1444
1445         return NULL;
1446 }
1447
1448 static struct audio *find_first_free_audio(
1449                 struct resource_context *res_ctx,
1450                 const struct resource_pool *pool)
1451 {
1452         int i;
1453         for (i = 0; i < pool->audio_count; i++) {
1454                 if ((res_ctx->is_audio_acquired[i] == false) && (res_ctx->is_stream_enc_acquired[i] == true)) {
1455                         return pool->audios[i];
1456                 }
1457         }
1458         /*not found the matching one, first come first serve*/
1459         for (i = 0; i < pool->audio_count; i++) {
1460                 if (res_ctx->is_audio_acquired[i] == false) {
1461                         return pool->audios[i];
1462                 }
1463         }
1464         return 0;
1465 }
1466
1467 bool resource_is_stream_unchanged(
1468         struct dc_state *old_context, struct dc_stream_state *stream)
1469 {
1470         int i;
1471
1472         for (i = 0; i < old_context->stream_count; i++) {
1473                 struct dc_stream_state *old_stream = old_context->streams[i];
1474
1475                 if (are_stream_backends_same(old_stream, stream))
1476                                 return true;
1477         }
1478
1479         return false;
1480 }
1481
1482 enum dc_status dc_add_stream_to_ctx(
1483                 struct dc *dc,
1484                 struct dc_state *new_ctx,
1485                 struct dc_stream_state *stream)
1486 {
1487         struct dc_context *dc_ctx = dc->ctx;
1488         enum dc_status res;
1489
1490         if (new_ctx->stream_count >= dc->res_pool->pipe_count) {
1491                 DC_ERROR("Max streams reached, can add stream %p !\n", stream);
1492                 return DC_ERROR_UNEXPECTED;
1493         }
1494
1495         new_ctx->streams[new_ctx->stream_count] = stream;
1496         dc_stream_retain(stream);
1497         new_ctx->stream_count++;
1498
1499         res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);
1500         if (res != DC_OK)
1501                 DC_ERROR("Adding stream %p to context failed with err %d!\n", stream, res);
1502
1503         return res;
1504 }
1505
1506 enum dc_status dc_remove_stream_from_ctx(
1507                         struct dc *dc,
1508                         struct dc_state *new_ctx,
1509                         struct dc_stream_state *stream)
1510 {
1511         int i;
1512         struct dc_context *dc_ctx = dc->ctx;
1513         struct pipe_ctx *del_pipe = NULL;
1514
1515         /* Release primary pipe */
1516         for (i = 0; i < MAX_PIPES; i++) {
1517                 if (new_ctx->res_ctx.pipe_ctx[i].stream == stream &&
1518                                 !new_ctx->res_ctx.pipe_ctx[i].top_pipe) {
1519                         del_pipe = &new_ctx->res_ctx.pipe_ctx[i];
1520
1521                         ASSERT(del_pipe->stream_res.stream_enc);
1522                         update_stream_engine_usage(
1523                                         &new_ctx->res_ctx,
1524                                                 dc->res_pool,
1525                                         del_pipe->stream_res.stream_enc,
1526                                         false);
1527
1528                         if (del_pipe->stream_res.audio)
1529                                 update_audio_usage(
1530                                         &new_ctx->res_ctx,
1531                                         dc->res_pool,
1532                                         del_pipe->stream_res.audio,
1533                                         false);
1534
1535                         resource_unreference_clock_source(&new_ctx->res_ctx,
1536                                                           dc->res_pool,
1537                                                           del_pipe->clock_source);
1538
1539                         memset(del_pipe, 0, sizeof(*del_pipe));
1540
1541                         break;
1542                 }
1543         }
1544
1545         if (!del_pipe) {
1546                 DC_ERROR("Pipe not found for stream %p !\n", stream);
1547                 return DC_ERROR_UNEXPECTED;
1548         }
1549
1550         for (i = 0; i < new_ctx->stream_count; i++)
1551                 if (new_ctx->streams[i] == stream)
1552                         break;
1553
1554         if (new_ctx->streams[i] != stream) {
1555                 DC_ERROR("Context doesn't have stream %p !\n", stream);
1556                 return DC_ERROR_UNEXPECTED;
1557         }
1558
1559         dc_stream_release(new_ctx->streams[i]);
1560         new_ctx->stream_count--;
1561
1562         /* Trim back arrays */
1563         for (; i < new_ctx->stream_count; i++) {
1564                 new_ctx->streams[i] = new_ctx->streams[i + 1];
1565                 new_ctx->stream_status[i] = new_ctx->stream_status[i + 1];
1566         }
1567
1568         new_ctx->streams[new_ctx->stream_count] = NULL;
1569         memset(
1570                         &new_ctx->stream_status[new_ctx->stream_count],
1571                         0,
1572                         sizeof(new_ctx->stream_status[0]));
1573
1574         return DC_OK;
1575 }
1576
1577 static void copy_pipe_ctx(
1578         const struct pipe_ctx *from_pipe_ctx, struct pipe_ctx *to_pipe_ctx)
1579 {
1580         struct dc_plane_state *plane_state = to_pipe_ctx->plane_state;
1581         struct dc_stream_state *stream = to_pipe_ctx->stream;
1582
1583         *to_pipe_ctx = *from_pipe_ctx;
1584         to_pipe_ctx->stream = stream;
1585         if (plane_state != NULL)
1586                 to_pipe_ctx->plane_state = plane_state;
1587 }
1588
1589 static struct dc_stream_state *find_pll_sharable_stream(
1590                 struct dc_stream_state *stream_needs_pll,
1591                 struct dc_state *context)
1592 {
1593         int i;
1594
1595         for (i = 0; i < context->stream_count; i++) {
1596                 struct dc_stream_state *stream_has_pll = context->streams[i];
1597
1598                 /* We are looking for non dp, non virtual stream */
1599                 if (resource_are_streams_timing_synchronizable(
1600                         stream_needs_pll, stream_has_pll)
1601                         && !dc_is_dp_signal(stream_has_pll->signal)
1602                         && stream_has_pll->sink->link->connector_signal
1603                         != SIGNAL_TYPE_VIRTUAL)
1604                         return stream_has_pll;
1605
1606         }
1607
1608         return NULL;
1609 }
1610
1611 static int get_norm_pix_clk(const struct dc_crtc_timing *timing)
1612 {
1613         uint32_t pix_clk = timing->pix_clk_khz;
1614         uint32_t normalized_pix_clk = pix_clk;
1615
1616         if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
1617                 pix_clk /= 2;
1618         if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) {
1619                 switch (timing->display_color_depth) {
1620                 case COLOR_DEPTH_888:
1621                         normalized_pix_clk = pix_clk;
1622                         break;
1623                 case COLOR_DEPTH_101010:
1624                         normalized_pix_clk = (pix_clk * 30) / 24;
1625                         break;
1626                 case COLOR_DEPTH_121212:
1627                         normalized_pix_clk = (pix_clk * 36) / 24;
1628                 break;
1629                 case COLOR_DEPTH_161616:
1630                         normalized_pix_clk = (pix_clk * 48) / 24;
1631                 break;
1632                 default:
1633                         ASSERT(0);
1634                 break;
1635                 }
1636         }
1637         return normalized_pix_clk;
1638 }
1639
1640 static void calculate_phy_pix_clks(struct dc_stream_state *stream)
1641 {
1642         /* update actual pixel clock on all streams */
1643         if (dc_is_hdmi_signal(stream->signal))
1644                 stream->phy_pix_clk = get_norm_pix_clk(
1645                         &stream->timing);
1646         else
1647                 stream->phy_pix_clk =
1648                         stream->timing.pix_clk_khz;
1649 }
1650
1651 enum dc_status resource_map_pool_resources(
1652                 const struct dc  *dc,
1653                 struct dc_state *context,
1654                 struct dc_stream_state *stream)
1655 {
1656         const struct resource_pool *pool = dc->res_pool;
1657         int i;
1658         struct dc_context *dc_ctx = dc->ctx;
1659         struct pipe_ctx *pipe_ctx = NULL;
1660         int pipe_idx = -1;
1661
1662         /* TODO Check if this is needed */
1663         /*if (!resource_is_stream_unchanged(old_context, stream)) {
1664                         if (stream != NULL && old_context->streams[i] != NULL) {
1665                                 stream->bit_depth_params =
1666                                                 old_context->streams[i]->bit_depth_params;
1667                                 stream->clamping = old_context->streams[i]->clamping;
1668                                 continue;
1669                         }
1670                 }
1671         */
1672
1673         /* acquire new resources */
1674         pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);
1675
1676 #ifdef CONFIG_DRM_AMD_DC_DCN1_0
1677         if (pipe_idx < 0)
1678                 pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
1679 #endif
1680
1681         if (pipe_idx < 0)
1682                 return DC_NO_CONTROLLER_RESOURCE;
1683
1684         pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx];
1685
1686         pipe_ctx->stream_res.stream_enc =
1687                 find_first_free_match_stream_enc_for_link(
1688                         &context->res_ctx, pool, stream);
1689
1690         if (!pipe_ctx->stream_res.stream_enc)
1691                 return DC_NO_STREAM_ENG_RESOURCE;
1692
1693         update_stream_engine_usage(
1694                 &context->res_ctx, pool,
1695                 pipe_ctx->stream_res.stream_enc,
1696                 true);
1697
1698         /* TODO: Add check if ASIC support and EDID audio */
1699         if (!stream->sink->converter_disable_audio &&
1700             dc_is_audio_capable_signal(pipe_ctx->stream->signal) &&
1701             stream->audio_info.mode_count) {
1702                 pipe_ctx->stream_res.audio = find_first_free_audio(
1703                 &context->res_ctx, pool);
1704
1705                 /*
1706                  * Audio assigned in order first come first get.
1707                  * There are asics which has number of audio
1708                  * resources less then number of pipes
1709                  */
1710                 if (pipe_ctx->stream_res.audio)
1711                         update_audio_usage(&context->res_ctx, pool,
1712                                            pipe_ctx->stream_res.audio, true);
1713         }
1714
1715         for (i = 0; i < context->stream_count; i++)
1716                 if (context->streams[i] == stream) {
1717                         context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst;
1718                         context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->id;
1719                         return DC_OK;
1720                 }
1721
1722         DC_ERROR("Stream %p not found in new ctx!\n", stream);
1723         return DC_ERROR_UNEXPECTED;
1724 }
1725
1726 /* first stream in the context is used to populate the rest */
1727 void validate_guaranteed_copy_streams(
1728                 struct dc_state *context,
1729                 int max_streams)
1730 {
1731         int i;
1732
1733         for (i = 1; i < max_streams; i++) {
1734                 context->streams[i] = context->streams[0];
1735
1736                 copy_pipe_ctx(&context->res_ctx.pipe_ctx[0],
1737                               &context->res_ctx.pipe_ctx[i]);
1738                 context->res_ctx.pipe_ctx[i].stream =
1739                                 context->res_ctx.pipe_ctx[0].stream;
1740
1741                 dc_stream_retain(context->streams[i]);
1742                 context->stream_count++;
1743         }
1744 }
1745
1746 void dc_resource_state_copy_construct_current(
1747                 const struct dc *dc,
1748                 struct dc_state *dst_ctx)
1749 {
1750         dc_resource_state_copy_construct(dc->current_state, dst_ctx);
1751 }
1752
1753
1754 void dc_resource_state_construct(
1755                 const struct dc *dc,
1756                 struct dc_state *dst_ctx)
1757 {
1758         dst_ctx->dis_clk = dc->res_pool->display_clock;
1759 }
1760
1761 enum dc_status dc_validate_global_state(
1762                 struct dc *dc,
1763                 struct dc_state *new_ctx)
1764 {
1765         enum dc_status result = DC_ERROR_UNEXPECTED;
1766         int i, j;
1767
1768         if (dc->res_pool->funcs->validate_global) {
1769                         result = dc->res_pool->funcs->validate_global(dc, new_ctx);
1770                         if (result != DC_OK)
1771                                 return result;
1772         }
1773
1774         for (i = 0; new_ctx && i < new_ctx->stream_count; i++) {
1775                 struct dc_stream_state *stream = new_ctx->streams[i];
1776
1777                 for (j = 0; j < dc->res_pool->pipe_count; j++) {
1778                         struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j];
1779
1780                         if (pipe_ctx->stream != stream)
1781                                 continue;
1782
1783                         /* Switch to dp clock source only if there is
1784                          * no non dp stream that shares the same timing
1785                          * with the dp stream.
1786                          */
1787                         if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
1788                                 !find_pll_sharable_stream(stream, new_ctx)) {
1789
1790                                 resource_unreference_clock_source(
1791                                                 &new_ctx->res_ctx,
1792                                                 dc->res_pool,
1793                                                 pipe_ctx->clock_source);
1794
1795                                 pipe_ctx->clock_source = dc->res_pool->dp_clock_source;
1796                                 resource_reference_clock_source(
1797                                                 &new_ctx->res_ctx,
1798                                                 dc->res_pool,
1799                                                  pipe_ctx->clock_source);
1800                         }
1801                 }
1802         }
1803
1804         result = resource_build_scaling_params_for_context(dc, new_ctx);
1805
1806         if (result == DC_OK)
1807                 if (!dc->res_pool->funcs->validate_bandwidth(dc, new_ctx))
1808                         result = DC_FAIL_BANDWIDTH_VALIDATE;
1809
1810         return result;
1811 }
1812
1813 static void patch_gamut_packet_checksum(
1814                 struct encoder_info_packet *gamut_packet)
1815 {
1816         /* For gamut we recalc checksum */
1817         if (gamut_packet->valid) {
1818                 uint8_t chk_sum = 0;
1819                 uint8_t *ptr;
1820                 uint8_t i;
1821
1822                 /*start of the Gamut data. */
1823                 ptr = &gamut_packet->sb[3];
1824
1825                 for (i = 0; i <= gamut_packet->sb[1]; i++)
1826                         chk_sum += ptr[i];
1827
1828                 gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum);
1829         }
1830 }
1831
1832 static void set_avi_info_frame(
1833                 struct encoder_info_packet *info_packet,
1834                 struct pipe_ctx *pipe_ctx)
1835 {
1836         struct dc_stream_state *stream = pipe_ctx->stream;
1837         enum dc_color_space color_space = COLOR_SPACE_UNKNOWN;
1838         struct info_frame info_frame = { {0} };
1839         uint32_t pixel_encoding = 0;
1840         enum scanning_type scan_type = SCANNING_TYPE_NODATA;
1841         enum dc_aspect_ratio aspect = ASPECT_RATIO_NO_DATA;
1842         bool itc = false;
1843         uint8_t itc_value = 0;
1844         uint8_t cn0_cn1 = 0;
1845         unsigned int cn0_cn1_value = 0;
1846         uint8_t *check_sum = NULL;
1847         uint8_t byte_index = 0;
1848         union hdmi_info_packet *hdmi_info = &info_frame.avi_info_packet.info_packet_hdmi;
1849         union display_content_support support = {0};
1850         unsigned int vic = pipe_ctx->stream->timing.vic;
1851         enum dc_timing_3d_format format;
1852
1853         color_space = pipe_ctx->stream->output_color_space;
1854         if (color_space == COLOR_SPACE_UNKNOWN)
1855                 color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ?
1856                         COLOR_SPACE_SRGB:COLOR_SPACE_YCBCR709;
1857
1858         /* Initialize header */
1859         hdmi_info->bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI;
1860         /* InfoFrameVersion_3 is defined by CEA861F (Section 6.4), but shall
1861         * not be used in HDMI 2.0 (Section 10.1) */
1862         hdmi_info->bits.header.version = 2;
1863         hdmi_info->bits.header.length = HDMI_AVI_INFOFRAME_SIZE;
1864
1865         /*
1866          * IDO-defined (Y2,Y1,Y0 = 1,1,1) shall not be used by devices built
1867          * according to HDMI 2.0 spec (Section 10.1)
1868          */
1869
1870         switch (stream->timing.pixel_encoding) {
1871         case PIXEL_ENCODING_YCBCR422:
1872                 pixel_encoding = 1;
1873                 break;
1874
1875         case PIXEL_ENCODING_YCBCR444:
1876                 pixel_encoding = 2;
1877                 break;
1878         case PIXEL_ENCODING_YCBCR420:
1879                 pixel_encoding = 3;
1880                 break;
1881
1882         case PIXEL_ENCODING_RGB:
1883         default:
1884                 pixel_encoding = 0;
1885         }
1886
1887         /* Y0_Y1_Y2 : The pixel encoding */
1888         /* H14b AVI InfoFrame has extension on Y-field from 2 bits to 3 bits */
1889         hdmi_info->bits.Y0_Y1_Y2 = pixel_encoding;
1890
1891         /* A0 = 1 Active Format Information valid */
1892         hdmi_info->bits.A0 = ACTIVE_FORMAT_VALID;
1893
1894         /* B0, B1 = 3; Bar info data is valid */
1895         hdmi_info->bits.B0_B1 = BAR_INFO_BOTH_VALID;
1896
1897         hdmi_info->bits.SC0_SC1 = PICTURE_SCALING_UNIFORM;
1898
1899         /* S0, S1 : Underscan / Overscan */
1900         /* TODO: un-hardcode scan type */
1901         scan_type = SCANNING_TYPE_UNDERSCAN;
1902         hdmi_info->bits.S0_S1 = scan_type;
1903
1904         /* C0, C1 : Colorimetry */
1905         if (color_space == COLOR_SPACE_YCBCR709 ||
1906                         color_space == COLOR_SPACE_YCBCR709_LIMITED)
1907                 hdmi_info->bits.C0_C1 = COLORIMETRY_ITU709;
1908         else if (color_space == COLOR_SPACE_YCBCR601 ||
1909                         color_space == COLOR_SPACE_YCBCR601_LIMITED)
1910                 hdmi_info->bits.C0_C1 = COLORIMETRY_ITU601;
1911         else {
1912                 hdmi_info->bits.C0_C1 = COLORIMETRY_NO_DATA;
1913         }
1914         if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||
1915                         color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE ||
1916                         color_space == COLOR_SPACE_2020_YCBCR) {
1917                 hdmi_info->bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR;
1918                 hdmi_info->bits.C0_C1   = COLORIMETRY_EXTENDED;
1919         } else if (color_space == COLOR_SPACE_ADOBERGB) {
1920                 hdmi_info->bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB;
1921                 hdmi_info->bits.C0_C1   = COLORIMETRY_EXTENDED;
1922         }
1923
1924         /* TODO: un-hardcode aspect ratio */
1925         aspect = stream->timing.aspect_ratio;
1926
1927         switch (aspect) {
1928         case ASPECT_RATIO_4_3:
1929         case ASPECT_RATIO_16_9:
1930                 hdmi_info->bits.M0_M1 = aspect;
1931                 break;
1932
1933         case ASPECT_RATIO_NO_DATA:
1934         case ASPECT_RATIO_64_27:
1935         case ASPECT_RATIO_256_135:
1936         default:
1937                 hdmi_info->bits.M0_M1 = 0;
1938         }
1939
1940         /* Active Format Aspect ratio - same as Picture Aspect Ratio. */
1941         hdmi_info->bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE;
1942
1943         /* TODO: un-hardcode cn0_cn1 and itc */
1944
1945         cn0_cn1 = 0;
1946         cn0_cn1_value = 0;
1947
1948         itc = true;
1949         itc_value = 1;
1950
1951         support = stream->sink->edid_caps.content_support;
1952
1953         if (itc) {
1954                 if (!support.bits.valid_content_type) {
1955                         cn0_cn1_value = 0;
1956                 } else {
1957                         if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GRAPHICS) {
1958                                 if (support.bits.graphics_content == 1) {
1959                                         cn0_cn1_value = 0;
1960                                 }
1961                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_PHOTO) {
1962                                 if (support.bits.photo_content == 1) {
1963                                         cn0_cn1_value = 1;
1964                                 } else {
1965                                         cn0_cn1_value = 0;
1966                                         itc_value = 0;
1967                                 }
1968                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_CINEMA) {
1969                                 if (support.bits.cinema_content == 1) {
1970                                         cn0_cn1_value = 2;
1971                                 } else {
1972                                         cn0_cn1_value = 0;
1973                                         itc_value = 0;
1974                                 }
1975                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GAME) {
1976                                 if (support.bits.game_content == 1) {
1977                                         cn0_cn1_value = 3;
1978                                 } else {
1979                                         cn0_cn1_value = 0;
1980                                         itc_value = 0;
1981                                 }
1982                         }
1983                 }
1984                 hdmi_info->bits.CN0_CN1 = cn0_cn1_value;
1985                 hdmi_info->bits.ITC = itc_value;
1986         }
1987
1988         /* TODO : We should handle YCC quantization */
1989         /* but we do not have matrix calculation */
1990         if (stream->sink->edid_caps.qs_bit == 1 &&
1991                         stream->sink->edid_caps.qy_bit == 1) {
1992                 if (color_space == COLOR_SPACE_SRGB ||
1993                         color_space == COLOR_SPACE_2020_RGB_FULLRANGE) {
1994                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_FULL_RANGE;
1995                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_FULL_RANGE;
1996                 } else if (color_space == COLOR_SPACE_SRGB_LIMITED ||
1997                                         color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) {
1998                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_LIMITED_RANGE;
1999                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
2000                 } else {
2001                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
2002                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
2003                 }
2004         } else {
2005                 hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
2006                 hdmi_info->bits.YQ0_YQ1   = YYC_QUANTIZATION_LIMITED_RANGE;
2007         }
2008
2009         ///VIC
2010         format = stream->timing.timing_3d_format;
2011         /*todo, add 3DStereo support*/
2012         if (format != TIMING_3D_FORMAT_NONE) {
2013                 // Based on HDMI specs hdmi vic needs to be converted to cea vic when 3D is enabled
2014                 switch (pipe_ctx->stream->timing.hdmi_vic) {
2015                 case 1:
2016                         vic = 95;
2017                         break;
2018                 case 2:
2019                         vic = 94;
2020                         break;
2021                 case 3:
2022                         vic = 93;
2023                         break;
2024                 case 4:
2025                         vic = 98;
2026                         break;
2027                 default:
2028                         break;
2029                 }
2030         }
2031         hdmi_info->bits.VIC0_VIC7 = vic;
2032
2033         /* pixel repetition
2034          * PR0 - PR3 start from 0 whereas pHwPathMode->mode.timing.flags.pixel
2035          * repetition start from 1 */
2036         hdmi_info->bits.PR0_PR3 = 0;
2037
2038         /* Bar Info
2039          * barTop:    Line Number of End of Top Bar.
2040          * barBottom: Line Number of Start of Bottom Bar.
2041          * barLeft:   Pixel Number of End of Left Bar.
2042          * barRight:  Pixel Number of Start of Right Bar. */
2043         hdmi_info->bits.bar_top = stream->timing.v_border_top;
2044         hdmi_info->bits.bar_bottom = (stream->timing.v_total
2045                         - stream->timing.v_border_bottom + 1);
2046         hdmi_info->bits.bar_left  = stream->timing.h_border_left;
2047         hdmi_info->bits.bar_right = (stream->timing.h_total
2048                         - stream->timing.h_border_right + 1);
2049
2050         /* check_sum - Calculate AFMT_AVI_INFO0 ~ AFMT_AVI_INFO3 */
2051         check_sum = &info_frame.avi_info_packet.info_packet_hdmi.packet_raw_data.sb[0];
2052
2053         *check_sum = HDMI_INFOFRAME_TYPE_AVI + HDMI_AVI_INFOFRAME_SIZE + 2;
2054
2055         for (byte_index = 1; byte_index <= HDMI_AVI_INFOFRAME_SIZE; byte_index++)
2056                 *check_sum += hdmi_info->packet_raw_data.sb[byte_index];
2057
2058         /* one byte complement */
2059         *check_sum = (uint8_t) (0x100 - *check_sum);
2060
2061         /* Store in hw_path_mode */
2062         info_packet->hb0 = hdmi_info->packet_raw_data.hb0;
2063         info_packet->hb1 = hdmi_info->packet_raw_data.hb1;
2064         info_packet->hb2 = hdmi_info->packet_raw_data.hb2;
2065
2066         for (byte_index = 0; byte_index < sizeof(info_frame.avi_info_packet.
2067                                 info_packet_hdmi.packet_raw_data.sb); byte_index++)
2068                 info_packet->sb[byte_index] = info_frame.avi_info_packet.
2069                                 info_packet_hdmi.packet_raw_data.sb[byte_index];
2070
2071         info_packet->valid = true;
2072 }
2073
2074 static void set_vendor_info_packet(
2075                 struct encoder_info_packet *info_packet,
2076                 struct dc_stream_state *stream)
2077 {
2078         uint32_t length = 0;
2079         bool hdmi_vic_mode = false;
2080         uint8_t checksum = 0;
2081         uint32_t i = 0;
2082         enum dc_timing_3d_format format;
2083         // Can be different depending on packet content /*todo*/
2084         // unsigned int length = pPathMode->dolbyVision ? 24 : 5;
2085
2086         info_packet->valid = false;
2087
2088         format = stream->timing.timing_3d_format;
2089         if (stream->view_format == VIEW_3D_FORMAT_NONE)
2090                 format = TIMING_3D_FORMAT_NONE;
2091
2092         /* Can be different depending on packet content */
2093         length = 5;
2094
2095         if (stream->timing.hdmi_vic != 0
2096                         && stream->timing.h_total >= 3840
2097                         && stream->timing.v_total >= 2160)
2098                 hdmi_vic_mode = true;
2099
2100         /* According to HDMI 1.4a CTS, VSIF should be sent
2101          * for both 3D stereo and HDMI VIC modes.
2102          * For all other modes, there is no VSIF sent.  */
2103
2104         if (format == TIMING_3D_FORMAT_NONE && !hdmi_vic_mode)
2105                 return;
2106
2107         /* 24bit IEEE Registration identifier (0x000c03). LSB first. */
2108         info_packet->sb[1] = 0x03;
2109         info_packet->sb[2] = 0x0C;
2110         info_packet->sb[3] = 0x00;
2111
2112         /*PB4: 5 lower bytes = 0 (reserved). 3 higher bits = HDMI_Video_Format.
2113          * The value for HDMI_Video_Format are:
2114          * 0x0 (0b000) - No additional HDMI video format is presented in this
2115          * packet
2116          * 0x1 (0b001) - Extended resolution format present. 1 byte of HDMI_VIC
2117          * parameter follows
2118          * 0x2 (0b010) - 3D format indication present. 3D_Structure and
2119          * potentially 3D_Ext_Data follows
2120          * 0x3..0x7 (0b011..0b111) - reserved for future use */
2121         if (format != TIMING_3D_FORMAT_NONE)
2122                 info_packet->sb[4] = (2 << 5);
2123         else if (hdmi_vic_mode)
2124                 info_packet->sb[4] = (1 << 5);
2125
2126         /* PB5: If PB4 claims 3D timing (HDMI_Video_Format = 0x2):
2127          * 4 lower bites = 0 (reserved). 4 higher bits = 3D_Structure.
2128          * The value for 3D_Structure are:
2129          * 0x0 - Frame Packing
2130          * 0x1 - Field Alternative
2131          * 0x2 - Line Alternative
2132          * 0x3 - Side-by-Side (full)
2133          * 0x4 - L + depth
2134          * 0x5 - L + depth + graphics + graphics-depth
2135          * 0x6 - Top-and-Bottom
2136          * 0x7 - Reserved for future use
2137          * 0x8 - Side-by-Side (Half)
2138          * 0x9..0xE - Reserved for future use
2139          * 0xF - Not used */
2140         switch (format) {
2141         case TIMING_3D_FORMAT_HW_FRAME_PACKING:
2142         case TIMING_3D_FORMAT_SW_FRAME_PACKING:
2143                 info_packet->sb[5] = (0x0 << 4);
2144                 break;
2145
2146         case TIMING_3D_FORMAT_SIDE_BY_SIDE:
2147         case TIMING_3D_FORMAT_SBS_SW_PACKED:
2148                 info_packet->sb[5] = (0x8 << 4);
2149                 length = 6;
2150                 break;
2151
2152         case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
2153         case TIMING_3D_FORMAT_TB_SW_PACKED:
2154                 info_packet->sb[5] = (0x6 << 4);
2155                 break;
2156
2157         default:
2158                 break;
2159         }
2160
2161         /*PB5: If PB4 is set to 0x1 (extended resolution format)
2162          * fill PB5 with the correct HDMI VIC code */
2163         if (hdmi_vic_mode)
2164                 info_packet->sb[5] = stream->timing.hdmi_vic;
2165
2166         /* Header */
2167         info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR; /* VSIF packet type. */
2168         info_packet->hb1 = 0x01; /* Version */
2169
2170         /* 4 lower bits = Length, 4 higher bits = 0 (reserved) */
2171         info_packet->hb2 = (uint8_t) (length);
2172
2173         /* Calculate checksum */
2174         checksum = 0;
2175         checksum += info_packet->hb0;
2176         checksum += info_packet->hb1;
2177         checksum += info_packet->hb2;
2178
2179         for (i = 1; i <= length; i++)
2180                 checksum += info_packet->sb[i];
2181
2182         info_packet->sb[0] = (uint8_t) (0x100 - checksum);
2183
2184         info_packet->valid = true;
2185 }
2186
2187 static void set_spd_info_packet(
2188                 struct encoder_info_packet *info_packet,
2189                 struct dc_stream_state *stream)
2190 {
2191         /* SPD info packet for FreeSync */
2192
2193         unsigned char checksum = 0;
2194         unsigned int idx, payload_size = 0;
2195
2196         /* Check if Freesync is supported. Return if false. If true,
2197          * set the corresponding bit in the info packet
2198          */
2199         if (stream->freesync_ctx.supported == false)
2200                 return;
2201
2202         if (dc_is_hdmi_signal(stream->signal)) {
2203
2204                 /* HEADER */
2205
2206                 /* HB0  = Packet Type = 0x83 (Source Product
2207                  *        Descriptor InfoFrame)
2208                  */
2209                 info_packet->hb0 = HDMI_INFOFRAME_TYPE_SPD;
2210
2211                 /* HB1  = Version = 0x01 */
2212                 info_packet->hb1 = 0x01;
2213
2214                 /* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
2215                 info_packet->hb2 = 0x08;
2216
2217                 payload_size = 0x08;
2218
2219         } else if (dc_is_dp_signal(stream->signal)) {
2220
2221                 /* HEADER */
2222
2223                 /* HB0  = Secondary-data Packet ID = 0 - Only non-zero
2224                  *        when used to associate audio related info packets
2225                  */
2226                 info_packet->hb0 = 0x00;
2227
2228                 /* HB1  = Packet Type = 0x83 (Source Product
2229                  *        Descriptor InfoFrame)
2230                  */
2231                 info_packet->hb1 = HDMI_INFOFRAME_TYPE_SPD;
2232
2233                 /* HB2  = [Bits 7:0 = Least significant eight bits -
2234                  *        For INFOFRAME, the value must be 1Bh]
2235                  */
2236                 info_packet->hb2 = 0x1B;
2237
2238                 /* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
2239                  *        [Bits 1:0 = Most significant two bits = 0x00]
2240                  */
2241                 info_packet->hb3 = 0x04;
2242
2243                 payload_size = 0x1B;
2244         }
2245
2246         /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
2247         info_packet->sb[1] = 0x1A;
2248
2249         /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
2250         info_packet->sb[2] = 0x00;
2251
2252         /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
2253         info_packet->sb[3] = 0x00;
2254
2255         /* PB4 = Reserved */
2256         info_packet->sb[4] = 0x00;
2257
2258         /* PB5 = Reserved */
2259         info_packet->sb[5] = 0x00;
2260
2261         /* PB6 = [Bits 7:3 = Reserved] */
2262         info_packet->sb[6] = 0x00;
2263
2264         if (stream->freesync_ctx.supported == true)
2265                 /* PB6 = [Bit 0 = FreeSync Supported] */
2266                 info_packet->sb[6] |= 0x01;
2267
2268         if (stream->freesync_ctx.enabled == true)
2269                 /* PB6 = [Bit 1 = FreeSync Enabled] */
2270                 info_packet->sb[6] |= 0x02;
2271
2272         if (stream->freesync_ctx.active == true)
2273                 /* PB6 = [Bit 2 = FreeSync Active] */
2274                 info_packet->sb[6] |= 0x04;
2275
2276         /* PB7 = FreeSync Minimum refresh rate (Hz) */
2277         info_packet->sb[7] = (unsigned char) (stream->freesync_ctx.
2278                         min_refresh_in_micro_hz / 1000000);
2279
2280         /* PB8 = FreeSync Maximum refresh rate (Hz)
2281          *
2282          * Note: We do not use the maximum capable refresh rate
2283          * of the panel, because we should never go above the field
2284          * rate of the mode timing set.
2285          */
2286         info_packet->sb[8] = (unsigned char) (stream->freesync_ctx.
2287                         nominal_refresh_in_micro_hz / 1000000);
2288
2289         /* PB9 - PB27  = Reserved */
2290         for (idx = 9; idx <= 27; idx++)
2291                 info_packet->sb[idx] = 0x00;
2292
2293         /* Calculate checksum */
2294         checksum += info_packet->hb0;
2295         checksum += info_packet->hb1;
2296         checksum += info_packet->hb2;
2297         checksum += info_packet->hb3;
2298
2299         for (idx = 1; idx <= payload_size; idx++)
2300                 checksum += info_packet->sb[idx];
2301
2302         /* PB0 = Checksum (one byte complement) */
2303         info_packet->sb[0] = (unsigned char) (0x100 - checksum);
2304
2305         info_packet->valid = true;
2306 }
2307
2308 static void set_hdr_static_info_packet(
2309                 struct encoder_info_packet *info_packet,
2310                 struct dc_plane_state *plane_state,
2311                 struct dc_stream_state *stream)
2312 {
2313         uint16_t i = 0;
2314         enum signal_type signal = stream->signal;
2315         struct dc_hdr_static_metadata hdr_metadata;
2316         uint32_t data;
2317
2318         if (!plane_state)
2319                 return;
2320
2321         hdr_metadata = plane_state->hdr_static_ctx;
2322
2323         if (!hdr_metadata.hdr_supported)
2324                 return;
2325
2326         if (dc_is_hdmi_signal(signal)) {
2327                 info_packet->valid = true;
2328
2329                 info_packet->hb0 = 0x87;
2330                 info_packet->hb1 = 0x01;
2331                 info_packet->hb2 = 0x1A;
2332                 i = 1;
2333         } else if (dc_is_dp_signal(signal)) {
2334                 info_packet->valid = true;
2335
2336                 info_packet->hb0 = 0x00;
2337                 info_packet->hb1 = 0x87;
2338                 info_packet->hb2 = 0x1D;
2339                 info_packet->hb3 = (0x13 << 2);
2340                 i = 2;
2341         }
2342
2343         data = hdr_metadata.is_hdr;
2344         info_packet->sb[i++] = data ? 0x02 : 0x00;
2345         info_packet->sb[i++] = 0x00;
2346
2347         data = hdr_metadata.chromaticity_green_x / 2;
2348         info_packet->sb[i++] = data & 0xFF;
2349         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2350
2351         data = hdr_metadata.chromaticity_green_y / 2;
2352         info_packet->sb[i++] = data & 0xFF;
2353         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2354
2355         data = hdr_metadata.chromaticity_blue_x / 2;
2356         info_packet->sb[i++] = data & 0xFF;
2357         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2358
2359         data = hdr_metadata.chromaticity_blue_y / 2;
2360         info_packet->sb[i++] = data & 0xFF;
2361         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2362
2363         data = hdr_metadata.chromaticity_red_x / 2;
2364         info_packet->sb[i++] = data & 0xFF;
2365         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2366
2367         data = hdr_metadata.chromaticity_red_y / 2;
2368         info_packet->sb[i++] = data & 0xFF;
2369         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2370
2371         data = hdr_metadata.chromaticity_white_point_x / 2;
2372         info_packet->sb[i++] = data & 0xFF;
2373         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2374
2375         data = hdr_metadata.chromaticity_white_point_y / 2;
2376         info_packet->sb[i++] = data & 0xFF;
2377         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2378
2379         data = hdr_metadata.max_luminance;
2380         info_packet->sb[i++] = data & 0xFF;
2381         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2382
2383         data = hdr_metadata.min_luminance;
2384         info_packet->sb[i++] = data & 0xFF;
2385         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2386
2387         data = hdr_metadata.maximum_content_light_level;
2388         info_packet->sb[i++] = data & 0xFF;
2389         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2390
2391         data = hdr_metadata.maximum_frame_average_light_level;
2392         info_packet->sb[i++] = data & 0xFF;
2393         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2394
2395         if (dc_is_hdmi_signal(signal)) {
2396                 uint32_t checksum = 0;
2397
2398                 checksum += info_packet->hb0;
2399                 checksum += info_packet->hb1;
2400                 checksum += info_packet->hb2;
2401
2402                 for (i = 1; i <= info_packet->hb2; i++)
2403                         checksum += info_packet->sb[i];
2404
2405                 info_packet->sb[0] = 0x100 - checksum;
2406         } else if (dc_is_dp_signal(signal)) {
2407                 info_packet->sb[0] = 0x01;
2408                 info_packet->sb[1] = 0x1A;
2409         }
2410 }
2411
2412 static void set_vsc_info_packet(
2413                 struct encoder_info_packet *info_packet,
2414                 struct dc_stream_state *stream)
2415 {
2416         unsigned int vscPacketRevision = 0;
2417         unsigned int i;
2418
2419         if (stream->sink->link->psr_enabled) {
2420                 vscPacketRevision = 2;
2421         }
2422
2423         /* VSC packet not needed based on the features
2424          * supported by this DP display
2425          */
2426         if (vscPacketRevision == 0)
2427                 return;
2428
2429         if (vscPacketRevision == 0x2) {
2430                 /* Secondary-data Packet ID = 0*/
2431                 info_packet->hb0 = 0x00;
2432                 /* 07h - Packet Type Value indicating Video
2433                  * Stream Configuration packet
2434                  */
2435                 info_packet->hb1 = 0x07;
2436                 /* 02h = VSC SDP supporting 3D stereo and PSR
2437                  * (applies to eDP v1.3 or higher).
2438                  */
2439                 info_packet->hb2 = 0x02;
2440                 /* 08h = VSC packet supporting 3D stereo + PSR
2441                  * (HB2 = 02h).
2442                  */
2443                 info_packet->hb3 = 0x08;
2444
2445                 for (i = 0; i < 28; i++)
2446                         info_packet->sb[i] = 0;
2447
2448                 info_packet->valid = true;
2449         }
2450
2451         /*TODO: stereo 3D support and extend pixel encoding colorimetry*/
2452 }
2453
2454 void dc_resource_state_destruct(struct dc_state *context)
2455 {
2456         int i, j;
2457
2458         for (i = 0; i < context->stream_count; i++) {
2459                 for (j = 0; j < context->stream_status[i].plane_count; j++)
2460                         dc_plane_state_release(
2461                                 context->stream_status[i].plane_states[j]);
2462
2463                 context->stream_status[i].plane_count = 0;
2464                 dc_stream_release(context->streams[i]);
2465                 context->streams[i] = NULL;
2466         }
2467 }
2468
2469 /*
2470  * Copy src_ctx into dst_ctx and retain all surfaces and streams referenced
2471  * by the src_ctx
2472  */
2473 void dc_resource_state_copy_construct(
2474                 const struct dc_state *src_ctx,
2475                 struct dc_state *dst_ctx)
2476 {
2477         int i, j;
2478         struct kref refcount = dst_ctx->refcount;
2479
2480         *dst_ctx = *src_ctx;
2481
2482         for (i = 0; i < MAX_PIPES; i++) {
2483                 struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i];
2484
2485                 if (cur_pipe->top_pipe)
2486                         cur_pipe->top_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx];
2487
2488                 if (cur_pipe->bottom_pipe)
2489                         cur_pipe->bottom_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx];
2490
2491         }
2492
2493         for (i = 0; i < dst_ctx->stream_count; i++) {
2494                 dc_stream_retain(dst_ctx->streams[i]);
2495                 for (j = 0; j < dst_ctx->stream_status[i].plane_count; j++)
2496                         dc_plane_state_retain(
2497                                 dst_ctx->stream_status[i].plane_states[j]);
2498         }
2499
2500         /* context refcount should not be overridden */
2501         dst_ctx->refcount = refcount;
2502
2503 }
2504
2505 struct clock_source *dc_resource_find_first_free_pll(
2506                 struct resource_context *res_ctx,
2507                 const struct resource_pool *pool)
2508 {
2509         int i;
2510
2511         for (i = 0; i < pool->clk_src_count; ++i) {
2512                 if (res_ctx->clock_source_ref_count[i] == 0)
2513                         return pool->clock_sources[i];
2514         }
2515
2516         return NULL;
2517 }
2518
2519 void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
2520 {
2521         enum signal_type signal = SIGNAL_TYPE_NONE;
2522         struct encoder_info_frame *info = &pipe_ctx->stream_res.encoder_info_frame;
2523
2524         /* default all packets to invalid */
2525         info->avi.valid = false;
2526         info->gamut.valid = false;
2527         info->vendor.valid = false;
2528         info->spd.valid = false;
2529         info->hdrsmd.valid = false;
2530         info->vsc.valid = false;
2531
2532         signal = pipe_ctx->stream->signal;
2533
2534         /* HDMi and DP have different info packets*/
2535         if (dc_is_hdmi_signal(signal)) {
2536                 set_avi_info_frame(&info->avi, pipe_ctx);
2537
2538                 set_vendor_info_packet(&info->vendor, pipe_ctx->stream);
2539
2540                 set_spd_info_packet(&info->spd, pipe_ctx->stream);
2541
2542                 set_hdr_static_info_packet(&info->hdrsmd,
2543                                 pipe_ctx->plane_state, pipe_ctx->stream);
2544
2545         } else if (dc_is_dp_signal(signal)) {
2546                 set_vsc_info_packet(&info->vsc, pipe_ctx->stream);
2547
2548                 set_spd_info_packet(&info->spd, pipe_ctx->stream);
2549
2550                 set_hdr_static_info_packet(&info->hdrsmd,
2551                                 pipe_ctx->plane_state, pipe_ctx->stream);
2552         }
2553
2554         patch_gamut_packet_checksum(&info->gamut);
2555 }
2556
2557 enum dc_status resource_map_clock_resources(
2558                 const struct dc  *dc,
2559                 struct dc_state *context,
2560                 struct dc_stream_state *stream)
2561 {
2562         /* acquire new resources */
2563         const struct resource_pool *pool = dc->res_pool;
2564         struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(
2565                                 &context->res_ctx, stream);
2566
2567         if (!pipe_ctx)
2568                 return DC_ERROR_UNEXPECTED;
2569
2570         if (dc_is_dp_signal(pipe_ctx->stream->signal)
2571                 || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL)
2572                 pipe_ctx->clock_source = pool->dp_clock_source;
2573         else {
2574                 pipe_ctx->clock_source = NULL;
2575
2576                 if (!dc->config.disable_disp_pll_sharing)
2577                         pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing(
2578                                 &context->res_ctx,
2579                                 pipe_ctx);
2580
2581                 if (pipe_ctx->clock_source == NULL)
2582                         pipe_ctx->clock_source =
2583                                 dc_resource_find_first_free_pll(
2584                                         &context->res_ctx,
2585                                         pool);
2586         }
2587
2588         if (pipe_ctx->clock_source == NULL)
2589                 return DC_NO_CLOCK_SOURCE_RESOURCE;
2590
2591         resource_reference_clock_source(
2592                 &context->res_ctx, pool,
2593                 pipe_ctx->clock_source);
2594
2595         return DC_OK;
2596 }
2597
2598 /*
2599  * Note: We need to disable output if clock sources change,
2600  * since bios does optimization and doesn't apply if changing
2601  * PHY when not already disabled.
2602  */
2603 bool pipe_need_reprogram(
2604                 struct pipe_ctx *pipe_ctx_old,
2605                 struct pipe_ctx *pipe_ctx)
2606 {
2607         if (!pipe_ctx_old->stream)
2608                 return false;
2609
2610         if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink)
2611                 return true;
2612
2613         if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal)
2614                 return true;
2615
2616         if (pipe_ctx_old->stream_res.audio != pipe_ctx->stream_res.audio)
2617                 return true;
2618
2619         if (pipe_ctx_old->clock_source != pipe_ctx->clock_source
2620                         && pipe_ctx_old->stream != pipe_ctx->stream)
2621                 return true;
2622
2623         if (pipe_ctx_old->stream_res.stream_enc != pipe_ctx->stream_res.stream_enc)
2624                 return true;
2625
2626         if (is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream))
2627                 return true;
2628
2629
2630         return false;
2631 }
2632
2633 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
2634                 struct bit_depth_reduction_params *fmt_bit_depth)
2635 {
2636         enum dc_dither_option option = stream->dither_option;
2637         enum dc_pixel_encoding pixel_encoding =
2638                         stream->timing.pixel_encoding;
2639
2640         memset(fmt_bit_depth, 0, sizeof(*fmt_bit_depth));
2641
2642         if (option == DITHER_OPTION_DEFAULT) {
2643                 switch (stream->timing.display_color_depth) {
2644                 case COLOR_DEPTH_666:
2645                         option = DITHER_OPTION_SPATIAL6;
2646                         break;
2647                 case COLOR_DEPTH_888:
2648                         option = DITHER_OPTION_SPATIAL8;
2649                         break;
2650                 case COLOR_DEPTH_101010:
2651                         option = DITHER_OPTION_SPATIAL10;
2652                         break;
2653                 default:
2654                         option = DITHER_OPTION_DISABLE;
2655                 }
2656         }
2657
2658         if (option == DITHER_OPTION_DISABLE)
2659                 return;
2660
2661         if (option == DITHER_OPTION_TRUN6) {
2662                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2663                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 0;
2664         } else if (option == DITHER_OPTION_TRUN8 ||
2665                         option == DITHER_OPTION_TRUN8_SPATIAL6 ||
2666                         option == DITHER_OPTION_TRUN8_FM6) {
2667                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2668                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 1;
2669         } else if (option == DITHER_OPTION_TRUN10        ||
2670                         option == DITHER_OPTION_TRUN10_SPATIAL6   ||
2671                         option == DITHER_OPTION_TRUN10_SPATIAL8   ||
2672                         option == DITHER_OPTION_TRUN10_FM8     ||
2673                         option == DITHER_OPTION_TRUN10_FM6     ||
2674                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2675                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2676                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
2677         }
2678
2679         /* special case - Formatter can only reduce by 4 bits at most.
2680          * When reducing from 12 to 6 bits,
2681          * HW recommends we use trunc with round mode
2682          * (if we did nothing, trunc to 10 bits would be used)
2683          * note that any 12->10 bit reduction is ignored prior to DCE8,
2684          * as the input was 10 bits.
2685          */
2686         if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM ||
2687                         option == DITHER_OPTION_SPATIAL6 ||
2688                         option == DITHER_OPTION_FM6) {
2689                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2690                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
2691                 fmt_bit_depth->flags.TRUNCATE_MODE = 1;
2692         }
2693
2694         /* spatial dither
2695          * note that spatial modes 1-3 are never used
2696          */
2697         if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM            ||
2698                         option == DITHER_OPTION_SPATIAL6 ||
2699                         option == DITHER_OPTION_TRUN10_SPATIAL6      ||
2700                         option == DITHER_OPTION_TRUN8_SPATIAL6) {
2701                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2702                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 0;
2703                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2704                 fmt_bit_depth->flags.RGB_RANDOM =
2705                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2706         } else if (option == DITHER_OPTION_SPATIAL8_FRAME_RANDOM            ||
2707                         option == DITHER_OPTION_SPATIAL8 ||
2708                         option == DITHER_OPTION_SPATIAL8_FM6        ||
2709                         option == DITHER_OPTION_TRUN10_SPATIAL8      ||
2710                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2711                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2712                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 1;
2713                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2714                 fmt_bit_depth->flags.RGB_RANDOM =
2715                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2716         } else if (option == DITHER_OPTION_SPATIAL10_FRAME_RANDOM ||
2717                         option == DITHER_OPTION_SPATIAL10 ||
2718                         option == DITHER_OPTION_SPATIAL10_FM8 ||
2719                         option == DITHER_OPTION_SPATIAL10_FM6) {
2720                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2721                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 2;
2722                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2723                 fmt_bit_depth->flags.RGB_RANDOM =
2724                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2725         }
2726
2727         if (option == DITHER_OPTION_SPATIAL6 ||
2728                         option == DITHER_OPTION_SPATIAL8 ||
2729                         option == DITHER_OPTION_SPATIAL10) {
2730                 fmt_bit_depth->flags.FRAME_RANDOM = 0;
2731         } else {
2732                 fmt_bit_depth->flags.FRAME_RANDOM = 1;
2733         }
2734
2735         //////////////////////
2736         //// temporal dither
2737         //////////////////////
2738         if (option == DITHER_OPTION_FM6           ||
2739                         option == DITHER_OPTION_SPATIAL8_FM6     ||
2740                         option == DITHER_OPTION_SPATIAL10_FM6     ||
2741                         option == DITHER_OPTION_TRUN10_FM6     ||
2742                         option == DITHER_OPTION_TRUN8_FM6      ||
2743                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2744                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2745                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 0;
2746         } else if (option == DITHER_OPTION_FM8        ||
2747                         option == DITHER_OPTION_SPATIAL10_FM8  ||
2748                         option == DITHER_OPTION_TRUN10_FM8) {
2749                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2750                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 1;
2751         } else if (option == DITHER_OPTION_FM10) {
2752                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2753                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 2;
2754         }
2755
2756         fmt_bit_depth->pixel_encoding = pixel_encoding;
2757 }
2758
2759 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
2760 {
2761         struct dc  *core_dc = dc;
2762         struct dc_link *link = stream->sink->link;
2763         struct timing_generator *tg = core_dc->res_pool->timing_generators[0];
2764         enum dc_status res = DC_OK;
2765
2766         calculate_phy_pix_clks(stream);
2767
2768         if (!tg->funcs->validate_timing(tg, &stream->timing))
2769                 res = DC_FAIL_CONTROLLER_VALIDATE;
2770
2771         if (res == DC_OK)
2772                 if (!link->link_enc->funcs->validate_output_with_stream(
2773                                                 link->link_enc, stream))
2774                         res = DC_FAIL_ENC_VALIDATE;
2775
2776         /* TODO: validate audio ASIC caps, encoder */
2777
2778         if (res == DC_OK)
2779                 res = dc_link_validate_mode_timing(stream,
2780                       link,
2781                       &stream->timing);
2782
2783         return res;
2784 }
2785
2786 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
2787 {
2788         enum dc_status res = DC_OK;
2789
2790         /* TODO For now validates pixel format only */
2791         if (dc->res_pool->funcs->validate_plane)
2792                 return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps);
2793
2794         return res;
2795 }