Merge branch 'for-4.12/upstream-fixes' into for-linus
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_atomfirmware.c
1 /*
2  * Copyright 2016 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #include <drm/drmP.h>
24 #include <drm/amdgpu_drm.h>
25 #include "amdgpu.h"
26 #include "atomfirmware.h"
27 #include "amdgpu_atomfirmware.h"
28 #include "atom.h"
29 #include "atombios.h"
30
31 #define get_index_into_master_table(master_table, table_name) (offsetof(struct master_table, table_name) / sizeof(uint16_t))
32
33 bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev)
34 {
35         int index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
36                                                 firmwareinfo);
37         uint16_t data_offset;
38
39         if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, NULL,
40                                           NULL, NULL, &data_offset)) {
41                 struct atom_firmware_info_v3_1 *firmware_info =
42                         (struct atom_firmware_info_v3_1 *)(adev->mode_info.atom_context->bios +
43                                                            data_offset);
44
45                 if (le32_to_cpu(firmware_info->firmware_capability) &
46                     ATOM_FIRMWARE_CAP_GPU_VIRTUALIZATION)
47                         return true;
48         }
49         return false;
50 }
51
52 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev)
53 {
54         int index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
55                                                 firmwareinfo);
56         uint16_t data_offset;
57
58         if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, NULL,
59                                           NULL, NULL, &data_offset)) {
60                 struct atom_firmware_info_v3_1 *firmware_info =
61                         (struct atom_firmware_info_v3_1 *)(adev->mode_info.atom_context->bios +
62                                                            data_offset);
63
64                 adev->bios_scratch_reg_offset =
65                         le32_to_cpu(firmware_info->bios_scratch_reg_startaddr);
66         }
67 }
68
69 void amdgpu_atomfirmware_scratch_regs_save(struct amdgpu_device *adev)
70 {
71         int i;
72
73         for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
74                 adev->bios_scratch[i] = RREG32(adev->bios_scratch_reg_offset + i);
75 }
76
77 void amdgpu_atomfirmware_scratch_regs_restore(struct amdgpu_device *adev)
78 {
79         int i;
80
81         /*
82          * VBIOS will check ASIC_INIT_COMPLETE bit to decide if
83          * execute ASIC_Init posting via driver
84          */
85         adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
86
87         for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
88                 WREG32(adev->bios_scratch_reg_offset + i, adev->bios_scratch[i]);
89 }
90
91 void amdgpu_atomfirmware_scratch_regs_engine_hung(struct amdgpu_device *adev,
92                                                   bool hung)
93 {
94         u32 tmp = RREG32(adev->bios_scratch_reg_offset + 3);
95
96         if (hung)
97                 tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
98         else
99                 tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;
100
101         WREG32(adev->bios_scratch_reg_offset + 3, tmp);
102 }
103
104 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev)
105 {
106         struct atom_context *ctx = adev->mode_info.atom_context;
107         int index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
108                                                 vram_usagebyfirmware);
109         uint16_t data_offset;
110         int usage_bytes = 0;
111
112         if (amdgpu_atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
113                 struct vram_usagebyfirmware_v2_1 *firmware_usage =
114                         (struct vram_usagebyfirmware_v2_1 *)(ctx->bios + data_offset);
115
116                 DRM_DEBUG("atom firmware requested %08x %dkb fw %dkb drv\n",
117                           le32_to_cpu(firmware_usage->start_address_in_kb),
118                           le16_to_cpu(firmware_usage->used_by_firmware_in_kb),
119                           le16_to_cpu(firmware_usage->used_by_driver_in_kb));
120
121                 usage_bytes = le16_to_cpu(firmware_usage->used_by_driver_in_kb) * 1024;
122         }
123         ctx->scratch_size_bytes = 0;
124         if (usage_bytes == 0)
125                 usage_bytes = 20 * 1024;
126         /* allocate some scratch memory */
127         ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
128         if (!ctx->scratch)
129                 return -ENOMEM;
130         ctx->scratch_size_bytes = usage_bytes;
131         return 0;
132 }