drivers/cpufreq/tegra20-cpufreq.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2010 Google, Inc.
   4  *
   5  * Author:
   6  *      Colin Cross <ccross@google.com>
   7  *      Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/cpufreq.h>
  12 #include <linux/err.h>
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/types.h>
  17
  18 static struct cpufreq_frequency_table freq_table[] = {
  19         { .frequency = 216000 },
  20         { .frequency = 312000 },
  21         { .frequency = 456000 },
  22         { .frequency = 608000 },
  23         { .frequency = 760000 },
  24         { .frequency = 816000 },
  25         { .frequency = 912000 },
  26         { .frequency = 1000000 },
  27         { .frequency = CPUFREQ_TABLE_END },
  28 };
  29
  30 struct tegra20_cpufreq {
  31         struct device *dev;
  32         struct cpufreq_driver driver;
  33         struct clk *cpu_clk;
  34         struct clk *pll_x_clk;
  35         struct clk *pll_p_clk;
  36         bool pll_x_prepared;
  37 };
  38
  39 static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
  40                                            unsigned int index)
  41 {
  42         struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
  43         unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
  44
  45         /*
  46          * Don't switch to intermediate freq if:
  47          * - we are already at it, i.e. policy->cur == ifreq
  48          * - index corresponds to ifreq
  49          */
  50         if (freq_table[index].frequency == ifreq || policy->cur == ifreq)
  51                 return 0;
  52
  53         return ifreq;
  54 }
  55
  56 static int tegra_target_intermediate(struct cpufreq_policy *policy,
  57                                      unsigned int index)
  58 {
  59         struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
  60         int ret;
  61
  62         /*
  63          * Take an extra reference to the main pll so it doesn't turn
  64          * off when we move the cpu off of it as enabling it again while we
  65          * switch to it from tegra_target() would take additional time.
  66          *
  67          * When target-freq is equal to intermediate freq we don't need to
  68          * switch to an intermediate freq and so this routine isn't called.
  69          * Also, we wouldn't be using pll_x anymore and must not take extra
  70          * reference to it, as it can be disabled now to save some power.
  71          */
  72         clk_prepare_enable(cpufreq->pll_x_clk);
  73
  74         ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
  75         if (ret)
  76                 clk_disable_unprepare(cpufreq->pll_x_clk);
  77         else
  78                 cpufreq->pll_x_prepared = true;
  79
  80         return ret;
  81 }
  82
  83 static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
  84 {
  85         struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
  86         unsigned long rate = freq_table[index].frequency;
  87         unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
  88         int ret;
  89
  90         /*
  91          * target freq == pll_p, don't need to take extra reference to pll_x_clk
  92          * as it isn't used anymore.
  93          */
  94         if (rate == ifreq)
  95                 return clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
  96
  97         ret = clk_set_rate(cpufreq->pll_x_clk, rate * 1000);
  98         /* Restore to earlier frequency on error, i.e. pll_x */
  99         if (ret)
 100                 dev_err(cpufreq->dev, "Failed to change pll_x to %lu\n", rate);
 101
 102         ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_x_clk);
 103         /* This shouldn't fail while changing or restoring */
 104         WARN_ON(ret);
 105
 106         /*
 107          * Drop count to pll_x clock only if we switched to intermediate freq
 108          * earlier while transitioning to a target frequency.
 109          */
 110         if (cpufreq->pll_x_prepared) {
 111                 clk_disable_unprepare(cpufreq->pll_x_clk);
 112                 cpufreq->pll_x_prepared = false;
 113         }
 114
 115         return ret;
 116 }
 117
 118 static int tegra_cpu_init(struct cpufreq_policy *policy)
 119 {
 120         struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
 121         int ret;
 122
 123         clk_prepare_enable(cpufreq->cpu_clk);
 124
 125         /* FIXME: what's the actual transition time? */
 126         ret = cpufreq_generic_init(policy, freq_table, 300 * 1000);
 127         if (ret) {
 128                 clk_disable_unprepare(cpufreq->cpu_clk);
 129                 return ret;
 130         }
 131
 132         policy->clk = cpufreq->cpu_clk;
 133         policy->suspend_freq = freq_table[0].frequency;
 134         return 0;
 135 }
 136
 137 static int tegra_cpu_exit(struct cpufreq_policy *policy)
 138 {
 139         struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
 140
 141         clk_disable_unprepare(cpufreq->cpu_clk);
 142         return 0;
 143 }
 144
 145 static int tegra20_cpufreq_probe(struct platform_device *pdev)
 146 {
 147         struct tegra20_cpufreq *cpufreq;
 148         int err;
 149
 150         cpufreq = devm_kzalloc(&pdev->dev, sizeof(*cpufreq), GFP_KERNEL);
 151         if (!cpufreq)
 152                 return -ENOMEM;
 153
 154         cpufreq->cpu_clk = clk_get_sys(NULL, "cclk");
 155         if (IS_ERR(cpufreq->cpu_clk))
 156                 return PTR_ERR(cpufreq->cpu_clk);
 157
 158         cpufreq->pll_x_clk = clk_get_sys(NULL, "pll_x");
 159         if (IS_ERR(cpufreq->pll_x_clk)) {
 160                 err = PTR_ERR(cpufreq->pll_x_clk);
 161                 goto put_cpu;
 162         }
 163
 164         cpufreq->pll_p_clk = clk_get_sys(NULL, "pll_p");
 165         if (IS_ERR(cpufreq->pll_p_clk)) {
 166                 err = PTR_ERR(cpufreq->pll_p_clk);
 167                 goto put_pll_x;
 168         }
 169
 170         cpufreq->dev = &pdev->dev;
 171         cpufreq->driver.get = cpufreq_generic_get;
 172         cpufreq->driver.attr = cpufreq_generic_attr;
 173         cpufreq->driver.init = tegra_cpu_init;
 174         cpufreq->driver.exit = tegra_cpu_exit;
 175         cpufreq->driver.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK;
 176         cpufreq->driver.verify = cpufreq_generic_frequency_table_verify;
 177         cpufreq->driver.suspend = cpufreq_generic_suspend;
 178         cpufreq->driver.driver_data = cpufreq;
 179         cpufreq->driver.target_index = tegra_target;
 180         cpufreq->driver.get_intermediate = tegra_get_intermediate;
 181         cpufreq->driver.target_intermediate = tegra_target_intermediate;
 182         snprintf(cpufreq->driver.name, CPUFREQ_NAME_LEN, "tegra");
 183
 184         err = cpufreq_register_driver(&cpufreq->driver);
 185         if (err)
 186                 goto put_pll_p;
 187
 188         platform_set_drvdata(pdev, cpufreq);
 189
 190         return 0;
 191
 192 put_pll_p:
 193         clk_put(cpufreq->pll_p_clk);
 194 put_pll_x:
 195         clk_put(cpufreq->pll_x_clk);
 196 put_cpu:
 197         clk_put(cpufreq->cpu_clk);
 198
 199         return err;
 200 }
 201
 202 static int tegra20_cpufreq_remove(struct platform_device *pdev)
 203 {
 204         struct tegra20_cpufreq *cpufreq = platform_get_drvdata(pdev);
 205
 206         cpufreq_unregister_driver(&cpufreq->driver);
 207
 208         clk_put(cpufreq->pll_p_clk);
 209         clk_put(cpufreq->pll_x_clk);
 210         clk_put(cpufreq->cpu_clk);
 211
 212         return 0;
 213 }
 214
 215 static struct platform_driver tegra20_cpufreq_driver = {
 216         .probe          = tegra20_cpufreq_probe,
 217         .remove         = tegra20_cpufreq_remove,
 218         .driver         = {
 219                 .name   = "tegra20-cpufreq",
 220         },
 221 };
 222 module_platform_driver(tegra20_cpufreq_driver);
 223
 224 MODULE_ALIAS("platform:tegra20-cpufreq");
 225 MODULE_AUTHOR("Colin Cross <ccross@android.com>");
 226 MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
 227 MODULE_LICENSE("GPL");