2183e9a24c2db68d8ffed08a2e1d7407502f3847
[sfrench/cifs-2.6.git] / drivers / cpufreq / exynos-cpufreq.c
1 /*
2  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3  *              http://www.samsung.com
4  *
5  * EXYNOS - CPU frequency scaling support for EXYNOS series
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/io.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
20
21 #include <mach/cpufreq.h>
22
23 #include <plat/cpu.h>
24
25 static struct exynos_dvfs_info *exynos_info;
26
27 static struct regulator *arm_regulator;
28 static struct cpufreq_freqs freqs;
29
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
33
34 static int exynos_verify_speed(struct cpufreq_policy *policy)
35 {
36         return cpufreq_frequency_table_verify(policy,
37                                               exynos_info->freq_table);
38 }
39
40 static unsigned int exynos_getspeed(unsigned int cpu)
41 {
42         return clk_get_rate(exynos_info->cpu_clk) / 1000;
43 }
44
45 static int exynos_cpufreq_get_index(unsigned int freq)
46 {
47         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
48         int index;
49
50         for (index = 0;
51                 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
52                 if (freq_table[index].frequency == freq)
53                         break;
54
55         if (freq_table[index].frequency == CPUFREQ_TABLE_END)
56                 return -EINVAL;
57
58         return index;
59 }
60
61 static int exynos_cpufreq_scale(unsigned int target_freq)
62 {
63         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
64         unsigned int *volt_table = exynos_info->volt_table;
65         struct cpufreq_policy *policy = cpufreq_cpu_get(0);
66         unsigned int arm_volt, safe_arm_volt = 0;
67         unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
68         unsigned int index, old_index;
69         int ret = 0;
70
71         freqs.old = policy->cur;
72         freqs.cpu = policy->cpu;
73
74         if (target_freq == freqs.old)
75                 goto out;
76
77         /*
78          * The policy max have been changed so that we cannot get proper
79          * old_index with cpufreq_frequency_table_target(). Thus, ignore
80          * policy and get the index from the raw freqeuncy table.
81          */
82         old_index = exynos_cpufreq_get_index(freqs.old);
83         if (old_index < 0) {
84                 ret = old_index;
85                 goto out;
86         }
87
88         index = exynos_cpufreq_get_index(target_freq);
89         if (index < 0) {
90                 ret = index;
91                 goto out;
92         }
93
94         /*
95          * ARM clock source will be changed APLL to MPLL temporary
96          * To support this level, need to control regulator for
97          * required voltage level
98          */
99         if (exynos_info->need_apll_change != NULL) {
100                 if (exynos_info->need_apll_change(old_index, index) &&
101                    (freq_table[index].frequency < mpll_freq_khz) &&
102                    (freq_table[old_index].frequency < mpll_freq_khz))
103                         safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
104         }
105         arm_volt = volt_table[index];
106
107         for_each_cpu(freqs.cpu, policy->cpus)
108                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
109
110         /* When the new frequency is higher than current frequency */
111         if ((freqs.new > freqs.old) && !safe_arm_volt) {
112                 /* Firstly, voltage up to increase frequency */
113                 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
114                 if (ret) {
115                         pr_err("%s: failed to set cpu voltage to %d\n",
116                                 __func__, arm_volt);
117                         goto out;
118                 }
119         }
120
121         if (safe_arm_volt) {
122                 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
123                                       safe_arm_volt);
124                 if (ret) {
125                         pr_err("%s: failed to set cpu voltage to %d\n",
126                                 __func__, safe_arm_volt);
127                         goto out;
128                 }
129         }
130
131         exynos_info->set_freq(old_index, index);
132
133         for_each_cpu(freqs.cpu, policy->cpus)
134                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
135
136         /* When the new frequency is lower than current frequency */
137         if ((freqs.new < freqs.old) ||
138            ((freqs.new > freqs.old) && safe_arm_volt)) {
139                 /* down the voltage after frequency change */
140                 regulator_set_voltage(arm_regulator, arm_volt,
141                                 arm_volt);
142                 if (ret) {
143                         pr_err("%s: failed to set cpu voltage to %d\n",
144                                 __func__, arm_volt);
145                         goto out;
146                 }
147         }
148
149 out:
150
151         cpufreq_cpu_put(policy);
152
153         return ret;
154 }
155
156 static int exynos_target(struct cpufreq_policy *policy,
157                           unsigned int target_freq,
158                           unsigned int relation)
159 {
160         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
161         unsigned int index;
162         int ret;
163
164         mutex_lock(&cpufreq_lock);
165
166         if (frequency_locked)
167                 goto out;
168
169         if (cpufreq_frequency_table_target(policy, freq_table,
170                                            target_freq, relation, &index)) {
171                 ret = -EINVAL;
172                 goto out;
173         }
174
175         freqs.new = freq_table[index].frequency;
176
177         ret = exynos_cpufreq_scale(freqs.new);
178
179 out:
180         mutex_unlock(&cpufreq_lock);
181
182         return ret;
183 }
184
185 #ifdef CONFIG_PM
186 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
187 {
188         return 0;
189 }
190
191 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
192 {
193         return 0;
194 }
195 #endif
196
197 /**
198  * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
199  *                      context
200  * @notifier
201  * @pm_event
202  * @v
203  *
204  * While frequency_locked == true, target() ignores every frequency but
205  * locking_frequency. The locking_frequency value is the initial frequency,
206  * which is set by the bootloader. In order to eliminate possible
207  * inconsistency in clock values, we save and restore frequencies during
208  * suspend and resume and block CPUFREQ activities. Note that the standard
209  * suspend/resume cannot be used as they are too deep (syscore_ops) for
210  * regulator actions.
211  */
212 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
213                                        unsigned long pm_event, void *v)
214 {
215         int ret;
216
217         switch (pm_event) {
218         case PM_SUSPEND_PREPARE:
219                 mutex_lock(&cpufreq_lock);
220                 frequency_locked = true;
221                 mutex_unlock(&cpufreq_lock);
222
223                 ret = exynos_cpufreq_scale(locking_frequency);
224                 if (ret < 0)
225                         return NOTIFY_BAD;
226
227                 break;
228
229         case PM_POST_SUSPEND:
230                 mutex_lock(&cpufreq_lock);
231                 frequency_locked = false;
232                 mutex_unlock(&cpufreq_lock);
233                 break;
234         }
235
236         return NOTIFY_OK;
237 }
238
239 static struct notifier_block exynos_cpufreq_nb = {
240         .notifier_call = exynos_cpufreq_pm_notifier,
241 };
242
243 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
244 {
245         policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
246
247         cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
248
249         locking_frequency = exynos_getspeed(0);
250
251         /* set the transition latency value */
252         policy->cpuinfo.transition_latency = 100000;
253
254         /*
255          * EXYNOS4 multi-core processors has 2 cores
256          * that the frequency cannot be set independently.
257          * Each cpu is bound to the same speed.
258          * So the affected cpu is all of the cpus.
259          */
260         if (num_online_cpus() == 1) {
261                 cpumask_copy(policy->related_cpus, cpu_possible_mask);
262                 cpumask_copy(policy->cpus, cpu_online_mask);
263         } else {
264                 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
265                 cpumask_setall(policy->cpus);
266         }
267
268         return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
269 }
270
271 static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
272 {
273         cpufreq_frequency_table_put_attr(policy->cpu);
274         return 0;
275 }
276
277 static struct freq_attr *exynos_cpufreq_attr[] = {
278         &cpufreq_freq_attr_scaling_available_freqs,
279         NULL,
280 };
281
282 static struct cpufreq_driver exynos_driver = {
283         .flags          = CPUFREQ_STICKY,
284         .verify         = exynos_verify_speed,
285         .target         = exynos_target,
286         .get            = exynos_getspeed,
287         .init           = exynos_cpufreq_cpu_init,
288         .exit           = exynos_cpufreq_cpu_exit,
289         .name           = "exynos_cpufreq",
290         .attr           = exynos_cpufreq_attr,
291 #ifdef CONFIG_PM
292         .suspend        = exynos_cpufreq_suspend,
293         .resume         = exynos_cpufreq_resume,
294 #endif
295 };
296
297 static int __init exynos_cpufreq_init(void)
298 {
299         int ret = -EINVAL;
300
301         exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
302         if (!exynos_info)
303                 return -ENOMEM;
304
305         if (soc_is_exynos4210())
306                 ret = exynos4210_cpufreq_init(exynos_info);
307         else if (soc_is_exynos4212() || soc_is_exynos4412())
308                 ret = exynos4x12_cpufreq_init(exynos_info);
309         else if (soc_is_exynos5250())
310                 ret = exynos5250_cpufreq_init(exynos_info);
311         else
312                 pr_err("%s: CPU type not found\n", __func__);
313
314         if (ret)
315                 goto err_vdd_arm;
316
317         if (exynos_info->set_freq == NULL) {
318                 pr_err("%s: No set_freq function (ERR)\n", __func__);
319                 goto err_vdd_arm;
320         }
321
322         arm_regulator = regulator_get(NULL, "vdd_arm");
323         if (IS_ERR(arm_regulator)) {
324                 pr_err("%s: failed to get resource vdd_arm\n", __func__);
325                 goto err_vdd_arm;
326         }
327
328         register_pm_notifier(&exynos_cpufreq_nb);
329
330         if (cpufreq_register_driver(&exynos_driver)) {
331                 pr_err("%s: failed to register cpufreq driver\n", __func__);
332                 goto err_cpufreq;
333         }
334
335         return 0;
336 err_cpufreq:
337         unregister_pm_notifier(&exynos_cpufreq_nb);
338
339         regulator_put(arm_regulator);
340 err_vdd_arm:
341         kfree(exynos_info);
342         pr_debug("%s: failed initialization\n", __func__);
343         return -EINVAL;
344 }
345 late_initcall(exynos_cpufreq_init);