drivers/cpufreq/acpi-cpufreq.c

   1 /*
   2  * acpi-cpufreq.c - ACPI Processor P-States Driver
   3  *
   4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6  *  Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
   7  *  Copyright (C) 2006       Denis Sadykov <denis.m.sadykov@intel.com>
   8  *
   9  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; either version 2 of the License, or (at
  14  *  your option) any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but
  17  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along
  22  *  with this program; if not, write to the Free Software Foundation, Inc.,
  23  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24  *
  25  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26  */
  27
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/init.h>
  31 #include <linux/smp.h>
  32 #include <linux/sched.h>
  33 #include <linux/cpufreq.h>
  34 #include <linux/compiler.h>
  35 #include <linux/dmi.h>
  36 #include <linux/slab.h>
  37
  38 #include <linux/acpi.h>
  39 #include <linux/io.h>
  40 #include <linux/delay.h>
  41 #include <linux/uaccess.h>
  42
  43 #include <acpi/processor.h>
  44
  45 #include <asm/msr.h>
  46 #include <asm/processor.h>
  47 #include <asm/cpufeature.h>
  48
  49 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  50 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  51 MODULE_LICENSE("GPL");
  52
  53 #define PFX "acpi-cpufreq: "
  54
  55 enum {
  56         UNDEFINED_CAPABLE = 0,
  57         SYSTEM_INTEL_MSR_CAPABLE,
  58         SYSTEM_AMD_MSR_CAPABLE,
  59         SYSTEM_IO_CAPABLE,
  60 };
  61
  62 #define INTEL_MSR_RANGE         (0xffff)
  63 #define AMD_MSR_RANGE           (0x7)
  64
  65 #define MSR_K7_HWCR_CPB_DIS     (1ULL << 25)
  66
  67 struct acpi_cpufreq_data {
  68         struct cpufreq_frequency_table *freq_table;
  69         unsigned int resume;
  70         unsigned int cpu_feature;
  71         unsigned int acpi_perf_cpu;
  72         cpumask_var_t freqdomain_cpus;
  73 };
  74
  75 /* acpi_perf_data is a pointer to percpu data. */
  76 static struct acpi_processor_performance __percpu *acpi_perf_data;
  77
  78 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
  79 {
  80         return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
  81 }
  82
  83 static struct cpufreq_driver acpi_cpufreq_driver;
  84
  85 static unsigned int acpi_pstate_strict;
  86 static struct msr __percpu *msrs;
  87
  88 static bool boost_state(unsigned int cpu)
  89 {
  90         u32 lo, hi;
  91         u64 msr;
  92
  93         switch (boot_cpu_data.x86_vendor) {
  94         case X86_VENDOR_INTEL:
  95                 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  96                 msr = lo | ((u64)hi << 32);
  97                 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  98         case X86_VENDOR_AMD:
  99                 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
 100                 msr = lo | ((u64)hi << 32);
 101                 return !(msr & MSR_K7_HWCR_CPB_DIS);
 102         }
 103         return false;
 104 }
 105
 106 static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
 107 {
 108         u32 cpu;
 109         u32 msr_addr;
 110         u64 msr_mask;
 111
 112         switch (boot_cpu_data.x86_vendor) {
 113         case X86_VENDOR_INTEL:
 114                 msr_addr = MSR_IA32_MISC_ENABLE;
 115                 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
 116                 break;
 117         case X86_VENDOR_AMD:
 118                 msr_addr = MSR_K7_HWCR;
 119                 msr_mask = MSR_K7_HWCR_CPB_DIS;
 120                 break;
 121         default:
 122                 return;
 123         }
 124
 125         rdmsr_on_cpus(cpumask, msr_addr, msrs);
 126
 127         for_each_cpu(cpu, cpumask) {
 128                 struct msr *reg = per_cpu_ptr(msrs, cpu);
 129                 if (enable)
 130                         reg->q &= ~msr_mask;
 131                 else
 132                         reg->q |= msr_mask;
 133         }
 134
 135         wrmsr_on_cpus(cpumask, msr_addr, msrs);
 136 }
 137
 138 static int _store_boost(int val)
 139 {
 140         get_online_cpus();
 141         boost_set_msrs(val, cpu_online_mask);
 142         put_online_cpus();
 143         pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
 144
 145         return 0;
 146 }
 147
 148 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
 149 {
 150         struct acpi_cpufreq_data *data = policy->driver_data;
 151
 152         return cpufreq_show_cpus(data->freqdomain_cpus, buf);
 153 }
 154
 155 cpufreq_freq_attr_ro(freqdomain_cpus);
 156
 157 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
 158 static ssize_t store_boost(const char *buf, size_t count)
 159 {
 160         int ret;
 161         unsigned long val = 0;
 162
 163         if (!acpi_cpufreq_driver.boost_supported)
 164                 return -EINVAL;
 165
 166         ret = kstrtoul(buf, 10, &val);
 167         if (ret || (val > 1))
 168                 return -EINVAL;
 169
 170         _store_boost((int) val);
 171
 172         return count;
 173 }
 174
 175 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
 176                          size_t count)
 177 {
 178         return store_boost(buf, count);
 179 }
 180
 181 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
 182 {
 183         return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
 184 }
 185
 186 cpufreq_freq_attr_rw(cpb);
 187 #endif
 188
 189 static int check_est_cpu(unsigned int cpuid)
 190 {
 191         struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
 192
 193         return cpu_has(cpu, X86_FEATURE_EST);
 194 }
 195
 196 static int check_amd_hwpstate_cpu(unsigned int cpuid)
 197 {
 198         struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
 199
 200         return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
 201 }
 202
 203 static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
 204 {
 205         struct acpi_processor_performance *perf;
 206         int i;
 207
 208         perf = to_perf_data(data);
 209
 210         for (i = 0; i < perf->state_count; i++) {
 211                 if (value == perf->states[i].status)
 212                         return data->freq_table[i].frequency;
 213         }
 214         return 0;
 215 }
 216
 217 static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
 218 {
 219         struct cpufreq_frequency_table *pos;
 220         struct acpi_processor_performance *perf;
 221
 222         if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
 223                 msr &= AMD_MSR_RANGE;
 224         else
 225                 msr &= INTEL_MSR_RANGE;
 226
 227         perf = to_perf_data(data);
 228
 229         cpufreq_for_each_entry(pos, data->freq_table)
 230                 if (msr == perf->states[pos->driver_data].status)
 231                         return pos->frequency;
 232         return data->freq_table[0].frequency;
 233 }
 234
 235 static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
 236 {
 237         switch (data->cpu_feature) {
 238         case SYSTEM_INTEL_MSR_CAPABLE:
 239         case SYSTEM_AMD_MSR_CAPABLE:
 240                 return extract_msr(val, data);
 241         case SYSTEM_IO_CAPABLE:
 242                 return extract_io(val, data);
 243         default:
 244                 return 0;
 245         }
 246 }
 247
 248 struct msr_addr {
 249         u32 reg;
 250 };
 251
 252 struct io_addr {
 253         u16 port;
 254         u8 bit_width;
 255 };
 256
 257 struct drv_cmd {
 258         unsigned int type;
 259         const struct cpumask *mask;
 260         union {
 261                 struct msr_addr msr;
 262                 struct io_addr io;
 263         } addr;
 264         u32 val;
 265 };
 266
 267 /* Called via smp_call_function_single(), on the target CPU */
 268 static void do_drv_read(void *_cmd)
 269 {
 270         struct drv_cmd *cmd = _cmd;
 271         u32 h;
 272
 273         switch (cmd->type) {
 274         case SYSTEM_INTEL_MSR_CAPABLE:
 275         case SYSTEM_AMD_MSR_CAPABLE:
 276                 rdmsr(cmd->addr.msr.reg, cmd->val, h);
 277                 break;
 278         case SYSTEM_IO_CAPABLE:
 279                 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
 280                                 &cmd->val,
 281                                 (u32)cmd->addr.io.bit_width);
 282                 break;
 283         default:
 284                 break;
 285         }
 286 }
 287
 288 /* Called via smp_call_function_many(), on the target CPUs */
 289 static void do_drv_write(void *_cmd)
 290 {
 291         struct drv_cmd *cmd = _cmd;
 292         u32 lo, hi;
 293
 294         switch (cmd->type) {
 295         case SYSTEM_INTEL_MSR_CAPABLE:
 296                 rdmsr(cmd->addr.msr.reg, lo, hi);
 297                 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
 298                 wrmsr(cmd->addr.msr.reg, lo, hi);
 299                 break;
 300         case SYSTEM_AMD_MSR_CAPABLE:
 301                 wrmsr(cmd->addr.msr.reg, cmd->val, 0);
 302                 break;
 303         case SYSTEM_IO_CAPABLE:
 304                 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
 305                                 cmd->val,
 306                                 (u32)cmd->addr.io.bit_width);
 307                 break;
 308         default:
 309                 break;
 310         }
 311 }
 312
 313 static void drv_read(struct drv_cmd *cmd)
 314 {
 315         int err;
 316         cmd->val = 0;
 317
 318         err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
 319         WARN_ON_ONCE(err);      /* smp_call_function_any() was buggy? */
 320 }
 321
 322 static void drv_write(struct drv_cmd *cmd)
 323 {
 324         int this_cpu;
 325
 326         this_cpu = get_cpu();
 327         if (cpumask_test_cpu(this_cpu, cmd->mask))
 328                 do_drv_write(cmd);
 329         smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
 330         put_cpu();
 331 }
 332
 333 static u32
 334 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
 335 {
 336         struct acpi_processor_performance *perf;
 337         struct drv_cmd cmd;
 338
 339         if (unlikely(cpumask_empty(mask)))
 340                 return 0;
 341
 342         switch (data->cpu_feature) {
 343         case SYSTEM_INTEL_MSR_CAPABLE:
 344                 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
 345                 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
 346                 break;
 347         case SYSTEM_AMD_MSR_CAPABLE:
 348                 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
 349                 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
 350                 break;
 351         case SYSTEM_IO_CAPABLE:
 352                 cmd.type = SYSTEM_IO_CAPABLE;
 353                 perf = to_perf_data(data);
 354                 cmd.addr.io.port = perf->control_register.address;
 355                 cmd.addr.io.bit_width = perf->control_register.bit_width;
 356                 break;
 357         default:
 358                 return 0;
 359         }
 360
 361         cmd.mask = mask;
 362         drv_read(&cmd);
 363
 364         pr_debug("get_cur_val = %u\n", cmd.val);
 365
 366         return cmd.val;
 367 }
 368
 369 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
 370 {
 371         struct acpi_cpufreq_data *data;
 372         struct cpufreq_policy *policy;
 373         unsigned int freq;
 374         unsigned int cached_freq;
 375
 376         pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
 377
 378         policy = cpufreq_cpu_get_raw(cpu);
 379         if (unlikely(!policy))
 380                 return 0;
 381
 382         data = policy->driver_data;
 383         if (unlikely(!data || !data->freq_table))
 384                 return 0;
 385
 386         cached_freq = data->freq_table[to_perf_data(data)->state].frequency;
 387         freq = extract_freq(get_cur_val(cpumask_of(cpu), data), data);
 388         if (freq != cached_freq) {
 389                 /*
 390                  * The dreaded BIOS frequency change behind our back.
 391                  * Force set the frequency on next target call.
 392                  */
 393                 data->resume = 1;
 394         }
 395
 396         pr_debug("cur freq = %u\n", freq);
 397
 398         return freq;
 399 }
 400
 401 static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
 402                                 struct acpi_cpufreq_data *data)
 403 {
 404         unsigned int cur_freq;
 405         unsigned int i;
 406
 407         for (i = 0; i < 100; i++) {
 408                 cur_freq = extract_freq(get_cur_val(mask, data), data);
 409                 if (cur_freq == freq)
 410                         return 1;
 411                 udelay(10);
 412         }
 413         return 0;
 414 }
 415
 416 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
 417                                unsigned int index)
 418 {
 419         struct acpi_cpufreq_data *data = policy->driver_data;
 420         struct acpi_processor_performance *perf;
 421         struct drv_cmd cmd;
 422         unsigned int next_perf_state = 0; /* Index into perf table */
 423         int result = 0;
 424
 425         if (unlikely(data == NULL || data->freq_table == NULL)) {
 426                 return -ENODEV;
 427         }
 428
 429         perf = to_perf_data(data);
 430         next_perf_state = data->freq_table[index].driver_data;
 431         if (perf->state == next_perf_state) {
 432                 if (unlikely(data->resume)) {
 433                         pr_debug("Called after resume, resetting to P%d\n",
 434                                 next_perf_state);
 435                         data->resume = 0;
 436                 } else {
 437                         pr_debug("Already at target state (P%d)\n",
 438                                 next_perf_state);
 439                         goto out;
 440                 }
 441         }
 442
 443         switch (data->cpu_feature) {
 444         case SYSTEM_INTEL_MSR_CAPABLE:
 445                 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
 446                 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
 447                 cmd.val = (u32) perf->states[next_perf_state].control;
 448                 break;
 449         case SYSTEM_AMD_MSR_CAPABLE:
 450                 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
 451                 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
 452                 cmd.val = (u32) perf->states[next_perf_state].control;
 453                 break;
 454         case SYSTEM_IO_CAPABLE:
 455                 cmd.type = SYSTEM_IO_CAPABLE;
 456                 cmd.addr.io.port = perf->control_register.address;
 457                 cmd.addr.io.bit_width = perf->control_register.bit_width;
 458                 cmd.val = (u32) perf->states[next_perf_state].control;
 459                 break;
 460         default:
 461                 result = -ENODEV;
 462                 goto out;
 463         }
 464
 465         /* cpufreq holds the hotplug lock, so we are safe from here on */
 466         if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
 467                 cmd.mask = policy->cpus;
 468         else
 469                 cmd.mask = cpumask_of(policy->cpu);
 470
 471         drv_write(&cmd);
 472
 473         if (acpi_pstate_strict) {
 474                 if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
 475                                         data)) {
 476                         pr_debug("acpi_cpufreq_target failed (%d)\n",
 477                                 policy->cpu);
 478                         result = -EAGAIN;
 479                 }
 480         }
 481
 482         if (!result)
 483                 perf->state = next_perf_state;
 484
 485 out:
 486         return result;
 487 }
 488
 489 static unsigned long
 490 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
 491 {
 492         struct acpi_processor_performance *perf;
 493
 494         perf = to_perf_data(data);
 495         if (cpu_khz) {
 496                 /* search the closest match to cpu_khz */
 497                 unsigned int i;
 498                 unsigned long freq;
 499                 unsigned long freqn = perf->states[0].core_frequency * 1000;
 500
 501                 for (i = 0; i < (perf->state_count-1); i++) {
 502                         freq = freqn;
 503                         freqn = perf->states[i+1].core_frequency * 1000;
 504                         if ((2 * cpu_khz) > (freqn + freq)) {
 505                                 perf->state = i;
 506                                 return freq;
 507                         }
 508                 }
 509                 perf->state = perf->state_count-1;
 510                 return freqn;
 511         } else {
 512                 /* assume CPU is at P0... */
 513                 perf->state = 0;
 514                 return perf->states[0].core_frequency * 1000;
 515         }
 516 }
 517
 518 static void free_acpi_perf_data(void)
 519 {
 520         unsigned int i;
 521
 522         /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
 523         for_each_possible_cpu(i)
 524                 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
 525                                  ->shared_cpu_map);
 526         free_percpu(acpi_perf_data);
 527 }
 528
 529 static int boost_notify(struct notifier_block *nb, unsigned long action,
 530                       void *hcpu)
 531 {
 532         unsigned cpu = (long)hcpu;
 533         const struct cpumask *cpumask;
 534
 535         cpumask = get_cpu_mask(cpu);
 536
 537         /*
 538          * Clear the boost-disable bit on the CPU_DOWN path so that
 539          * this cpu cannot block the remaining ones from boosting. On
 540          * the CPU_UP path we simply keep the boost-disable flag in
 541          * sync with the current global state.
 542          */
 543
 544         switch (action) {
 545         case CPU_UP_PREPARE:
 546         case CPU_UP_PREPARE_FROZEN:
 547                 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
 548                 break;
 549
 550         case CPU_DOWN_PREPARE:
 551         case CPU_DOWN_PREPARE_FROZEN:
 552                 boost_set_msrs(1, cpumask);
 553                 break;
 554
 555         default:
 556                 break;
 557         }
 558
 559         return NOTIFY_OK;
 560 }
 561
 562
 563 static struct notifier_block boost_nb = {
 564         .notifier_call          = boost_notify,
 565 };
 566
 567 /*
 568  * acpi_cpufreq_early_init - initialize ACPI P-States library
 569  *
 570  * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
 571  * in order to determine correct frequency and voltage pairings. We can
 572  * do _PDC and _PSD and find out the processor dependency for the
 573  * actual init that will happen later...
 574  */
 575 static int __init acpi_cpufreq_early_init(void)
 576 {
 577         unsigned int i;
 578         pr_debug("acpi_cpufreq_early_init\n");
 579
 580         acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
 581         if (!acpi_perf_data) {
 582                 pr_debug("Memory allocation error for acpi_perf_data.\n");
 583                 return -ENOMEM;
 584         }
 585         for_each_possible_cpu(i) {
 586                 if (!zalloc_cpumask_var_node(
 587                         &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
 588                         GFP_KERNEL, cpu_to_node(i))) {
 589
 590                         /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
 591                         free_acpi_perf_data();
 592                         return -ENOMEM;
 593                 }
 594         }
 595
 596         /* Do initialization in ACPI core */
 597         acpi_processor_preregister_performance(acpi_perf_data);
 598         return 0;
 599 }
 600
 601 #ifdef CONFIG_SMP
 602 /*
 603  * Some BIOSes do SW_ANY coordination internally, either set it up in hw
 604  * or do it in BIOS firmware and won't inform about it to OS. If not
 605  * detected, this has a side effect of making CPU run at a different speed
 606  * than OS intended it to run at. Detect it and handle it cleanly.
 607  */
 608 static int bios_with_sw_any_bug;
 609
 610 static int sw_any_bug_found(const struct dmi_system_id *d)
 611 {
 612         bios_with_sw_any_bug = 1;
 613         return 0;
 614 }
 615
 616 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
 617         {
 618                 .callback = sw_any_bug_found,
 619                 .ident = "Supermicro Server X6DLP",
 620                 .matches = {
 621                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 622                         DMI_MATCH(DMI_BIOS_VERSION, "080010"),
 623                         DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
 624                 },
 625         },
 626         { }
 627 };
 628
 629 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
 630 {
 631         /* Intel Xeon Processor 7100 Series Specification Update
 632          * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
 633          * AL30: A Machine Check Exception (MCE) Occurring during an
 634          * Enhanced Intel SpeedStep Technology Ratio Change May Cause
 635          * Both Processor Cores to Lock Up. */
 636         if (c->x86_vendor == X86_VENDOR_INTEL) {
 637                 if ((c->x86 == 15) &&
 638                     (c->x86_model == 6) &&
 639                     (c->x86_mask == 8)) {
 640                         printk(KERN_INFO "acpi-cpufreq: Intel(R) "
 641                             "Xeon(R) 7100 Errata AL30, processors may "
 642                             "lock up on frequency changes: disabling "
 643                             "acpi-cpufreq.\n");
 644                         return -ENODEV;
 645                     }
 646                 }
 647         return 0;
 648 }
 649 #endif
 650
 651 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 652 {
 653         unsigned int i;
 654         unsigned int valid_states = 0;
 655         unsigned int cpu = policy->cpu;
 656         struct acpi_cpufreq_data *data;
 657         unsigned int result = 0;
 658         struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
 659         struct acpi_processor_performance *perf;
 660 #ifdef CONFIG_SMP
 661         static int blacklisted;
 662 #endif
 663
 664         pr_debug("acpi_cpufreq_cpu_init\n");
 665
 666 #ifdef CONFIG_SMP
 667         if (blacklisted)
 668                 return blacklisted;
 669         blacklisted = acpi_cpufreq_blacklist(c);
 670         if (blacklisted)
 671                 return blacklisted;
 672 #endif
 673
 674         data = kzalloc(sizeof(*data), GFP_KERNEL);
 675         if (!data)
 676                 return -ENOMEM;
 677
 678         if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
 679                 result = -ENOMEM;
 680                 goto err_free;
 681         }
 682
 683         perf = per_cpu_ptr(acpi_perf_data, cpu);
 684         data->acpi_perf_cpu = cpu;
 685         policy->driver_data = data;
 686
 687         if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
 688                 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
 689
 690         result = acpi_processor_register_performance(perf, cpu);
 691         if (result)
 692                 goto err_free_mask;
 693
 694         policy->shared_type = perf->shared_type;
 695
 696         /*
 697          * Will let policy->cpus know about dependency only when software
 698          * coordination is required.
 699          */
 700         if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
 701             policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
 702                 cpumask_copy(policy->cpus, perf->shared_cpu_map);
 703         }
 704         cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
 705
 706 #ifdef CONFIG_SMP
 707         dmi_check_system(sw_any_bug_dmi_table);
 708         if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
 709                 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
 710                 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
 711         }
 712
 713         if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
 714                 cpumask_clear(policy->cpus);
 715                 cpumask_set_cpu(cpu, policy->cpus);
 716                 cpumask_copy(data->freqdomain_cpus,
 717                              topology_sibling_cpumask(cpu));
 718                 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
 719                 pr_info_once(PFX "overriding BIOS provided _PSD data\n");
 720         }
 721 #endif
 722
 723         /* capability check */
 724         if (perf->state_count <= 1) {
 725                 pr_debug("No P-States\n");
 726                 result = -ENODEV;
 727                 goto err_unreg;
 728         }
 729
 730         if (perf->control_register.space_id != perf->status_register.space_id) {
 731                 result = -ENODEV;
 732                 goto err_unreg;
 733         }
 734
 735         switch (perf->control_register.space_id) {
 736         case ACPI_ADR_SPACE_SYSTEM_IO:
 737                 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
 738                     boot_cpu_data.x86 == 0xf) {
 739                         pr_debug("AMD K8 systems must use native drivers.\n");
 740                         result = -ENODEV;
 741                         goto err_unreg;
 742                 }
 743                 pr_debug("SYSTEM IO addr space\n");
 744                 data->cpu_feature = SYSTEM_IO_CAPABLE;
 745                 break;
 746         case ACPI_ADR_SPACE_FIXED_HARDWARE:
 747                 pr_debug("HARDWARE addr space\n");
 748                 if (check_est_cpu(cpu)) {
 749                         data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
 750                         break;
 751                 }
 752                 if (check_amd_hwpstate_cpu(cpu)) {
 753                         data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
 754                         break;
 755                 }
 756                 result = -ENODEV;
 757                 goto err_unreg;
 758         default:
 759                 pr_debug("Unknown addr space %d\n",
 760                         (u32) (perf->control_register.space_id));
 761                 result = -ENODEV;
 762                 goto err_unreg;
 763         }
 764
 765         data->freq_table = kzalloc(sizeof(*data->freq_table) *
 766                     (perf->state_count+1), GFP_KERNEL);
 767         if (!data->freq_table) {
 768                 result = -ENOMEM;
 769                 goto err_unreg;
 770         }
 771
 772         /* detect transition latency */
 773         policy->cpuinfo.transition_latency = 0;
 774         for (i = 0; i < perf->state_count; i++) {
 775                 if ((perf->states[i].transition_latency * 1000) >
 776                     policy->cpuinfo.transition_latency)
 777                         policy->cpuinfo.transition_latency =
 778                             perf->states[i].transition_latency * 1000;
 779         }
 780
 781         /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
 782         if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
 783             policy->cpuinfo.transition_latency > 20 * 1000) {
 784                 policy->cpuinfo.transition_latency = 20 * 1000;
 785                 printk_once(KERN_INFO
 786                             "P-state transition latency capped at 20 uS\n");
 787         }
 788
 789         /* table init */
 790         for (i = 0; i < perf->state_count; i++) {
 791                 if (i > 0 && perf->states[i].core_frequency >=
 792                     data->freq_table[valid_states-1].frequency / 1000)
 793                         continue;
 794
 795                 data->freq_table[valid_states].driver_data = i;
 796                 data->freq_table[valid_states].frequency =
 797                     perf->states[i].core_frequency * 1000;
 798                 valid_states++;
 799         }
 800         data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
 801         perf->state = 0;
 802
 803         result = cpufreq_table_validate_and_show(policy, data->freq_table);
 804         if (result)
 805                 goto err_freqfree;
 806
 807         if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
 808                 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
 809
 810         switch (perf->control_register.space_id) {
 811         case ACPI_ADR_SPACE_SYSTEM_IO:
 812                 /*
 813                  * The core will not set policy->cur, because
 814                  * cpufreq_driver->get is NULL, so we need to set it here.
 815                  * However, we have to guess it, because the current speed is
 816                  * unknown and not detectable via IO ports.
 817                  */
 818                 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
 819                 break;
 820         case ACPI_ADR_SPACE_FIXED_HARDWARE:
 821                 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
 822                 break;
 823         default:
 824                 break;
 825         }
 826
 827         /* notify BIOS that we exist */
 828         acpi_processor_notify_smm(THIS_MODULE);
 829
 830         pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
 831         for (i = 0; i < perf->state_count; i++)
 832                 pr_debug("     %cP%d: %d MHz, %d mW, %d uS\n",
 833                         (i == perf->state ? '*' : ' '), i,
 834                         (u32) perf->states[i].core_frequency,
 835                         (u32) perf->states[i].power,
 836                         (u32) perf->states[i].transition_latency);
 837
 838         /*
 839          * the first call to ->target() should result in us actually
 840          * writing something to the appropriate registers.
 841          */
 842         data->resume = 1;
 843
 844         return result;
 845
 846 err_freqfree:
 847         kfree(data->freq_table);
 848 err_unreg:
 849         acpi_processor_unregister_performance(cpu);
 850 err_free_mask:
 851         free_cpumask_var(data->freqdomain_cpus);
 852 err_free:
 853         kfree(data);
 854         policy->driver_data = NULL;
 855
 856         return result;
 857 }
 858
 859 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
 860 {
 861         struct acpi_cpufreq_data *data = policy->driver_data;
 862
 863         pr_debug("acpi_cpufreq_cpu_exit\n");
 864
 865         if (data) {
 866                 policy->driver_data = NULL;
 867                 acpi_processor_unregister_performance(data->acpi_perf_cpu);
 868                 free_cpumask_var(data->freqdomain_cpus);
 869                 kfree(data->freq_table);
 870                 kfree(data);
 871         }
 872
 873         return 0;
 874 }
 875
 876 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
 877 {
 878         struct acpi_cpufreq_data *data = policy->driver_data;
 879
 880         pr_debug("acpi_cpufreq_resume\n");
 881
 882         data->resume = 1;
 883
 884         return 0;
 885 }
 886
 887 static struct freq_attr *acpi_cpufreq_attr[] = {
 888         &cpufreq_freq_attr_scaling_available_freqs,
 889         &freqdomain_cpus,
 890 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
 891         &cpb,
 892 #endif
 893         NULL,
 894 };
 895
 896 static struct cpufreq_driver acpi_cpufreq_driver = {
 897         .verify         = cpufreq_generic_frequency_table_verify,
 898         .target_index   = acpi_cpufreq_target,
 899         .bios_limit     = acpi_processor_get_bios_limit,
 900         .init           = acpi_cpufreq_cpu_init,
 901         .exit           = acpi_cpufreq_cpu_exit,
 902         .resume         = acpi_cpufreq_resume,
 903         .name           = "acpi-cpufreq",
 904         .attr           = acpi_cpufreq_attr,
 905         .set_boost      = _store_boost,
 906 };
 907
 908 static void __init acpi_cpufreq_boost_init(void)
 909 {
 910         if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
 911                 msrs = msrs_alloc();
 912
 913                 if (!msrs)
 914                         return;
 915
 916                 acpi_cpufreq_driver.boost_supported = true;
 917                 acpi_cpufreq_driver.boost_enabled = boost_state(0);
 918
 919                 cpu_notifier_register_begin();
 920
 921                 /* Force all MSRs to the same value */
 922                 boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
 923                                cpu_online_mask);
 924
 925                 __register_cpu_notifier(&boost_nb);
 926
 927                 cpu_notifier_register_done();
 928         }
 929 }
 930
 931 static void acpi_cpufreq_boost_exit(void)
 932 {
 933         if (msrs) {
 934                 unregister_cpu_notifier(&boost_nb);
 935
 936                 msrs_free(msrs);
 937                 msrs = NULL;
 938         }
 939 }
 940
 941 static int __init acpi_cpufreq_init(void)
 942 {
 943         int ret;
 944
 945         if (acpi_disabled)
 946                 return -ENODEV;
 947
 948         /* don't keep reloading if cpufreq_driver exists */
 949         if (cpufreq_get_current_driver())
 950                 return -EEXIST;
 951
 952         pr_debug("acpi_cpufreq_init\n");
 953
 954         ret = acpi_cpufreq_early_init();
 955         if (ret)
 956                 return ret;
 957
 958 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
 959         /* this is a sysfs file with a strange name and an even stranger
 960          * semantic - per CPU instantiation, but system global effect.
 961          * Lets enable it only on AMD CPUs for compatibility reasons and
 962          * only if configured. This is considered legacy code, which
 963          * will probably be removed at some point in the future.
 964          */
 965         if (!check_amd_hwpstate_cpu(0)) {
 966                 struct freq_attr **attr;
 967
 968                 pr_debug("CPB unsupported, do not expose it\n");
 969
 970                 for (attr = acpi_cpufreq_attr; *attr; attr++)
 971                         if (*attr == &cpb) {
 972                                 *attr = NULL;
 973                                 break;
 974                         }
 975         }
 976 #endif
 977         acpi_cpufreq_boost_init();
 978
 979         ret = cpufreq_register_driver(&acpi_cpufreq_driver);
 980         if (ret) {
 981                 free_acpi_perf_data();
 982                 acpi_cpufreq_boost_exit();
 983         }
 984         return ret;
 985 }
 986
 987 static void __exit acpi_cpufreq_exit(void)
 988 {
 989         pr_debug("acpi_cpufreq_exit\n");
 990
 991         acpi_cpufreq_boost_exit();
 992
 993         cpufreq_unregister_driver(&acpi_cpufreq_driver);
 994
 995         free_acpi_perf_data();
 996 }
 997
 998 module_param(acpi_pstate_strict, uint, 0644);
 999 MODULE_PARM_DESC(acpi_pstate_strict,
1000         "value 0 or non-zero. non-zero -> strict ACPI checks are "
1001         "performed during frequency changes.");
1002
1003 late_initcall(acpi_cpufreq_init);
1004 module_exit(acpi_cpufreq_exit);
1005
1006 static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1007         X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1008         X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1009         {}
1010 };
1011 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1012
1013 static const struct acpi_device_id processor_device_ids[] = {
1014         {ACPI_PROCESSOR_OBJECT_HID, },
1015         {ACPI_PROCESSOR_DEVICE_HID, },
1016         {},
1017 };
1018 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1019
1020 MODULE_ALIAS("acpi");