drivers/clk/sunxi-ng/ccu_nm.h

   1 /*
   2  * Copyright (c) 2016 Maxime Ripard. All rights reserved.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #ifndef _CCU_NM_H_
  15 #define _CCU_NM_H_
  16
  17 #include <linux/clk-provider.h>
  18
  19 #include "ccu_common.h"
  20 #include "ccu_div.h"
  21 #include "ccu_frac.h"
  22 #include "ccu_mult.h"
  23 #include "ccu_sdm.h"
  24
  25 /*
  26  * struct ccu_nm - Definition of an N-M clock
  27  *
  28  * Clocks based on the formula parent * N / M
  29  */
  30 struct ccu_nm {
  31         u32                     enable;
  32         u32                     lock;
  33
  34         struct ccu_mult_internal        n;
  35         struct ccu_div_internal         m;
  36         struct ccu_frac_internal        frac;
  37         struct ccu_sdm_internal         sdm;
  38
  39         unsigned int            fixed_post_div;
  40         unsigned int            min_rate;
  41         unsigned int            max_rate;
  42
  43         struct ccu_common       common;
  44 };
  45
  46 #define SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(_struct, _name, _parent, _reg,  \
  47                                         _nshift, _nwidth,               \
  48                                         _mshift, _mwidth,               \
  49                                         _sdm_table, _sdm_en,            \
  50                                         _sdm_reg, _sdm_reg_en,          \
  51                                         _gate, _lock, _flags)           \
  52         struct ccu_nm _struct = {                                       \
  53                 .enable         = _gate,                                \
  54                 .lock           = _lock,                                \
  55                 .n              = _SUNXI_CCU_MULT(_nshift, _nwidth),    \
  56                 .m              = _SUNXI_CCU_DIV(_mshift, _mwidth),     \
  57                 .sdm            = _SUNXI_CCU_SDM(_sdm_table, _sdm_en,   \
  58                                                  _sdm_reg, _sdm_reg_en),\
  59                 .common         = {                                     \
  60                         .reg            = _reg,                         \
  61                         .features       = CCU_FEATURE_SIGMA_DELTA_MOD,  \
  62                         .hw.init        = CLK_HW_INIT(_name,            \
  63                                                       _parent,          \
  64                                                       &ccu_nm_ops,      \
  65                                                       _flags),          \
  66                 },                                                      \
  67         }
  68
  69 #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(_struct, _name, _parent, _reg, \
  70                                          _nshift, _nwidth,              \
  71                                          _mshift, _mwidth,              \
  72                                          _frac_en, _frac_sel,           \
  73                                          _frac_rate_0, _frac_rate_1,    \
  74                                          _gate, _lock, _flags)          \
  75         struct ccu_nm _struct = {                                       \
  76                 .enable         = _gate,                                \
  77                 .lock           = _lock,                                \
  78                 .n              = _SUNXI_CCU_MULT(_nshift, _nwidth),    \
  79                 .m              = _SUNXI_CCU_DIV(_mshift, _mwidth),     \
  80                 .frac           = _SUNXI_CCU_FRAC(_frac_en, _frac_sel,  \
  81                                                   _frac_rate_0,         \
  82                                                   _frac_rate_1),        \
  83                 .common         = {                                     \
  84                         .reg            = _reg,                         \
  85                         .features       = CCU_FEATURE_FRACTIONAL,       \
  86                         .hw.init        = CLK_HW_INIT(_name,            \
  87                                                       _parent,          \
  88                                                       &ccu_nm_ops,      \
  89                                                       _flags),          \
  90                 },                                                      \
  91         }
  92
  93 #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent,   \
  94                                              _reg, _min_rate,           \
  95                                              _nshift, _nwidth,          \
  96                                              _mshift, _mwidth,          \
  97                                              _frac_en, _frac_sel,       \
  98                                              _frac_rate_0, _frac_rate_1,\
  99                                              _gate, _lock, _flags)      \
 100         struct ccu_nm _struct = {                                       \
 101                 .enable         = _gate,                                \
 102                 .lock           = _lock,                                \
 103                 .n              = _SUNXI_CCU_MULT(_nshift, _nwidth),    \
 104                 .m              = _SUNXI_CCU_DIV(_mshift, _mwidth),     \
 105                 .frac           = _SUNXI_CCU_FRAC(_frac_en, _frac_sel,  \
 106                                                   _frac_rate_0,         \
 107                                                   _frac_rate_1),        \
 108                 .min_rate       = _min_rate,                            \
 109                 .common         = {                                     \
 110                         .reg            = _reg,                         \
 111                         .features       = CCU_FEATURE_FRACTIONAL,       \
 112                         .hw.init        = CLK_HW_INIT(_name,            \
 113                                                       _parent,          \
 114                                                       &ccu_nm_ops,      \
 115                                                       _flags),          \
 116                 },                                                      \
 117         }
 118
 119 #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(_struct, _name,        \
 120                                                  _parent, _reg,         \
 121                                                  _min_rate, _max_rate,  \
 122                                                  _nshift, _nwidth,      \
 123                                                  _mshift, _mwidth,      \
 124                                                  _frac_en, _frac_sel,   \
 125                                                  _frac_rate_0,          \
 126                                                  _frac_rate_1,          \
 127                                                  _gate, _lock, _flags)  \
 128         struct ccu_nm _struct = {                                       \
 129                 .enable         = _gate,                                \
 130                 .lock           = _lock,                                \
 131                 .n              = _SUNXI_CCU_MULT(_nshift, _nwidth),    \
 132                 .m              = _SUNXI_CCU_DIV(_mshift, _mwidth),     \
 133                 .frac           = _SUNXI_CCU_FRAC(_frac_en, _frac_sel,  \
 134                                                   _frac_rate_0,         \
 135                                                   _frac_rate_1),        \
 136                 .min_rate       = _min_rate,                            \
 137                 .max_rate       = _max_rate,                            \
 138                 .common         = {                                     \
 139                         .reg            = _reg,                         \
 140                         .features       = CCU_FEATURE_FRACTIONAL,       \
 141                         .hw.init        = CLK_HW_INIT(_name,            \
 142                                                       _parent,          \
 143                                                       &ccu_nm_ops,      \
 144                                                       _flags),          \
 145                 },                                                      \
 146         }
 147
 148 #define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg,      \
 149                                     _nshift, _nwidth,                   \
 150                                     _mshift, _mwidth,                   \
 151                                     _gate, _lock, _flags)               \
 152         struct ccu_nm _struct = {                                       \
 153                 .enable         = _gate,                                \
 154                 .lock           = _lock,                                \
 155                 .n              = _SUNXI_CCU_MULT(_nshift, _nwidth),    \
 156                 .m              = _SUNXI_CCU_DIV(_mshift, _mwidth),     \
 157                 .common         = {                                     \
 158                         .reg            = _reg,                         \
 159                         .hw.init        = CLK_HW_INIT(_name,            \
 160                                                       _parent,          \
 161                                                       &ccu_nm_ops,      \
 162                                                       _flags),          \
 163                 },                                                      \
 164         }
 165
 166 static inline struct ccu_nm *hw_to_ccu_nm(struct clk_hw *hw)
 167 {
 168         struct ccu_common *common = hw_to_ccu_common(hw);
 169
 170         return container_of(common, struct ccu_nm, common);
 171 }
 172
 173 extern const struct clk_ops ccu_nm_ops;
 174
 175 #endif /* _CCU_NM_H_ */