drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20  *
  21  */
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/pci.h>
  25 #include <linux/bio.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/major.h>
  31 #include <linux/fs.h>
  32 #include <linux/blkpg.h>
  33 #include <linux/timer.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/seq_file.h>
  36 #include <linux/init.h>
  37 #include <linux/hdreg.h>
  38 #include <linux/smp_lock.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/blkdev.h>
  41 #include <linux/genhd.h>
  42 #include <linux/scatterlist.h>
  43 #include <asm/uaccess.h>
  44 #include <asm/io.h>
  45
  46
  47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  48
  49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  51
  52 /* Embedded module documentation macros - see modules.h */
  53 /* Original author Chris Frantz - Compaq Computer Corporation */
  54 MODULE_AUTHOR("Compaq Computer Corporation");
  55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  56 MODULE_LICENSE("GPL");
  57
  58 #include "cpqarray.h"
  59 #include "ida_cmd.h"
  60 #include "smart1,2.h"
  61 #include "ida_ioctl.h"
  62
  63 #define READ_AHEAD      128
  64 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  65
  66 #define MAX_CTLR        8
  67 #define CTLR_SHIFT      8
  68
  69 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  70
  71 static int nr_ctlr;
  72 static ctlr_info_t *hba[MAX_CTLR];
  73
  74 static int eisa[8];
  75
  76 #define NR_PRODUCTS ARRAY_SIZE(products)
  77
  78 /*  board_id = Subsystem Device ID & Vendor ID
  79  *  product = Marketing Name for the board
  80  *  access = Address of the struct of function pointers
  81  */
  82 static struct board_type products[] = {
  83         { 0x0040110E, "IDA",                    &smart1_access },
  84         { 0x0140110E, "IDA-2",                  &smart1_access },
  85         { 0x1040110E, "IAES",                   &smart1_access },
  86         { 0x2040110E, "SMART",                  &smart1_access },
  87         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  88         { 0x40300E11, "SMART-2/P",              &smart2_access },
  89         { 0x40310E11, "SMART-2SL",              &smart2_access },
  90         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  91         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  92         { 0x40340E11, "Smart Array 221",        &smart2_access },
  93         { 0x40400E11, "Integrated Array",       &smart4_access },
  94         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  95         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  96         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  97         { 0x40580E11, "Smart Array 431",        &smart4_access },
  98 };
  99
 100 /* define the PCI info for the PCI cards this driver can control */
 101 static const struct pci_device_id cpqarray_pci_device_id[] =
 102 {
 103         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 104                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 105         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 106                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 107         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 108                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 109         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 110                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 111         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 112                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 113         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 114                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 115         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 116                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 117         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 118                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 119         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 120                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 121         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 122                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 123         { 0 }
 124 };
 125
 126 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 127
 128 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 129
 130 /* Debug... */
 131 #define DBG(s)  do { s } while(0)
 132 /* Debug (general info)... */
 133 #define DBGINFO(s) do { } while(0)
 134 /* Debug Paranoid... */
 135 #define DBGP(s)  do { } while(0)
 136 /* Debug Extra Paranoid... */
 137 #define DBGPX(s) do { } while(0)
 138
 139 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 140 static void __iomem *remap_pci_mem(ulong base, ulong size);
 141 static int cpqarray_eisa_detect(void);
 142 static int pollcomplete(int ctlr);
 143 static void getgeometry(int ctlr);
 144 static void start_fwbk(int ctlr);
 145
 146 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 147 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 148
 149 static void free_hba(int i);
 150 static int alloc_cpqarray_hba(void);
 151
 152 static int sendcmd(
 153         __u8    cmd,
 154         int     ctlr,
 155         void    *buff,
 156         size_t  size,
 157         unsigned int blk,
 158         unsigned int blkcnt,
 159         unsigned int log_unit );
 160
 161 static int ida_open(struct block_device *bdev, fmode_t mode);
 162 static int ida_release(struct gendisk *disk, fmode_t mode);
 163 static int ida_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg);
 164 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 165 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 166
 167 static void do_ida_request(struct request_queue *q);
 168 static void start_io(ctlr_info_t *h);
 169
 170 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 171 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 172 static inline void complete_command(cmdlist_t *cmd, int timeout);
 173
 174 static irqreturn_t do_ida_intr(int irq, void *dev_id);
 175 static void ida_timer(unsigned long tdata);
 176 static int ida_revalidate(struct gendisk *disk);
 177 static int revalidate_allvol(ctlr_info_t *host);
 178 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 179
 180 #ifdef CONFIG_PROC_FS
 181 static void ida_procinit(int i);
 182 #else
 183 static void ida_procinit(int i) {}
 184 #endif
 185
 186 static inline drv_info_t *get_drv(struct gendisk *disk)
 187 {
 188         return disk->private_data;
 189 }
 190
 191 static inline ctlr_info_t *get_host(struct gendisk *disk)
 192 {
 193         return disk->queue->queuedata;
 194 }
 195
 196
 197 static const struct block_device_operations ida_fops  = {
 198         .owner          = THIS_MODULE,
 199         .open           = ida_open,
 200         .release        = ida_release,
 201         .ioctl          = ida_ioctl,
 202         .getgeo         = ida_getgeo,
 203         .revalidate_disk= ida_revalidate,
 204 };
 205
 206
 207 #ifdef CONFIG_PROC_FS
 208
 209 static struct proc_dir_entry *proc_array;
 210 static const struct file_operations ida_proc_fops;
 211
 212 /*
 213  * Get us a file in /proc/array that says something about each controller.
 214  * Create /proc/array if it doesn't exist yet.
 215  */
 216 static void __init ida_procinit(int i)
 217 {
 218         if (proc_array == NULL) {
 219                 proc_array = proc_mkdir("driver/cpqarray", NULL);
 220                 if (!proc_array) return;
 221         }
 222
 223         proc_create_data(hba[i]->devname, 0, proc_array, &ida_proc_fops, hba[i]);
 224 }
 225
 226 /*
 227  * Report information about this controller.
 228  */
 229 static int ida_proc_show(struct seq_file *m, void *v)
 230 {
 231         int i, ctlr;
 232         ctlr_info_t *h = (ctlr_info_t*)m->private;
 233         drv_info_t *drv;
 234 #ifdef CPQ_PROC_PRINT_QUEUES
 235         cmdlist_t *c;
 236         unsigned long flags;
 237 #endif
 238
 239         ctlr = h->ctlr;
 240         seq_printf(m, "%s:  Compaq %s Controller\n"
 241                 "       Board ID: 0x%08lx\n"
 242                 "       Firmware Revision: %c%c%c%c\n"
 243                 "       Controller Sig: 0x%08lx\n"
 244                 "       Memory Address: 0x%08lx\n"
 245                 "       I/O Port: 0x%04x\n"
 246                 "       IRQ: %d\n"
 247                 "       Logical drives: %d\n"
 248                 "       Physical drives: %d\n\n"
 249                 "       Current Q depth: %d\n"
 250                 "       Max Q depth since init: %d\n\n",
 251                 h->devname,
 252                 h->product_name,
 253                 (unsigned long)h->board_id,
 254                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 255                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 256                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 257                 h->log_drives, h->phys_drives,
 258                 h->Qdepth, h->maxQsinceinit);
 259
 260         seq_puts(m, "Logical Drive Info:\n");
 261
 262         for(i=0; i<h->log_drives; i++) {
 263                 drv = &h->drv[i];
 264                 seq_printf(m, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 265                                 ctlr, i, drv->blk_size, drv->nr_blks);
 266         }
 267
 268 #ifdef CPQ_PROC_PRINT_QUEUES
 269         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 270         seq_puts(m, "\nCurrent Queues:\n");
 271
 272         c = h->reqQ;
 273         seq_printf(m, "reqQ = %p", c);
 274         if (c) c=c->next;
 275         while(c && c != h->reqQ) {
 276                 seq_printf(m, "->%p", c);
 277                 c=c->next;
 278         }
 279
 280         c = h->cmpQ;
 281         seq_printf(m, "\ncmpQ = %p", c);
 282         if (c) c=c->next;
 283         while(c && c != h->cmpQ) {
 284                 seq_printf(m, "->%p", c);
 285                 c=c->next;
 286         }
 287
 288         seq_putc(m, '\n');
 289         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 290 #endif
 291         seq_printf(m, "nr_allocs = %d\nnr_frees = %d\n",
 292                         h->nr_allocs, h->nr_frees);
 293         return 0;
 294 }
 295
 296 static int ida_proc_open(struct inode *inode, struct file *file)
 297 {
 298         return single_open(file, ida_proc_show, PDE(inode)->data);
 299 }
 300
 301 static const struct file_operations ida_proc_fops = {
 302         .owner          = THIS_MODULE,
 303         .open           = ida_proc_open,
 304         .read           = seq_read,
 305         .llseek         = seq_lseek,
 306         .release        = single_release,
 307 };
 308 #endif /* CONFIG_PROC_FS */
 309
 310 module_param_array(eisa, int, NULL, 0);
 311
 312 static void release_io_mem(ctlr_info_t *c)
 313 {
 314         /* if IO mem was not protected do nothing */
 315         if( c->io_mem_addr == 0)
 316                 return;
 317         release_region(c->io_mem_addr, c->io_mem_length);
 318         c->io_mem_addr = 0;
 319         c->io_mem_length = 0;
 320 }
 321
 322 static void __devexit cpqarray_remove_one(int i)
 323 {
 324         int j;
 325         char buff[4];
 326
 327         /* sendcmd will turn off interrupt, and send the flush...
 328          * To write all data in the battery backed cache to disks
 329          * no data returned, but don't want to send NULL to sendcmd */
 330         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 331         {
 332                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 333                                 i);
 334         }
 335         free_irq(hba[i]->intr, hba[i]);
 336         iounmap(hba[i]->vaddr);
 337         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 338         del_timer(&hba[i]->timer);
 339         remove_proc_entry(hba[i]->devname, proc_array);
 340         pci_free_consistent(hba[i]->pci_dev,
 341                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 342                         hba[i]->cmd_pool_dhandle);
 343         kfree(hba[i]->cmd_pool_bits);
 344         for(j = 0; j < NWD; j++) {
 345                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 346                         del_gendisk(ida_gendisk[i][j]);
 347                 put_disk(ida_gendisk[i][j]);
 348         }
 349         blk_cleanup_queue(hba[i]->queue);
 350         release_io_mem(hba[i]);
 351         free_hba(i);
 352 }
 353
 354 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 355 {
 356         int i;
 357         ctlr_info_t *tmp_ptr;
 358
 359         if (pci_get_drvdata(pdev) == NULL) {
 360                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 361                 return;
 362         }
 363
 364         tmp_ptr = pci_get_drvdata(pdev);
 365         i = tmp_ptr->ctlr;
 366         if (hba[i] == NULL) {
 367                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 368                         "already been removed \n", i);
 369                 return;
 370         }
 371         pci_set_drvdata(pdev, NULL);
 372
 373         cpqarray_remove_one(i);
 374 }
 375
 376 /* removing an instance that was not removed automatically..
 377  * must be an eisa card.
 378  */
 379 static void __devexit cpqarray_remove_one_eisa (int i)
 380 {
 381         if (hba[i] == NULL) {
 382                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 383                         "already been removed \n", i);
 384                 return;
 385         }
 386         cpqarray_remove_one(i);
 387 }
 388
 389 /* pdev is NULL for eisa */
 390 static int __devinit cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 391 {
 392         struct request_queue *q;
 393         int j;
 394
 395         /*
 396          * register block devices
 397          * Find disks and fill in structs
 398          * Get an interrupt, set the Q depth and get into /proc
 399          */
 400
 401         /* If this successful it should insure that we are the only */
 402         /* instance of the driver */
 403         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 404                 goto Enomem4;
 405         }
 406         hba[i]->access.set_intr_mask(hba[i], 0);
 407         if (request_irq(hba[i]->intr, do_ida_intr,
 408                 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
 409         {
 410                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 411                                 hba[i]->intr, hba[i]->devname);
 412                 goto Enomem3;
 413         }
 414
 415         for (j=0; j<NWD; j++) {
 416                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 417                 if (!ida_gendisk[i][j])
 418                         goto Enomem2;
 419         }
 420
 421         hba[i]->cmd_pool = pci_alloc_consistent(
 422                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 423                 &(hba[i]->cmd_pool_dhandle));
 424         hba[i]->cmd_pool_bits = kcalloc(
 425                 DIV_ROUND_UP(NR_CMDS, BITS_PER_LONG), sizeof(unsigned long),
 426                 GFP_KERNEL);
 427
 428         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 429                         goto Enomem1;
 430
 431         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 432         printk(KERN_INFO "cpqarray: Finding drives on %s",
 433                 hba[i]->devname);
 434
 435         spin_lock_init(&hba[i]->lock);
 436         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 437         if (!q)
 438                 goto Enomem1;
 439
 440         hba[i]->queue = q;
 441         q->queuedata = hba[i];
 442
 443         getgeometry(i);
 444         start_fwbk(i);
 445
 446         ida_procinit(i);
 447
 448         if (pdev)
 449                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 450
 451         /* This is a hardware imposed limit. */
 452         blk_queue_max_segments(q, SG_MAX);
 453
 454         init_timer(&hba[i]->timer);
 455         hba[i]->timer.expires = jiffies + IDA_TIMER;
 456         hba[i]->timer.data = (unsigned long)hba[i];
 457         hba[i]->timer.function = ida_timer;
 458         add_timer(&hba[i]->timer);
 459
 460         /* Enable IRQ now that spinlock and rate limit timer are set up */
 461         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 462
 463         for(j=0; j<NWD; j++) {
 464                 struct gendisk *disk = ida_gendisk[i][j];
 465                 drv_info_t *drv = &hba[i]->drv[j];
 466                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 467                 disk->major = COMPAQ_SMART2_MAJOR + i;
 468                 disk->first_minor = j<<NWD_SHIFT;
 469                 disk->fops = &ida_fops;
 470                 if (j && !drv->nr_blks)
 471                         continue;
 472                 blk_queue_logical_block_size(hba[i]->queue, drv->blk_size);
 473                 set_capacity(disk, drv->nr_blks);
 474                 disk->queue = hba[i]->queue;
 475                 disk->private_data = drv;
 476                 add_disk(disk);
 477         }
 478
 479         /* done ! */
 480         return(i);
 481
 482 Enomem1:
 483         nr_ctlr = i;
 484         kfree(hba[i]->cmd_pool_bits);
 485         if (hba[i]->cmd_pool)
 486                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 487                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 488 Enomem2:
 489         while (j--) {
 490                 put_disk(ida_gendisk[i][j]);
 491                 ida_gendisk[i][j] = NULL;
 492         }
 493         free_irq(hba[i]->intr, hba[i]);
 494 Enomem3:
 495         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 496 Enomem4:
 497         if (pdev)
 498                 pci_set_drvdata(pdev, NULL);
 499         release_io_mem(hba[i]);
 500         free_hba(i);
 501
 502         printk( KERN_ERR "cpqarray: out of memory");
 503
 504         return -1;
 505 }
 506
 507 static int __devinit cpqarray_init_one( struct pci_dev *pdev,
 508         const struct pci_device_id *ent)
 509 {
 510         int i;
 511
 512         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 513                         " bus %d dev %d func %d\n",
 514                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 515                         PCI_FUNC(pdev->devfn));
 516         i = alloc_cpqarray_hba();
 517         if( i < 0 )
 518                 return (-1);
 519         memset(hba[i], 0, sizeof(ctlr_info_t));
 520         sprintf(hba[i]->devname, "ida%d", i);
 521         hba[i]->ctlr = i;
 522         /* Initialize the pdev driver private data */
 523         pci_set_drvdata(pdev, hba[i]);
 524
 525         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 526                 pci_set_drvdata(pdev, NULL);
 527                 release_io_mem(hba[i]);
 528                 free_hba(i);
 529                 return -1;
 530         }
 531
 532         return (cpqarray_register_ctlr(i, pdev));
 533 }
 534
 535 static struct pci_driver cpqarray_pci_driver = {
 536         .name = "cpqarray",
 537         .probe = cpqarray_init_one,
 538         .remove = __devexit_p(cpqarray_remove_one_pci),
 539         .id_table = cpqarray_pci_device_id,
 540 };
 541
 542 /*
 543  *  This is it.  Find all the controllers and register them.
 544  *  returns the number of block devices registered.
 545  */
 546 static int __init cpqarray_init(void)
 547 {
 548         int num_cntlrs_reg = 0;
 549         int i;
 550         int rc = 0;
 551
 552         /* detect controllers */
 553         printk(DRIVER_NAME "\n");
 554
 555         rc = pci_register_driver(&cpqarray_pci_driver);
 556         if (rc)
 557                 return rc;
 558         cpqarray_eisa_detect();
 559
 560         for (i=0; i < MAX_CTLR; i++) {
 561                 if (hba[i] != NULL)
 562                         num_cntlrs_reg++;
 563         }
 564
 565         if (num_cntlrs_reg)
 566                 return 0;
 567         else {
 568                 pci_unregister_driver(&cpqarray_pci_driver);
 569                 return -ENODEV;
 570         }
 571 }
 572
 573 /* Function to find the first free pointer into our hba[] array */
 574 /* Returns -1 if no free entries are left.  */
 575 static int alloc_cpqarray_hba(void)
 576 {
 577         int i;
 578
 579         for(i=0; i< MAX_CTLR; i++) {
 580                 if (hba[i] == NULL) {
 581                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 582                         if(hba[i]==NULL) {
 583                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 584                                 return (-1);
 585                         }
 586                         return (i);
 587                 }
 588         }
 589         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 590                 " of 8 controllers.\n");
 591         return(-1);
 592 }
 593
 594 static void free_hba(int i)
 595 {
 596         kfree(hba[i]);
 597         hba[i]=NULL;
 598 }
 599
 600 /*
 601  * Find the IO address of the controller, its IRQ and so forth.  Fill
 602  * in some basic stuff into the ctlr_info_t structure.
 603  */
 604 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 605 {
 606         ushort vendor_id, device_id, command;
 607         unchar cache_line_size, latency_timer;
 608         unchar irq, revision;
 609         unsigned long addr[6];
 610         __u32 board_id;
 611
 612         int i;
 613
 614         c->pci_dev = pdev;
 615         pci_set_master(pdev);
 616         if (pci_enable_device(pdev)) {
 617                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 618                 return -1;
 619         }
 620         vendor_id = pdev->vendor;
 621         device_id = pdev->device;
 622         irq = pdev->irq;
 623
 624         for(i=0; i<6; i++)
 625                 addr[i] = pci_resource_start(pdev, i);
 626
 627         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 628         {
 629                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 630                 return -1;
 631         }
 632
 633         pci_read_config_word(pdev, PCI_COMMAND, &command);
 634         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 635         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 636         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 637
 638         pci_read_config_dword(pdev, 0x2c, &board_id);
 639
 640         /* check to see if controller has been disabled */
 641         if(!(command & 0x02)) {
 642                 printk(KERN_WARNING
 643                         "cpqarray: controller appears to be disabled\n");
 644                 return(-1);
 645         }
 646
 647 DBGINFO(
 648         printk("vendor_id = %x\n", vendor_id);
 649         printk("device_id = %x\n", device_id);
 650         printk("command = %x\n", command);
 651         for(i=0; i<6; i++)
 652                 printk("addr[%d] = %lx\n", i, addr[i]);
 653         printk("revision = %x\n", revision);
 654         printk("irq = %x\n", irq);
 655         printk("cache_line_size = %x\n", cache_line_size);
 656         printk("latency_timer = %x\n", latency_timer);
 657         printk("board_id = %x\n", board_id);
 658 );
 659
 660         c->intr = irq;
 661
 662         for(i=0; i<6; i++) {
 663                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 664                 { /* IO space */
 665                         c->io_mem_addr = addr[i];
 666                         c->io_mem_length = pci_resource_end(pdev, i)
 667                                 - pci_resource_start(pdev, i) + 1;
 668                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 669                                 "cpqarray"))
 670                         {
 671                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 672                                 c->io_mem_addr = 0;
 673                                 c->io_mem_length = 0;
 674                         }
 675                         break;
 676                 }
 677         }
 678
 679         c->paddr = 0;
 680         for(i=0; i<6; i++)
 681                 if (!(pci_resource_flags(pdev, i) &
 682                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 683                         c->paddr = pci_resource_start (pdev, i);
 684                         break;
 685                 }
 686         if (!c->paddr)
 687                 return -1;
 688         c->vaddr = remap_pci_mem(c->paddr, 128);
 689         if (!c->vaddr)
 690                 return -1;
 691         c->board_id = board_id;
 692
 693         for(i=0; i<NR_PRODUCTS; i++) {
 694                 if (board_id == products[i].board_id) {
 695                         c->product_name = products[i].product_name;
 696                         c->access = *(products[i].access);
 697                         break;
 698                 }
 699         }
 700         if (i == NR_PRODUCTS) {
 701                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 702                         " to access the SMART Array controller %08lx\n",
 703                                 (unsigned long)board_id);
 704                 return -1;
 705         }
 706
 707         return 0;
 708 }
 709
 710 /*
 711  * Map (physical) PCI mem into (virtual) kernel space
 712  */
 713 static void __iomem *remap_pci_mem(ulong base, ulong size)
 714 {
 715         ulong page_base        = ((ulong) base) & PAGE_MASK;
 716         ulong page_offs        = ((ulong) base) - page_base;
 717         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 718
 719         return (page_remapped ? (page_remapped + page_offs) : NULL);
 720 }
 721
 722 #ifndef MODULE
 723 /*
 724  * Config string is a comma separated set of i/o addresses of EISA cards.
 725  */
 726 static int cpqarray_setup(char *str)
 727 {
 728         int i, ints[9];
 729
 730         (void)get_options(str, ARRAY_SIZE(ints), ints);
 731
 732         for(i=0; i<ints[0] && i<8; i++)
 733                 eisa[i] = ints[i+1];
 734         return 1;
 735 }
 736
 737 __setup("smart2=", cpqarray_setup);
 738
 739 #endif
 740
 741 /*
 742  * Find an EISA controller's signature.  Set up an hba if we find it.
 743  */
 744 static int __devinit cpqarray_eisa_detect(void)
 745 {
 746         int i=0, j;
 747         __u32 board_id;
 748         int intr;
 749         int ctlr;
 750         int num_ctlr = 0;
 751
 752         while(i<8 && eisa[i]) {
 753                 ctlr = alloc_cpqarray_hba();
 754                 if(ctlr == -1)
 755                         break;
 756                 board_id = inl(eisa[i]+0xC80);
 757                 for(j=0; j < NR_PRODUCTS; j++)
 758                         if (board_id == products[j].board_id)
 759                                 break;
 760
 761                 if (j == NR_PRODUCTS) {
 762                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 763                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 764                         continue;
 765                 }
 766
 767                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 768                 hba[ctlr]->io_mem_addr = eisa[i];
 769                 hba[ctlr]->io_mem_length = 0x7FF;
 770                 if(!request_region(hba[ctlr]->io_mem_addr,
 771                                 hba[ctlr]->io_mem_length,
 772                                 "cpqarray"))
 773                 {
 774                         printk(KERN_WARNING "cpqarray: I/O range already in "
 775                                         "use addr = %lx length = %ld\n",
 776                                         hba[ctlr]->io_mem_addr,
 777                                         hba[ctlr]->io_mem_length);
 778                         free_hba(ctlr);
 779                         continue;
 780                 }
 781
 782                 /*
 783                  * Read the config register to find our interrupt
 784                  */
 785                 intr = inb(eisa[i]+0xCC0) >> 4;
 786                 if (intr & 1) intr = 11;
 787                 else if (intr & 2) intr = 10;
 788                 else if (intr & 4) intr = 14;
 789                 else if (intr & 8) intr = 15;
 790
 791                 hba[ctlr]->intr = intr;
 792                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 793                 hba[ctlr]->product_name = products[j].product_name;
 794                 hba[ctlr]->access = *(products[j].access);
 795                 hba[ctlr]->ctlr = ctlr;
 796                 hba[ctlr]->board_id = board_id;
 797                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 798
 799 DBGINFO(
 800         printk("i = %d, j = %d\n", i, j);
 801         printk("irq = %x\n", intr);
 802         printk("product name = %s\n", products[j].product_name);
 803         printk("board_id = %x\n", board_id);
 804 );
 805
 806                 num_ctlr++;
 807                 i++;
 808
 809                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 810                         printk(KERN_WARNING
 811                                 "cpqarray: Can't register EISA controller %d\n",
 812                                 ctlr);
 813
 814         }
 815
 816         return num_ctlr;
 817 }
 818
 819 /*
 820  * Open.  Make sure the device is really there.
 821  */
 822 static int ida_open(struct block_device *bdev, fmode_t mode)
 823 {
 824         drv_info_t *drv = get_drv(bdev->bd_disk);
 825         ctlr_info_t *host = get_host(bdev->bd_disk);
 826
 827         DBGINFO(printk("ida_open %s\n", bdev->bd_disk->disk_name));
 828         /*
 829          * Root is allowed to open raw volume zero even if it's not configured
 830          * so array config can still work.  I don't think I really like this,
 831          * but I'm already using way to many device nodes to claim another one
 832          * for "raw controller".
 833          */
 834         if (!drv->nr_blks) {
 835                 if (!capable(CAP_SYS_RAWIO))
 836                         return -ENXIO;
 837                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 838                         return -ENXIO;
 839         }
 840         host->usage_count++;
 841         return 0;
 842 }
 843
 844 /*
 845  * Close.  Sync first.
 846  */
 847 static int ida_release(struct gendisk *disk, fmode_t mode)
 848 {
 849         ctlr_info_t *host = get_host(disk);
 850         host->usage_count--;
 851         return 0;
 852 }
 853
 854 /*
 855  * Enqueuing and dequeuing functions for cmdlists.
 856  */
 857 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 858 {
 859         if (*Qptr == NULL) {
 860                 *Qptr = c;
 861                 c->next = c->prev = c;
 862         } else {
 863                 c->prev = (*Qptr)->prev;
 864                 c->next = (*Qptr);
 865                 (*Qptr)->prev->next = c;
 866                 (*Qptr)->prev = c;
 867         }
 868 }
 869
 870 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 871 {
 872         if (c && c->next != c) {
 873                 if (*Qptr == c) *Qptr = c->next;
 874                 c->prev->next = c->next;
 875                 c->next->prev = c->prev;
 876         } else {
 877                 *Qptr = NULL;
 878         }
 879         return c;
 880 }
 881
 882 /*
 883  * Get a request and submit it to the controller.
 884  * This routine needs to grab all the requests it possibly can from the
 885  * req Q and submit them.  Interrupts are off (and need to be off) when you
 886  * are in here (either via the dummy do_ida_request functions or by being
 887  * called from the interrupt handler
 888  */
 889 static void do_ida_request(struct request_queue *q)
 890 {
 891         ctlr_info_t *h = q->queuedata;
 892         cmdlist_t *c;
 893         struct request *creq;
 894         struct scatterlist tmp_sg[SG_MAX];
 895         int i, dir, seg;
 896
 897         if (blk_queue_plugged(q))
 898                 goto startio;
 899
 900 queue_next:
 901         creq = blk_peek_request(q);
 902         if (!creq)
 903                 goto startio;
 904
 905         BUG_ON(creq->nr_phys_segments > SG_MAX);
 906
 907         if ((c = cmd_alloc(h,1)) == NULL)
 908                 goto startio;
 909
 910         blk_start_request(creq);
 911
 912         c->ctlr = h->ctlr;
 913         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 914         c->hdr.size = sizeof(rblk_t) >> 2;
 915         c->size += sizeof(rblk_t);
 916
 917         c->req.hdr.blk = blk_rq_pos(creq);
 918         c->rq = creq;
 919 DBGPX(
 920         printk("sector=%d, nr_sectors=%u\n",
 921                blk_rq_pos(creq), blk_rq_sectors(creq));
 922 );
 923         sg_init_table(tmp_sg, SG_MAX);
 924         seg = blk_rq_map_sg(q, creq, tmp_sg);
 925
 926         /* Now do all the DMA Mappings */
 927         if (rq_data_dir(creq) == READ)
 928                 dir = PCI_DMA_FROMDEVICE;
 929         else
 930                 dir = PCI_DMA_TODEVICE;
 931         for( i=0; i < seg; i++)
 932         {
 933                 c->req.sg[i].size = tmp_sg[i].length;
 934                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 935                                                  sg_page(&tmp_sg[i]),
 936                                                  tmp_sg[i].offset,
 937                                                  tmp_sg[i].length, dir);
 938         }
 939 DBGPX(  printk("Submitting %u sectors in %d segments\n", blk_rq_sectors(creq), seg); );
 940         c->req.hdr.sg_cnt = seg;
 941         c->req.hdr.blk_cnt = blk_rq_sectors(creq);
 942         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 943         c->type = CMD_RWREQ;
 944
 945         /* Put the request on the tail of the request queue */
 946         addQ(&h->reqQ, c);
 947         h->Qdepth++;
 948         if (h->Qdepth > h->maxQsinceinit)
 949                 h->maxQsinceinit = h->Qdepth;
 950
 951         goto queue_next;
 952
 953 startio:
 954         start_io(h);
 955 }
 956
 957 /*
 958  * start_io submits everything on a controller's request queue
 959  * and moves it to the completion queue.
 960  *
 961  * Interrupts had better be off if you're in here
 962  */
 963 static void start_io(ctlr_info_t *h)
 964 {
 965         cmdlist_t *c;
 966
 967         while((c = h->reqQ) != NULL) {
 968                 /* Can't do anything if we're busy */
 969                 if (h->access.fifo_full(h) == 0)
 970                         return;
 971
 972                 /* Get the first entry from the request Q */
 973                 removeQ(&h->reqQ, c);
 974                 h->Qdepth--;
 975
 976                 /* Tell the controller to do our bidding */
 977                 h->access.submit_command(h, c);
 978
 979                 /* Get onto the completion Q */
 980                 addQ(&h->cmpQ, c);
 981         }
 982 }
 983
 984 /*
 985  * Mark all buffers that cmd was responsible for
 986  */
 987 static inline void complete_command(cmdlist_t *cmd, int timeout)
 988 {
 989         struct request *rq = cmd->rq;
 990         int error = 0;
 991         int i, ddir;
 992
 993         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
 994            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
 995                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
 996                                 cmd->ctlr, cmd->hdr.unit);
 997                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
 998         }
 999         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1000                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1001                                 cmd->ctlr, cmd->hdr.unit);
1002                 error = -EIO;
1003         }
1004         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1005                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1006                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1007                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1008                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1009                 error = -EIO;
1010         }
1011         if (timeout)
1012                 error = -EIO;
1013         /* unmap the DMA mapping for all the scatter gather elements */
1014         if (cmd->req.hdr.cmd == IDA_READ)
1015                 ddir = PCI_DMA_FROMDEVICE;
1016         else
1017                 ddir = PCI_DMA_TODEVICE;
1018         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1019                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1020                                 cmd->req.sg[i].size, ddir);
1021
1022         DBGPX(printk("Done with %p\n", rq););
1023         __blk_end_request_all(rq, error);
1024 }
1025
1026 /*
1027  *  The controller will interrupt us upon completion of commands.
1028  *  Find the command on the completion queue, remove it, tell the OS and
1029  *  try to queue up more IO
1030  */
1031 static irqreturn_t do_ida_intr(int irq, void *dev_id)
1032 {
1033         ctlr_info_t *h = dev_id;
1034         cmdlist_t *c;
1035         unsigned long istat;
1036         unsigned long flags;
1037         __u32 a,a1;
1038
1039         istat = h->access.intr_pending(h);
1040         /* Is this interrupt for us? */
1041         if (istat == 0)
1042                 return IRQ_NONE;
1043
1044         /*
1045          * If there are completed commands in the completion queue,
1046          * we had better do something about it.
1047          */
1048         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1049         if (istat & FIFO_NOT_EMPTY) {
1050                 while((a = h->access.command_completed(h))) {
1051                         a1 = a; a &= ~3;
1052                         if ((c = h->cmpQ) == NULL)
1053                         {
1054                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1055                                 continue;
1056                         }
1057                         while(c->busaddr != a) {
1058                                 c = c->next;
1059                                 if (c == h->cmpQ)
1060                                         break;
1061                         }
1062                         /*
1063                          * If we've found the command, take it off the
1064                          * completion Q and free it
1065                          */
1066                         if (c->busaddr == a) {
1067                                 removeQ(&h->cmpQ, c);
1068                                 /*  Check for invalid command.
1069                                  *  Controller returns command error,
1070                                  *  But rcode = 0.
1071                                  */
1072
1073                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1074                                 {
1075                                         c->req.hdr.rcode = RCODE_INVREQ;
1076                                 }
1077                                 if (c->type == CMD_RWREQ) {
1078                                         complete_command(c, 0);
1079                                         cmd_free(h, c, 1);
1080                                 } else if (c->type == CMD_IOCTL_PEND) {
1081                                         c->type = CMD_IOCTL_DONE;
1082                                 }
1083                                 continue;
1084                         }
1085                 }
1086         }
1087
1088         /*
1089          * See if we can queue up some more IO
1090          */
1091         do_ida_request(h->queue);
1092         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1093         return IRQ_HANDLED;
1094 }
1095
1096 /*
1097  * This timer was for timing out requests that haven't happened after
1098  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1099  * reset a flags structure so we don't flood the user with
1100  * "Non-Fatal error" messages.
1101  */
1102 static void ida_timer(unsigned long tdata)
1103 {
1104         ctlr_info_t *h = (ctlr_info_t*)tdata;
1105
1106         h->timer.expires = jiffies + IDA_TIMER;
1107         add_timer(&h->timer);
1108         h->misc_tflags = 0;
1109 }
1110
1111 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1112 {
1113         drv_info_t *drv = get_drv(bdev->bd_disk);
1114
1115         if (drv->cylinders) {
1116                 geo->heads = drv->heads;
1117                 geo->sectors = drv->sectors;
1118                 geo->cylinders = drv->cylinders;
1119         } else {
1120                 geo->heads = 0xff;
1121                 geo->sectors = 0x3f;
1122                 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1123         }
1124
1125         return 0;
1126 }
1127
1128 /*
1129  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1130  *  setting readahead and submitting commands from userspace to the controller.
1131  */
1132 static int ida_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg)
1133 {
1134         drv_info_t *drv = get_drv(bdev->bd_disk);
1135         ctlr_info_t *host = get_host(bdev->bd_disk);
1136         int error;
1137         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1138         ida_ioctl_t *my_io;
1139
1140         switch(cmd) {
1141         case IDAGETDRVINFO:
1142                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1143                         return -EFAULT;
1144                 return 0;
1145         case IDAPASSTHRU:
1146                 if (!capable(CAP_SYS_RAWIO))
1147                         return -EPERM;
1148                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1149                 if (!my_io)
1150                         return -ENOMEM;
1151                 error = -EFAULT;
1152                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1153                         goto out_passthru;
1154                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1155                 if (error)
1156                         goto out_passthru;
1157                 error = -EFAULT;
1158                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1159                         goto out_passthru;
1160                 error = 0;
1161 out_passthru:
1162                 kfree(my_io);
1163                 return error;
1164         case IDAGETCTLRSIG:
1165                 if (!arg) return -EINVAL;
1166                 put_user(host->ctlr_sig, (int __user *)arg);
1167                 return 0;
1168         case IDAREVALIDATEVOLS:
1169                 if (MINOR(bdev->bd_dev) != 0)
1170                         return -ENXIO;
1171                 return revalidate_allvol(host);
1172         case IDADRIVERVERSION:
1173                 if (!arg) return -EINVAL;
1174                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1175                 return 0;
1176         case IDAGETPCIINFO:
1177         {
1178
1179                 ida_pci_info_struct pciinfo;
1180
1181                 if (!arg) return -EINVAL;
1182                 pciinfo.bus = host->pci_dev->bus->number;
1183                 pciinfo.dev_fn = host->pci_dev->devfn;
1184                 pciinfo.board_id = host->board_id;
1185                 if(copy_to_user((void __user *) arg, &pciinfo,
1186                         sizeof( ida_pci_info_struct)))
1187                                 return -EFAULT;
1188                 return(0);
1189         }
1190
1191         default:
1192                 return -EINVAL;
1193         }
1194
1195 }
1196
1197 static int ida_ioctl(struct block_device *bdev, fmode_t mode,
1198                              unsigned int cmd, unsigned long param)
1199 {
1200         int ret;
1201
1202         lock_kernel();
1203         ret = ida_locked_ioctl(bdev, mode, cmd, param);
1204         unlock_kernel();
1205
1206         return ret;
1207 }
1208
1209 /*
1210  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1211  * The command block (io) has already been copied to kernel space for us,
1212  * however, any elements in the sglist need to be copied to kernel space
1213  * or copied back to userspace.
1214  *
1215  * Only root may perform a controller passthru command, however I'm not doing
1216  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1217  * putting a 64M buffer in the sglist is probably a *bad* idea.
1218  */
1219 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1220 {
1221         int ctlr = h->ctlr;
1222         cmdlist_t *c;
1223         void *p = NULL;
1224         unsigned long flags;
1225         int error;
1226
1227         if ((c = cmd_alloc(h, 0)) == NULL)
1228                 return -ENOMEM;
1229         c->ctlr = ctlr;
1230         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1231         c->hdr.size = sizeof(rblk_t) >> 2;
1232         c->size += sizeof(rblk_t);
1233
1234         c->req.hdr.cmd = io->cmd;
1235         c->req.hdr.blk = io->blk;
1236         c->req.hdr.blk_cnt = io->blk_cnt;
1237         c->type = CMD_IOCTL_PEND;
1238
1239         /* Pre submit processing */
1240         switch(io->cmd) {
1241         case PASSTHRU_A:
1242                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1243                 if (!p)
1244                 {
1245                         error = -ENOMEM;
1246                         cmd_free(h, c, 0);
1247                         return(error);
1248                 }
1249                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1250                         kfree(p);
1251                         cmd_free(h, c, 0);
1252                         return -EFAULT;
1253                 }
1254                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1255                                 sizeof(ida_ioctl_t),
1256                                 PCI_DMA_BIDIRECTIONAL);
1257                 c->req.sg[0].size = io->sg[0].size;
1258                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1259                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1260                 c->req.hdr.sg_cnt = 1;
1261                 break;
1262         case IDA_READ:
1263         case READ_FLASH_ROM:
1264         case SENSE_CONTROLLER_PERFORMANCE:
1265                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1266                 if (!p)
1267                 {
1268                         error = -ENOMEM;
1269                         cmd_free(h, c, 0);
1270                         return(error);
1271                 }
1272
1273                 c->req.sg[0].size = io->sg[0].size;
1274                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1275                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1276                 c->req.hdr.sg_cnt = 1;
1277                 break;
1278         case IDA_WRITE:
1279         case IDA_WRITE_MEDIA:
1280         case DIAG_PASS_THRU:
1281         case COLLECT_BUFFER:
1282         case WRITE_FLASH_ROM:
1283                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1284                 if (!p)
1285                 {
1286                         error = -ENOMEM;
1287                         cmd_free(h, c, 0);
1288                         return(error);
1289                 }
1290                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1291                         kfree(p);
1292                         cmd_free(h, c, 0);
1293                         return -EFAULT;
1294                 }
1295                 c->req.sg[0].size = io->sg[0].size;
1296                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1297                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1298                 c->req.hdr.sg_cnt = 1;
1299                 break;
1300         default:
1301                 c->req.sg[0].size = sizeof(io->c);
1302                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1303                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1304                 c->req.hdr.sg_cnt = 1;
1305         }
1306
1307         /* Put the request on the tail of the request queue */
1308         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1309         addQ(&h->reqQ, c);
1310         h->Qdepth++;
1311         start_io(h);
1312         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1313
1314         /* Wait for completion */
1315         while(c->type != CMD_IOCTL_DONE)
1316                 schedule();
1317
1318         /* Unmap the DMA  */
1319         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1320                 PCI_DMA_BIDIRECTIONAL);
1321         /* Post submit processing */
1322         switch(io->cmd) {
1323         case PASSTHRU_A:
1324                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1325                                 sizeof(ida_ioctl_t),
1326                                 PCI_DMA_BIDIRECTIONAL);
1327         case IDA_READ:
1328         case DIAG_PASS_THRU:
1329         case SENSE_CONTROLLER_PERFORMANCE:
1330         case READ_FLASH_ROM:
1331                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1332                         kfree(p);
1333                         return -EFAULT;
1334                 }
1335                 /* fall through and free p */
1336         case IDA_WRITE:
1337         case IDA_WRITE_MEDIA:
1338         case COLLECT_BUFFER:
1339         case WRITE_FLASH_ROM:
1340                 kfree(p);
1341                 break;
1342         default:;
1343                 /* Nothing to do */
1344         }
1345
1346         io->rcode = c->req.hdr.rcode;
1347         cmd_free(h, c, 0);
1348         return(0);
1349 }
1350
1351 /*
1352  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1353  * scheme to suballocte them to the driver.  Operations that are not time
1354  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1355  * as the first argument to get a new command.
1356  */
1357 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1358 {
1359         cmdlist_t * c;
1360         int i;
1361         dma_addr_t cmd_dhandle;
1362
1363         if (!get_from_pool) {
1364                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1365                         sizeof(cmdlist_t), &cmd_dhandle);
1366                 if(c==NULL)
1367                         return NULL;
1368         } else {
1369                 do {
1370                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1371                         if (i == NR_CMDS)
1372                                 return NULL;
1373                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1374                 c = h->cmd_pool + i;
1375                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1376                 h->nr_allocs++;
1377         }
1378
1379         memset(c, 0, sizeof(cmdlist_t));
1380         c->busaddr = cmd_dhandle;
1381         return c;
1382 }
1383
1384 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1385 {
1386         int i;
1387
1388         if (!got_from_pool) {
1389                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1390                         c->busaddr);
1391         } else {
1392                 i = c - h->cmd_pool;
1393                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1394                 h->nr_frees++;
1395         }
1396 }
1397
1398 /***********************************************************************
1399     name:        sendcmd
1400     Send a command to an IDA using the memory mapped FIFO interface
1401     and wait for it to complete.
1402     This routine should only be called at init time.
1403 ***********************************************************************/
1404 static int sendcmd(
1405         __u8    cmd,
1406         int     ctlr,
1407         void    *buff,
1408         size_t  size,
1409         unsigned int blk,
1410         unsigned int blkcnt,
1411         unsigned int log_unit )
1412 {
1413         cmdlist_t *c;
1414         int complete;
1415         unsigned long temp;
1416         unsigned long i;
1417         ctlr_info_t *info_p = hba[ctlr];
1418
1419         c = cmd_alloc(info_p, 1);
1420         if(!c)
1421                 return IO_ERROR;
1422         c->ctlr = ctlr;
1423         c->hdr.unit = log_unit;
1424         c->hdr.prio = 0;
1425         c->hdr.size = sizeof(rblk_t) >> 2;
1426         c->size += sizeof(rblk_t);
1427
1428         /* The request information. */
1429         c->req.hdr.next = 0;
1430         c->req.hdr.rcode = 0;
1431         c->req.bp = 0;
1432         c->req.hdr.sg_cnt = 1;
1433         c->req.hdr.reserved = 0;
1434
1435         if (size == 0)
1436                 c->req.sg[0].size = 512;
1437         else
1438                 c->req.sg[0].size = size;
1439
1440         c->req.hdr.blk = blk;
1441         c->req.hdr.blk_cnt = blkcnt;
1442         c->req.hdr.cmd = (unsigned char) cmd;
1443         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1444                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1445         /*
1446          * Disable interrupt
1447          */
1448         info_p->access.set_intr_mask(info_p, 0);
1449         /* Make sure there is room in the command FIFO */
1450         /* Actually it should be completely empty at this time. */
1451         for (i = 200000; i > 0; i--) {
1452                 temp = info_p->access.fifo_full(info_p);
1453                 if (temp != 0) {
1454                         break;
1455                 }
1456                 udelay(10);
1457 DBG(
1458                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1459                         " waiting!\n", ctlr);
1460 );
1461         }
1462         /*
1463          * Send the cmd
1464          */
1465         info_p->access.submit_command(info_p, c);
1466         complete = pollcomplete(ctlr);
1467
1468         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1469                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1470         if (complete != 1) {
1471                 if (complete != c->busaddr) {
1472                         printk( KERN_WARNING
1473                         "cpqarray ida%d: idaSendPciCmd "
1474                       "Invalid command list address returned! (%08lx)\n",
1475                                 ctlr, (unsigned long)complete);
1476                         cmd_free(info_p, c, 1);
1477                         return (IO_ERROR);
1478                 }
1479         } else {
1480                 printk( KERN_WARNING
1481                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1482                         "No command list address returned!\n",
1483                         ctlr);
1484                 cmd_free(info_p, c, 1);
1485                 return (IO_ERROR);
1486         }
1487
1488         if (c->req.hdr.rcode & 0x00FE) {
1489                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1490                         printk( KERN_WARNING
1491                         "cpqarray ida%d: idaSendPciCmd, error: "
1492                                 "Controller failed at init time "
1493                                 "cmd: 0x%x, return code = 0x%x\n",
1494                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1495
1496                         cmd_free(info_p, c, 1);
1497                         return (IO_ERROR);
1498                 }
1499         }
1500         cmd_free(info_p, c, 1);
1501         return (IO_OK);
1502 }
1503
1504 /*
1505  * revalidate_allvol is for online array config utilities.  After a
1506  * utility reconfigures the drives in the array, it can use this function
1507  * (through an ioctl) to make the driver zap any previous disk structs for
1508  * that controller and get new ones.
1509  *
1510  * Right now I'm using the getgeometry() function to do this, but this
1511  * function should probably be finer grained and allow you to revalidate one
1512  * particualar logical volume (instead of all of them on a particular
1513  * controller).
1514  */
1515 static int revalidate_allvol(ctlr_info_t *host)
1516 {
1517         int ctlr = host->ctlr;
1518         int i;
1519         unsigned long flags;
1520
1521         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1522         if (host->usage_count > 1) {
1523                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1524                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1525                         " revalidation (usage=%d)\n", host->usage_count);
1526                 return -EBUSY;
1527         }
1528         host->usage_count++;
1529         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1530
1531         /*
1532          * Set the partition and block size structures for all volumes
1533          * on this controller to zero.  We will reread all of this data
1534          */
1535         set_capacity(ida_gendisk[ctlr][0], 0);
1536         for (i = 1; i < NWD; i++) {
1537                 struct gendisk *disk = ida_gendisk[ctlr][i];
1538                 if (disk->flags & GENHD_FL_UP)
1539                         del_gendisk(disk);
1540         }
1541         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1542
1543         /*
1544          * Tell the array controller not to give us any interrupts while
1545          * we check the new geometry.  Then turn interrupts back on when
1546          * we're done.
1547          */
1548         host->access.set_intr_mask(host, 0);
1549         getgeometry(ctlr);
1550         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1551
1552         for(i=0; i<NWD; i++) {
1553                 struct gendisk *disk = ida_gendisk[ctlr][i];
1554                 drv_info_t *drv = &host->drv[i];
1555                 if (i && !drv->nr_blks)
1556                         continue;
1557                 blk_queue_logical_block_size(host->queue, drv->blk_size);
1558                 set_capacity(disk, drv->nr_blks);
1559                 disk->queue = host->queue;
1560                 disk->private_data = drv;
1561                 if (i)
1562                         add_disk(disk);
1563         }
1564
1565         host->usage_count--;
1566         return 0;
1567 }
1568
1569 static int ida_revalidate(struct gendisk *disk)
1570 {
1571         drv_info_t *drv = disk->private_data;
1572         set_capacity(disk, drv->nr_blks);
1573         return 0;
1574 }
1575
1576 /********************************************************************
1577     name: pollcomplete
1578     Wait polling for a command to complete.
1579     The memory mapped FIFO is polled for the completion.
1580     Used only at init time, interrupts disabled.
1581  ********************************************************************/
1582 static int pollcomplete(int ctlr)
1583 {
1584         int done;
1585         int i;
1586
1587         /* Wait (up to 2 seconds) for a command to complete */
1588
1589         for (i = 200000; i > 0; i--) {
1590                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1591                 if (done == 0) {
1592                         udelay(10);     /* a short fixed delay */
1593                 } else
1594                         return (done);
1595         }
1596         /* Invalid address to tell caller we ran out of time */
1597         return 1;
1598 }
1599 /*****************************************************************
1600     start_fwbk
1601     Starts controller firmwares background processing.
1602     Currently only the Integrated Raid controller needs this done.
1603     If the PCI mem address registers are written to after this,
1604          data corruption may occur
1605 *****************************************************************/
1606 static void start_fwbk(int ctlr)
1607 {
1608                 id_ctlr_t *id_ctlr_buf;
1609         int ret_code;
1610
1611         if(     (hba[ctlr]->board_id != 0x40400E11)
1612                 && (hba[ctlr]->board_id != 0x40480E11) )
1613
1614         /* Not a Integrated Raid, so there is nothing for us to do */
1615                 return;
1616         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1617                 " processing\n");
1618         /* Command does not return anything, but idasend command needs a
1619                 buffer */
1620         id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1621         if(id_ctlr_buf==NULL)
1622         {
1623                 printk(KERN_WARNING "cpqarray: Out of memory. "
1624                         "Unable to start background processing.\n");
1625                 return;
1626         }
1627         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1628                 id_ctlr_buf, 0, 0, 0, 0);
1629         if(ret_code != IO_OK)
1630                 printk(KERN_WARNING "cpqarray: Unable to start"
1631                         " background processing\n");
1632
1633         kfree(id_ctlr_buf);
1634 }
1635 /*****************************************************************
1636     getgeometry
1637     Get ida logical volume geometry from the controller
1638     This is a large bit of code which once existed in two flavors,
1639     It is used only at init time.
1640 *****************************************************************/
1641 static void getgeometry(int ctlr)
1642 {
1643         id_log_drv_t *id_ldrive;
1644         id_ctlr_t *id_ctlr_buf;
1645         sense_log_drv_stat_t *id_lstatus_buf;
1646         config_t *sense_config_buf;
1647         unsigned int log_unit, log_index;
1648         int ret_code, size;
1649         drv_info_t *drv;
1650         ctlr_info_t *info_p = hba[ctlr];
1651         int i;
1652
1653         info_p->log_drv_map = 0;
1654
1655         id_ldrive = kzalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1656         if (!id_ldrive) {
1657                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1658                 goto err_0;
1659         }
1660
1661         id_ctlr_buf = kzalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1662         if (!id_ctlr_buf) {
1663                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1664                 goto err_1;
1665         }
1666
1667         id_lstatus_buf = kzalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1668         if (!id_lstatus_buf) {
1669                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1670                 goto err_2;
1671         }
1672
1673         sense_config_buf = kzalloc(sizeof(config_t), GFP_KERNEL);
1674         if (!sense_config_buf) {
1675                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1676                 goto err_3;
1677         }
1678
1679         info_p->phys_drives = 0;
1680         info_p->log_drv_map = 0;
1681         info_p->drv_assign_map = 0;
1682         info_p->drv_spare_map = 0;
1683         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1684         /* Get controllers info for this logical drive */
1685         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1686         if (ret_code == IO_ERROR) {
1687                 /*
1688                  * If can't get controller info, set the logical drive map to 0,
1689                  * so the idastubopen will fail on all logical drives
1690                  * on the controller.
1691                  */
1692                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1693                 goto err_4;
1694         }
1695
1696         info_p->log_drives = id_ctlr_buf->nr_drvs;
1697         for(i=0;i<4;i++)
1698                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1699         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1700
1701         printk(" (%s)\n", info_p->product_name);
1702         /*
1703          * Initialize logical drive map to zero
1704          */
1705         log_index = 0;
1706         /*
1707          * Get drive geometry for all logical drives
1708          */
1709         if (id_ctlr_buf->nr_drvs > 16)
1710                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1711                         "16 logical drives per controller.\n.  "
1712                         " Additional drives will not be "
1713                         "detected\n", ctlr);
1714
1715         for (log_unit = 0;
1716              (log_index < id_ctlr_buf->nr_drvs)
1717              && (log_unit < NWD);
1718              log_unit++) {
1719                 size = sizeof(sense_log_drv_stat_t);
1720
1721                 /*
1722                    Send "Identify logical drive status" cmd
1723                  */
1724                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1725                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1726                 if (ret_code == IO_ERROR) {
1727                         /*
1728                            If can't get logical drive status, set
1729                            the logical drive map to 0, so the
1730                            idastubopen will fail for all logical drives
1731                            on the controller.
1732                          */
1733                         info_p->log_drv_map = 0;
1734                         printk( KERN_WARNING
1735                              "cpqarray ida%d: idaGetGeometry - Controller"
1736                                 " failed to report status of logical drive %d\n"
1737                          "Access to this controller has been disabled\n",
1738                                 ctlr, log_unit);
1739                         goto err_4;
1740                 }
1741                 /*
1742                    Make sure the logical drive is configured
1743                  */
1744                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1745                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1746                                sizeof(id_log_drv_t), 0, 0, log_unit);
1747                         /*
1748                            If error, the bit for this
1749                            logical drive won't be set and
1750                            idastubopen will return error.
1751                          */
1752                         if (ret_code != IO_ERROR) {
1753                                 drv = &info_p->drv[log_unit];
1754                                 drv->blk_size = id_ldrive->blk_size;
1755                                 drv->nr_blks = id_ldrive->nr_blks;
1756                                 drv->cylinders = id_ldrive->drv.cyl;
1757                                 drv->heads = id_ldrive->drv.heads;
1758                                 drv->sectors = id_ldrive->drv.sect_per_track;
1759                                 info_p->log_drv_map |=  (1 << log_unit);
1760
1761         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1762                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1763                                 ret_code = sendcmd(SENSE_CONFIG,
1764                                                   ctlr, sense_config_buf,
1765                                  sizeof(config_t), 0, 0, log_unit);
1766                                 if (ret_code == IO_ERROR) {
1767                                         info_p->log_drv_map = 0;
1768                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1769                                         goto err_4;
1770                                 }
1771
1772                                 info_p->phys_drives =
1773                                     sense_config_buf->ctlr_phys_drv;
1774                                 info_p->drv_assign_map
1775                                     |= sense_config_buf->drv_asgn_map;
1776                                 info_p->drv_assign_map
1777                                     |= sense_config_buf->spare_asgn_map;
1778                                 info_p->drv_spare_map
1779                                     |= sense_config_buf->spare_asgn_map;
1780                         }       /* end of if no error on id_ldrive */
1781                         log_index = log_index + 1;
1782                 }               /* end of if logical drive configured */
1783         }                       /* end of for log_unit */
1784
1785         /* Free all the buffers and return */
1786 err_4:
1787         kfree(sense_config_buf);
1788 err_3:
1789         kfree(id_lstatus_buf);
1790 err_2:
1791         kfree(id_ctlr_buf);
1792 err_1:
1793         kfree(id_ldrive);
1794 err_0:
1795         return;
1796 }
1797
1798 static void __exit cpqarray_exit(void)
1799 {
1800         int i;
1801
1802         pci_unregister_driver(&cpqarray_pci_driver);
1803
1804         /* Double check that all controller entries have been removed */
1805         for(i=0; i<MAX_CTLR; i++) {
1806                 if (hba[i] != NULL) {
1807                         printk(KERN_WARNING "cpqarray: Removing EISA "
1808                                         "controller %d\n", i);
1809                         cpqarray_remove_one_eisa(i);
1810                 }
1811         }
1812
1813         remove_proc_entry("driver/cpqarray", NULL);
1814 }
1815
1816 module_init(cpqarray_init)
1817 module_exit(cpqarray_exit)