drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/clk-provider.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/mutex.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/platform_data/clk-lpss.h>
  21 #include <linux/platform_data/x86/pmc_atom.h>
  22 #include <linux/pm_domain.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pwm.h>
  25 #include <linux/delay.h>
  26
  27 #include "internal.h"
  28
  29 ACPI_MODULE_NAME("acpi_lpss");
  30
  31 #ifdef CONFIG_X86_INTEL_LPSS
  32
  33 #include <asm/cpu_device_id.h>
  34 #include <asm/intel-family.h>
  35 #include <asm/iosf_mbi.h>
  36
  37 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  38
  39 #define LPSS_CLK_SIZE   0x04
  40 #define LPSS_LTR_SIZE   0x18
  41
  42 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  43 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  44 #define LPSS_RESETS                     0x04
  45 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  46 #define LPSS_RESETS_RESET_APB           BIT(1)
  47 #define LPSS_GENERAL                    0x08
  48 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  49 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  50 #define LPSS_SW_LTR                     0x10
  51 #define LPSS_AUTO_LTR                   0x14
  52 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  53 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  54 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  55 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  56 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  57 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  58 #define LPSS_LTR_MAX_VAL                0x3FF
  59 #define LPSS_TX_INT                     0x20
  60 #define LPSS_TX_INT_MASK                BIT(1)
  61
  62 #define LPSS_PRV_REG_COUNT              9
  63
  64 /* LPSS Flags */
  65 #define LPSS_CLK                        BIT(0)
  66 #define LPSS_CLK_GATE                   BIT(1)
  67 #define LPSS_CLK_DIVIDER                BIT(2)
  68 #define LPSS_LTR                        BIT(3)
  69 #define LPSS_SAVE_CTX                   BIT(4)
  70 #define LPSS_NO_D3_DELAY                BIT(5)
  71
  72 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  73 #define BYT_CRC_HRV                     2
  74 #define CHT_CRC_HRV                     3
  75
  76 struct lpss_private_data;
  77
  78 struct lpss_device_desc {
  79         unsigned int flags;
  80         const char *clk_con_id;
  81         unsigned int prv_offset;
  82         size_t prv_size_override;
  83         struct property_entry *properties;
  84         void (*setup)(struct lpss_private_data *pdata);
  85 };
  86
  87 static const struct lpss_device_desc lpss_dma_desc = {
  88         .flags = LPSS_CLK,
  89 };
  90
  91 struct lpss_private_data {
  92         struct acpi_device *adev;
  93         void __iomem *mmio_base;
  94         resource_size_t mmio_size;
  95         unsigned int fixed_clk_rate;
  96         struct clk *clk;
  97         const struct lpss_device_desc *dev_desc;
  98         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
  99 };
 100
 101 /* LPSS run time quirks */
 102 static unsigned int lpss_quirks;
 103
 104 /*
 105  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 106  *
 107  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 108  * it can be powered off automatically whenever the last LPSS device goes down.
 109  * In case of no power any access to the DMA controller will hang the system.
 110  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 111  * well as on ASuS T100TA transformer.
 112  *
 113  * This quirk overrides power state of entire LPSS island to keep DMA powered
 114  * on whenever we have at least one other device in use.
 115  */
 116 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 117
 118 /* UART Component Parameter Register */
 119 #define LPSS_UART_CPR                   0xF4
 120 #define LPSS_UART_CPR_AFCE              BIT(4)
 121
 122 static void lpss_uart_setup(struct lpss_private_data *pdata)
 123 {
 124         unsigned int offset;
 125         u32 val;
 126
 127         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 128         val = readl(pdata->mmio_base + offset);
 129         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 130
 131         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 132         if (!(val & LPSS_UART_CPR_AFCE)) {
 133                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 134                 val = readl(pdata->mmio_base + offset);
 135                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 136                 writel(val, pdata->mmio_base + offset);
 137         }
 138 }
 139
 140 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 141 {
 142         unsigned int offset;
 143         u32 val;
 144
 145         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 146         val = readl(pdata->mmio_base + offset);
 147         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 148         writel(val, pdata->mmio_base + offset);
 149 }
 150
 151 /*
 152  * BYT PWM used for backlight control by the i915 driver on systems without
 153  * the Crystal Cove PMIC.
 154  */
 155 static struct pwm_lookup byt_pwm_lookup[] = {
 156         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 157                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 158                                "pwm-lpss-platform"),
 159 };
 160
 161 static void byt_pwm_setup(struct lpss_private_data *pdata)
 162 {
 163         struct acpi_device *adev = pdata->adev;
 164
 165         /* Only call pwm_add_table for the first PWM controller */
 166         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 167                 return;
 168
 169         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 170                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 171 }
 172
 173 #define LPSS_I2C_ENABLE                 0x6c
 174
 175 static void byt_i2c_setup(struct lpss_private_data *pdata)
 176 {
 177         lpss_deassert_reset(pdata);
 178
 179         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 180                 pdata->fixed_clk_rate = 133000000;
 181
 182         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 183 }
 184
 185 /* BSW PWM used for backlight control by the i915 driver */
 186 static struct pwm_lookup bsw_pwm_lookup[] = {
 187         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 188                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 189                                "pwm-lpss-platform"),
 190 };
 191
 192 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 193 {
 194         struct acpi_device *adev = pdata->adev;
 195
 196         /* Only call pwm_add_table for the first PWM controller */
 197         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 198                 return;
 199
 200         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 201 }
 202
 203 static const struct lpss_device_desc lpt_dev_desc = {
 204         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 205         .prv_offset = 0x800,
 206 };
 207
 208 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 209         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
 210         .prv_offset = 0x800,
 211 };
 212
 213 static struct property_entry uart_properties[] = {
 214         PROPERTY_ENTRY_U32("reg-io-width", 4),
 215         PROPERTY_ENTRY_U32("reg-shift", 2),
 216         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 217         { },
 218 };
 219
 220 static const struct lpss_device_desc lpt_uart_dev_desc = {
 221         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 222         .clk_con_id = "baudclk",
 223         .prv_offset = 0x800,
 224         .setup = lpss_uart_setup,
 225         .properties = uart_properties,
 226 };
 227
 228 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 229         .flags = LPSS_LTR,
 230         .prv_offset = 0x1000,
 231         .prv_size_override = 0x1018,
 232 };
 233
 234 static const struct lpss_device_desc byt_pwm_dev_desc = {
 235         .flags = LPSS_SAVE_CTX,
 236         .prv_offset = 0x800,
 237         .setup = byt_pwm_setup,
 238 };
 239
 240 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 241         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 242         .prv_offset = 0x800,
 243         .setup = bsw_pwm_setup,
 244 };
 245
 246 static const struct lpss_device_desc byt_uart_dev_desc = {
 247         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 248         .clk_con_id = "baudclk",
 249         .prv_offset = 0x800,
 250         .setup = lpss_uart_setup,
 251         .properties = uart_properties,
 252 };
 253
 254 static const struct lpss_device_desc bsw_uart_dev_desc = {
 255         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 256                         | LPSS_NO_D3_DELAY,
 257         .clk_con_id = "baudclk",
 258         .prv_offset = 0x800,
 259         .setup = lpss_uart_setup,
 260         .properties = uart_properties,
 261 };
 262
 263 static const struct lpss_device_desc byt_spi_dev_desc = {
 264         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 265         .prv_offset = 0x400,
 266 };
 267
 268 static const struct lpss_device_desc byt_sdio_dev_desc = {
 269         .flags = LPSS_CLK,
 270 };
 271
 272 static const struct lpss_device_desc byt_i2c_dev_desc = {
 273         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 274         .prv_offset = 0x800,
 275         .setup = byt_i2c_setup,
 276 };
 277
 278 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 279         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 280         .prv_offset = 0x800,
 281         .setup = byt_i2c_setup,
 282 };
 283
 284 static const struct lpss_device_desc bsw_spi_dev_desc = {
 285         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 286                         | LPSS_NO_D3_DELAY,
 287         .prv_offset = 0x400,
 288         .setup = lpss_deassert_reset,
 289 };
 290
 291 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 292
 293 static const struct x86_cpu_id lpss_cpu_ids[] = {
 294         ICPU(INTEL_FAM6_ATOM_SILVERMONT1),      /* Valleyview, Bay Trail */
 295         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 296         {}
 297 };
 298
 299 #else
 300
 301 #define LPSS_ADDR(desc) (0UL)
 302
 303 #endif /* CONFIG_X86_INTEL_LPSS */
 304
 305 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 306         /* Generic LPSS devices */
 307         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 308
 309         /* Lynxpoint LPSS devices */
 310         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 311         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 312         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 313         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 314         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 315         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 316         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 317         { "INT33C7", },
 318
 319         /* BayTrail LPSS devices */
 320         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 321         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 322         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 323         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 324         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 325         { "INT33B2", },
 326         { "INT33FC", },
 327
 328         /* Braswell LPSS devices */
 329         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 330         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 331         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 332         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 333
 334         /* Broadwell LPSS devices */
 335         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 336         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 337         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 338         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 339         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 340         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 341         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 342         { "INT3437", },
 343
 344         /* Wildcat Point LPSS devices */
 345         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 346
 347         { }
 348 };
 349
 350 #ifdef CONFIG_X86_INTEL_LPSS
 351
 352 static int is_memory(struct acpi_resource *res, void *not_used)
 353 {
 354         struct resource r;
 355         return !acpi_dev_resource_memory(res, &r);
 356 }
 357
 358 /* LPSS main clock device. */
 359 static struct platform_device *lpss_clk_dev;
 360
 361 static inline void lpt_register_clock_device(void)
 362 {
 363         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 364 }
 365
 366 static int register_device_clock(struct acpi_device *adev,
 367                                  struct lpss_private_data *pdata)
 368 {
 369         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 370         const char *devname = dev_name(&adev->dev);
 371         struct clk *clk;
 372         struct lpss_clk_data *clk_data;
 373         const char *parent, *clk_name;
 374         void __iomem *prv_base;
 375
 376         if (!lpss_clk_dev)
 377                 lpt_register_clock_device();
 378
 379         clk_data = platform_get_drvdata(lpss_clk_dev);
 380         if (!clk_data)
 381                 return -ENODEV;
 382         clk = clk_data->clk;
 383
 384         if (!pdata->mmio_base
 385             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 386                 return -ENODATA;
 387
 388         parent = clk_data->name;
 389         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 390
 391         if (pdata->fixed_clk_rate) {
 392                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 393                                               pdata->fixed_clk_rate);
 394                 goto out;
 395         }
 396
 397         if (dev_desc->flags & LPSS_CLK_GATE) {
 398                 clk = clk_register_gate(NULL, devname, parent, 0,
 399                                         prv_base, 0, 0, NULL);
 400                 parent = devname;
 401         }
 402
 403         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 404                 /* Prevent division by zero */
 405                 if (!readl(prv_base))
 406                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 407
 408                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 409                 if (!clk_name)
 410                         return -ENOMEM;
 411                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 412                                                       0, prv_base,
 413                                                       1, 15, 16, 15, 0, NULL);
 414                 parent = clk_name;
 415
 416                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 417                 if (!clk_name) {
 418                         kfree(parent);
 419                         return -ENOMEM;
 420                 }
 421                 clk = clk_register_gate(NULL, clk_name, parent,
 422                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 423                                         prv_base, 31, 0, NULL);
 424                 kfree(parent);
 425                 kfree(clk_name);
 426         }
 427 out:
 428         if (IS_ERR(clk))
 429                 return PTR_ERR(clk);
 430
 431         pdata->clk = clk;
 432         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 433         return 0;
 434 }
 435
 436 struct lpss_device_links {
 437         const char *supplier_hid;
 438         const char *supplier_uid;
 439         const char *consumer_hid;
 440         const char *consumer_uid;
 441         u32 flags;
 442 };
 443
 444 /*
 445  * The _DEP method is used to identify dependencies but instead of creating
 446  * device links for every handle in _DEP, only links in the following list are
 447  * created. That is necessary because, in the general case, _DEP can refer to
 448  * devices that might not have drivers, or that are on different buses, or where
 449  * the supplier is not enumerated until after the consumer is probed.
 450  */
 451 static const struct lpss_device_links lpss_device_links[] = {
 452         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 453 };
 454
 455 static bool hid_uid_match(const char *hid1, const char *uid1,
 456                           const char *hid2, const char *uid2)
 457 {
 458         return !strcmp(hid1, hid2) && uid1 && uid2 && !strcmp(uid1, uid2);
 459 }
 460
 461 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 462                                   const struct lpss_device_links *link)
 463 {
 464         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 465                              link->supplier_hid, link->supplier_uid);
 466 }
 467
 468 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 469                                   const struct lpss_device_links *link)
 470 {
 471         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 472                              link->consumer_hid, link->consumer_uid);
 473 }
 474
 475 struct hid_uid {
 476         const char *hid;
 477         const char *uid;
 478 };
 479
 480 static int match_hid_uid(struct device *dev, void *data)
 481 {
 482         struct acpi_device *adev = ACPI_COMPANION(dev);
 483         struct hid_uid *id = data;
 484
 485         if (!adev)
 486                 return 0;
 487
 488         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 489                              id->hid, id->uid);
 490 }
 491
 492 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 493 {
 494         struct hid_uid data = {
 495                 .hid = hid,
 496                 .uid = uid,
 497         };
 498
 499         return bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 500 }
 501
 502 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 503 {
 504         struct acpi_handle_list dep_devices;
 505         acpi_status status;
 506         int i;
 507
 508         if (!acpi_has_method(adev->handle, "_DEP"))
 509                 return false;
 510
 511         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 512                                          &dep_devices);
 513         if (ACPI_FAILURE(status)) {
 514                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 515                 return false;
 516         }
 517
 518         for (i = 0; i < dep_devices.count; i++) {
 519                 if (dep_devices.handles[i] == handle)
 520                         return true;
 521         }
 522
 523         return false;
 524 }
 525
 526 static void acpi_lpss_link_consumer(struct device *dev1,
 527                                     const struct lpss_device_links *link)
 528 {
 529         struct device *dev2;
 530
 531         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 532         if (!dev2)
 533                 return;
 534
 535         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 536                 device_link_add(dev2, dev1, link->flags);
 537
 538         put_device(dev2);
 539 }
 540
 541 static void acpi_lpss_link_supplier(struct device *dev1,
 542                                     const struct lpss_device_links *link)
 543 {
 544         struct device *dev2;
 545
 546         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 547         if (!dev2)
 548                 return;
 549
 550         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 551                 device_link_add(dev1, dev2, link->flags);
 552
 553         put_device(dev2);
 554 }
 555
 556 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 557                                           struct platform_device *pdev)
 558 {
 559         int i;
 560
 561         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 562                 const struct lpss_device_links *link = &lpss_device_links[i];
 563
 564                 if (acpi_lpss_is_supplier(adev, link))
 565                         acpi_lpss_link_consumer(&pdev->dev, link);
 566
 567                 if (acpi_lpss_is_consumer(adev, link))
 568                         acpi_lpss_link_supplier(&pdev->dev, link);
 569         }
 570 }
 571
 572 static int acpi_lpss_create_device(struct acpi_device *adev,
 573                                    const struct acpi_device_id *id)
 574 {
 575         const struct lpss_device_desc *dev_desc;
 576         struct lpss_private_data *pdata;
 577         struct resource_entry *rentry;
 578         struct list_head resource_list;
 579         struct platform_device *pdev;
 580         int ret;
 581
 582         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 583         if (!dev_desc) {
 584                 pdev = acpi_create_platform_device(adev, NULL);
 585                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 586         }
 587         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 588         if (!pdata)
 589                 return -ENOMEM;
 590
 591         INIT_LIST_HEAD(&resource_list);
 592         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 593         if (ret < 0)
 594                 goto err_out;
 595
 596         list_for_each_entry(rentry, &resource_list, node)
 597                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 598                         if (dev_desc->prv_size_override)
 599                                 pdata->mmio_size = dev_desc->prv_size_override;
 600                         else
 601                                 pdata->mmio_size = resource_size(rentry->res);
 602                         pdata->mmio_base = ioremap(rentry->res->start,
 603                                                    pdata->mmio_size);
 604                         break;
 605                 }
 606
 607         acpi_dev_free_resource_list(&resource_list);
 608
 609         if (!pdata->mmio_base) {
 610                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 611                 adev->pnp.type.platform_id = 0;
 612                 /* Skip the device, but continue the namespace scan. */
 613                 ret = 0;
 614                 goto err_out;
 615         }
 616
 617         pdata->adev = adev;
 618         pdata->dev_desc = dev_desc;
 619
 620         if (dev_desc->setup)
 621                 dev_desc->setup(pdata);
 622
 623         if (dev_desc->flags & LPSS_CLK) {
 624                 ret = register_device_clock(adev, pdata);
 625                 if (ret) {
 626                         /* Skip the device, but continue the namespace scan. */
 627                         ret = 0;
 628                         goto err_out;
 629                 }
 630         }
 631
 632         /*
 633          * This works around a known issue in ACPI tables where LPSS devices
 634          * have _PS0 and _PS3 without _PSC (and no power resources), so
 635          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 636          */
 637         ret = acpi_device_fix_up_power(adev);
 638         if (ret) {
 639                 /* Skip the device, but continue the namespace scan. */
 640                 ret = 0;
 641                 goto err_out;
 642         }
 643
 644         adev->driver_data = pdata;
 645         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 646         if (!IS_ERR_OR_NULL(pdev)) {
 647                 acpi_lpss_create_device_links(adev, pdev);
 648                 return 1;
 649         }
 650
 651         ret = PTR_ERR(pdev);
 652         adev->driver_data = NULL;
 653
 654  err_out:
 655         kfree(pdata);
 656         return ret;
 657 }
 658
 659 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 660 {
 661         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 662 }
 663
 664 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 665                              unsigned int reg)
 666 {
 667         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 668 }
 669
 670 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 671 {
 672         struct acpi_device *adev;
 673         struct lpss_private_data *pdata;
 674         unsigned long flags;
 675         int ret;
 676
 677         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 678         if (WARN_ON(ret))
 679                 return ret;
 680
 681         spin_lock_irqsave(&dev->power.lock, flags);
 682         if (pm_runtime_suspended(dev)) {
 683                 ret = -EAGAIN;
 684                 goto out;
 685         }
 686         pdata = acpi_driver_data(adev);
 687         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 688                 ret = -ENODEV;
 689                 goto out;
 690         }
 691         *val = __lpss_reg_read(pdata, reg);
 692
 693  out:
 694         spin_unlock_irqrestore(&dev->power.lock, flags);
 695         return ret;
 696 }
 697
 698 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 699                              char *buf)
 700 {
 701         u32 ltr_value = 0;
 702         unsigned int reg;
 703         int ret;
 704
 705         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 706         ret = lpss_reg_read(dev, reg, &ltr_value);
 707         if (ret)
 708                 return ret;
 709
 710         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 711 }
 712
 713 static ssize_t lpss_ltr_mode_show(struct device *dev,
 714                                   struct device_attribute *attr, char *buf)
 715 {
 716         u32 ltr_mode = 0;
 717         char *outstr;
 718         int ret;
 719
 720         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 721         if (ret)
 722                 return ret;
 723
 724         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 725         return sprintf(buf, "%s\n", outstr);
 726 }
 727
 728 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 729 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 730 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 731
 732 static struct attribute *lpss_attrs[] = {
 733         &dev_attr_auto_ltr.attr,
 734         &dev_attr_sw_ltr.attr,
 735         &dev_attr_ltr_mode.attr,
 736         NULL,
 737 };
 738
 739 static const struct attribute_group lpss_attr_group = {
 740         .attrs = lpss_attrs,
 741         .name = "lpss_ltr",
 742 };
 743
 744 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 745 {
 746         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 747         u32 ltr_mode, ltr_val;
 748
 749         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 750         if (val < 0) {
 751                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 752                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 753                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 754                 }
 755                 return;
 756         }
 757         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 758         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 759                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 760                 val = LPSS_LTR_MAX_VAL;
 761         } else if (val > LPSS_LTR_MAX_VAL) {
 762                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 763                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 764         } else {
 765                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 766         }
 767         ltr_val |= val;
 768         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 769         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 770                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 771                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 772         }
 773 }
 774
 775 #ifdef CONFIG_PM
 776 /**
 777  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 778  * @dev: LPSS device
 779  * @pdata: pointer to the private data of the LPSS device
 780  *
 781  * Most LPSS devices have private registers which may loose their context when
 782  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 783  * prv_reg_ctx array.
 784  */
 785 static void acpi_lpss_save_ctx(struct device *dev,
 786                                struct lpss_private_data *pdata)
 787 {
 788         unsigned int i;
 789
 790         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 791                 unsigned long offset = i * sizeof(u32);
 792
 793                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 794                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 795                         pdata->prv_reg_ctx[i], offset);
 796         }
 797 }
 798
 799 /**
 800  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 801  * @dev: LPSS device
 802  * @pdata: pointer to the private data of the LPSS device
 803  *
 804  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 805  */
 806 static void acpi_lpss_restore_ctx(struct device *dev,
 807                                   struct lpss_private_data *pdata)
 808 {
 809         unsigned int i;
 810
 811         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 812                 unsigned long offset = i * sizeof(u32);
 813
 814                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 815                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 816                         pdata->prv_reg_ctx[i], offset);
 817         }
 818 }
 819
 820 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 821 {
 822         /*
 823          * The following delay is needed or the subsequent write operations may
 824          * fail. The LPSS devices are actually PCI devices and the PCI spec
 825          * expects 10ms delay before the device can be accessed after D3 to D0
 826          * transition. However some platforms like BSW does not need this delay.
 827          */
 828         unsigned int delay = 10;        /* default 10ms delay */
 829
 830         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 831                 delay = 0;
 832
 833         msleep(delay);
 834 }
 835
 836 static int acpi_lpss_activate(struct device *dev)
 837 {
 838         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 839         int ret;
 840
 841         ret = acpi_dev_resume(dev);
 842         if (ret)
 843                 return ret;
 844
 845         acpi_lpss_d3_to_d0_delay(pdata);
 846
 847         /*
 848          * This is called only on ->probe() stage where a device is either in
 849          * known state defined by BIOS or most likely powered off. Due to this
 850          * we have to deassert reset line to be sure that ->probe() will
 851          * recognize the device.
 852          */
 853         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 854                 lpss_deassert_reset(pdata);
 855
 856         return 0;
 857 }
 858
 859 static void acpi_lpss_dismiss(struct device *dev)
 860 {
 861         acpi_dev_suspend(dev, false);
 862 }
 863
 864 /* IOSF SB for LPSS island */
 865 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 866 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 867 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 868
 869 #define LPSS_IOSF_PMCSR                 0x84
 870 #define LPSS_PMCSR_D0                   0
 871 #define LPSS_PMCSR_D3hot                3
 872 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 873
 874 #define LPSS_IOSF_GPIODEF0              0x154
 875 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 876 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 877 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 878 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 879
 880 static DEFINE_MUTEX(lpss_iosf_mutex);
 881
 882 static void lpss_iosf_enter_d3_state(void)
 883 {
 884         u32 value1 = 0;
 885         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 886         u32 value2 = LPSS_PMCSR_D3hot;
 887         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 888         /*
 889          * PMC provides an information about actual status of the LPSS devices.
 890          * Here we read the values related to LPSS power island, i.e. LPSS
 891          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 892          */
 893         u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe;
 894         int ret;
 895
 896         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 897         if (ret)
 898                 return;
 899
 900         mutex_lock(&lpss_iosf_mutex);
 901
 902         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 903         if (ret)
 904                 goto exit;
 905
 906         /*
 907          * Get the status of entire LPSS power island per device basis.
 908          * Shutdown both LPSS DMA controllers if and only if all other devices
 909          * are already in D3hot.
 910          */
 911         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask;
 912         if (pmc_status)
 913                 goto exit;
 914
 915         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 916                         LPSS_IOSF_PMCSR, value2, mask2);
 917
 918         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 919                         LPSS_IOSF_PMCSR, value2, mask2);
 920
 921         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 922                         LPSS_IOSF_GPIODEF0, value1, mask1);
 923 exit:
 924         mutex_unlock(&lpss_iosf_mutex);
 925 }
 926
 927 static void lpss_iosf_exit_d3_state(void)
 928 {
 929         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 930                      LPSS_GPIODEF0_DMA_LLP;
 931         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 932         u32 value2 = LPSS_PMCSR_D0;
 933         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 934
 935         mutex_lock(&lpss_iosf_mutex);
 936
 937         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 938                         LPSS_IOSF_GPIODEF0, value1, mask1);
 939
 940         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 941                         LPSS_IOSF_PMCSR, value2, mask2);
 942
 943         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 944                         LPSS_IOSF_PMCSR, value2, mask2);
 945
 946         mutex_unlock(&lpss_iosf_mutex);
 947 }
 948
 949 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 950 {
 951         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 952         int ret;
 953
 954         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 955                 acpi_lpss_save_ctx(dev, pdata);
 956
 957         ret = acpi_dev_suspend(dev, wakeup);
 958
 959         /*
 960          * This call must be last in the sequence, otherwise PMC will return
 961          * wrong status for devices being about to be powered off. See
 962          * lpss_iosf_enter_d3_state() for further information.
 963          */
 964         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 965                 lpss_iosf_enter_d3_state();
 966
 967         return ret;
 968 }
 969
 970 static int acpi_lpss_resume(struct device *dev)
 971 {
 972         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 973         int ret;
 974
 975         /*
 976          * This call is kept first to be in symmetry with
 977          * acpi_lpss_runtime_suspend() one.
 978          */
 979         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 980                 lpss_iosf_exit_d3_state();
 981
 982         ret = acpi_dev_resume(dev);
 983         if (ret)
 984                 return ret;
 985
 986         acpi_lpss_d3_to_d0_delay(pdata);
 987
 988         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 989                 acpi_lpss_restore_ctx(dev, pdata);
 990
 991         return 0;
 992 }
 993
 994 #ifdef CONFIG_PM_SLEEP
 995 static int acpi_lpss_suspend_late(struct device *dev)
 996 {
 997         int ret;
 998
 999         if (dev_pm_smart_suspend_and_suspended(dev))
1000                 return 0;
1001
1002         ret = pm_generic_suspend_late(dev);
1003         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1004 }
1005
1006 static int acpi_lpss_resume_early(struct device *dev)
1007 {
1008         int ret = acpi_lpss_resume(dev);
1009
1010         return ret ? ret : pm_generic_resume_early(dev);
1011 }
1012 #endif /* CONFIG_PM_SLEEP */
1013
1014 static int acpi_lpss_runtime_suspend(struct device *dev)
1015 {
1016         int ret = pm_generic_runtime_suspend(dev);
1017
1018         return ret ? ret : acpi_lpss_suspend(dev, true);
1019 }
1020
1021 static int acpi_lpss_runtime_resume(struct device *dev)
1022 {
1023         int ret = acpi_lpss_resume(dev);
1024
1025         return ret ? ret : pm_generic_runtime_resume(dev);
1026 }
1027 #endif /* CONFIG_PM */
1028
1029 static struct dev_pm_domain acpi_lpss_pm_domain = {
1030 #ifdef CONFIG_PM
1031         .activate = acpi_lpss_activate,
1032         .dismiss = acpi_lpss_dismiss,
1033 #endif
1034         .ops = {
1035 #ifdef CONFIG_PM
1036 #ifdef CONFIG_PM_SLEEP
1037                 .prepare = acpi_subsys_prepare,
1038                 .complete = acpi_subsys_complete,
1039                 .suspend = acpi_subsys_suspend,
1040                 .suspend_late = acpi_lpss_suspend_late,
1041                 .suspend_noirq = acpi_subsys_suspend_noirq,
1042                 .resume_noirq = acpi_subsys_resume_noirq,
1043                 .resume_early = acpi_lpss_resume_early,
1044                 .freeze = acpi_subsys_freeze,
1045                 .freeze_late = acpi_subsys_freeze_late,
1046                 .freeze_noirq = acpi_subsys_freeze_noirq,
1047                 .thaw_noirq = acpi_subsys_thaw_noirq,
1048                 .poweroff = acpi_subsys_suspend,
1049                 .poweroff_late = acpi_lpss_suspend_late,
1050                 .poweroff_noirq = acpi_subsys_suspend_noirq,
1051                 .restore_noirq = acpi_subsys_resume_noirq,
1052                 .restore_early = acpi_lpss_resume_early,
1053 #endif
1054                 .runtime_suspend = acpi_lpss_runtime_suspend,
1055                 .runtime_resume = acpi_lpss_runtime_resume,
1056 #endif
1057         },
1058 };
1059
1060 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1061                                      unsigned long action, void *data)
1062 {
1063         struct platform_device *pdev = to_platform_device(data);
1064         struct lpss_private_data *pdata;
1065         struct acpi_device *adev;
1066         const struct acpi_device_id *id;
1067
1068         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1069         if (!id || !id->driver_data)
1070                 return 0;
1071
1072         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1073                 return 0;
1074
1075         pdata = acpi_driver_data(adev);
1076         if (!pdata)
1077                 return 0;
1078
1079         if (pdata->mmio_base &&
1080             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1081                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1082                 return 0;
1083         }
1084
1085         switch (action) {
1086         case BUS_NOTIFY_BIND_DRIVER:
1087                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1088                 break;
1089         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1090         case BUS_NOTIFY_UNBOUND_DRIVER:
1091                 dev_pm_domain_set(&pdev->dev, NULL);
1092                 break;
1093         case BUS_NOTIFY_ADD_DEVICE:
1094                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1095                 if (pdata->dev_desc->flags & LPSS_LTR)
1096                         return sysfs_create_group(&pdev->dev.kobj,
1097                                                   &lpss_attr_group);
1098                 break;
1099         case BUS_NOTIFY_DEL_DEVICE:
1100                 if (pdata->dev_desc->flags & LPSS_LTR)
1101                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1102                 dev_pm_domain_set(&pdev->dev, NULL);
1103                 break;
1104         default:
1105                 break;
1106         }
1107
1108         return 0;
1109 }
1110
1111 static struct notifier_block acpi_lpss_nb = {
1112         .notifier_call = acpi_lpss_platform_notify,
1113 };
1114
1115 static void acpi_lpss_bind(struct device *dev)
1116 {
1117         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1118
1119         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1120                 return;
1121
1122         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1123                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1124         else
1125                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1126 }
1127
1128 static void acpi_lpss_unbind(struct device *dev)
1129 {
1130         dev->power.set_latency_tolerance = NULL;
1131 }
1132
1133 static struct acpi_scan_handler lpss_handler = {
1134         .ids = acpi_lpss_device_ids,
1135         .attach = acpi_lpss_create_device,
1136         .bind = acpi_lpss_bind,
1137         .unbind = acpi_lpss_unbind,
1138 };
1139
1140 void __init acpi_lpss_init(void)
1141 {
1142         const struct x86_cpu_id *id;
1143         int ret;
1144
1145         ret = lpt_clk_init();
1146         if (ret)
1147                 return;
1148
1149         id = x86_match_cpu(lpss_cpu_ids);
1150         if (id)
1151                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1152
1153         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1154         acpi_scan_add_handler(&lpss_handler);
1155 }
1156
1157 #else
1158
1159 static struct acpi_scan_handler lpss_handler = {
1160         .ids = acpi_lpss_device_ids,
1161 };
1162
1163 void __init acpi_lpss_init(void)
1164 {
1165         acpi_scan_add_handler(&lpss_handler);
1166 }
1167
1168 #endif /* CONFIG_X86_INTEL_LPSS */