Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[sfrench/cifs-2.6.git] / arch / xtensa / kernel / ptrace.c
1 // TODO some minor issues
2 /*
3  * This file is subject to the terms and conditions of the GNU General Public
4  * License.  See the file "COPYING" in the main directory of this archive
5  * for more details.
6  *
7  * Copyright (C) 2001 - 2007  Tensilica Inc.
8  *
9  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
10  * Chris Zankel <chris@zankel.net>
11  * Scott Foehner<sfoehner@yahoo.com>,
12  * Kevin Chea
13  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
14  */
15
16 #include <linux/errno.h>
17 #include <linux/hw_breakpoint.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/perf_event.h>
21 #include <linux/ptrace.h>
22 #include <linux/sched.h>
23 #include <linux/sched/task_stack.h>
24 #include <linux/security.h>
25 #include <linux/signal.h>
26 #include <linux/smp.h>
27
28 #include <asm/coprocessor.h>
29 #include <asm/elf.h>
30 #include <asm/page.h>
31 #include <asm/pgtable.h>
32 #include <asm/ptrace.h>
33 #include <linux/uaccess.h>
34
35
36 void user_enable_single_step(struct task_struct *child)
37 {
38         child->ptrace |= PT_SINGLESTEP;
39 }
40
41 void user_disable_single_step(struct task_struct *child)
42 {
43         child->ptrace &= ~PT_SINGLESTEP;
44 }
45
46 /*
47  * Called by kernel/ptrace.c when detaching to disable single stepping.
48  */
49
50 void ptrace_disable(struct task_struct *child)
51 {
52         /* Nothing to do.. */
53 }
54
55 int ptrace_getregs(struct task_struct *child, void __user *uregs)
56 {
57         struct pt_regs *regs = task_pt_regs(child);
58         xtensa_gregset_t __user *gregset = uregs;
59         unsigned long wb = regs->windowbase;
60         int i;
61
62         if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t)))
63                 return -EIO;
64
65         __put_user(regs->pc, &gregset->pc);
66         __put_user(regs->ps & ~(1 << PS_EXCM_BIT), &gregset->ps);
67         __put_user(regs->lbeg, &gregset->lbeg);
68         __put_user(regs->lend, &gregset->lend);
69         __put_user(regs->lcount, &gregset->lcount);
70         __put_user(regs->windowstart, &gregset->windowstart);
71         __put_user(regs->windowbase, &gregset->windowbase);
72         __put_user(regs->threadptr, &gregset->threadptr);
73
74         for (i = 0; i < XCHAL_NUM_AREGS; i++)
75                 __put_user(regs->areg[i],
76                                 gregset->a + ((wb * 4 + i) % XCHAL_NUM_AREGS));
77
78         return 0;
79 }
80
81 int ptrace_setregs(struct task_struct *child, void __user *uregs)
82 {
83         struct pt_regs *regs = task_pt_regs(child);
84         xtensa_gregset_t *gregset = uregs;
85         const unsigned long ps_mask = PS_CALLINC_MASK | PS_OWB_MASK;
86         unsigned long ps;
87         unsigned long wb, ws;
88
89         if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t)))
90                 return -EIO;
91
92         __get_user(regs->pc, &gregset->pc);
93         __get_user(ps, &gregset->ps);
94         __get_user(regs->lbeg, &gregset->lbeg);
95         __get_user(regs->lend, &gregset->lend);
96         __get_user(regs->lcount, &gregset->lcount);
97         __get_user(ws, &gregset->windowstart);
98         __get_user(wb, &gregset->windowbase);
99         __get_user(regs->threadptr, &gregset->threadptr);
100
101         regs->ps = (regs->ps & ~ps_mask) | (ps & ps_mask) | (1 << PS_EXCM_BIT);
102
103         if (wb >= XCHAL_NUM_AREGS / 4)
104                 return -EFAULT;
105
106         if (wb != regs->windowbase || ws != regs->windowstart) {
107                 unsigned long rotws, wmask;
108
109                 rotws = (((ws | (ws << WSBITS)) >> wb) &
110                                 ((1 << WSBITS) - 1)) & ~1;
111                 wmask = ((rotws ? WSBITS + 1 - ffs(rotws) : 0) << 4) |
112                         (rotws & 0xF) | 1;
113                 regs->windowbase = wb;
114                 regs->windowstart = ws;
115                 regs->wmask = wmask;
116         }
117
118         if (wb != 0 &&  __copy_from_user(regs->areg + XCHAL_NUM_AREGS - wb * 4,
119                                 gregset->a, wb * 16))
120                 return -EFAULT;
121
122         if (__copy_from_user(regs->areg, gregset->a + wb * 4,
123                                 (WSBITS - wb) * 16))
124                 return -EFAULT;
125
126         return 0;
127 }
128
129
130 int ptrace_getxregs(struct task_struct *child, void __user *uregs)
131 {
132         struct pt_regs *regs = task_pt_regs(child);
133         struct thread_info *ti = task_thread_info(child);
134         elf_xtregs_t __user *xtregs = uregs;
135         int ret = 0;
136
137         if (!access_ok(VERIFY_WRITE, uregs, sizeof(elf_xtregs_t)))
138                 return -EIO;
139
140 #if XTENSA_HAVE_COPROCESSORS
141         /* Flush all coprocessor registers to memory. */
142         coprocessor_flush_all(ti);
143         ret |= __copy_to_user(&xtregs->cp0, &ti->xtregs_cp,
144                               sizeof(xtregs_coprocessor_t));
145 #endif
146         ret |= __copy_to_user(&xtregs->opt, &regs->xtregs_opt,
147                               sizeof(xtregs->opt));
148         ret |= __copy_to_user(&xtregs->user,&ti->xtregs_user,
149                               sizeof(xtregs->user));
150
151         return ret ? -EFAULT : 0;
152 }
153
154 int ptrace_setxregs(struct task_struct *child, void __user *uregs)
155 {
156         struct thread_info *ti = task_thread_info(child);
157         struct pt_regs *regs = task_pt_regs(child);
158         elf_xtregs_t *xtregs = uregs;
159         int ret = 0;
160
161         if (!access_ok(VERIFY_READ, uregs, sizeof(elf_xtregs_t)))
162                 return -EFAULT;
163
164 #if XTENSA_HAVE_COPROCESSORS
165         /* Flush all coprocessors before we overwrite them. */
166         coprocessor_flush_all(ti);
167         coprocessor_release_all(ti);
168
169         ret |= __copy_from_user(&ti->xtregs_cp, &xtregs->cp0,
170                                 sizeof(xtregs_coprocessor_t));
171 #endif
172         ret |= __copy_from_user(&regs->xtregs_opt, &xtregs->opt,
173                                 sizeof(xtregs->opt));
174         ret |= __copy_from_user(&ti->xtregs_user, &xtregs->user,
175                                 sizeof(xtregs->user));
176
177         return ret ? -EFAULT : 0;
178 }
179
180 int ptrace_peekusr(struct task_struct *child, long regno, long __user *ret)
181 {
182         struct pt_regs *regs;
183         unsigned long tmp;
184
185         regs = task_pt_regs(child);
186         tmp = 0;  /* Default return value. */
187
188         switch(regno) {
189
190                 case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
191                         tmp = regs->areg[regno - REG_AR_BASE];
192                         break;
193
194                 case REG_A_BASE ... REG_A_BASE + 15:
195                         tmp = regs->areg[regno - REG_A_BASE];
196                         break;
197
198                 case REG_PC:
199                         tmp = regs->pc;
200                         break;
201
202                 case REG_PS:
203                         /* Note:  PS.EXCM is not set while user task is running;
204                          * its being set in regs is for exception handling
205                          * convenience.  */
206                         tmp = (regs->ps & ~(1 << PS_EXCM_BIT));
207                         break;
208
209                 case REG_WB:
210                         break;          /* tmp = 0 */
211
212                 case REG_WS:
213                 {
214                         unsigned long wb = regs->windowbase;
215                         unsigned long ws = regs->windowstart;
216                         tmp = ((ws>>wb) | (ws<<(WSBITS-wb))) & ((1<<WSBITS)-1);
217                         break;
218                 }
219                 case REG_LBEG:
220                         tmp = regs->lbeg;
221                         break;
222
223                 case REG_LEND:
224                         tmp = regs->lend;
225                         break;
226
227                 case REG_LCOUNT:
228                         tmp = regs->lcount;
229                         break;
230
231                 case REG_SAR:
232                         tmp = regs->sar;
233                         break;
234
235                 case SYSCALL_NR:
236                         tmp = regs->syscall;
237                         break;
238
239                 default:
240                         return -EIO;
241         }
242         return put_user(tmp, ret);
243 }
244
245 int ptrace_pokeusr(struct task_struct *child, long regno, long val)
246 {
247         struct pt_regs *regs;
248         regs = task_pt_regs(child);
249
250         switch (regno) {
251                 case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
252                         regs->areg[regno - REG_AR_BASE] = val;
253                         break;
254
255                 case REG_A_BASE ... REG_A_BASE + 15:
256                         regs->areg[regno - REG_A_BASE] = val;
257                         break;
258
259                 case REG_PC:
260                         regs->pc = val;
261                         break;
262
263                 case SYSCALL_NR:
264                         regs->syscall = val;
265                         break;
266
267                 default:
268                         return -EIO;
269         }
270         return 0;
271 }
272
273 #ifdef CONFIG_HAVE_HW_BREAKPOINT
274 static void ptrace_hbptriggered(struct perf_event *bp,
275                                 struct perf_sample_data *data,
276                                 struct pt_regs *regs)
277 {
278         int i;
279         siginfo_t info;
280         struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
281
282         if (bp->attr.bp_type & HW_BREAKPOINT_X) {
283                 for (i = 0; i < XCHAL_NUM_IBREAK; ++i)
284                         if (current->thread.ptrace_bp[i] == bp)
285                                 break;
286                 i <<= 1;
287         } else {
288                 for (i = 0; i < XCHAL_NUM_DBREAK; ++i)
289                         if (current->thread.ptrace_wp[i] == bp)
290                                 break;
291                 i = (i << 1) | 1;
292         }
293
294         info.si_signo = SIGTRAP;
295         info.si_errno = i;
296         info.si_code = TRAP_HWBKPT;
297         info.si_addr = (void __user *)bkpt->address;
298
299         force_sig_info(SIGTRAP, &info, current);
300 }
301
302 static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
303 {
304         struct perf_event_attr attr;
305
306         ptrace_breakpoint_init(&attr);
307
308         /* Initialise fields to sane defaults. */
309         attr.bp_addr    = 0;
310         attr.bp_len     = 1;
311         attr.bp_type    = type;
312         attr.disabled   = 1;
313
314         return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL,
315                                            tsk);
316 }
317
318 /*
319  * Address bit 0 choose instruction (0) or data (1) break register, bits
320  * 31..1 are the register number.
321  * Both PTRACE_GETHBPREGS and PTRACE_SETHBPREGS transfer two 32-bit words:
322  * address (0) and control (1).
323  * Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
324  * Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
325  * 'trigger on load, bits 29..0 are length. Length 0 is used to clear a
326  * breakpoint. To set a breakpoint length must be a power of 2 in the range
327  * 1..64 and the address must be length-aligned.
328  */
329
330 static long ptrace_gethbpregs(struct task_struct *child, long addr,
331                               long __user *datap)
332 {
333         struct perf_event *bp;
334         u32 user_data[2] = {0};
335         bool dbreak = addr & 1;
336         unsigned idx = addr >> 1;
337
338         if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
339             (dbreak && idx >= XCHAL_NUM_DBREAK))
340                 return -EINVAL;
341
342         if (dbreak)
343                 bp = child->thread.ptrace_wp[idx];
344         else
345                 bp = child->thread.ptrace_bp[idx];
346
347         if (bp) {
348                 user_data[0] = bp->attr.bp_addr;
349                 user_data[1] = bp->attr.disabled ? 0 : bp->attr.bp_len;
350                 if (dbreak) {
351                         if (bp->attr.bp_type & HW_BREAKPOINT_R)
352                                 user_data[1] |= DBREAKC_LOAD_MASK;
353                         if (bp->attr.bp_type & HW_BREAKPOINT_W)
354                                 user_data[1] |= DBREAKC_STOR_MASK;
355                 }
356         }
357
358         if (copy_to_user(datap, user_data, sizeof(user_data)))
359                 return -EFAULT;
360
361         return 0;
362 }
363
364 static long ptrace_sethbpregs(struct task_struct *child, long addr,
365                               long __user *datap)
366 {
367         struct perf_event *bp;
368         struct perf_event_attr attr;
369         u32 user_data[2];
370         bool dbreak = addr & 1;
371         unsigned idx = addr >> 1;
372         int bp_type = 0;
373
374         if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
375             (dbreak && idx >= XCHAL_NUM_DBREAK))
376                 return -EINVAL;
377
378         if (copy_from_user(user_data, datap, sizeof(user_data)))
379                 return -EFAULT;
380
381         if (dbreak) {
382                 bp = child->thread.ptrace_wp[idx];
383                 if (user_data[1] & DBREAKC_LOAD_MASK)
384                         bp_type |= HW_BREAKPOINT_R;
385                 if (user_data[1] & DBREAKC_STOR_MASK)
386                         bp_type |= HW_BREAKPOINT_W;
387         } else {
388                 bp = child->thread.ptrace_bp[idx];
389                 bp_type = HW_BREAKPOINT_X;
390         }
391
392         if (!bp) {
393                 bp = ptrace_hbp_create(child,
394                                        bp_type ? bp_type : HW_BREAKPOINT_RW);
395                 if (IS_ERR(bp))
396                         return PTR_ERR(bp);
397                 if (dbreak)
398                         child->thread.ptrace_wp[idx] = bp;
399                 else
400                         child->thread.ptrace_bp[idx] = bp;
401         }
402
403         attr = bp->attr;
404         attr.bp_addr = user_data[0];
405         attr.bp_len = user_data[1] & ~(DBREAKC_LOAD_MASK | DBREAKC_STOR_MASK);
406         attr.bp_type = bp_type;
407         attr.disabled = !attr.bp_len;
408
409         return modify_user_hw_breakpoint(bp, &attr);
410 }
411 #endif
412
413 long arch_ptrace(struct task_struct *child, long request,
414                  unsigned long addr, unsigned long data)
415 {
416         int ret = -EPERM;
417         void __user *datap = (void __user *) data;
418
419         switch (request) {
420         case PTRACE_PEEKTEXT:   /* read word at location addr. */
421         case PTRACE_PEEKDATA:
422                 ret = generic_ptrace_peekdata(child, addr, data);
423                 break;
424
425         case PTRACE_PEEKUSR:    /* read register specified by addr. */
426                 ret = ptrace_peekusr(child, addr, datap);
427                 break;
428
429         case PTRACE_POKETEXT:   /* write the word at location addr. */
430         case PTRACE_POKEDATA:
431                 ret = generic_ptrace_pokedata(child, addr, data);
432                 break;
433
434         case PTRACE_POKEUSR:    /* write register specified by addr. */
435                 ret = ptrace_pokeusr(child, addr, data);
436                 break;
437
438         case PTRACE_GETREGS:
439                 ret = ptrace_getregs(child, datap);
440                 break;
441
442         case PTRACE_SETREGS:
443                 ret = ptrace_setregs(child, datap);
444                 break;
445
446         case PTRACE_GETXTREGS:
447                 ret = ptrace_getxregs(child, datap);
448                 break;
449
450         case PTRACE_SETXTREGS:
451                 ret = ptrace_setxregs(child, datap);
452                 break;
453 #ifdef CONFIG_HAVE_HW_BREAKPOINT
454         case PTRACE_GETHBPREGS:
455                 ret = ptrace_gethbpregs(child, addr, datap);
456                 break;
457
458         case PTRACE_SETHBPREGS:
459                 ret = ptrace_sethbpregs(child, addr, datap);
460                 break;
461 #endif
462         default:
463                 ret = ptrace_request(child, request, addr, data);
464                 break;
465         }
466
467         return ret;
468 }
469
470 void do_syscall_trace(void)
471 {
472         /*
473          * The 0x80 provides a way for the tracing parent to distinguish
474          * between a syscall stop and SIGTRAP delivery
475          */
476         ptrace_notify(SIGTRAP|((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0));
477
478         /*
479          * this isn't the same as continuing with a signal, but it will do
480          * for normal use.  strace only continues with a signal if the
481          * stopping signal is not SIGTRAP.  -brl
482          */
483         if (current->exit_code) {
484                 send_sig(current->exit_code, current, 1);
485                 current->exit_code = 0;
486         }
487 }
488
489 void do_syscall_trace_enter(struct pt_regs *regs)
490 {
491         if (test_thread_flag(TIF_SYSCALL_TRACE)
492                         && (current->ptrace & PT_PTRACED))
493                 do_syscall_trace();
494
495 #if 0
496         audit_syscall_entry(...);
497 #endif
498 }
499
500 void do_syscall_trace_leave(struct pt_regs *regs)
501 {
502         if ((test_thread_flag(TIF_SYSCALL_TRACE))
503                         && (current->ptrace & PT_PTRACED))
504                 do_syscall_trace();
505 }