arch/xtensa/include/asm/atomic.h

   1 /*
   2  * include/asm-xtensa/atomic.h
   3  *
   4  * Atomic operations that C can't guarantee us.  Useful for resource counting..
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  *
  10  * Copyright (C) 2001 - 2008 Tensilica Inc.
  11  */
  12
  13 #ifndef _XTENSA_ATOMIC_H
  14 #define _XTENSA_ATOMIC_H
  15
  16 #include <linux/stringify.h>
  17 #include <linux/types.h>
  18
  19 #ifdef __KERNEL__
  20 #include <asm/processor.h>
  21 #include <asm/cmpxchg.h>
  22 #include <asm/barrier.h>
  23
  24 #define ATOMIC_INIT(i)  { (i) }
  25
  26 /*
  27  * This Xtensa implementation assumes that the right mechanism
  28  * for exclusion is for locking interrupts to level EXCM_LEVEL.
  29  *
  30  * Locking interrupts looks like this:
  31  *
  32  *    rsil a15, TOPLEVEL
  33  *    <code>
  34  *    wsr  a15, PS
  35  *    rsync
  36  *
  37  * Note that a15 is used here because the register allocation
  38  * done by the compiler is not guaranteed and a window overflow
  39  * may not occur between the rsil and wsr instructions. By using
  40  * a15 in the rsil, the machine is guaranteed to be in a state
  41  * where no register reference will cause an overflow.
  42  */
  43
  44 /**
  45  * atomic_read - read atomic variable
  46  * @v: pointer of type atomic_t
  47  *
  48  * Atomically reads the value of @v.
  49  */
  50 #define atomic_read(v)          READ_ONCE((v)->counter)
  51
  52 /**
  53  * atomic_set - set atomic variable
  54  * @v: pointer of type atomic_t
  55  * @i: required value
  56  *
  57  * Atomically sets the value of @v to @i.
  58  */
  59 #define atomic_set(v,i)         WRITE_ONCE((v)->counter, (i))
  60
  61 #if XCHAL_HAVE_S32C1I
  62 #define ATOMIC_OP(op)                                                   \
  63 static inline void atomic_##op(int i, atomic_t * v)                     \
  64 {                                                                       \
  65         unsigned long tmp;                                              \
  66         int result;                                                     \
  67                                                                         \
  68         __asm__ __volatile__(                                           \
  69                         "1:     l32i    %1, %3, 0\n"                    \
  70                         "       wsr     %1, scompare1\n"                \
  71                         "       " #op " %0, %1, %2\n"                   \
  72                         "       s32c1i  %0, %3, 0\n"                    \
  73                         "       bne     %0, %1, 1b\n"                   \
  74                         : "=&a" (result), "=&a" (tmp)                   \
  75                         : "a" (i), "a" (v)                              \
  76                         : "memory"                                      \
  77                         );                                              \
  78 }                                                                       \
  79
  80 #define ATOMIC_OP_RETURN(op)                                            \
  81 static inline int atomic_##op##_return(int i, atomic_t * v)             \
  82 {                                                                       \
  83         unsigned long tmp;                                              \
  84         int result;                                                     \
  85                                                                         \
  86         __asm__ __volatile__(                                           \
  87                         "1:     l32i    %1, %3, 0\n"                    \
  88                         "       wsr     %1, scompare1\n"                \
  89                         "       " #op " %0, %1, %2\n"                   \
  90                         "       s32c1i  %0, %3, 0\n"                    \
  91                         "       bne     %0, %1, 1b\n"                   \
  92                         "       " #op " %0, %0, %2\n"                   \
  93                         : "=&a" (result), "=&a" (tmp)                   \
  94                         : "a" (i), "a" (v)                              \
  95                         : "memory"                                      \
  96                         );                                              \
  97                                                                         \
  98         return result;                                                  \
  99 }
 100
 101 #define ATOMIC_FETCH_OP(op)                                             \
 102 static inline int atomic_fetch_##op(int i, atomic_t * v)                \
 103 {                                                                       \
 104         unsigned long tmp;                                              \
 105         int result;                                                     \
 106                                                                         \
 107         __asm__ __volatile__(                                           \
 108                         "1:     l32i    %1, %3, 0\n"                    \
 109                         "       wsr     %1, scompare1\n"                \
 110                         "       " #op " %0, %1, %2\n"                   \
 111                         "       s32c1i  %0, %3, 0\n"                    \
 112                         "       bne     %0, %1, 1b\n"                   \
 113                         : "=&a" (result), "=&a" (tmp)                   \
 114                         : "a" (i), "a" (v)                              \
 115                         : "memory"                                      \
 116                         );                                              \
 117                                                                         \
 118         return result;                                                  \
 119 }
 120
 121 #else /* XCHAL_HAVE_S32C1I */
 122
 123 #define ATOMIC_OP(op)                                                   \
 124 static inline void atomic_##op(int i, atomic_t * v)                     \
 125 {                                                                       \
 126         unsigned int vval;                                              \
 127                                                                         \
 128         __asm__ __volatile__(                                           \
 129                         "       rsil    a15, "__stringify(TOPLEVEL)"\n"\
 130                         "       l32i    %0, %2, 0\n"                    \
 131                         "       " #op " %0, %0, %1\n"                   \
 132                         "       s32i    %0, %2, 0\n"                    \
 133                         "       wsr     a15, ps\n"                      \
 134                         "       rsync\n"                                \
 135                         : "=&a" (vval)                                  \
 136                         : "a" (i), "a" (v)                              \
 137                         : "a15", "memory"                               \
 138                         );                                              \
 139 }                                                                       \
 140
 141 #define ATOMIC_OP_RETURN(op)                                            \
 142 static inline int atomic_##op##_return(int i, atomic_t * v)             \
 143 {                                                                       \
 144         unsigned int vval;                                              \
 145                                                                         \
 146         __asm__ __volatile__(                                           \
 147                         "       rsil    a15,"__stringify(TOPLEVEL)"\n"  \
 148                         "       l32i    %0, %2, 0\n"                    \
 149                         "       " #op " %0, %0, %1\n"                   \
 150                         "       s32i    %0, %2, 0\n"                    \
 151                         "       wsr     a15, ps\n"                      \
 152                         "       rsync\n"                                \
 153                         : "=&a" (vval)                                  \
 154                         : "a" (i), "a" (v)                              \
 155                         : "a15", "memory"                               \
 156                         );                                              \
 157                                                                         \
 158         return vval;                                                    \
 159 }
 160
 161 #define ATOMIC_FETCH_OP(op)                                             \
 162 static inline int atomic_fetch_##op(int i, atomic_t * v)                \
 163 {                                                                       \
 164         unsigned int tmp, vval;                                         \
 165                                                                         \
 166         __asm__ __volatile__(                                           \
 167                         "       rsil    a15,"__stringify(TOPLEVEL)"\n"  \
 168                         "       l32i    %0, %3, 0\n"                    \
 169                         "       " #op " %1, %0, %2\n"                   \
 170                         "       s32i    %1, %3, 0\n"                    \
 171                         "       wsr     a15, ps\n"                      \
 172                         "       rsync\n"                                \
 173                         : "=&a" (vval), "=&a" (tmp)                     \
 174                         : "a" (i), "a" (v)                              \
 175                         : "a15", "memory"                               \
 176                         );                                              \
 177                                                                         \
 178         return vval;                                                    \
 179 }
 180
 181 #endif /* XCHAL_HAVE_S32C1I */
 182
 183 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op) ATOMIC_OP_RETURN(op)
 184
 185 ATOMIC_OPS(add)
 186 ATOMIC_OPS(sub)
 187
 188 #undef ATOMIC_OPS
 189 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
 190
 191 ATOMIC_OPS(and)
 192 ATOMIC_OPS(or)
 193 ATOMIC_OPS(xor)
 194
 195 #undef ATOMIC_OPS
 196 #undef ATOMIC_FETCH_OP
 197 #undef ATOMIC_OP_RETURN
 198 #undef ATOMIC_OP
 199
 200 #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
 201 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
 202
 203 #endif /* __KERNEL__ */
 204
 205 #endif /* _XTENSA_ATOMIC_H */