2 * Asm versions of Xen pv-ops, suitable for direct use.
4 * We only bother with direct forms (ie, vcpu in pda) of the
5 * operations here; the indirect forms are better handled in C.
8 #include <asm/thread_info.h>
9 #include <asm/processor-flags.h>
10 #include <asm/segment.h>
13 #include <xen/interface/xen.h>
15 #include <linux/linkage.h>
17 /* Pseudo-flag used for virtual NMI, which we don't implement yet */
18 #define XEN_EFLAGS_NMI 0x80000000
21 * This is run where a normal iret would be run, with the same stack setup:
26 * This attempts to make sure that any pending events are dealt with
27 * on return to usermode, but there is a small window in which an
28 * event can happen just before entering usermode. If the nested
29 * interrupt ends up setting one of the TIF_WORK_MASK pending work
30 * flags, they will not be tested again before returning to
31 * usermode. This means that a process can end up with pending work,
32 * which will be unprocessed until the process enters and leaves the
33 * kernel again, which could be an unbounded amount of time. This
34 * means that a pending signal or reschedule event could be
35 * indefinitely delayed.
37 * The fix is to notice a nested interrupt in the critical window, and
38 * if one occurs, then fold the nested interrupt into the current
39 * interrupt stack frame, and re-process it iteratively rather than
40 * recursively. This means that it will exit via the normal path, and
41 * all pending work will be dealt with appropriately.
43 * Because the nested interrupt handler needs to deal with the current
44 * stack state in whatever form its in, we keep things simple by only
45 * using a single register which is pushed/popped on the stack.
51 .pushsection .fixup, "ax"
59 /* test eflags for special cases */
60 testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
64 ESP_OFFSET=4 # bytes pushed onto stack
66 /* Store vcpu_info pointer for easy access */
69 movl $(__KERNEL_PERCPU), %eax
71 movl %fs:xen_vcpu, %eax
74 movl %ss:xen_vcpu, %eax
77 /* check IF state we're restoring */
78 testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
81 * Maybe enable events. Once this happens we could get a
82 * recursive event, so the critical region starts immediately
83 * afterwards. However, if that happens we don't end up
84 * resuming the code, so we don't have to be worried about
85 * being preempted to another CPU.
87 setz %ss:XEN_vcpu_info_mask(%eax)
90 /* check for unmasked and pending */
91 cmpw $0x0001, %ss:XEN_vcpu_info_pending(%eax)
94 * If there's something pending, mask events again so we can
95 * jump back into xen_hypervisor_callback. Otherwise do not
96 * touch XEN_vcpu_info_mask.
99 movb $1, %ss:XEN_vcpu_info_mask(%eax)
104 * From this point on the registers are restored and the stack
105 * updated, so we don't need to worry about it if we're
111 * Jump to hypervisor_callback after fixing up the stack.
112 * Events are masked, so jumping out of the critical region is
115 je xen_hypervisor_callback
119 _ASM_EXTABLE(1b, iret_exc)
122 /* put this out of line since its very rarely used */
123 jmp hypercall_page + __HYPERVISOR_iret * 32
125 .globl xen_iret_start_crit, xen_iret_end_crit
128 * This is called by xen_hypervisor_callback in entry.S when it sees
129 * that the EIP at the time of interrupt was between
130 * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in
131 * %eax so we can do a more refined determination of what to do.
133 * The stack format at this point is:
135 * ss : (ss/esp may be present if we came from usermode)
137 * eflags } outer exception info
140 * ---------------- <- edi (copy dest)
141 * eax : outer eax if it hasn't been restored
143 * eflags } nested exception info
144 * cs } (no ss/esp because we're nested
145 * eip } from the same ring)
146 * orig_eax }<- esi (copy src)
150 * ds } SAVE_ALL state
156 * In order to deliver the nested exception properly, we need to shift
157 * everything from the return addr up to the error code so it sits
158 * just under the outer exception info. This means that when we
159 * handle the exception, we do it in the context of the outer
160 * exception rather than starting a new one.
162 * The only caveat is that if the outer eax hasn't been restored yet
163 * (ie, it's still on stack), we need to insert its value into the
164 * SAVE_ALL state before going on, since it's usermode state which we
165 * eventually need to restore.
167 ENTRY(xen_iret_crit_fixup)
169 * Paranoia: Make sure we're really coming from kernel space.
170 * One could imagine a case where userspace jumps into the
171 * critical range address, but just before the CPU delivers a
172 * GP, it decides to deliver an interrupt instead. Unlikely?
173 * Definitely. Easy to avoid? Yes. The Intel documents
174 * explicitly say that the reported EIP for a bad jump is the
175 * jump instruction itself, not the destination, but some
176 * virtual environments get this wrong.
178 movl PT_CS(%esp), %ecx
179 andl $SEGMENT_RPL_MASK, %ecx
183 lea PT_ORIG_EAX(%esp), %esi
184 lea PT_EFLAGS(%esp), %edi
187 * If eip is before iret_restore_end then stack
188 * hasn't been restored yet.
190 cmp $iret_restore_end, %eax
193 movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */
194 movl %eax, PT_EAX(%esp)
196 lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
198 /* set up the copy */
200 mov $PT_EIP / 4, %ecx /* saved regs up to orig_eax */
204 lea 4(%edi), %esp /* point esp to new frame */