arch/x86/platform/uv/tlb_uv.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *      SGI UltraViolet TLB flush routines.
   4  *
   5  *      (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
   6  */
   7 #include <linux/seq_file.h>
   8 #include <linux/proc_fs.h>
   9 #include <linux/debugfs.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/delay.h>
  13
  14 #include <asm/mmu_context.h>
  15 #include <asm/uv/uv.h>
  16 #include <asm/uv/uv_mmrs.h>
  17 #include <asm/uv/uv_hub.h>
  18 #include <asm/uv/uv_bau.h>
  19 #include <asm/apic.h>
  20 #include <asm/tsc.h>
  21 #include <asm/irq_vectors.h>
  22 #include <asm/timer.h>
  23
  24 static struct bau_operations ops __ro_after_init;
  25
  26 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  27 static const int timeout_base_ns[] = {
  28                 20,
  29                 160,
  30                 1280,
  31                 10240,
  32                 81920,
  33                 655360,
  34                 5242880,
  35                 167772160
  36 };
  37
  38 static int timeout_us;
  39 static bool nobau = true;
  40 static int nobau_perm;
  41
  42 /* tunables: */
  43 static int max_concurr          = MAX_BAU_CONCURRENT;
  44 static int max_concurr_const    = MAX_BAU_CONCURRENT;
  45 static int plugged_delay        = PLUGGED_DELAY;
  46 static int plugsb4reset         = PLUGSB4RESET;
  47 static int giveup_limit         = GIVEUP_LIMIT;
  48 static int timeoutsb4reset      = TIMEOUTSB4RESET;
  49 static int ipi_reset_limit      = IPI_RESET_LIMIT;
  50 static int complete_threshold   = COMPLETE_THRESHOLD;
  51 static int congested_respns_us  = CONGESTED_RESPONSE_US;
  52 static int congested_reps       = CONGESTED_REPS;
  53 static int disabled_period      = DISABLED_PERIOD;
  54
  55 static struct tunables tunables[] = {
  56         {&max_concurr,           MAX_BAU_CONCURRENT}, /* must be [0] */
  57         {&plugged_delay,         PLUGGED_DELAY},
  58         {&plugsb4reset,          PLUGSB4RESET},
  59         {&timeoutsb4reset,       TIMEOUTSB4RESET},
  60         {&ipi_reset_limit,       IPI_RESET_LIMIT},
  61         {&complete_threshold,    COMPLETE_THRESHOLD},
  62         {&congested_respns_us,   CONGESTED_RESPONSE_US},
  63         {&congested_reps,        CONGESTED_REPS},
  64         {&disabled_period,       DISABLED_PERIOD},
  65         {&giveup_limit,          GIVEUP_LIMIT}
  66 };
  67
  68 static struct dentry *tunables_dir;
  69 static struct dentry *tunables_file;
  70
  71 /* these correspond to the statistics printed by ptc_seq_show() */
  72 static char *stat_description[] = {
  73         "sent:     number of shootdown messages sent",
  74         "stime:    time spent sending messages",
  75         "numuvhubs: number of hubs targeted with shootdown",
  76         "numuvhubs16: number times 16 or more hubs targeted",
  77         "numuvhubs8: number times 8 or more hubs targeted",
  78         "numuvhubs4: number times 4 or more hubs targeted",
  79         "numuvhubs2: number times 2 or more hubs targeted",
  80         "numuvhubs1: number times 1 hub targeted",
  81         "numcpus:  number of cpus targeted with shootdown",
  82         "dto:      number of destination timeouts",
  83         "retries:  destination timeout retries sent",
  84         "rok:   :  destination timeouts successfully retried",
  85         "resetp:   ipi-style resource resets for plugs",
  86         "resett:   ipi-style resource resets for timeouts",
  87         "giveup:   fall-backs to ipi-style shootdowns",
  88         "sto:      number of source timeouts",
  89         "bz:       number of stay-busy's",
  90         "throt:    number times spun in throttle",
  91         "swack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  92         "recv:     shootdown messages received",
  93         "rtime:    time spent processing messages",
  94         "all:      shootdown all-tlb messages",
  95         "one:      shootdown one-tlb messages",
  96         "mult:     interrupts that found multiple messages",
  97         "none:     interrupts that found no messages",
  98         "retry:    number of retry messages processed",
  99         "canc:     number messages canceled by retries",
 100         "nocan:    number retries that found nothing to cancel",
 101         "reset:    number of ipi-style reset requests processed",
 102         "rcan:     number messages canceled by reset requests",
 103         "disable:  number times use of the BAU was disabled",
 104         "enable:   number times use of the BAU was re-enabled"
 105 };
 106
 107 static int __init setup_bau(char *arg)
 108 {
 109         int result;
 110
 111         if (!arg)
 112                 return -EINVAL;
 113
 114         result = strtobool(arg, &nobau);
 115         if (result)
 116                 return result;
 117
 118         /* we need to flip the logic here, so that bau=y sets nobau to false */
 119         nobau = !nobau;
 120
 121         if (!nobau)
 122                 pr_info("UV BAU Enabled\n");
 123         else
 124                 pr_info("UV BAU Disabled\n");
 125
 126         return 0;
 127 }
 128 early_param("bau", setup_bau);
 129
 130 /* base pnode in this partition */
 131 static int uv_base_pnode __read_mostly;
 132
 133 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
 134 static DEFINE_PER_CPU(struct bau_control, bau_control);
 135 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
 136
 137 static void
 138 set_bau_on(void)
 139 {
 140         int cpu;
 141         struct bau_control *bcp;
 142
 143         if (nobau_perm) {
 144                 pr_info("BAU not initialized; cannot be turned on\n");
 145                 return;
 146         }
 147         nobau = false;
 148         for_each_present_cpu(cpu) {
 149                 bcp = &per_cpu(bau_control, cpu);
 150                 bcp->nobau = false;
 151         }
 152         pr_info("BAU turned on\n");
 153         return;
 154 }
 155
 156 static void
 157 set_bau_off(void)
 158 {
 159         int cpu;
 160         struct bau_control *bcp;
 161
 162         nobau = true;
 163         for_each_present_cpu(cpu) {
 164                 bcp = &per_cpu(bau_control, cpu);
 165                 bcp->nobau = true;
 166         }
 167         pr_info("BAU turned off\n");
 168         return;
 169 }
 170
 171 /*
 172  * Determine the first node on a uvhub. 'Nodes' are used for kernel
 173  * memory allocation.
 174  */
 175 static int __init uvhub_to_first_node(int uvhub)
 176 {
 177         int node, b;
 178
 179         for_each_online_node(node) {
 180                 b = uv_node_to_blade_id(node);
 181                 if (uvhub == b)
 182                         return node;
 183         }
 184         return -1;
 185 }
 186
 187 /*
 188  * Determine the apicid of the first cpu on a uvhub.
 189  */
 190 static int __init uvhub_to_first_apicid(int uvhub)
 191 {
 192         int cpu;
 193
 194         for_each_present_cpu(cpu)
 195                 if (uvhub == uv_cpu_to_blade_id(cpu))
 196                         return per_cpu(x86_cpu_to_apicid, cpu);
 197         return -1;
 198 }
 199
 200 /*
 201  * Free a software acknowledge hardware resource by clearing its Pending
 202  * bit. This will return a reply to the sender.
 203  * If the message has timed out, a reply has already been sent by the
 204  * hardware but the resource has not been released. In that case our
 205  * clear of the Timeout bit (as well) will free the resource. No reply will
 206  * be sent (the hardware will only do one reply per message).
 207  */
 208 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
 209                                                 int do_acknowledge)
 210 {
 211         unsigned long dw;
 212         struct bau_pq_entry *msg;
 213
 214         msg = mdp->msg;
 215         if (!msg->canceled && do_acknowledge) {
 216                 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
 217                 ops.write_l_sw_ack(dw);
 218         }
 219         msg->replied_to = 1;
 220         msg->swack_vec = 0;
 221 }
 222
 223 /*
 224  * Process the receipt of a RETRY message
 225  */
 226 static void bau_process_retry_msg(struct msg_desc *mdp,
 227                                         struct bau_control *bcp)
 228 {
 229         int i;
 230         int cancel_count = 0;
 231         unsigned long msg_res;
 232         unsigned long mmr = 0;
 233         struct bau_pq_entry *msg = mdp->msg;
 234         struct bau_pq_entry *msg2;
 235         struct ptc_stats *stat = bcp->statp;
 236
 237         stat->d_retries++;
 238         /*
 239          * cancel any message from msg+1 to the retry itself
 240          */
 241         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
 242                 if (msg2 > mdp->queue_last)
 243                         msg2 = mdp->queue_first;
 244                 if (msg2 == msg)
 245                         break;
 246
 247                 /* same conditions for cancellation as do_reset */
 248                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
 249                     (msg2->swack_vec) && ((msg2->swack_vec &
 250                         msg->swack_vec) == 0) &&
 251                     (msg2->sending_cpu == msg->sending_cpu) &&
 252                     (msg2->msg_type != MSG_NOOP)) {
 253                         mmr = ops.read_l_sw_ack();
 254                         msg_res = msg2->swack_vec;
 255                         /*
 256                          * This is a message retry; clear the resources held
 257                          * by the previous message only if they timed out.
 258                          * If it has not timed out we have an unexpected
 259                          * situation to report.
 260                          */
 261                         if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
 262                                 unsigned long mr;
 263                                 /*
 264                                  * Is the resource timed out?
 265                                  * Make everyone ignore the cancelled message.
 266                                  */
 267                                 msg2->canceled = 1;
 268                                 stat->d_canceled++;
 269                                 cancel_count++;
 270                                 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 271                                 ops.write_l_sw_ack(mr);
 272                         }
 273                 }
 274         }
 275         if (!cancel_count)
 276                 stat->d_nocanceled++;
 277 }
 278
 279 /*
 280  * Do all the things a cpu should do for a TLB shootdown message.
 281  * Other cpu's may come here at the same time for this message.
 282  */
 283 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
 284                                                 int do_acknowledge)
 285 {
 286         short socket_ack_count = 0;
 287         short *sp;
 288         struct atomic_short *asp;
 289         struct ptc_stats *stat = bcp->statp;
 290         struct bau_pq_entry *msg = mdp->msg;
 291         struct bau_control *smaster = bcp->socket_master;
 292
 293         /*
 294          * This must be a normal message, or retry of a normal message
 295          */
 296         if (msg->address == TLB_FLUSH_ALL) {
 297                 local_flush_tlb();
 298                 stat->d_alltlb++;
 299         } else {
 300                 __flush_tlb_one_user(msg->address);
 301                 stat->d_onetlb++;
 302         }
 303         stat->d_requestee++;
 304
 305         /*
 306          * One cpu on each uvhub has the additional job on a RETRY
 307          * of releasing the resource held by the message that is
 308          * being retried.  That message is identified by sending
 309          * cpu number.
 310          */
 311         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
 312                 bau_process_retry_msg(mdp, bcp);
 313
 314         /*
 315          * This is a swack message, so we have to reply to it.
 316          * Count each responding cpu on the socket. This avoids
 317          * pinging the count's cache line back and forth between
 318          * the sockets.
 319          */
 320         sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
 321         asp = (struct atomic_short *)sp;
 322         socket_ack_count = atom_asr(1, asp);
 323         if (socket_ack_count == bcp->cpus_in_socket) {
 324                 int msg_ack_count;
 325                 /*
 326                  * Both sockets dump their completed count total into
 327                  * the message's count.
 328                  */
 329                 *sp = 0;
 330                 asp = (struct atomic_short *)&msg->acknowledge_count;
 331                 msg_ack_count = atom_asr(socket_ack_count, asp);
 332
 333                 if (msg_ack_count == bcp->cpus_in_uvhub) {
 334                         /*
 335                          * All cpus in uvhub saw it; reply
 336                          * (unless we are in the UV2 workaround)
 337                          */
 338                         reply_to_message(mdp, bcp, do_acknowledge);
 339                 }
 340         }
 341
 342         return;
 343 }
 344
 345 /*
 346  * Determine the first cpu on a pnode.
 347  */
 348 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
 349 {
 350         int cpu;
 351         struct hub_and_pnode *hpp;
 352
 353         for_each_present_cpu(cpu) {
 354                 hpp = &smaster->thp[cpu];
 355                 if (pnode == hpp->pnode)
 356                         return cpu;
 357         }
 358         return -1;
 359 }
 360
 361 /*
 362  * Last resort when we get a large number of destination timeouts is
 363  * to clear resources held by a given cpu.
 364  * Do this with IPI so that all messages in the BAU message queue
 365  * can be identified by their nonzero swack_vec field.
 366  *
 367  * This is entered for a single cpu on the uvhub.
 368  * The sender want's this uvhub to free a specific message's
 369  * swack resources.
 370  */
 371 static void do_reset(void *ptr)
 372 {
 373         int i;
 374         struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
 375         struct reset_args *rap = (struct reset_args *)ptr;
 376         struct bau_pq_entry *msg;
 377         struct ptc_stats *stat = bcp->statp;
 378
 379         stat->d_resets++;
 380         /*
 381          * We're looking for the given sender, and
 382          * will free its swack resource.
 383          * If all cpu's finally responded after the timeout, its
 384          * message 'replied_to' was set.
 385          */
 386         for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
 387                 unsigned long msg_res;
 388                 /* do_reset: same conditions for cancellation as
 389                    bau_process_retry_msg() */
 390                 if ((msg->replied_to == 0) &&
 391                     (msg->canceled == 0) &&
 392                     (msg->sending_cpu == rap->sender) &&
 393                     (msg->swack_vec) &&
 394                     (msg->msg_type != MSG_NOOP)) {
 395                         unsigned long mmr;
 396                         unsigned long mr;
 397                         /*
 398                          * make everyone else ignore this message
 399                          */
 400                         msg->canceled = 1;
 401                         /*
 402                          * only reset the resource if it is still pending
 403                          */
 404                         mmr = ops.read_l_sw_ack();
 405                         msg_res = msg->swack_vec;
 406                         mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 407                         if (mmr & msg_res) {
 408                                 stat->d_rcanceled++;
 409                                 ops.write_l_sw_ack(mr);
 410                         }
 411                 }
 412         }
 413         return;
 414 }
 415
 416 /*
 417  * Use IPI to get all target uvhubs to release resources held by
 418  * a given sending cpu number.
 419  */
 420 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
 421 {
 422         int pnode;
 423         int apnode;
 424         int maskbits;
 425         int sender = bcp->cpu;
 426         cpumask_t *mask = bcp->uvhub_master->cpumask;
 427         struct bau_control *smaster = bcp->socket_master;
 428         struct reset_args reset_args;
 429
 430         reset_args.sender = sender;
 431         cpumask_clear(mask);
 432         /* find a single cpu for each uvhub in this distribution mask */
 433         maskbits = sizeof(struct pnmask) * BITSPERBYTE;
 434         /* each bit is a pnode relative to the partition base pnode */
 435         for (pnode = 0; pnode < maskbits; pnode++) {
 436                 int cpu;
 437                 if (!bau_uvhub_isset(pnode, distribution))
 438                         continue;
 439                 apnode = pnode + bcp->partition_base_pnode;
 440                 cpu = pnode_to_first_cpu(apnode, smaster);
 441                 cpumask_set_cpu(cpu, mask);
 442         }
 443
 444         /* IPI all cpus; preemption is already disabled */
 445         smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
 446         return;
 447 }
 448
 449 /*
 450  * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
 451  * number, not an absolute. It converts a duration in cycles to a duration in
 452  * ns.
 453  */
 454 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
 455 {
 456         struct cyc2ns_data data;
 457         unsigned long long ns;
 458
 459         cyc2ns_read_begin(&data);
 460         ns = mul_u64_u32_shr(cyc, data.cyc2ns_mul, data.cyc2ns_shift);
 461         cyc2ns_read_end();
 462
 463         return ns;
 464 }
 465
 466 /*
 467  * The reverse of the above; converts a duration in ns to a duration in cycles.
 468  */
 469 static inline unsigned long long ns_2_cycles(unsigned long long ns)
 470 {
 471         struct cyc2ns_data data;
 472         unsigned long long cyc;
 473
 474         cyc2ns_read_begin(&data);
 475         cyc = (ns << data.cyc2ns_shift) / data.cyc2ns_mul;
 476         cyc2ns_read_end();
 477
 478         return cyc;
 479 }
 480
 481 static inline unsigned long cycles_2_us(unsigned long long cyc)
 482 {
 483         return cycles_2_ns(cyc) / NSEC_PER_USEC;
 484 }
 485
 486 static inline cycles_t sec_2_cycles(unsigned long sec)
 487 {
 488         return ns_2_cycles(sec * NSEC_PER_SEC);
 489 }
 490
 491 static inline unsigned long long usec_2_cycles(unsigned long usec)
 492 {
 493         return ns_2_cycles(usec * NSEC_PER_USEC);
 494 }
 495
 496 /*
 497  * wait for all cpus on this hub to finish their sends and go quiet
 498  * leaves uvhub_quiesce set so that no new broadcasts are started by
 499  * bau_flush_send_and_wait()
 500  */
 501 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
 502 {
 503         atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 504 }
 505
 506 /*
 507  * mark this quiet-requestor as done
 508  */
 509 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
 510 {
 511         atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 512 }
 513
 514 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
 515 {
 516         unsigned long descriptor_status;
 517
 518         descriptor_status = uv_read_local_mmr(mmr_offset);
 519         descriptor_status >>= right_shift;
 520         descriptor_status &= UV_ACT_STATUS_MASK;
 521         return descriptor_status;
 522 }
 523
 524 /*
 525  * Wait for completion of a broadcast software ack message
 526  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
 527  */
 528 static int uv1_wait_completion(struct bau_desc *bau_desc,
 529                                 struct bau_control *bcp, long try)
 530 {
 531         unsigned long descriptor_status;
 532         cycles_t ttm;
 533         u64 mmr_offset = bcp->status_mmr;
 534         int right_shift = bcp->status_index;
 535         struct ptc_stats *stat = bcp->statp;
 536
 537         descriptor_status = uv1_read_status(mmr_offset, right_shift);
 538         /* spin on the status MMR, waiting for it to go idle */
 539         while ((descriptor_status != DS_IDLE)) {
 540                 /*
 541                  * Our software ack messages may be blocked because
 542                  * there are no swack resources available.  As long
 543                  * as none of them has timed out hardware will NACK
 544                  * our message and its state will stay IDLE.
 545                  */
 546                 if (descriptor_status == DS_SOURCE_TIMEOUT) {
 547                         stat->s_stimeout++;
 548                         return FLUSH_GIVEUP;
 549                 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
 550                         stat->s_dtimeout++;
 551                         ttm = get_cycles();
 552
 553                         /*
 554                          * Our retries may be blocked by all destination
 555                          * swack resources being consumed, and a timeout
 556                          * pending.  In that case hardware returns the
 557                          * ERROR that looks like a destination timeout.
 558                          */
 559                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 560                                 bcp->conseccompletes = 0;
 561                                 return FLUSH_RETRY_PLUGGED;
 562                         }
 563
 564                         bcp->conseccompletes = 0;
 565                         return FLUSH_RETRY_TIMEOUT;
 566                 } else {
 567                         /*
 568                          * descriptor_status is still BUSY
 569                          */
 570                         cpu_relax();
 571                 }
 572                 descriptor_status = uv1_read_status(mmr_offset, right_shift);
 573         }
 574         bcp->conseccompletes++;
 575         return FLUSH_COMPLETE;
 576 }
 577
 578 /*
 579  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
 580  * But not currently used.
 581  */
 582 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
 583 {
 584         return ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
 585 }
 586
 587 /*
 588  * Entered when a bau descriptor has gone into a permanent busy wait because
 589  * of a hardware bug.
 590  * Workaround the bug.
 591  */
 592 static int handle_uv2_busy(struct bau_control *bcp)
 593 {
 594         struct ptc_stats *stat = bcp->statp;
 595
 596         stat->s_uv2_wars++;
 597         bcp->busy = 1;
 598         return FLUSH_GIVEUP;
 599 }
 600
 601 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
 602                                 struct bau_control *bcp, long try)
 603 {
 604         unsigned long descriptor_stat;
 605         cycles_t ttm;
 606         u64 mmr_offset = bcp->status_mmr;
 607         int right_shift = bcp->status_index;
 608         int desc = bcp->uvhub_cpu;
 609         long busy_reps = 0;
 610         struct ptc_stats *stat = bcp->statp;
 611
 612         descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 613
 614         /* spin on the status MMR, waiting for it to go idle */
 615         while (descriptor_stat != UV2H_DESC_IDLE) {
 616                 if (descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) {
 617                         /*
 618                          * A h/w bug on the destination side may
 619                          * have prevented the message being marked
 620                          * pending, thus it doesn't get replied to
 621                          * and gets continually nacked until it times
 622                          * out with a SOURCE_TIMEOUT.
 623                          */
 624                         stat->s_stimeout++;
 625                         return FLUSH_GIVEUP;
 626                 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
 627                         ttm = get_cycles();
 628
 629                         /*
 630                          * Our retries may be blocked by all destination
 631                          * swack resources being consumed, and a timeout
 632                          * pending.  In that case hardware returns the
 633                          * ERROR that looks like a destination timeout.
 634                          * Without using the extended status we have to
 635                          * deduce from the short time that this was a
 636                          * strong nack.
 637                          */
 638                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 639                                 bcp->conseccompletes = 0;
 640                                 stat->s_plugged++;
 641                                 /* FLUSH_RETRY_PLUGGED causes hang on boot */
 642                                 return FLUSH_GIVEUP;
 643                         }
 644                         stat->s_dtimeout++;
 645                         bcp->conseccompletes = 0;
 646                         /* FLUSH_RETRY_TIMEOUT causes hang on boot */
 647                         return FLUSH_GIVEUP;
 648                 } else {
 649                         busy_reps++;
 650                         if (busy_reps > 1000000) {
 651                                 /* not to hammer on the clock */
 652                                 busy_reps = 0;
 653                                 ttm = get_cycles();
 654                                 if ((ttm - bcp->send_message) > bcp->timeout_interval)
 655                                         return handle_uv2_busy(bcp);
 656                         }
 657                         /*
 658                          * descriptor_stat is still BUSY
 659                          */
 660                         cpu_relax();
 661                 }
 662                 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 663         }
 664         bcp->conseccompletes++;
 665         return FLUSH_COMPLETE;
 666 }
 667
 668 /*
 669  * Returns the status of current BAU message for cpu desc as a bit field
 670  * [Error][Busy][Aux]
 671  */
 672 static u64 read_status(u64 status_mmr, int index, int desc)
 673 {
 674         u64 stat;
 675
 676         stat = ((read_lmmr(status_mmr) >> index) & UV_ACT_STATUS_MASK) << 1;
 677         stat |= (read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_2) >> desc) & 0x1;
 678
 679         return stat;
 680 }
 681
 682 static int uv4_wait_completion(struct bau_desc *bau_desc,
 683                                 struct bau_control *bcp, long try)
 684 {
 685         struct ptc_stats *stat = bcp->statp;
 686         u64 descriptor_stat;
 687         u64 mmr = bcp->status_mmr;
 688         int index = bcp->status_index;
 689         int desc = bcp->uvhub_cpu;
 690
 691         descriptor_stat = read_status(mmr, index, desc);
 692
 693         /* spin on the status MMR, waiting for it to go idle */
 694         while (descriptor_stat != UV2H_DESC_IDLE) {
 695                 switch (descriptor_stat) {
 696                 case UV2H_DESC_SOURCE_TIMEOUT:
 697                         stat->s_stimeout++;
 698                         return FLUSH_GIVEUP;
 699
 700                 case UV2H_DESC_DEST_TIMEOUT:
 701                         stat->s_dtimeout++;
 702                         bcp->conseccompletes = 0;
 703                         return FLUSH_RETRY_TIMEOUT;
 704
 705                 case UV2H_DESC_DEST_STRONG_NACK:
 706                         stat->s_plugged++;
 707                         bcp->conseccompletes = 0;
 708                         return FLUSH_RETRY_PLUGGED;
 709
 710                 case UV2H_DESC_DEST_PUT_ERR:
 711                         bcp->conseccompletes = 0;
 712                         return FLUSH_GIVEUP;
 713
 714                 default:
 715                         /* descriptor_stat is still BUSY */
 716                         cpu_relax();
 717                 }
 718                 descriptor_stat = read_status(mmr, index, desc);
 719         }
 720         bcp->conseccompletes++;
 721         return FLUSH_COMPLETE;
 722 }
 723
 724 /*
 725  * Our retries are blocked by all destination sw ack resources being
 726  * in use, and a timeout is pending. In that case hardware immediately
 727  * returns the ERROR that looks like a destination timeout.
 728  */
 729 static void destination_plugged(struct bau_desc *bau_desc,
 730                         struct bau_control *bcp,
 731                         struct bau_control *hmaster, struct ptc_stats *stat)
 732 {
 733         udelay(bcp->plugged_delay);
 734         bcp->plugged_tries++;
 735
 736         if (bcp->plugged_tries >= bcp->plugsb4reset) {
 737                 bcp->plugged_tries = 0;
 738
 739                 quiesce_local_uvhub(hmaster);
 740
 741                 spin_lock(&hmaster->queue_lock);
 742                 reset_with_ipi(&bau_desc->distribution, bcp);
 743                 spin_unlock(&hmaster->queue_lock);
 744
 745                 end_uvhub_quiesce(hmaster);
 746
 747                 bcp->ipi_attempts++;
 748                 stat->s_resets_plug++;
 749         }
 750 }
 751
 752 static void destination_timeout(struct bau_desc *bau_desc,
 753                         struct bau_control *bcp, struct bau_control *hmaster,
 754                         struct ptc_stats *stat)
 755 {
 756         hmaster->max_concurr = 1;
 757         bcp->timeout_tries++;
 758         if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
 759                 bcp->timeout_tries = 0;
 760
 761                 quiesce_local_uvhub(hmaster);
 762
 763                 spin_lock(&hmaster->queue_lock);
 764                 reset_with_ipi(&bau_desc->distribution, bcp);
 765                 spin_unlock(&hmaster->queue_lock);
 766
 767                 end_uvhub_quiesce(hmaster);
 768
 769                 bcp->ipi_attempts++;
 770                 stat->s_resets_timeout++;
 771         }
 772 }
 773
 774 /*
 775  * Stop all cpus on a uvhub from using the BAU for a period of time.
 776  * This is reversed by check_enable.
 777  */
 778 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
 779 {
 780         int tcpu;
 781         struct bau_control *tbcp;
 782         struct bau_control *hmaster;
 783         cycles_t tm1;
 784
 785         hmaster = bcp->uvhub_master;
 786         spin_lock(&hmaster->disable_lock);
 787         if (!bcp->baudisabled) {
 788                 stat->s_bau_disabled++;
 789                 tm1 = get_cycles();
 790                 for_each_present_cpu(tcpu) {
 791                         tbcp = &per_cpu(bau_control, tcpu);
 792                         if (tbcp->uvhub_master == hmaster) {
 793                                 tbcp->baudisabled = 1;
 794                                 tbcp->set_bau_on_time =
 795                                         tm1 + bcp->disabled_period;
 796                         }
 797                 }
 798         }
 799         spin_unlock(&hmaster->disable_lock);
 800 }
 801
 802 static void count_max_concurr(int stat, struct bau_control *bcp,
 803                                 struct bau_control *hmaster)
 804 {
 805         bcp->plugged_tries = 0;
 806         bcp->timeout_tries = 0;
 807         if (stat != FLUSH_COMPLETE)
 808                 return;
 809         if (bcp->conseccompletes <= bcp->complete_threshold)
 810                 return;
 811         if (hmaster->max_concurr >= hmaster->max_concurr_const)
 812                 return;
 813         hmaster->max_concurr++;
 814 }
 815
 816 static void record_send_stats(cycles_t time1, cycles_t time2,
 817                 struct bau_control *bcp, struct ptc_stats *stat,
 818                 int completion_status, int try)
 819 {
 820         cycles_t elapsed;
 821
 822         if (time2 > time1) {
 823                 elapsed = time2 - time1;
 824                 stat->s_time += elapsed;
 825
 826                 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
 827                         bcp->period_requests++;
 828                         bcp->period_time += elapsed;
 829                         if ((elapsed > usec_2_cycles(bcp->cong_response_us)) &&
 830                             (bcp->period_requests > bcp->cong_reps) &&
 831                             ((bcp->period_time / bcp->period_requests) >
 832                                         usec_2_cycles(bcp->cong_response_us))) {
 833                                 stat->s_congested++;
 834                                 disable_for_period(bcp, stat);
 835                         }
 836                 }
 837         } else
 838                 stat->s_requestor--;
 839
 840         if (completion_status == FLUSH_COMPLETE && try > 1)
 841                 stat->s_retriesok++;
 842         else if (completion_status == FLUSH_GIVEUP) {
 843                 stat->s_giveup++;
 844                 if (get_cycles() > bcp->period_end)
 845                         bcp->period_giveups = 0;
 846                 bcp->period_giveups++;
 847                 if (bcp->period_giveups == 1)
 848                         bcp->period_end = get_cycles() + bcp->disabled_period;
 849                 if (bcp->period_giveups > bcp->giveup_limit) {
 850                         disable_for_period(bcp, stat);
 851                         stat->s_giveuplimit++;
 852                 }
 853         }
 854 }
 855
 856 /*
 857  * Because of a uv1 hardware bug only a limited number of concurrent
 858  * requests can be made.
 859  */
 860 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
 861 {
 862         spinlock_t *lock = &hmaster->uvhub_lock;
 863         atomic_t *v;
 864
 865         v = &hmaster->active_descriptor_count;
 866         if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
 867                 stat->s_throttles++;
 868                 do {
 869                         cpu_relax();
 870                 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
 871         }
 872 }
 873
 874 /*
 875  * Handle the completion status of a message send.
 876  */
 877 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
 878                         struct bau_control *bcp, struct bau_control *hmaster,
 879                         struct ptc_stats *stat)
 880 {
 881         if (completion_status == FLUSH_RETRY_PLUGGED)
 882                 destination_plugged(bau_desc, bcp, hmaster, stat);
 883         else if (completion_status == FLUSH_RETRY_TIMEOUT)
 884                 destination_timeout(bau_desc, bcp, hmaster, stat);
 885 }
 886
 887 /*
 888  * Send a broadcast and wait for it to complete.
 889  *
 890  * The flush_mask contains the cpus the broadcast is to be sent to including
 891  * cpus that are on the local uvhub.
 892  *
 893  * Returns 0 if all flushing represented in the mask was done.
 894  * Returns 1 if it gives up entirely and the original cpu mask is to be
 895  * returned to the kernel.
 896  */
 897 static int uv_flush_send_and_wait(struct cpumask *flush_mask,
 898                                   struct bau_control *bcp,
 899                                   struct bau_desc *bau_desc)
 900 {
 901         int seq_number = 0;
 902         int completion_stat = 0;
 903         int uv1 = 0;
 904         long try = 0;
 905         unsigned long index;
 906         cycles_t time1;
 907         cycles_t time2;
 908         struct ptc_stats *stat = bcp->statp;
 909         struct bau_control *hmaster = bcp->uvhub_master;
 910         struct uv1_bau_msg_header *uv1_hdr = NULL;
 911         struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
 912
 913         if (bcp->uvhub_version == UV_BAU_V1) {
 914                 uv1 = 1;
 915                 uv1_throttle(hmaster, stat);
 916         }
 917
 918         while (hmaster->uvhub_quiesce)
 919                 cpu_relax();
 920
 921         time1 = get_cycles();
 922         if (uv1)
 923                 uv1_hdr = &bau_desc->header.uv1_hdr;
 924         else
 925                 /* uv2 and uv3 */
 926                 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
 927
 928         do {
 929                 if (try == 0) {
 930                         if (uv1)
 931                                 uv1_hdr->msg_type = MSG_REGULAR;
 932                         else
 933                                 uv2_3_hdr->msg_type = MSG_REGULAR;
 934                         seq_number = bcp->message_number++;
 935                 } else {
 936                         if (uv1)
 937                                 uv1_hdr->msg_type = MSG_RETRY;
 938                         else
 939                                 uv2_3_hdr->msg_type = MSG_RETRY;
 940                         stat->s_retry_messages++;
 941                 }
 942
 943                 if (uv1)
 944                         uv1_hdr->sequence = seq_number;
 945                 else
 946                         uv2_3_hdr->sequence = seq_number;
 947                 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
 948                 bcp->send_message = get_cycles();
 949
 950                 write_mmr_activation(index);
 951
 952                 try++;
 953                 completion_stat = ops.wait_completion(bau_desc, bcp, try);
 954
 955                 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
 956
 957                 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
 958                         bcp->ipi_attempts = 0;
 959                         stat->s_overipilimit++;
 960                         completion_stat = FLUSH_GIVEUP;
 961                         break;
 962                 }
 963                 cpu_relax();
 964         } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
 965                  (completion_stat == FLUSH_RETRY_TIMEOUT));
 966
 967         time2 = get_cycles();
 968
 969         count_max_concurr(completion_stat, bcp, hmaster);
 970
 971         while (hmaster->uvhub_quiesce)
 972                 cpu_relax();
 973
 974         atomic_dec(&hmaster->active_descriptor_count);
 975
 976         record_send_stats(time1, time2, bcp, stat, completion_stat, try);
 977
 978         if (completion_stat == FLUSH_GIVEUP)
 979                 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
 980                 return 1;
 981         return 0;
 982 }
 983
 984 /*
 985  * The BAU is disabled for this uvhub. When the disabled time period has
 986  * expired re-enable it.
 987  * Return 0 if it is re-enabled for all cpus on this uvhub.
 988  */
 989 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
 990 {
 991         int tcpu;
 992         struct bau_control *tbcp;
 993         struct bau_control *hmaster;
 994
 995         hmaster = bcp->uvhub_master;
 996         spin_lock(&hmaster->disable_lock);
 997         if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
 998                 stat->s_bau_reenabled++;
 999                 for_each_present_cpu(tcpu) {
1000                         tbcp = &per_cpu(bau_control, tcpu);
1001                         if (tbcp->uvhub_master == hmaster) {
1002                                 tbcp->baudisabled = 0;
1003                                 tbcp->period_requests = 0;
1004                                 tbcp->period_time = 0;
1005                                 tbcp->period_giveups = 0;
1006                         }
1007                 }
1008                 spin_unlock(&hmaster->disable_lock);
1009                 return 0;
1010         }
1011         spin_unlock(&hmaster->disable_lock);
1012         return -1;
1013 }
1014
1015 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1016                                 int remotes, struct bau_desc *bau_desc)
1017 {
1018         stat->s_requestor++;
1019         stat->s_ntargcpu += remotes + locals;
1020         stat->s_ntargremotes += remotes;
1021         stat->s_ntarglocals += locals;
1022
1023         /* uvhub statistics */
1024         hubs = bau_uvhub_weight(&bau_desc->distribution);
1025         if (locals) {
1026                 stat->s_ntarglocaluvhub++;
1027                 stat->s_ntargremoteuvhub += (hubs - 1);
1028         } else
1029                 stat->s_ntargremoteuvhub += hubs;
1030
1031         stat->s_ntarguvhub += hubs;
1032
1033         if (hubs >= 16)
1034                 stat->s_ntarguvhub16++;
1035         else if (hubs >= 8)
1036                 stat->s_ntarguvhub8++;
1037         else if (hubs >= 4)
1038                 stat->s_ntarguvhub4++;
1039         else if (hubs >= 2)
1040                 stat->s_ntarguvhub2++;
1041         else
1042                 stat->s_ntarguvhub1++;
1043 }
1044
1045 /*
1046  * Translate a cpu mask to the uvhub distribution mask in the BAU
1047  * activation descriptor.
1048  */
1049 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1050                         struct bau_desc *bau_desc, int *localsp, int *remotesp)
1051 {
1052         int cpu;
1053         int pnode;
1054         int cnt = 0;
1055         struct hub_and_pnode *hpp;
1056
1057         for_each_cpu(cpu, flush_mask) {
1058                 /*
1059                  * The distribution vector is a bit map of pnodes, relative
1060                  * to the partition base pnode (and the partition base nasid
1061                  * in the header).
1062                  * Translate cpu to pnode and hub using a local memory array.
1063                  */
1064                 hpp = &bcp->socket_master->thp[cpu];
1065                 pnode = hpp->pnode - bcp->partition_base_pnode;
1066                 bau_uvhub_set(pnode, &bau_desc->distribution);
1067                 cnt++;
1068                 if (hpp->uvhub == bcp->uvhub)
1069                         (*localsp)++;
1070                 else
1071                         (*remotesp)++;
1072         }
1073         if (!cnt)
1074                 return 1;
1075         return 0;
1076 }
1077
1078 /*
1079  * globally purge translation cache of a virtual address or all TLB's
1080  * @cpumask: mask of all cpu's in which the address is to be removed
1081  * @mm: mm_struct containing virtual address range
1082  * @start: start virtual address to be removed from TLB
1083  * @end: end virtual address to be remove from TLB
1084  * @cpu: the current cpu
1085  *
1086  * This is the entry point for initiating any UV global TLB shootdown.
1087  *
1088  * Purges the translation caches of all specified processors of the given
1089  * virtual address, or purges all TLB's on specified processors.
1090  *
1091  * The caller has derived the cpumask from the mm_struct.  This function
1092  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1093  *
1094  * The cpumask is converted into a uvhubmask of the uvhubs containing
1095  * those cpus.
1096  *
1097  * Note that this function should be called with preemption disabled.
1098  *
1099  * Returns NULL if all remote flushing was done.
1100  * Returns pointer to cpumask if some remote flushing remains to be
1101  * done.  The returned pointer is valid till preemption is re-enabled.
1102  */
1103 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1104                                           const struct flush_tlb_info *info)
1105 {
1106         unsigned int cpu = smp_processor_id();
1107         int locals = 0, remotes = 0, hubs = 0;
1108         struct bau_desc *bau_desc;
1109         struct cpumask *flush_mask;
1110         struct ptc_stats *stat;
1111         struct bau_control *bcp;
1112         unsigned long descriptor_status, status, address;
1113
1114         bcp = &per_cpu(bau_control, cpu);
1115
1116         if (bcp->nobau)
1117                 return cpumask;
1118
1119         stat = bcp->statp;
1120         stat->s_enters++;
1121
1122         if (bcp->busy) {
1123                 descriptor_status =
1124                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1125                 status = ((descriptor_status >> (bcp->uvhub_cpu *
1126                         UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1127                 if (status == UV2H_DESC_BUSY)
1128                         return cpumask;
1129                 bcp->busy = 0;
1130         }
1131
1132         /* bau was disabled due to slow response */
1133         if (bcp->baudisabled) {
1134                 if (check_enable(bcp, stat)) {
1135                         stat->s_ipifordisabled++;
1136                         return cpumask;
1137                 }
1138         }
1139
1140         /*
1141          * Each sending cpu has a per-cpu mask which it fills from the caller's
1142          * cpu mask.  All cpus are converted to uvhubs and copied to the
1143          * activation descriptor.
1144          */
1145         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1146         /* don't actually do a shootdown of the local cpu */
1147         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1148
1149         if (cpumask_test_cpu(cpu, cpumask))
1150                 stat->s_ntargself++;
1151
1152         bau_desc = bcp->descriptor_base;
1153         bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1154         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1155         if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1156                 return NULL;
1157
1158         record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1159
1160         if (!info->end || (info->end - info->start) <= PAGE_SIZE)
1161                 address = info->start;
1162         else
1163                 address = TLB_FLUSH_ALL;
1164
1165         switch (bcp->uvhub_version) {
1166         case UV_BAU_V1:
1167         case UV_BAU_V2:
1168         case UV_BAU_V3:
1169                 bau_desc->payload.uv1_2_3.address = address;
1170                 bau_desc->payload.uv1_2_3.sending_cpu = cpu;
1171                 break;
1172         case UV_BAU_V4:
1173                 bau_desc->payload.uv4.address = address;
1174                 bau_desc->payload.uv4.sending_cpu = cpu;
1175                 bau_desc->payload.uv4.qualifier = BAU_DESC_QUALIFIER;
1176                 break;
1177         }
1178
1179         /*
1180          * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1181          * or 1 if it gave up and the original cpumask should be returned.
1182          */
1183         if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1184                 return NULL;
1185         else
1186                 return cpumask;
1187 }
1188
1189 /*
1190  * Search the message queue for any 'other' unprocessed message with the
1191  * same software acknowledge resource bit vector as the 'msg' message.
1192  */
1193 static struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1194                                                   struct bau_control *bcp)
1195 {
1196         struct bau_pq_entry *msg_next = msg + 1;
1197         unsigned char swack_vec = msg->swack_vec;
1198
1199         if (msg_next > bcp->queue_last)
1200                 msg_next = bcp->queue_first;
1201         while (msg_next != msg) {
1202                 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1203                                 (msg_next->swack_vec == swack_vec))
1204                         return msg_next;
1205                 msg_next++;
1206                 if (msg_next > bcp->queue_last)
1207                         msg_next = bcp->queue_first;
1208         }
1209         return NULL;
1210 }
1211
1212 /*
1213  * UV2 needs to work around a bug in which an arriving message has not
1214  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1215  * Such a message must be ignored.
1216  */
1217 static void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1218 {
1219         unsigned long mmr_image;
1220         unsigned char swack_vec;
1221         struct bau_pq_entry *msg = mdp->msg;
1222         struct bau_pq_entry *other_msg;
1223
1224         mmr_image = ops.read_l_sw_ack();
1225         swack_vec = msg->swack_vec;
1226
1227         if ((swack_vec & mmr_image) == 0) {
1228                 /*
1229                  * This message was assigned a swack resource, but no
1230                  * reserved acknowlegment is pending.
1231                  * The bug has prevented this message from setting the MMR.
1232                  */
1233                 /*
1234                  * Some message has set the MMR 'pending' bit; it might have
1235                  * been another message.  Look for that message.
1236                  */
1237                 other_msg = find_another_by_swack(msg, bcp);
1238                 if (other_msg) {
1239                         /*
1240                          * There is another. Process this one but do not
1241                          * ack it.
1242                          */
1243                         bau_process_message(mdp, bcp, 0);
1244                         /*
1245                          * Let the natural processing of that other message
1246                          * acknowledge it. Don't get the processing of sw_ack's
1247                          * out of order.
1248                          */
1249                         return;
1250                 }
1251         }
1252
1253         /*
1254          * Either the MMR shows this one pending a reply or there is no
1255          * other message using this sw_ack, so it is safe to acknowledge it.
1256          */
1257         bau_process_message(mdp, bcp, 1);
1258
1259         return;
1260 }
1261
1262 /*
1263  * The BAU message interrupt comes here. (registered by set_intr_gate)
1264  * See entry_64.S
1265  *
1266  * We received a broadcast assist message.
1267  *
1268  * Interrupts are disabled; this interrupt could represent
1269  * the receipt of several messages.
1270  *
1271  * All cores/threads on this hub get this interrupt.
1272  * The last one to see it does the software ack.
1273  * (the resource will not be freed until noninterruptable cpus see this
1274  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
1275  */
1276 void uv_bau_message_interrupt(struct pt_regs *regs)
1277 {
1278         int count = 0;
1279         cycles_t time_start;
1280         struct bau_pq_entry *msg;
1281         struct bau_control *bcp;
1282         struct ptc_stats *stat;
1283         struct msg_desc msgdesc;
1284
1285         ack_APIC_irq();
1286         kvm_set_cpu_l1tf_flush_l1d();
1287         time_start = get_cycles();
1288
1289         bcp = &per_cpu(bau_control, smp_processor_id());
1290         stat = bcp->statp;
1291
1292         msgdesc.queue_first = bcp->queue_first;
1293         msgdesc.queue_last = bcp->queue_last;
1294
1295         msg = bcp->bau_msg_head;
1296         while (msg->swack_vec) {
1297                 count++;
1298
1299                 msgdesc.msg_slot = msg - msgdesc.queue_first;
1300                 msgdesc.msg = msg;
1301                 if (bcp->uvhub_version == UV_BAU_V2)
1302                         process_uv2_message(&msgdesc, bcp);
1303                 else
1304                         /* no error workaround for uv1 or uv3 */
1305                         bau_process_message(&msgdesc, bcp, 1);
1306
1307                 msg++;
1308                 if (msg > msgdesc.queue_last)
1309                         msg = msgdesc.queue_first;
1310                 bcp->bau_msg_head = msg;
1311         }
1312         stat->d_time += (get_cycles() - time_start);
1313         if (!count)
1314                 stat->d_nomsg++;
1315         else if (count > 1)
1316                 stat->d_multmsg++;
1317 }
1318
1319 /*
1320  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1321  * shootdown message timeouts enabled.  The timeout does not cause
1322  * an interrupt, but causes an error message to be returned to
1323  * the sender.
1324  */
1325 static void __init enable_timeouts(void)
1326 {
1327         int uvhub;
1328         int nuvhubs;
1329         int pnode;
1330         unsigned long mmr_image;
1331
1332         nuvhubs = uv_num_possible_blades();
1333
1334         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1335                 if (!uv_blade_nr_possible_cpus(uvhub))
1336                         continue;
1337
1338                 pnode = uv_blade_to_pnode(uvhub);
1339                 mmr_image = read_mmr_misc_control(pnode);
1340                 /*
1341                  * Set the timeout period and then lock it in, in three
1342                  * steps; captures and locks in the period.
1343                  *
1344                  * To program the period, the SOFT_ACK_MODE must be off.
1345                  */
1346                 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1347                 write_mmr_misc_control(pnode, mmr_image);
1348                 /*
1349                  * Set the 4-bit period.
1350                  */
1351                 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1352                 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1353                 write_mmr_misc_control(pnode, mmr_image);
1354                 /*
1355                  * UV1:
1356                  * Subsequent reversals of the timebase bit (3) cause an
1357                  * immediate timeout of one or all INTD resources as
1358                  * indicated in bits 2:0 (7 causes all of them to timeout).
1359                  */
1360                 mmr_image |= (1L << SOFTACK_MSHIFT);
1361                 if (is_uv2_hub()) {
1362                         /* do not touch the legacy mode bit */
1363                         /* hw bug workaround; do not use extended status */
1364                         mmr_image &= ~(1L << UV2_EXT_SHFT);
1365                 } else if (is_uv3_hub()) {
1366                         mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1367                         mmr_image |= (1L << SB_STATUS_SHFT);
1368                 }
1369                 write_mmr_misc_control(pnode, mmr_image);
1370         }
1371 }
1372
1373 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1374 {
1375         if (*offset < num_possible_cpus())
1376                 return offset;
1377         return NULL;
1378 }
1379
1380 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1381 {
1382         (*offset)++;
1383         if (*offset < num_possible_cpus())
1384                 return offset;
1385         return NULL;
1386 }
1387
1388 static void ptc_seq_stop(struct seq_file *file, void *data)
1389 {
1390 }
1391
1392 /*
1393  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1394  * 'data' points to the cpu number
1395  * Note: see the descriptions in stat_description[].
1396  */
1397 static int ptc_seq_show(struct seq_file *file, void *data)
1398 {
1399         struct ptc_stats *stat;
1400         struct bau_control *bcp;
1401         int cpu;
1402
1403         cpu = *(loff_t *)data;
1404         if (!cpu) {
1405                 seq_puts(file,
1406                          "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1407                 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1408                 seq_puts(file,
1409                          "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1410                 seq_puts(file,
1411                          "rok resetp resett giveup sto bz throt disable ");
1412                 seq_puts(file,
1413                          "enable wars warshw warwaits enters ipidis plugged ");
1414                 seq_puts(file,
1415                          "ipiover glim cong swack recv rtime all one mult ");
1416                 seq_puts(file, "none retry canc nocan reset rcan\n");
1417         }
1418         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1419                 bcp = &per_cpu(bau_control, cpu);
1420                 if (bcp->nobau) {
1421                         seq_printf(file, "cpu %d bau disabled\n", cpu);
1422                         return 0;
1423                 }
1424                 stat = bcp->statp;
1425                 /* source side statistics */
1426                 seq_printf(file,
1427                         "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1428                            cpu, bcp->nobau, stat->s_requestor,
1429                            cycles_2_us(stat->s_time),
1430                            stat->s_ntargself, stat->s_ntarglocals,
1431                            stat->s_ntargremotes, stat->s_ntargcpu,
1432                            stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1433                            stat->s_ntarguvhub, stat->s_ntarguvhub16);
1434                 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1435                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1436                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1437                            stat->s_dtimeout, stat->s_strongnacks);
1438                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1439                            stat->s_retry_messages, stat->s_retriesok,
1440                            stat->s_resets_plug, stat->s_resets_timeout,
1441                            stat->s_giveup, stat->s_stimeout,
1442                            stat->s_busy, stat->s_throttles);
1443                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1444                            stat->s_bau_disabled, stat->s_bau_reenabled,
1445                            stat->s_uv2_wars, stat->s_uv2_wars_hw,
1446                            stat->s_uv2_war_waits, stat->s_enters,
1447                            stat->s_ipifordisabled, stat->s_plugged,
1448                            stat->s_overipilimit, stat->s_giveuplimit,
1449                            stat->s_congested);
1450
1451                 /* destination side statistics */
1452                 seq_printf(file,
1453                         "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1454                            ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
1455                            stat->d_requestee, cycles_2_us(stat->d_time),
1456                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1457                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
1458                            stat->d_nocanceled, stat->d_resets,
1459                            stat->d_rcanceled);
1460         }
1461         return 0;
1462 }
1463
1464 /*
1465  * Display the tunables thru debugfs
1466  */
1467 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1468                                 size_t count, loff_t *ppos)
1469 {
1470         char *buf;
1471         int ret;
1472
1473         buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1474                 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1475                 "ipi_reset_limit complete_threshold congested_response_us",
1476                 "congested_reps disabled_period giveup_limit",
1477                 max_concurr, plugged_delay, plugsb4reset,
1478                 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1479                 congested_respns_us, congested_reps, disabled_period,
1480                 giveup_limit);
1481
1482         if (!buf)
1483                 return -ENOMEM;
1484
1485         ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1486         kfree(buf);
1487         return ret;
1488 }
1489
1490 /*
1491  * handle a write to /proc/sgi_uv/ptc_statistics
1492  * -1: reset the statistics
1493  *  0: display meaning of the statistics
1494  */
1495 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1496                                 size_t count, loff_t *data)
1497 {
1498         int cpu;
1499         int i;
1500         int elements;
1501         long input_arg;
1502         char optstr[64];
1503         struct ptc_stats *stat;
1504
1505         if (count == 0 || count > sizeof(optstr))
1506                 return -EINVAL;
1507         if (copy_from_user(optstr, user, count))
1508                 return -EFAULT;
1509         optstr[count - 1] = '\0';
1510
1511         if (!strcmp(optstr, "on")) {
1512                 set_bau_on();
1513                 return count;
1514         } else if (!strcmp(optstr, "off")) {
1515                 set_bau_off();
1516                 return count;
1517         }
1518
1519         if (kstrtol(optstr, 10, &input_arg) < 0) {
1520                 pr_debug("%s is invalid\n", optstr);
1521                 return -EINVAL;
1522         }
1523
1524         if (input_arg == 0) {
1525                 elements = ARRAY_SIZE(stat_description);
1526                 pr_debug("# cpu:      cpu number\n");
1527                 pr_debug("Sender statistics:\n");
1528                 for (i = 0; i < elements; i++)
1529                         pr_debug("%s\n", stat_description[i]);
1530         } else if (input_arg == -1) {
1531                 for_each_present_cpu(cpu) {
1532                         stat = &per_cpu(ptcstats, cpu);
1533                         memset(stat, 0, sizeof(struct ptc_stats));
1534                 }
1535         }
1536
1537         return count;
1538 }
1539
1540 static int local_atoi(const char *name)
1541 {
1542         int val = 0;
1543
1544         for (;; name++) {
1545                 switch (*name) {
1546                 case '0' ... '9':
1547                         val = 10*val+(*name-'0');
1548                         break;
1549                 default:
1550                         return val;
1551                 }
1552         }
1553 }
1554
1555 /*
1556  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1557  * Zero values reset them to defaults.
1558  */
1559 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1560                                 int count)
1561 {
1562         char *p;
1563         char *q;
1564         int cnt = 0;
1565         int val;
1566         int e = ARRAY_SIZE(tunables);
1567
1568         p = instr + strspn(instr, WHITESPACE);
1569         q = p;
1570         for (; *p; p = q + strspn(q, WHITESPACE)) {
1571                 q = p + strcspn(p, WHITESPACE);
1572                 cnt++;
1573                 if (q == p)
1574                         break;
1575         }
1576         if (cnt != e) {
1577                 pr_info("bau tunable error: should be %d values\n", e);
1578                 return -EINVAL;
1579         }
1580
1581         p = instr + strspn(instr, WHITESPACE);
1582         q = p;
1583         for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1584                 q = p + strcspn(p, WHITESPACE);
1585                 val = local_atoi(p);
1586                 switch (cnt) {
1587                 case 0:
1588                         if (val == 0) {
1589                                 max_concurr = MAX_BAU_CONCURRENT;
1590                                 max_concurr_const = MAX_BAU_CONCURRENT;
1591                                 continue;
1592                         }
1593                         if (val < 1 || val > bcp->cpus_in_uvhub) {
1594                                 pr_debug(
1595                                 "Error: BAU max concurrent %d is invalid\n",
1596                                 val);
1597                                 return -EINVAL;
1598                         }
1599                         max_concurr = val;
1600                         max_concurr_const = val;
1601                         continue;
1602                 default:
1603                         if (val == 0)
1604                                 *tunables[cnt].tunp = tunables[cnt].deflt;
1605                         else
1606                                 *tunables[cnt].tunp = val;
1607                         continue;
1608                 }
1609         }
1610         return 0;
1611 }
1612
1613 /*
1614  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1615  */
1616 static ssize_t tunables_write(struct file *file, const char __user *user,
1617                                 size_t count, loff_t *data)
1618 {
1619         int cpu;
1620         int ret;
1621         char instr[100];
1622         struct bau_control *bcp;
1623
1624         if (count == 0 || count > sizeof(instr)-1)
1625                 return -EINVAL;
1626         if (copy_from_user(instr, user, count))
1627                 return -EFAULT;
1628
1629         instr[count] = '\0';
1630
1631         cpu = get_cpu();
1632         bcp = &per_cpu(bau_control, cpu);
1633         ret = parse_tunables_write(bcp, instr, count);
1634         put_cpu();
1635         if (ret)
1636                 return ret;
1637
1638         for_each_present_cpu(cpu) {
1639                 bcp = &per_cpu(bau_control, cpu);
1640                 bcp->max_concurr         = max_concurr;
1641                 bcp->max_concurr_const   = max_concurr;
1642                 bcp->plugged_delay       = plugged_delay;
1643                 bcp->plugsb4reset        = plugsb4reset;
1644                 bcp->timeoutsb4reset     = timeoutsb4reset;
1645                 bcp->ipi_reset_limit     = ipi_reset_limit;
1646                 bcp->complete_threshold  = complete_threshold;
1647                 bcp->cong_response_us    = congested_respns_us;
1648                 bcp->cong_reps           = congested_reps;
1649                 bcp->disabled_period     = sec_2_cycles(disabled_period);
1650                 bcp->giveup_limit        = giveup_limit;
1651         }
1652         return count;
1653 }
1654
1655 static const struct seq_operations uv_ptc_seq_ops = {
1656         .start          = ptc_seq_start,
1657         .next           = ptc_seq_next,
1658         .stop           = ptc_seq_stop,
1659         .show           = ptc_seq_show
1660 };
1661
1662 static int ptc_proc_open(struct inode *inode, struct file *file)
1663 {
1664         return seq_open(file, &uv_ptc_seq_ops);
1665 }
1666
1667 static int tunables_open(struct inode *inode, struct file *file)
1668 {
1669         return 0;
1670 }
1671
1672 static const struct file_operations proc_uv_ptc_operations = {
1673         .open           = ptc_proc_open,
1674         .read           = seq_read,
1675         .write          = ptc_proc_write,
1676         .llseek         = seq_lseek,
1677         .release        = seq_release,
1678 };
1679
1680 static const struct file_operations tunables_fops = {
1681         .open           = tunables_open,
1682         .read           = tunables_read,
1683         .write          = tunables_write,
1684         .llseek         = default_llseek,
1685 };
1686
1687 static int __init uv_ptc_init(void)
1688 {
1689         struct proc_dir_entry *proc_uv_ptc;
1690
1691         if (!is_uv_system())
1692                 return 0;
1693
1694         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1695                                   &proc_uv_ptc_operations);
1696         if (!proc_uv_ptc) {
1697                 pr_err("unable to create %s proc entry\n",
1698                        UV_PTC_BASENAME);
1699                 return -EINVAL;
1700         }
1701
1702         tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1703         if (!tunables_dir) {
1704                 pr_err("unable to create debugfs directory %s\n",
1705                        UV_BAU_TUNABLES_DIR);
1706                 return -EINVAL;
1707         }
1708         tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1709                                         tunables_dir, NULL, &tunables_fops);
1710         if (!tunables_file) {
1711                 pr_err("unable to create debugfs file %s\n",
1712                        UV_BAU_TUNABLES_FILE);
1713                 return -EINVAL;
1714         }
1715         return 0;
1716 }
1717
1718 /*
1719  * Initialize the sending side's sending buffers.
1720  */
1721 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1722 {
1723         int i;
1724         int cpu;
1725         int uv1 = 0;
1726         unsigned long gpa;
1727         unsigned long m;
1728         unsigned long n;
1729         size_t dsize;
1730         struct bau_desc *bau_desc;
1731         struct bau_desc *bd2;
1732         struct uv1_bau_msg_header *uv1_hdr;
1733         struct uv2_3_bau_msg_header *uv2_3_hdr;
1734         struct bau_control *bcp;
1735
1736         /*
1737          * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1738          * per cpu; and one per cpu on the uvhub (ADP_SZ)
1739          */
1740         dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1741         bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1742         BUG_ON(!bau_desc);
1743
1744         gpa = uv_gpa(bau_desc);
1745         n = uv_gpa_to_gnode(gpa);
1746         m = ops.bau_gpa_to_offset(gpa);
1747         if (is_uv1_hub())
1748                 uv1 = 1;
1749
1750         /* the 14-bit pnode */
1751         write_mmr_descriptor_base(pnode,
1752                 (n << UVH_LB_BAU_SB_DESCRIPTOR_BASE_NODE_ID_SHFT | m));
1753         /*
1754          * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1755          * cpu even though we only use the first one; one descriptor can
1756          * describe a broadcast to 256 uv hubs.
1757          */
1758         for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1759                 memset(bd2, 0, sizeof(struct bau_desc));
1760                 if (uv1) {
1761                         uv1_hdr = &bd2->header.uv1_hdr;
1762                         uv1_hdr->swack_flag = 1;
1763                         /*
1764                          * The base_dest_nasid set in the message header
1765                          * is the nasid of the first uvhub in the partition.
1766                          * The bit map will indicate destination pnode numbers
1767                          * relative to that base. They may not be consecutive
1768                          * if nasid striding is being used.
1769                          */
1770                         uv1_hdr->base_dest_nasid =
1771                                                   UV_PNODE_TO_NASID(base_pnode);
1772                         uv1_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1773                         uv1_hdr->command         = UV_NET_ENDPOINT_INTD;
1774                         uv1_hdr->int_both        = 1;
1775                         /*
1776                          * all others need to be set to zero:
1777                          *   fairness chaining multilevel count replied_to
1778                          */
1779                 } else {
1780                         /*
1781                          * BIOS uses legacy mode, but uv2 and uv3 hardware always
1782                          * uses native mode for selective broadcasts.
1783                          */
1784                         uv2_3_hdr = &bd2->header.uv2_3_hdr;
1785                         uv2_3_hdr->swack_flag      = 1;
1786                         uv2_3_hdr->base_dest_nasid =
1787                                                   UV_PNODE_TO_NASID(base_pnode);
1788                         uv2_3_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1789                         uv2_3_hdr->command         = UV_NET_ENDPOINT_INTD;
1790                 }
1791         }
1792         for_each_present_cpu(cpu) {
1793                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1794                         continue;
1795                 bcp = &per_cpu(bau_control, cpu);
1796                 bcp->descriptor_base = bau_desc;
1797         }
1798 }
1799
1800 /*
1801  * initialize the destination side's receiving buffers
1802  * entered for each uvhub in the partition
1803  * - node is first node (kernel memory notion) on the uvhub
1804  * - pnode is the uvhub's physical identifier
1805  */
1806 static void pq_init(int node, int pnode)
1807 {
1808         int cpu;
1809         size_t plsize;
1810         char *cp;
1811         void *vp;
1812         unsigned long gnode, first, last, tail;
1813         struct bau_pq_entry *pqp;
1814         struct bau_control *bcp;
1815
1816         plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1817         vp = kmalloc_node(plsize, GFP_KERNEL, node);
1818         pqp = (struct bau_pq_entry *)vp;
1819         BUG_ON(!pqp);
1820
1821         cp = (char *)pqp + 31;
1822         pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1823
1824         for_each_present_cpu(cpu) {
1825                 if (pnode != uv_cpu_to_pnode(cpu))
1826                         continue;
1827                 /* for every cpu on this pnode: */
1828                 bcp = &per_cpu(bau_control, cpu);
1829                 bcp->queue_first        = pqp;
1830                 bcp->bau_msg_head       = pqp;
1831                 bcp->queue_last         = pqp + (DEST_Q_SIZE - 1);
1832         }
1833
1834         first = ops.bau_gpa_to_offset(uv_gpa(pqp));
1835         last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
1836
1837         /*
1838          * Pre UV4, the gnode is required to locate the payload queue
1839          * and the payload queue tail must be maintained by the kernel.
1840          */
1841         bcp = &per_cpu(bau_control, smp_processor_id());
1842         if (bcp->uvhub_version <= UV_BAU_V3) {
1843                 tail = first;
1844                 gnode = uv_gpa_to_gnode(uv_gpa(pqp));
1845                 first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
1846                 write_mmr_payload_tail(pnode, tail);
1847         }
1848
1849         ops.write_payload_first(pnode, first);
1850         ops.write_payload_last(pnode, last);
1851
1852         /* in effect, all msg_type's are set to MSG_NOOP */
1853         memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1854 }
1855
1856 /*
1857  * Initialization of each UV hub's structures
1858  */
1859 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1860 {
1861         int node;
1862         int pnode;
1863         unsigned long apicid;
1864
1865         node = uvhub_to_first_node(uvhub);
1866         pnode = uv_blade_to_pnode(uvhub);
1867
1868         activation_descriptor_init(node, pnode, base_pnode);
1869
1870         pq_init(node, pnode);
1871         /*
1872          * The below initialization can't be in firmware because the
1873          * messaging IRQ will be determined by the OS.
1874          */
1875         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1876         write_mmr_data_config(pnode, ((apicid << 32) | vector));
1877 }
1878
1879 /*
1880  * We will set BAU_MISC_CONTROL with a timeout period.
1881  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1882  * So the destination timeout period has to be calculated from them.
1883  */
1884 static int calculate_destination_timeout(void)
1885 {
1886         unsigned long mmr_image;
1887         int mult1;
1888         int mult2;
1889         int index;
1890         int base;
1891         int ret;
1892         unsigned long ts_ns;
1893
1894         if (is_uv1_hub()) {
1895                 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1896                 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1897                 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1898                 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1899                 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1900                 ts_ns = timeout_base_ns[index];
1901                 ts_ns *= (mult1 * mult2);
1902                 ret = ts_ns / 1000;
1903         } else {
1904                 /* same destination timeout for uv2 and uv3 */
1905                 /* 4 bits  0/1 for 10/80us base, 3 bits of multiplier */
1906                 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1907                 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1908                 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1909                         base = 80;
1910                 else
1911                         base = 10;
1912                 mult1 = mmr_image & UV2_ACK_MASK;
1913                 ret = mult1 * base;
1914         }
1915         return ret;
1916 }
1917
1918 static void __init init_per_cpu_tunables(void)
1919 {
1920         int cpu;
1921         struct bau_control *bcp;
1922
1923         for_each_present_cpu(cpu) {
1924                 bcp = &per_cpu(bau_control, cpu);
1925                 bcp->baudisabled                = 0;
1926                 if (nobau)
1927                         bcp->nobau              = true;
1928                 bcp->statp                      = &per_cpu(ptcstats, cpu);
1929                 /* time interval to catch a hardware stay-busy bug */
1930                 bcp->timeout_interval           = usec_2_cycles(2*timeout_us);
1931                 bcp->max_concurr                = max_concurr;
1932                 bcp->max_concurr_const          = max_concurr;
1933                 bcp->plugged_delay              = plugged_delay;
1934                 bcp->plugsb4reset               = plugsb4reset;
1935                 bcp->timeoutsb4reset            = timeoutsb4reset;
1936                 bcp->ipi_reset_limit            = ipi_reset_limit;
1937                 bcp->complete_threshold         = complete_threshold;
1938                 bcp->cong_response_us           = congested_respns_us;
1939                 bcp->cong_reps                  = congested_reps;
1940                 bcp->disabled_period            = sec_2_cycles(disabled_period);
1941                 bcp->giveup_limit               = giveup_limit;
1942                 spin_lock_init(&bcp->queue_lock);
1943                 spin_lock_init(&bcp->uvhub_lock);
1944                 spin_lock_init(&bcp->disable_lock);
1945         }
1946 }
1947
1948 /*
1949  * Scan all cpus to collect blade and socket summaries.
1950  */
1951 static int __init get_cpu_topology(int base_pnode,
1952                                         struct uvhub_desc *uvhub_descs,
1953                                         unsigned char *uvhub_mask)
1954 {
1955         int cpu;
1956         int pnode;
1957         int uvhub;
1958         int socket;
1959         struct bau_control *bcp;
1960         struct uvhub_desc *bdp;
1961         struct socket_desc *sdp;
1962
1963         for_each_present_cpu(cpu) {
1964                 bcp = &per_cpu(bau_control, cpu);
1965
1966                 memset(bcp, 0, sizeof(struct bau_control));
1967
1968                 pnode = uv_cpu_hub_info(cpu)->pnode;
1969                 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1970                         pr_emerg(
1971                                 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1972                                 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1973                         return 1;
1974                 }
1975
1976                 bcp->osnode = cpu_to_node(cpu);
1977                 bcp->partition_base_pnode = base_pnode;
1978
1979                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1980                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1981                 bdp = &uvhub_descs[uvhub];
1982
1983                 bdp->num_cpus++;
1984                 bdp->uvhub = uvhub;
1985                 bdp->pnode = pnode;
1986
1987                 /* kludge: 'assuming' one node per socket, and assuming that
1988                    disabling a socket just leaves a gap in node numbers */
1989                 socket = bcp->osnode & 1;
1990                 bdp->socket_mask |= (1 << socket);
1991                 sdp = &bdp->socket[socket];
1992                 sdp->cpu_number[sdp->num_cpus] = cpu;
1993                 sdp->num_cpus++;
1994                 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1995                         pr_emerg("%d cpus per socket invalid\n",
1996                                 sdp->num_cpus);
1997                         return 1;
1998                 }
1999         }
2000         return 0;
2001 }
2002
2003 /*
2004  * Each socket is to get a local array of pnodes/hubs.
2005  */
2006 static void make_per_cpu_thp(struct bau_control *smaster)
2007 {
2008         int cpu;
2009         size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
2010
2011         smaster->thp = kzalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
2012         for_each_present_cpu(cpu) {
2013                 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
2014                 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2015         }
2016 }
2017
2018 /*
2019  * Each uvhub is to get a local cpumask.
2020  */
2021 static void make_per_hub_cpumask(struct bau_control *hmaster)
2022 {
2023         int sz = sizeof(cpumask_t);
2024
2025         hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2026 }
2027
2028 /*
2029  * Initialize all the per_cpu information for the cpu's on a given socket,
2030  * given what has been gathered into the socket_desc struct.
2031  * And reports the chosen hub and socket masters back to the caller.
2032  */
2033 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2034                         struct bau_control **smasterp,
2035                         struct bau_control **hmasterp)
2036 {
2037         int i, cpu, uvhub_cpu;
2038         struct bau_control *bcp;
2039
2040         for (i = 0; i < sdp->num_cpus; i++) {
2041                 cpu = sdp->cpu_number[i];
2042                 bcp = &per_cpu(bau_control, cpu);
2043                 bcp->cpu = cpu;
2044                 if (i == 0) {
2045                         *smasterp = bcp;
2046                         if (!(*hmasterp))
2047                                 *hmasterp = bcp;
2048                 }
2049                 bcp->cpus_in_uvhub = bdp->num_cpus;
2050                 bcp->cpus_in_socket = sdp->num_cpus;
2051                 bcp->socket_master = *smasterp;
2052                 bcp->uvhub = bdp->uvhub;
2053                 if (is_uv1_hub())
2054                         bcp->uvhub_version = UV_BAU_V1;
2055                 else if (is_uv2_hub())
2056                         bcp->uvhub_version = UV_BAU_V2;
2057                 else if (is_uv3_hub())
2058                         bcp->uvhub_version = UV_BAU_V3;
2059                 else if (is_uv4_hub())
2060                         bcp->uvhub_version = UV_BAU_V4;
2061                 else {
2062                         pr_emerg("uvhub version not 1, 2, 3, or 4\n");
2063                         return 1;
2064                 }
2065                 bcp->uvhub_master = *hmasterp;
2066                 uvhub_cpu = uv_cpu_blade_processor_id(cpu);
2067                 bcp->uvhub_cpu = uvhub_cpu;
2068
2069                 /*
2070                  * The ERROR and BUSY status registers are located pairwise over
2071                  * the STATUS_0 and STATUS_1 mmrs; each an array[32] of 2 bits.
2072                  */
2073                 if (uvhub_cpu < UV_CPUS_PER_AS) {
2074                         bcp->status_mmr = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
2075                         bcp->status_index = uvhub_cpu * UV_ACT_STATUS_SIZE;
2076                 } else {
2077                         bcp->status_mmr = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
2078                         bcp->status_index = (uvhub_cpu - UV_CPUS_PER_AS)
2079                                                 * UV_ACT_STATUS_SIZE;
2080                 }
2081
2082                 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2083                         pr_emerg("%d cpus per uvhub invalid\n",
2084                                 bcp->uvhub_cpu);
2085                         return 1;
2086                 }
2087         }
2088         return 0;
2089 }
2090
2091 /*
2092  * Summarize the blade and socket topology into the per_cpu structures.
2093  */
2094 static int __init summarize_uvhub_sockets(int nuvhubs,
2095                         struct uvhub_desc *uvhub_descs,
2096                         unsigned char *uvhub_mask)
2097 {
2098         int socket;
2099         int uvhub;
2100         unsigned short socket_mask;
2101
2102         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2103                 struct uvhub_desc *bdp;
2104                 struct bau_control *smaster = NULL;
2105                 struct bau_control *hmaster = NULL;
2106
2107                 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2108                         continue;
2109
2110                 bdp = &uvhub_descs[uvhub];
2111                 socket_mask = bdp->socket_mask;
2112                 socket = 0;
2113                 while (socket_mask) {
2114                         struct socket_desc *sdp;
2115                         if ((socket_mask & 1)) {
2116                                 sdp = &bdp->socket[socket];
2117                                 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2118                                         return 1;
2119                                 make_per_cpu_thp(smaster);
2120                         }
2121                         socket++;
2122                         socket_mask = (socket_mask >> 1);
2123                 }
2124                 make_per_hub_cpumask(hmaster);
2125         }
2126         return 0;
2127 }
2128
2129 /*
2130  * initialize the bau_control structure for each cpu
2131  */
2132 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2133 {
2134         struct uvhub_desc *uvhub_descs;
2135         unsigned char *uvhub_mask = NULL;
2136
2137         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2138                 timeout_us = calculate_destination_timeout();
2139
2140         uvhub_descs = kcalloc(nuvhubs, sizeof(struct uvhub_desc), GFP_KERNEL);
2141         if (!uvhub_descs)
2142                 goto fail;
2143
2144         uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2145         if (!uvhub_mask)
2146                 goto fail;
2147
2148         if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2149                 goto fail;
2150
2151         if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2152                 goto fail;
2153
2154         kfree(uvhub_descs);
2155         kfree(uvhub_mask);
2156         init_per_cpu_tunables();
2157         return 0;
2158
2159 fail:
2160         kfree(uvhub_descs);
2161         kfree(uvhub_mask);
2162         return 1;
2163 }
2164
2165 static const struct bau_operations uv1_bau_ops __initconst = {
2166         .bau_gpa_to_offset       = uv_gpa_to_offset,
2167         .read_l_sw_ack           = read_mmr_sw_ack,
2168         .read_g_sw_ack           = read_gmmr_sw_ack,
2169         .write_l_sw_ack          = write_mmr_sw_ack,
2170         .write_g_sw_ack          = write_gmmr_sw_ack,
2171         .write_payload_first     = write_mmr_payload_first,
2172         .write_payload_last      = write_mmr_payload_last,
2173         .wait_completion         = uv1_wait_completion,
2174 };
2175
2176 static const struct bau_operations uv2_3_bau_ops __initconst = {
2177         .bau_gpa_to_offset       = uv_gpa_to_offset,
2178         .read_l_sw_ack           = read_mmr_sw_ack,
2179         .read_g_sw_ack           = read_gmmr_sw_ack,
2180         .write_l_sw_ack          = write_mmr_sw_ack,
2181         .write_g_sw_ack          = write_gmmr_sw_ack,
2182         .write_payload_first     = write_mmr_payload_first,
2183         .write_payload_last      = write_mmr_payload_last,
2184         .wait_completion         = uv2_3_wait_completion,
2185 };
2186
2187 static const struct bau_operations uv4_bau_ops __initconst = {
2188         .bau_gpa_to_offset       = uv_gpa_to_soc_phys_ram,
2189         .read_l_sw_ack           = read_mmr_proc_sw_ack,
2190         .read_g_sw_ack           = read_gmmr_proc_sw_ack,
2191         .write_l_sw_ack          = write_mmr_proc_sw_ack,
2192         .write_g_sw_ack          = write_gmmr_proc_sw_ack,
2193         .write_payload_first     = write_mmr_proc_payload_first,
2194         .write_payload_last      = write_mmr_proc_payload_last,
2195         .wait_completion         = uv4_wait_completion,
2196 };
2197
2198 /*
2199  * Initialization of BAU-related structures
2200  */
2201 static int __init uv_bau_init(void)
2202 {
2203         int uvhub;
2204         int pnode;
2205         int nuvhubs;
2206         int cur_cpu;
2207         int cpus;
2208         int vector;
2209         cpumask_var_t *mask;
2210
2211         if (!is_uv_system())
2212                 return 0;
2213
2214         if (is_uv4_hub())
2215                 ops = uv4_bau_ops;
2216         else if (is_uv3_hub())
2217                 ops = uv2_3_bau_ops;
2218         else if (is_uv2_hub())
2219                 ops = uv2_3_bau_ops;
2220         else if (is_uv1_hub())
2221                 ops = uv1_bau_ops;
2222
2223         nuvhubs = uv_num_possible_blades();
2224         if (nuvhubs < 2) {
2225                 pr_crit("UV: BAU disabled - insufficient hub count\n");
2226                 goto err_bau_disable;
2227         }
2228
2229         for_each_possible_cpu(cur_cpu) {
2230                 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2231                 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2232         }
2233
2234         uv_base_pnode = 0x7fffffff;
2235         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2236                 cpus = uv_blade_nr_possible_cpus(uvhub);
2237                 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2238                         uv_base_pnode = uv_blade_to_pnode(uvhub);
2239         }
2240
2241         /* software timeouts are not supported on UV4 */
2242         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2243                 enable_timeouts();
2244
2245         if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2246                 pr_crit("UV: BAU disabled - per CPU init failed\n");
2247                 goto err_bau_disable;
2248         }
2249
2250         vector = UV_BAU_MESSAGE;
2251         for_each_possible_blade(uvhub) {
2252                 if (uv_blade_nr_possible_cpus(uvhub))
2253                         init_uvhub(uvhub, vector, uv_base_pnode);
2254         }
2255
2256         for_each_possible_blade(uvhub) {
2257                 if (uv_blade_nr_possible_cpus(uvhub)) {
2258                         unsigned long val;
2259                         unsigned long mmr;
2260                         pnode = uv_blade_to_pnode(uvhub);
2261                         /* INIT the bau */
2262                         val = 1L << 63;
2263                         write_gmmr_activation(pnode, val);
2264                         mmr = 1; /* should be 1 to broadcast to both sockets */
2265                         if (!is_uv1_hub())
2266                                 write_mmr_data_broadcast(pnode, mmr);
2267                 }
2268         }
2269
2270         return 0;
2271
2272 err_bau_disable:
2273
2274         for_each_possible_cpu(cur_cpu)
2275                 free_cpumask_var(per_cpu(uv_flush_tlb_mask, cur_cpu));
2276
2277         set_bau_off();
2278         nobau_perm = 1;
2279
2280         return -EINVAL;
2281 }
2282 core_initcall(uv_bau_init);
2283 fs_initcall(uv_ptc_init);