arch/x86/net/bpf_jit_comp.c

   1 /* bpf_jit_comp.c : BPF JIT compiler
   2  *
   3  * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
   4  * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; version 2
   9  * of the License.
  10  */
  11 #include <linux/netdevice.h>
  12 #include <linux/filter.h>
  13 #include <linux/if_vlan.h>
  14 #include <asm/cacheflush.h>
  15 #include <asm/set_memory.h>
  16 #include <linux/bpf.h>
  17
  18 int bpf_jit_enable __read_mostly;
  19
  20 /*
  21  * assembly code in arch/x86/net/bpf_jit.S
  22  */
  23 extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  24 extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  25 extern u8 sk_load_byte_positive_offset[];
  26 extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  27 extern u8 sk_load_byte_negative_offset[];
  28
  29 static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  30 {
  31         if (len == 1)
  32                 *ptr = bytes;
  33         else if (len == 2)
  34                 *(u16 *)ptr = bytes;
  35         else {
  36                 *(u32 *)ptr = bytes;
  37                 barrier();
  38         }
  39         return ptr + len;
  40 }
  41
  42 #define EMIT(bytes, len) \
  43         do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  44
  45 #define EMIT1(b1)               EMIT(b1, 1)
  46 #define EMIT2(b1, b2)           EMIT((b1) + ((b2) << 8), 2)
  47 #define EMIT3(b1, b2, b3)       EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  48 #define EMIT4(b1, b2, b3, b4)   EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  49 #define EMIT1_off32(b1, off) \
  50         do {EMIT1(b1); EMIT(off, 4); } while (0)
  51 #define EMIT2_off32(b1, b2, off) \
  52         do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  53 #define EMIT3_off32(b1, b2, b3, off) \
  54         do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  55 #define EMIT4_off32(b1, b2, b3, b4, off) \
  56         do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  57
  58 static bool is_imm8(int value)
  59 {
  60         return value <= 127 && value >= -128;
  61 }
  62
  63 static bool is_simm32(s64 value)
  64 {
  65         return value == (s64) (s32) value;
  66 }
  67
  68 /* mov dst, src */
  69 #define EMIT_mov(DST, SRC) \
  70         do {if (DST != SRC) \
  71                 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  72         } while (0)
  73
  74 static int bpf_size_to_x86_bytes(int bpf_size)
  75 {
  76         if (bpf_size == BPF_W)
  77                 return 4;
  78         else if (bpf_size == BPF_H)
  79                 return 2;
  80         else if (bpf_size == BPF_B)
  81                 return 1;
  82         else if (bpf_size == BPF_DW)
  83                 return 4; /* imm32 */
  84         else
  85                 return 0;
  86 }
  87
  88 /* list of x86 cond jumps opcodes (. + s8)
  89  * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  90  */
  91 #define X86_JB  0x72
  92 #define X86_JAE 0x73
  93 #define X86_JE  0x74
  94 #define X86_JNE 0x75
  95 #define X86_JBE 0x76
  96 #define X86_JA  0x77
  97 #define X86_JGE 0x7D
  98 #define X86_JG  0x7F
  99
 100 static void bpf_flush_icache(void *start, void *end)
 101 {
 102         mm_segment_t old_fs = get_fs();
 103
 104         set_fs(KERNEL_DS);
 105         smp_wmb();
 106         flush_icache_range((unsigned long)start, (unsigned long)end);
 107         set_fs(old_fs);
 108 }
 109
 110 #define CHOOSE_LOAD_FUNC(K, func) \
 111         ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
 112
 113 /* pick a register outside of BPF range for JIT internal work */
 114 #define AUX_REG (MAX_BPF_JIT_REG + 1)
 115
 116 /* The following table maps BPF registers to x64 registers.
 117  *
 118  * x64 register r12 is unused, since if used as base address
 119  * register in load/store instructions, it always needs an
 120  * extra byte of encoding and is callee saved.
 121  *
 122  *  r9 caches skb->len - skb->data_len
 123  * r10 caches skb->data, and used for blinding (if enabled)
 124  */
 125 static const int reg2hex[] = {
 126         [BPF_REG_0] = 0,  /* rax */
 127         [BPF_REG_1] = 7,  /* rdi */
 128         [BPF_REG_2] = 6,  /* rsi */
 129         [BPF_REG_3] = 2,  /* rdx */
 130         [BPF_REG_4] = 1,  /* rcx */
 131         [BPF_REG_5] = 0,  /* r8 */
 132         [BPF_REG_6] = 3,  /* rbx callee saved */
 133         [BPF_REG_7] = 5,  /* r13 callee saved */
 134         [BPF_REG_8] = 6,  /* r14 callee saved */
 135         [BPF_REG_9] = 7,  /* r15 callee saved */
 136         [BPF_REG_FP] = 5, /* rbp readonly */
 137         [BPF_REG_AX] = 2, /* r10 temp register */
 138         [AUX_REG] = 3,    /* r11 temp register */
 139 };
 140
 141 /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
 142  * which need extra byte of encoding.
 143  * rax,rcx,...,rbp have simpler encoding
 144  */
 145 static bool is_ereg(u32 reg)
 146 {
 147         return (1 << reg) & (BIT(BPF_REG_5) |
 148                              BIT(AUX_REG) |
 149                              BIT(BPF_REG_7) |
 150                              BIT(BPF_REG_8) |
 151                              BIT(BPF_REG_9) |
 152                              BIT(BPF_REG_AX));
 153 }
 154
 155 /* add modifiers if 'reg' maps to x64 registers r8..r15 */
 156 static u8 add_1mod(u8 byte, u32 reg)
 157 {
 158         if (is_ereg(reg))
 159                 byte |= 1;
 160         return byte;
 161 }
 162
 163 static u8 add_2mod(u8 byte, u32 r1, u32 r2)
 164 {
 165         if (is_ereg(r1))
 166                 byte |= 1;
 167         if (is_ereg(r2))
 168                 byte |= 4;
 169         return byte;
 170 }
 171
 172 /* encode 'dst_reg' register into x64 opcode 'byte' */
 173 static u8 add_1reg(u8 byte, u32 dst_reg)
 174 {
 175         return byte + reg2hex[dst_reg];
 176 }
 177
 178 /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
 179 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
 180 {
 181         return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
 182 }
 183
 184 static void jit_fill_hole(void *area, unsigned int size)
 185 {
 186         /* fill whole space with int3 instructions */
 187         memset(area, 0xcc, size);
 188 }
 189
 190 struct jit_context {
 191         int cleanup_addr; /* epilogue code offset */
 192         bool seen_ld_abs;
 193         bool seen_ax_reg;
 194 };
 195
 196 /* maximum number of bytes emitted while JITing one eBPF insn */
 197 #define BPF_MAX_INSN_SIZE       128
 198 #define BPF_INSN_SAFETY         64
 199
 200 #define STACKSIZE \
 201         (MAX_BPF_STACK + \
 202          32 /* space for rbx, r13, r14, r15 */ + \
 203          8 /* space for skb_copy_bits() buffer */)
 204
 205 #define PROLOGUE_SIZE 48
 206
 207 /* emit x64 prologue code for BPF program and check it's size.
 208  * bpf_tail_call helper will skip it while jumping into another program
 209  */
 210 static void emit_prologue(u8 **pprog)
 211 {
 212         u8 *prog = *pprog;
 213         int cnt = 0;
 214
 215         EMIT1(0x55); /* push rbp */
 216         EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
 217
 218         /* sub rsp, STACKSIZE */
 219         EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);
 220
 221         /* all classic BPF filters use R6(rbx) save it */
 222
 223         /* mov qword ptr [rbp-X],rbx */
 224         EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);
 225
 226         /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
 227          * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
 228          * R8(r14). R9(r15) spill could be made conditional, but there is only
 229          * one 'bpf_error' return path out of helper functions inside bpf_jit.S
 230          * The overhead of extra spill is negligible for any filter other
 231          * than synthetic ones. Therefore not worth adding complexity.
 232          */
 233
 234         /* mov qword ptr [rbp-X],r13 */
 235         EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);
 236         /* mov qword ptr [rbp-X],r14 */
 237         EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);
 238         /* mov qword ptr [rbp-X],r15 */
 239         EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);
 240
 241         /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
 242          * we need to reset the counter to 0. It's done in two instructions,
 243          * resetting rax register to 0 (xor on eax gets 0 extended), and
 244          * moving it to the counter location.
 245          */
 246
 247         /* xor eax, eax */
 248         EMIT2(0x31, 0xc0);
 249         /* mov qword ptr [rbp-X], rax */
 250         EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);
 251
 252         BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
 253         *pprog = prog;
 254 }
 255
 256 /* generate the following code:
 257  * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
 258  *   if (index >= array->map.max_entries)
 259  *     goto out;
 260  *   if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
 261  *     goto out;
 262  *   prog = array->ptrs[index];
 263  *   if (prog == NULL)
 264  *     goto out;
 265  *   goto *(prog->bpf_func + prologue_size);
 266  * out:
 267  */
 268 static void emit_bpf_tail_call(u8 **pprog)
 269 {
 270         u8 *prog = *pprog;
 271         int label1, label2, label3;
 272         int cnt = 0;
 273
 274         /* rdi - pointer to ctx
 275          * rsi - pointer to bpf_array
 276          * rdx - index in bpf_array
 277          */
 278
 279         /* if (index >= array->map.max_entries)
 280          *   goto out;
 281          */
 282         EMIT4(0x48, 0x8B, 0x46,                   /* mov rax, qword ptr [rsi + 16] */
 283               offsetof(struct bpf_array, map.max_entries));
 284         EMIT3(0x48, 0x39, 0xD0);                  /* cmp rax, rdx */
 285 #define OFFSET1 47 /* number of bytes to jump */
 286         EMIT2(X86_JBE, OFFSET1);                  /* jbe out */
 287         label1 = cnt;
 288
 289         /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
 290          *   goto out;
 291          */
 292         EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
 293         EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT);     /* cmp eax, MAX_TAIL_CALL_CNT */
 294 #define OFFSET2 36
 295         EMIT2(X86_JA, OFFSET2);                   /* ja out */
 296         label2 = cnt;
 297         EMIT3(0x83, 0xC0, 0x01);                  /* add eax, 1 */
 298         EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
 299
 300         /* prog = array->ptrs[index]; */
 301         EMIT4_off32(0x48, 0x8D, 0x84, 0xD6,       /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
 302                     offsetof(struct bpf_array, ptrs));
 303         EMIT3(0x48, 0x8B, 0x00);                  /* mov rax, qword ptr [rax] */
 304
 305         /* if (prog == NULL)
 306          *   goto out;
 307          */
 308         EMIT4(0x48, 0x83, 0xF8, 0x00);            /* cmp rax, 0 */
 309 #define OFFSET3 10
 310         EMIT2(X86_JE, OFFSET3);                   /* je out */
 311         label3 = cnt;
 312
 313         /* goto *(prog->bpf_func + prologue_size); */
 314         EMIT4(0x48, 0x8B, 0x40,                   /* mov rax, qword ptr [rax + 32] */
 315               offsetof(struct bpf_prog, bpf_func));
 316         EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE);   /* add rax, prologue_size */
 317
 318         /* now we're ready to jump into next BPF program
 319          * rdi == ctx (1st arg)
 320          * rax == prog->bpf_func + prologue_size
 321          */
 322         EMIT2(0xFF, 0xE0);                        /* jmp rax */
 323
 324         /* out: */
 325         BUILD_BUG_ON(cnt - label1 != OFFSET1);
 326         BUILD_BUG_ON(cnt - label2 != OFFSET2);
 327         BUILD_BUG_ON(cnt - label3 != OFFSET3);
 328         *pprog = prog;
 329 }
 330
 331
 332 static void emit_load_skb_data_hlen(u8 **pprog)
 333 {
 334         u8 *prog = *pprog;
 335         int cnt = 0;
 336
 337         /* r9d = skb->len - skb->data_len (headlen)
 338          * r10 = skb->data
 339          */
 340         /* mov %r9d, off32(%rdi) */
 341         EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
 342
 343         /* sub %r9d, off32(%rdi) */
 344         EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
 345
 346         /* mov %r10, off32(%rdi) */
 347         EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
 348         *pprog = prog;
 349 }
 350
 351 static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
 352                   int oldproglen, struct jit_context *ctx)
 353 {
 354         struct bpf_insn *insn = bpf_prog->insnsi;
 355         int insn_cnt = bpf_prog->len;
 356         bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
 357         bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
 358         bool seen_exit = false;
 359         u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
 360         int i, cnt = 0;
 361         int proglen = 0;
 362         u8 *prog = temp;
 363
 364         emit_prologue(&prog);
 365
 366         if (seen_ld_abs)
 367                 emit_load_skb_data_hlen(&prog);
 368
 369         for (i = 0; i < insn_cnt; i++, insn++) {
 370                 const s32 imm32 = insn->imm;
 371                 u32 dst_reg = insn->dst_reg;
 372                 u32 src_reg = insn->src_reg;
 373                 u8 b1 = 0, b2 = 0, b3 = 0;
 374                 s64 jmp_offset;
 375                 u8 jmp_cond;
 376                 bool reload_skb_data;
 377                 int ilen;
 378                 u8 *func;
 379
 380                 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
 381                         ctx->seen_ax_reg = seen_ax_reg = true;
 382
 383                 switch (insn->code) {
 384                         /* ALU */
 385                 case BPF_ALU | BPF_ADD | BPF_X:
 386                 case BPF_ALU | BPF_SUB | BPF_X:
 387                 case BPF_ALU | BPF_AND | BPF_X:
 388                 case BPF_ALU | BPF_OR | BPF_X:
 389                 case BPF_ALU | BPF_XOR | BPF_X:
 390                 case BPF_ALU64 | BPF_ADD | BPF_X:
 391                 case BPF_ALU64 | BPF_SUB | BPF_X:
 392                 case BPF_ALU64 | BPF_AND | BPF_X:
 393                 case BPF_ALU64 | BPF_OR | BPF_X:
 394                 case BPF_ALU64 | BPF_XOR | BPF_X:
 395                         switch (BPF_OP(insn->code)) {
 396                         case BPF_ADD: b2 = 0x01; break;
 397                         case BPF_SUB: b2 = 0x29; break;
 398                         case BPF_AND: b2 = 0x21; break;
 399                         case BPF_OR: b2 = 0x09; break;
 400                         case BPF_XOR: b2 = 0x31; break;
 401                         }
 402                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 403                                 EMIT1(add_2mod(0x48, dst_reg, src_reg));
 404                         else if (is_ereg(dst_reg) || is_ereg(src_reg))
 405                                 EMIT1(add_2mod(0x40, dst_reg, src_reg));
 406                         EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
 407                         break;
 408
 409                         /* mov dst, src */
 410                 case BPF_ALU64 | BPF_MOV | BPF_X:
 411                         EMIT_mov(dst_reg, src_reg);
 412                         break;
 413
 414                         /* mov32 dst, src */
 415                 case BPF_ALU | BPF_MOV | BPF_X:
 416                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 417                                 EMIT1(add_2mod(0x40, dst_reg, src_reg));
 418                         EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
 419                         break;
 420
 421                         /* neg dst */
 422                 case BPF_ALU | BPF_NEG:
 423                 case BPF_ALU64 | BPF_NEG:
 424                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 425                                 EMIT1(add_1mod(0x48, dst_reg));
 426                         else if (is_ereg(dst_reg))
 427                                 EMIT1(add_1mod(0x40, dst_reg));
 428                         EMIT2(0xF7, add_1reg(0xD8, dst_reg));
 429                         break;
 430
 431                 case BPF_ALU | BPF_ADD | BPF_K:
 432                 case BPF_ALU | BPF_SUB | BPF_K:
 433                 case BPF_ALU | BPF_AND | BPF_K:
 434                 case BPF_ALU | BPF_OR | BPF_K:
 435                 case BPF_ALU | BPF_XOR | BPF_K:
 436                 case BPF_ALU64 | BPF_ADD | BPF_K:
 437                 case BPF_ALU64 | BPF_SUB | BPF_K:
 438                 case BPF_ALU64 | BPF_AND | BPF_K:
 439                 case BPF_ALU64 | BPF_OR | BPF_K:
 440                 case BPF_ALU64 | BPF_XOR | BPF_K:
 441                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 442                                 EMIT1(add_1mod(0x48, dst_reg));
 443                         else if (is_ereg(dst_reg))
 444                                 EMIT1(add_1mod(0x40, dst_reg));
 445
 446                         switch (BPF_OP(insn->code)) {
 447                         case BPF_ADD: b3 = 0xC0; break;
 448                         case BPF_SUB: b3 = 0xE8; break;
 449                         case BPF_AND: b3 = 0xE0; break;
 450                         case BPF_OR: b3 = 0xC8; break;
 451                         case BPF_XOR: b3 = 0xF0; break;
 452                         }
 453
 454                         if (is_imm8(imm32))
 455                                 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
 456                         else
 457                                 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
 458                         break;
 459
 460                 case BPF_ALU64 | BPF_MOV | BPF_K:
 461                         /* optimization: if imm32 is positive,
 462                          * use 'mov eax, imm32' (which zero-extends imm32)
 463                          * to save 2 bytes
 464                          */
 465                         if (imm32 < 0) {
 466                                 /* 'mov rax, imm32' sign extends imm32 */
 467                                 b1 = add_1mod(0x48, dst_reg);
 468                                 b2 = 0xC7;
 469                                 b3 = 0xC0;
 470                                 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
 471                                 break;
 472                         }
 473
 474                 case BPF_ALU | BPF_MOV | BPF_K:
 475                         /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
 476                          * to save 3 bytes.
 477                          */
 478                         if (imm32 == 0) {
 479                                 if (is_ereg(dst_reg))
 480                                         EMIT1(add_2mod(0x40, dst_reg, dst_reg));
 481                                 b2 = 0x31; /* xor */
 482                                 b3 = 0xC0;
 483                                 EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
 484                                 break;
 485                         }
 486
 487                         /* mov %eax, imm32 */
 488                         if (is_ereg(dst_reg))
 489                                 EMIT1(add_1mod(0x40, dst_reg));
 490                         EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
 491                         break;
 492
 493                 case BPF_LD | BPF_IMM | BPF_DW:
 494                         /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
 495                          * to save 7 bytes.
 496                          */
 497                         if (insn[0].imm == 0 && insn[1].imm == 0) {
 498                                 b1 = add_2mod(0x48, dst_reg, dst_reg);
 499                                 b2 = 0x31; /* xor */
 500                                 b3 = 0xC0;
 501                                 EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
 502
 503                                 insn++;
 504                                 i++;
 505                                 break;
 506                         }
 507
 508                         /* movabsq %rax, imm64 */
 509                         EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
 510                         EMIT(insn[0].imm, 4);
 511                         EMIT(insn[1].imm, 4);
 512
 513                         insn++;
 514                         i++;
 515                         break;
 516
 517                         /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
 518                 case BPF_ALU | BPF_MOD | BPF_X:
 519                 case BPF_ALU | BPF_DIV | BPF_X:
 520                 case BPF_ALU | BPF_MOD | BPF_K:
 521                 case BPF_ALU | BPF_DIV | BPF_K:
 522                 case BPF_ALU64 | BPF_MOD | BPF_X:
 523                 case BPF_ALU64 | BPF_DIV | BPF_X:
 524                 case BPF_ALU64 | BPF_MOD | BPF_K:
 525                 case BPF_ALU64 | BPF_DIV | BPF_K:
 526                         EMIT1(0x50); /* push rax */
 527                         EMIT1(0x52); /* push rdx */
 528
 529                         if (BPF_SRC(insn->code) == BPF_X)
 530                                 /* mov r11, src_reg */
 531                                 EMIT_mov(AUX_REG, src_reg);
 532                         else
 533                                 /* mov r11, imm32 */
 534                                 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
 535
 536                         /* mov rax, dst_reg */
 537                         EMIT_mov(BPF_REG_0, dst_reg);
 538
 539                         /* xor edx, edx
 540                          * equivalent to 'xor rdx, rdx', but one byte less
 541                          */
 542                         EMIT2(0x31, 0xd2);
 543
 544                         if (BPF_SRC(insn->code) == BPF_X) {
 545                                 /* if (src_reg == 0) return 0 */
 546
 547                                 /* cmp r11, 0 */
 548                                 EMIT4(0x49, 0x83, 0xFB, 0x00);
 549
 550                                 /* jne .+9 (skip over pop, pop, xor and jmp) */
 551                                 EMIT2(X86_JNE, 1 + 1 + 2 + 5);
 552                                 EMIT1(0x5A); /* pop rdx */
 553                                 EMIT1(0x58); /* pop rax */
 554                                 EMIT2(0x31, 0xc0); /* xor eax, eax */
 555
 556                                 /* jmp cleanup_addr
 557                                  * addrs[i] - 11, because there are 11 bytes
 558                                  * after this insn: div, mov, pop, pop, mov
 559                                  */
 560                                 jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
 561                                 EMIT1_off32(0xE9, jmp_offset);
 562                         }
 563
 564                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 565                                 /* div r11 */
 566                                 EMIT3(0x49, 0xF7, 0xF3);
 567                         else
 568                                 /* div r11d */
 569                                 EMIT3(0x41, 0xF7, 0xF3);
 570
 571                         if (BPF_OP(insn->code) == BPF_MOD)
 572                                 /* mov r11, rdx */
 573                                 EMIT3(0x49, 0x89, 0xD3);
 574                         else
 575                                 /* mov r11, rax */
 576                                 EMIT3(0x49, 0x89, 0xC3);
 577
 578                         EMIT1(0x5A); /* pop rdx */
 579                         EMIT1(0x58); /* pop rax */
 580
 581                         /* mov dst_reg, r11 */
 582                         EMIT_mov(dst_reg, AUX_REG);
 583                         break;
 584
 585                 case BPF_ALU | BPF_MUL | BPF_K:
 586                 case BPF_ALU | BPF_MUL | BPF_X:
 587                 case BPF_ALU64 | BPF_MUL | BPF_K:
 588                 case BPF_ALU64 | BPF_MUL | BPF_X:
 589                         EMIT1(0x50); /* push rax */
 590                         EMIT1(0x52); /* push rdx */
 591
 592                         /* mov r11, dst_reg */
 593                         EMIT_mov(AUX_REG, dst_reg);
 594
 595                         if (BPF_SRC(insn->code) == BPF_X)
 596                                 /* mov rax, src_reg */
 597                                 EMIT_mov(BPF_REG_0, src_reg);
 598                         else
 599                                 /* mov rax, imm32 */
 600                                 EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
 601
 602                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 603                                 EMIT1(add_1mod(0x48, AUX_REG));
 604                         else if (is_ereg(AUX_REG))
 605                                 EMIT1(add_1mod(0x40, AUX_REG));
 606                         /* mul(q) r11 */
 607                         EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
 608
 609                         /* mov r11, rax */
 610                         EMIT_mov(AUX_REG, BPF_REG_0);
 611
 612                         EMIT1(0x5A); /* pop rdx */
 613                         EMIT1(0x58); /* pop rax */
 614
 615                         /* mov dst_reg, r11 */
 616                         EMIT_mov(dst_reg, AUX_REG);
 617                         break;
 618
 619                         /* shifts */
 620                 case BPF_ALU | BPF_LSH | BPF_K:
 621                 case BPF_ALU | BPF_RSH | BPF_K:
 622                 case BPF_ALU | BPF_ARSH | BPF_K:
 623                 case BPF_ALU64 | BPF_LSH | BPF_K:
 624                 case BPF_ALU64 | BPF_RSH | BPF_K:
 625                 case BPF_ALU64 | BPF_ARSH | BPF_K:
 626                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 627                                 EMIT1(add_1mod(0x48, dst_reg));
 628                         else if (is_ereg(dst_reg))
 629                                 EMIT1(add_1mod(0x40, dst_reg));
 630
 631                         switch (BPF_OP(insn->code)) {
 632                         case BPF_LSH: b3 = 0xE0; break;
 633                         case BPF_RSH: b3 = 0xE8; break;
 634                         case BPF_ARSH: b3 = 0xF8; break;
 635                         }
 636                         EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
 637                         break;
 638
 639                 case BPF_ALU | BPF_LSH | BPF_X:
 640                 case BPF_ALU | BPF_RSH | BPF_X:
 641                 case BPF_ALU | BPF_ARSH | BPF_X:
 642                 case BPF_ALU64 | BPF_LSH | BPF_X:
 643                 case BPF_ALU64 | BPF_RSH | BPF_X:
 644                 case BPF_ALU64 | BPF_ARSH | BPF_X:
 645
 646                         /* check for bad case when dst_reg == rcx */
 647                         if (dst_reg == BPF_REG_4) {
 648                                 /* mov r11, dst_reg */
 649                                 EMIT_mov(AUX_REG, dst_reg);
 650                                 dst_reg = AUX_REG;
 651                         }
 652
 653                         if (src_reg != BPF_REG_4) { /* common case */
 654                                 EMIT1(0x51); /* push rcx */
 655
 656                                 /* mov rcx, src_reg */
 657                                 EMIT_mov(BPF_REG_4, src_reg);
 658                         }
 659
 660                         /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
 661                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 662                                 EMIT1(add_1mod(0x48, dst_reg));
 663                         else if (is_ereg(dst_reg))
 664                                 EMIT1(add_1mod(0x40, dst_reg));
 665
 666                         switch (BPF_OP(insn->code)) {
 667                         case BPF_LSH: b3 = 0xE0; break;
 668                         case BPF_RSH: b3 = 0xE8; break;
 669                         case BPF_ARSH: b3 = 0xF8; break;
 670                         }
 671                         EMIT2(0xD3, add_1reg(b3, dst_reg));
 672
 673                         if (src_reg != BPF_REG_4)
 674                                 EMIT1(0x59); /* pop rcx */
 675
 676                         if (insn->dst_reg == BPF_REG_4)
 677                                 /* mov dst_reg, r11 */
 678                                 EMIT_mov(insn->dst_reg, AUX_REG);
 679                         break;
 680
 681                 case BPF_ALU | BPF_END | BPF_FROM_BE:
 682                         switch (imm32) {
 683                         case 16:
 684                                 /* emit 'ror %ax, 8' to swap lower 2 bytes */
 685                                 EMIT1(0x66);
 686                                 if (is_ereg(dst_reg))
 687                                         EMIT1(0x41);
 688                                 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
 689
 690                                 /* emit 'movzwl eax, ax' */
 691                                 if (is_ereg(dst_reg))
 692                                         EMIT3(0x45, 0x0F, 0xB7);
 693                                 else
 694                                         EMIT2(0x0F, 0xB7);
 695                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
 696                                 break;
 697                         case 32:
 698                                 /* emit 'bswap eax' to swap lower 4 bytes */
 699                                 if (is_ereg(dst_reg))
 700                                         EMIT2(0x41, 0x0F);
 701                                 else
 702                                         EMIT1(0x0F);
 703                                 EMIT1(add_1reg(0xC8, dst_reg));
 704                                 break;
 705                         case 64:
 706                                 /* emit 'bswap rax' to swap 8 bytes */
 707                                 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
 708                                       add_1reg(0xC8, dst_reg));
 709                                 break;
 710                         }
 711                         break;
 712
 713                 case BPF_ALU | BPF_END | BPF_FROM_LE:
 714                         switch (imm32) {
 715                         case 16:
 716                                 /* emit 'movzwl eax, ax' to zero extend 16-bit
 717                                  * into 64 bit
 718                                  */
 719                                 if (is_ereg(dst_reg))
 720                                         EMIT3(0x45, 0x0F, 0xB7);
 721                                 else
 722                                         EMIT2(0x0F, 0xB7);
 723                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
 724                                 break;
 725                         case 32:
 726                                 /* emit 'mov eax, eax' to clear upper 32-bits */
 727                                 if (is_ereg(dst_reg))
 728                                         EMIT1(0x45);
 729                                 EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
 730                                 break;
 731                         case 64:
 732                                 /* nop */
 733                                 break;
 734                         }
 735                         break;
 736
 737                         /* ST: *(u8*)(dst_reg + off) = imm */
 738                 case BPF_ST | BPF_MEM | BPF_B:
 739                         if (is_ereg(dst_reg))
 740                                 EMIT2(0x41, 0xC6);
 741                         else
 742                                 EMIT1(0xC6);
 743                         goto st;
 744                 case BPF_ST | BPF_MEM | BPF_H:
 745                         if (is_ereg(dst_reg))
 746                                 EMIT3(0x66, 0x41, 0xC7);
 747                         else
 748                                 EMIT2(0x66, 0xC7);
 749                         goto st;
 750                 case BPF_ST | BPF_MEM | BPF_W:
 751                         if (is_ereg(dst_reg))
 752                                 EMIT2(0x41, 0xC7);
 753                         else
 754                                 EMIT1(0xC7);
 755                         goto st;
 756                 case BPF_ST | BPF_MEM | BPF_DW:
 757                         EMIT2(add_1mod(0x48, dst_reg), 0xC7);
 758
 759 st:                     if (is_imm8(insn->off))
 760                                 EMIT2(add_1reg(0x40, dst_reg), insn->off);
 761                         else
 762                                 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
 763
 764                         EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
 765                         break;
 766
 767                         /* STX: *(u8*)(dst_reg + off) = src_reg */
 768                 case BPF_STX | BPF_MEM | BPF_B:
 769                         /* emit 'mov byte ptr [rax + off], al' */
 770                         if (is_ereg(dst_reg) || is_ereg(src_reg) ||
 771                             /* have to add extra byte for x86 SIL, DIL regs */
 772                             src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
 773                                 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
 774                         else
 775                                 EMIT1(0x88);
 776                         goto stx;
 777                 case BPF_STX | BPF_MEM | BPF_H:
 778                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 779                                 EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
 780                         else
 781                                 EMIT2(0x66, 0x89);
 782                         goto stx;
 783                 case BPF_STX | BPF_MEM | BPF_W:
 784                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 785                                 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
 786                         else
 787                                 EMIT1(0x89);
 788                         goto stx;
 789                 case BPF_STX | BPF_MEM | BPF_DW:
 790                         EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
 791 stx:                    if (is_imm8(insn->off))
 792                                 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
 793                         else
 794                                 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
 795                                             insn->off);
 796                         break;
 797
 798                         /* LDX: dst_reg = *(u8*)(src_reg + off) */
 799                 case BPF_LDX | BPF_MEM | BPF_B:
 800                         /* emit 'movzx rax, byte ptr [rax + off]' */
 801                         EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
 802                         goto ldx;
 803                 case BPF_LDX | BPF_MEM | BPF_H:
 804                         /* emit 'movzx rax, word ptr [rax + off]' */
 805                         EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
 806                         goto ldx;
 807                 case BPF_LDX | BPF_MEM | BPF_W:
 808                         /* emit 'mov eax, dword ptr [rax+0x14]' */
 809                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 810                                 EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
 811                         else
 812                                 EMIT1(0x8B);
 813                         goto ldx;
 814                 case BPF_LDX | BPF_MEM | BPF_DW:
 815                         /* emit 'mov rax, qword ptr [rax+0x14]' */
 816                         EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
 817 ldx:                    /* if insn->off == 0 we can save one extra byte, but
 818                          * special case of x86 r13 which always needs an offset
 819                          * is not worth the hassle
 820                          */
 821                         if (is_imm8(insn->off))
 822                                 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
 823                         else
 824                                 EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
 825                                             insn->off);
 826                         break;
 827
 828                         /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
 829                 case BPF_STX | BPF_XADD | BPF_W:
 830                         /* emit 'lock add dword ptr [rax + off], eax' */
 831                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 832                                 EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
 833                         else
 834                                 EMIT2(0xF0, 0x01);
 835                         goto xadd;
 836                 case BPF_STX | BPF_XADD | BPF_DW:
 837                         EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
 838 xadd:                   if (is_imm8(insn->off))
 839                                 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
 840                         else
 841                                 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
 842                                             insn->off);
 843                         break;
 844
 845                         /* call */
 846                 case BPF_JMP | BPF_CALL:
 847                         func = (u8 *) __bpf_call_base + imm32;
 848                         jmp_offset = func - (image + addrs[i]);
 849                         if (seen_ld_abs) {
 850                                 reload_skb_data = bpf_helper_changes_pkt_data(func);
 851                                 if (reload_skb_data) {
 852                                         EMIT1(0x57); /* push %rdi */
 853                                         jmp_offset += 22; /* pop, mov, sub, mov */
 854                                 } else {
 855                                         EMIT2(0x41, 0x52); /* push %r10 */
 856                                         EMIT2(0x41, 0x51); /* push %r9 */
 857                                         /* need to adjust jmp offset, since
 858                                          * pop %r9, pop %r10 take 4 bytes after call insn
 859                                          */
 860                                         jmp_offset += 4;
 861                                 }
 862                         }
 863                         if (!imm32 || !is_simm32(jmp_offset)) {
 864                                 pr_err("unsupported bpf func %d addr %p image %p\n",
 865                                        imm32, func, image);
 866                                 return -EINVAL;
 867                         }
 868                         EMIT1_off32(0xE8, jmp_offset);
 869                         if (seen_ld_abs) {
 870                                 if (reload_skb_data) {
 871                                         EMIT1(0x5F); /* pop %rdi */
 872                                         emit_load_skb_data_hlen(&prog);
 873                                 } else {
 874                                         EMIT2(0x41, 0x59); /* pop %r9 */
 875                                         EMIT2(0x41, 0x5A); /* pop %r10 */
 876                                 }
 877                         }
 878                         break;
 879
 880                 case BPF_JMP | BPF_TAIL_CALL:
 881                         emit_bpf_tail_call(&prog);
 882                         break;
 883
 884                         /* cond jump */
 885                 case BPF_JMP | BPF_JEQ | BPF_X:
 886                 case BPF_JMP | BPF_JNE | BPF_X:
 887                 case BPF_JMP | BPF_JGT | BPF_X:
 888                 case BPF_JMP | BPF_JGE | BPF_X:
 889                 case BPF_JMP | BPF_JSGT | BPF_X:
 890                 case BPF_JMP | BPF_JSGE | BPF_X:
 891                         /* cmp dst_reg, src_reg */
 892                         EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
 893                               add_2reg(0xC0, dst_reg, src_reg));
 894                         goto emit_cond_jmp;
 895
 896                 case BPF_JMP | BPF_JSET | BPF_X:
 897                         /* test dst_reg, src_reg */
 898                         EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
 899                               add_2reg(0xC0, dst_reg, src_reg));
 900                         goto emit_cond_jmp;
 901
 902                 case BPF_JMP | BPF_JSET | BPF_K:
 903                         /* test dst_reg, imm32 */
 904                         EMIT1(add_1mod(0x48, dst_reg));
 905                         EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
 906                         goto emit_cond_jmp;
 907
 908                 case BPF_JMP | BPF_JEQ | BPF_K:
 909                 case BPF_JMP | BPF_JNE | BPF_K:
 910                 case BPF_JMP | BPF_JGT | BPF_K:
 911                 case BPF_JMP | BPF_JGE | BPF_K:
 912                 case BPF_JMP | BPF_JSGT | BPF_K:
 913                 case BPF_JMP | BPF_JSGE | BPF_K:
 914                         /* cmp dst_reg, imm8/32 */
 915                         EMIT1(add_1mod(0x48, dst_reg));
 916
 917                         if (is_imm8(imm32))
 918                                 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
 919                         else
 920                                 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
 921
 922 emit_cond_jmp:          /* convert BPF opcode to x86 */
 923                         switch (BPF_OP(insn->code)) {
 924                         case BPF_JEQ:
 925                                 jmp_cond = X86_JE;
 926                                 break;
 927                         case BPF_JSET:
 928                         case BPF_JNE:
 929                                 jmp_cond = X86_JNE;
 930                                 break;
 931                         case BPF_JGT:
 932                                 /* GT is unsigned '>', JA in x86 */
 933                                 jmp_cond = X86_JA;
 934                                 break;
 935                         case BPF_JGE:
 936                                 /* GE is unsigned '>=', JAE in x86 */
 937                                 jmp_cond = X86_JAE;
 938                                 break;
 939                         case BPF_JSGT:
 940                                 /* signed '>', GT in x86 */
 941                                 jmp_cond = X86_JG;
 942                                 break;
 943                         case BPF_JSGE:
 944                                 /* signed '>=', GE in x86 */
 945                                 jmp_cond = X86_JGE;
 946                                 break;
 947                         default: /* to silence gcc warning */
 948                                 return -EFAULT;
 949                         }
 950                         jmp_offset = addrs[i + insn->off] - addrs[i];
 951                         if (is_imm8(jmp_offset)) {
 952                                 EMIT2(jmp_cond, jmp_offset);
 953                         } else if (is_simm32(jmp_offset)) {
 954                                 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
 955                         } else {
 956                                 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
 957                                 return -EFAULT;
 958                         }
 959
 960                         break;
 961
 962                 case BPF_JMP | BPF_JA:
 963                         jmp_offset = addrs[i + insn->off] - addrs[i];
 964                         if (!jmp_offset)
 965                                 /* optimize out nop jumps */
 966                                 break;
 967 emit_jmp:
 968                         if (is_imm8(jmp_offset)) {
 969                                 EMIT2(0xEB, jmp_offset);
 970                         } else if (is_simm32(jmp_offset)) {
 971                                 EMIT1_off32(0xE9, jmp_offset);
 972                         } else {
 973                                 pr_err("jmp gen bug %llx\n", jmp_offset);
 974                                 return -EFAULT;
 975                         }
 976                         break;
 977
 978                 case BPF_LD | BPF_IND | BPF_W:
 979                         func = sk_load_word;
 980                         goto common_load;
 981                 case BPF_LD | BPF_ABS | BPF_W:
 982                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
 983 common_load:
 984                         ctx->seen_ld_abs = seen_ld_abs = true;
 985                         jmp_offset = func - (image + addrs[i]);
 986                         if (!func || !is_simm32(jmp_offset)) {
 987                                 pr_err("unsupported bpf func %d addr %p image %p\n",
 988                                        imm32, func, image);
 989                                 return -EINVAL;
 990                         }
 991                         if (BPF_MODE(insn->code) == BPF_ABS) {
 992                                 /* mov %esi, imm32 */
 993                                 EMIT1_off32(0xBE, imm32);
 994                         } else {
 995                                 /* mov %rsi, src_reg */
 996                                 EMIT_mov(BPF_REG_2, src_reg);
 997                                 if (imm32) {
 998                                         if (is_imm8(imm32))
 999                                                 /* add %esi, imm8 */
1000                                                 EMIT3(0x83, 0xC6, imm32);
1001                                         else
1002                                                 /* add %esi, imm32 */
1003                                                 EMIT2_off32(0x81, 0xC6, imm32);
1004                                 }
1005                         }
1006                         /* skb pointer is in R6 (%rbx), it will be copied into
1007                          * %rdi if skb_copy_bits() call is necessary.
1008                          * sk_load_* helpers also use %r10 and %r9d.
1009                          * See bpf_jit.S
1010                          */
1011                         if (seen_ax_reg)
1012                                 /* r10 = skb->data, mov %r10, off32(%rbx) */
1013                                 EMIT3_off32(0x4c, 0x8b, 0x93,
1014                                             offsetof(struct sk_buff, data));
1015                         EMIT1_off32(0xE8, jmp_offset); /* call */
1016                         break;
1017
1018                 case BPF_LD | BPF_IND | BPF_H:
1019                         func = sk_load_half;
1020                         goto common_load;
1021                 case BPF_LD | BPF_ABS | BPF_H:
1022                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
1023                         goto common_load;
1024                 case BPF_LD | BPF_IND | BPF_B:
1025                         func = sk_load_byte;
1026                         goto common_load;
1027                 case BPF_LD | BPF_ABS | BPF_B:
1028                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
1029                         goto common_load;
1030
1031                 case BPF_JMP | BPF_EXIT:
1032                         if (seen_exit) {
1033                                 jmp_offset = ctx->cleanup_addr - addrs[i];
1034                                 goto emit_jmp;
1035                         }
1036                         seen_exit = true;
1037                         /* update cleanup_addr */
1038                         ctx->cleanup_addr = proglen;
1039                         /* mov rbx, qword ptr [rbp-X] */
1040                         EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);
1041                         /* mov r13, qword ptr [rbp-X] */
1042                         EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);
1043                         /* mov r14, qword ptr [rbp-X] */
1044                         EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);
1045                         /* mov r15, qword ptr [rbp-X] */
1046                         EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);
1047
1048                         EMIT1(0xC9); /* leave */
1049                         EMIT1(0xC3); /* ret */
1050                         break;
1051
1052                 default:
1053                         /* By design x64 JIT should support all BPF instructions
1054                          * This error will be seen if new instruction was added
1055                          * to interpreter, but not to JIT
1056                          * or if there is junk in bpf_prog
1057                          */
1058                         pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
1059                         return -EINVAL;
1060                 }
1061
1062                 ilen = prog - temp;
1063                 if (ilen > BPF_MAX_INSN_SIZE) {
1064                         pr_err("bpf_jit: fatal insn size error\n");
1065                         return -EFAULT;
1066                 }
1067
1068                 if (image) {
1069                         if (unlikely(proglen + ilen > oldproglen)) {
1070                                 pr_err("bpf_jit: fatal error\n");
1071                                 return -EFAULT;
1072                         }
1073                         memcpy(image + proglen, temp, ilen);
1074                 }
1075                 proglen += ilen;
1076                 addrs[i] = proglen;
1077                 prog = temp;
1078         }
1079         return proglen;
1080 }
1081
1082 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
1083 {
1084         struct bpf_binary_header *header = NULL;
1085         struct bpf_prog *tmp, *orig_prog = prog;
1086         int proglen, oldproglen = 0;
1087         struct jit_context ctx = {};
1088         bool tmp_blinded = false;
1089         u8 *image = NULL;
1090         int *addrs;
1091         int pass;
1092         int i;
1093
1094         if (!bpf_jit_enable)
1095                 return orig_prog;
1096
1097         tmp = bpf_jit_blind_constants(prog);
1098         /* If blinding was requested and we failed during blinding,
1099          * we must fall back to the interpreter.
1100          */
1101         if (IS_ERR(tmp))
1102                 return orig_prog;
1103         if (tmp != prog) {
1104                 tmp_blinded = true;
1105                 prog = tmp;
1106         }
1107
1108         addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
1109         if (!addrs) {
1110                 prog = orig_prog;
1111                 goto out;
1112         }
1113
1114         /* Before first pass, make a rough estimation of addrs[]
1115          * each bpf instruction is translated to less than 64 bytes
1116          */
1117         for (proglen = 0, i = 0; i < prog->len; i++) {
1118                 proglen += 64;
1119                 addrs[i] = proglen;
1120         }
1121         ctx.cleanup_addr = proglen;
1122
1123         /* JITed image shrinks with every pass and the loop iterates
1124          * until the image stops shrinking. Very large bpf programs
1125          * may converge on the last pass. In such case do one more
1126          * pass to emit the final image
1127          */
1128         for (pass = 0; pass < 10 || image; pass++) {
1129                 proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
1130                 if (proglen <= 0) {
1131                         image = NULL;
1132                         if (header)
1133                                 bpf_jit_binary_free(header);
1134                         prog = orig_prog;
1135                         goto out_addrs;
1136                 }
1137                 if (image) {
1138                         if (proglen != oldproglen) {
1139                                 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
1140                                        proglen, oldproglen);
1141                                 prog = orig_prog;
1142                                 goto out_addrs;
1143                         }
1144                         break;
1145                 }
1146                 if (proglen == oldproglen) {
1147                         header = bpf_jit_binary_alloc(proglen, &image,
1148                                                       1, jit_fill_hole);
1149                         if (!header) {
1150                                 prog = orig_prog;
1151                                 goto out_addrs;
1152                         }
1153                 }
1154                 oldproglen = proglen;
1155         }
1156
1157         if (bpf_jit_enable > 1)
1158                 bpf_jit_dump(prog->len, proglen, pass + 1, image);
1159
1160         if (image) {
1161                 bpf_flush_icache(header, image + proglen);
1162                 bpf_jit_binary_lock_ro(header);
1163                 prog->bpf_func = (void *)image;
1164                 prog->jited = 1;
1165         } else {
1166                 prog = orig_prog;
1167         }
1168
1169 out_addrs:
1170         kfree(addrs);
1171 out:
1172         if (tmp_blinded)
1173                 bpf_jit_prog_release_other(prog, prog == orig_prog ?
1174                                            tmp : orig_prog);
1175         return prog;
1176 }