arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69
  70 #define CREATE_TRACE_POINTS
  71 #include "trace.h"
  72
  73 #define MAX_IO_MSRS 256
  74 #define KVM_MAX_MCE_BANKS 32
  75 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  77
  78 #define emul_to_vcpu(ctxt) \
  79         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  80
  81 /* EFER defaults:
  82  * - enable syscall per default because its emulated by KVM
  83  * - enable LME and LMA per default on 64 bit KVM
  84  */
  85 #ifdef CONFIG_X86_64
  86 static
  87 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  88 #else
  89 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  90 #endif
  91
  92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  94
  95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  96                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  97
  98 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  99 static void process_nmi(struct kvm_vcpu *vcpu);
 100 static void enter_smm(struct kvm_vcpu *vcpu);
 101 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 102
 103 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 104 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 105
 106 static bool __read_mostly ignore_msrs = 0;
 107 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 108
 109 unsigned int min_timer_period_us = 500;
 110 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly kvmclock_periodic_sync = true;
 113 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 114
 115 bool __read_mostly kvm_has_tsc_control;
 116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 117 u32  __read_mostly kvm_max_guest_tsc_khz;
 118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 119 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 121 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 123 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 125
 126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 127 static u32 __read_mostly tsc_tolerance_ppm = 250;
 128 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 129
 130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 131 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 132 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 133
 134 static bool __read_mostly vector_hashing = true;
 135 module_param(vector_hashing, bool, S_IRUGO);
 136
 137 static bool __read_mostly backwards_tsc_observed = false;
 138
 139 #define KVM_NR_SHARED_MSRS 16
 140
 141 struct kvm_shared_msrs_global {
 142         int nr;
 143         u32 msrs[KVM_NR_SHARED_MSRS];
 144 };
 145
 146 struct kvm_shared_msrs {
 147         struct user_return_notifier urn;
 148         bool registered;
 149         struct kvm_shared_msr_values {
 150                 u64 host;
 151                 u64 curr;
 152         } values[KVM_NR_SHARED_MSRS];
 153 };
 154
 155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 156 static struct kvm_shared_msrs __percpu *shared_msrs;
 157
 158 struct kvm_stats_debugfs_item debugfs_entries[] = {
 159         { "pf_fixed", VCPU_STAT(pf_fixed) },
 160         { "pf_guest", VCPU_STAT(pf_guest) },
 161         { "tlb_flush", VCPU_STAT(tlb_flush) },
 162         { "invlpg", VCPU_STAT(invlpg) },
 163         { "exits", VCPU_STAT(exits) },
 164         { "io_exits", VCPU_STAT(io_exits) },
 165         { "mmio_exits", VCPU_STAT(mmio_exits) },
 166         { "signal_exits", VCPU_STAT(signal_exits) },
 167         { "irq_window", VCPU_STAT(irq_window_exits) },
 168         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 169         { "halt_exits", VCPU_STAT(halt_exits) },
 170         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 171         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 172         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 173         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 174         { "hypercalls", VCPU_STAT(hypercalls) },
 175         { "request_irq", VCPU_STAT(request_irq_exits) },
 176         { "irq_exits", VCPU_STAT(irq_exits) },
 177         { "host_state_reload", VCPU_STAT(host_state_reload) },
 178         { "efer_reload", VCPU_STAT(efer_reload) },
 179         { "fpu_reload", VCPU_STAT(fpu_reload) },
 180         { "insn_emulation", VCPU_STAT(insn_emulation) },
 181         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 182         { "irq_injections", VCPU_STAT(irq_injections) },
 183         { "nmi_injections", VCPU_STAT(nmi_injections) },
 184         { "req_event", VCPU_STAT(req_event) },
 185         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 186         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 187         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 188         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 189         { "mmu_flooded", VM_STAT(mmu_flooded) },
 190         { "mmu_recycled", VM_STAT(mmu_recycled) },
 191         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 192         { "mmu_unsync", VM_STAT(mmu_unsync) },
 193         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 194         { "largepages", VM_STAT(lpages) },
 195         { "max_mmu_page_hash_collisions",
 196                 VM_STAT(max_mmu_page_hash_collisions) },
 197         { NULL }
 198 };
 199
 200 u64 __read_mostly host_xcr0;
 201
 202 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 203
 204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 205 {
 206         int i;
 207         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 208                 vcpu->arch.apf.gfns[i] = ~0;
 209 }
 210
 211 static void kvm_on_user_return(struct user_return_notifier *urn)
 212 {
 213         unsigned slot;
 214         struct kvm_shared_msrs *locals
 215                 = container_of(urn, struct kvm_shared_msrs, urn);
 216         struct kvm_shared_msr_values *values;
 217         unsigned long flags;
 218
 219         /*
 220          * Disabling irqs at this point since the following code could be
 221          * interrupted and executed through kvm_arch_hardware_disable()
 222          */
 223         local_irq_save(flags);
 224         if (locals->registered) {
 225                 locals->registered = false;
 226                 user_return_notifier_unregister(urn);
 227         }
 228         local_irq_restore(flags);
 229         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 230                 values = &locals->values[slot];
 231                 if (values->host != values->curr) {
 232                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 233                         values->curr = values->host;
 234                 }
 235         }
 236 }
 237
 238 static void shared_msr_update(unsigned slot, u32 msr)
 239 {
 240         u64 value;
 241         unsigned int cpu = smp_processor_id();
 242         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 243
 244         /* only read, and nobody should modify it at this time,
 245          * so don't need lock */
 246         if (slot >= shared_msrs_global.nr) {
 247                 printk(KERN_ERR "kvm: invalid MSR slot!");
 248                 return;
 249         }
 250         rdmsrl_safe(msr, &value);
 251         smsr->values[slot].host = value;
 252         smsr->values[slot].curr = value;
 253 }
 254
 255 void kvm_define_shared_msr(unsigned slot, u32 msr)
 256 {
 257         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 258         shared_msrs_global.msrs[slot] = msr;
 259         if (slot >= shared_msrs_global.nr)
 260                 shared_msrs_global.nr = slot + 1;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 263
 264 static void kvm_shared_msr_cpu_online(void)
 265 {
 266         unsigned i;
 267
 268         for (i = 0; i < shared_msrs_global.nr; ++i)
 269                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 270 }
 271
 272 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 273 {
 274         unsigned int cpu = smp_processor_id();
 275         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 276         int err;
 277
 278         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 279                 return 0;
 280         smsr->values[slot].curr = value;
 281         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 282         if (err)
 283                 return 1;
 284
 285         if (!smsr->registered) {
 286                 smsr->urn.on_user_return = kvm_on_user_return;
 287                 user_return_notifier_register(&smsr->urn);
 288                 smsr->registered = true;
 289         }
 290         return 0;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 293
 294 static void drop_user_return_notifiers(void)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298
 299         if (smsr->registered)
 300                 kvm_on_user_return(&smsr->urn);
 301 }
 302
 303 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 304 {
 305         return vcpu->arch.apic_base;
 306 }
 307 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 308
 309 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 310 {
 311         u64 old_state = vcpu->arch.apic_base &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 new_state = msr_info->data &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 316                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 317
 318         if (!msr_info->host_initiated &&
 319             ((msr_info->data & reserved_bits) != 0 ||
 320              new_state == X2APIC_ENABLE ||
 321              (new_state == MSR_IA32_APICBASE_ENABLE &&
 322               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 323              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 324               old_state == 0)))
 325                 return 1;
 326
 327         kvm_lapic_set_base(vcpu, msr_info->data);
 328         return 0;
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 331
 332 asmlinkage __visible void kvm_spurious_fault(void)
 333 {
 334         /* Fault while not rebooting.  We want the trace. */
 335         BUG();
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 338
 339 #define EXCPT_BENIGN            0
 340 #define EXCPT_CONTRIBUTORY      1
 341 #define EXCPT_PF                2
 342
 343 static int exception_class(int vector)
 344 {
 345         switch (vector) {
 346         case PF_VECTOR:
 347                 return EXCPT_PF;
 348         case DE_VECTOR:
 349         case TS_VECTOR:
 350         case NP_VECTOR:
 351         case SS_VECTOR:
 352         case GP_VECTOR:
 353                 return EXCPT_CONTRIBUTORY;
 354         default:
 355                 break;
 356         }
 357         return EXCPT_BENIGN;
 358 }
 359
 360 #define EXCPT_FAULT             0
 361 #define EXCPT_TRAP              1
 362 #define EXCPT_ABORT             2
 363 #define EXCPT_INTERRUPT         3
 364
 365 static int exception_type(int vector)
 366 {
 367         unsigned int mask;
 368
 369         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 370                 return EXCPT_INTERRUPT;
 371
 372         mask = 1 << vector;
 373
 374         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 375         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 376                 return EXCPT_TRAP;
 377
 378         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 379                 return EXCPT_ABORT;
 380
 381         /* Reserved exceptions will result in fault */
 382         return EXCPT_FAULT;
 383 }
 384
 385 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 386                 unsigned nr, bool has_error, u32 error_code,
 387                 bool reinject)
 388 {
 389         u32 prev_nr;
 390         int class1, class2;
 391
 392         kvm_make_request(KVM_REQ_EVENT, vcpu);
 393
 394         if (!vcpu->arch.exception.pending) {
 395         queue:
 396                 if (has_error && !is_protmode(vcpu))
 397                         has_error = false;
 398                 vcpu->arch.exception.pending = true;
 399                 vcpu->arch.exception.has_error_code = has_error;
 400                 vcpu->arch.exception.nr = nr;
 401                 vcpu->arch.exception.error_code = error_code;
 402                 vcpu->arch.exception.reinject = reinject;
 403                 return;
 404         }
 405
 406         /* to check exception */
 407         prev_nr = vcpu->arch.exception.nr;
 408         if (prev_nr == DF_VECTOR) {
 409                 /* triple fault -> shutdown */
 410                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 411                 return;
 412         }
 413         class1 = exception_class(prev_nr);
 414         class2 = exception_class(nr);
 415         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 416                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 417                 /* generate double fault per SDM Table 5-5 */
 418                 vcpu->arch.exception.pending = true;
 419                 vcpu->arch.exception.has_error_code = true;
 420                 vcpu->arch.exception.nr = DF_VECTOR;
 421                 vcpu->arch.exception.error_code = 0;
 422         } else
 423                 /* replace previous exception with a new one in a hope
 424                    that instruction re-execution will regenerate lost
 425                    exception */
 426                 goto queue;
 427 }
 428
 429 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 430 {
 431         kvm_multiple_exception(vcpu, nr, false, 0, false);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 434
 435 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 436 {
 437         kvm_multiple_exception(vcpu, nr, false, 0, true);
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 440
 441 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 442 {
 443         if (err)
 444                 kvm_inject_gp(vcpu, 0);
 445         else
 446                 return kvm_skip_emulated_instruction(vcpu);
 447
 448         return 1;
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 451
 452 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 453 {
 454         ++vcpu->stat.pf_guest;
 455         vcpu->arch.cr2 = fault->address;
 456         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 459
 460 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 461 {
 462         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 463                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 464         else
 465                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 466
 467         return fault->nested_page_fault;
 468 }
 469
 470 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 471 {
 472         atomic_inc(&vcpu->arch.nmi_queued);
 473         kvm_make_request(KVM_REQ_NMI, vcpu);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 476
 477 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 478 {
 479         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 482
 483 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 484 {
 485         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 488
 489 /*
 490  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 491  * a #GP and return false.
 492  */
 493 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 494 {
 495         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 496                 return true;
 497         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 498         return false;
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 501
 502 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 503 {
 504         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 505                 return true;
 506
 507         kvm_queue_exception(vcpu, UD_VECTOR);
 508         return false;
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_require_dr);
 511
 512 /*
 513  * This function will be used to read from the physical memory of the currently
 514  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 515  * can read from guest physical or from the guest's guest physical memory.
 516  */
 517 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 518                             gfn_t ngfn, void *data, int offset, int len,
 519                             u32 access)
 520 {
 521         struct x86_exception exception;
 522         gfn_t real_gfn;
 523         gpa_t ngpa;
 524
 525         ngpa     = gfn_to_gpa(ngfn);
 526         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 527         if (real_gfn == UNMAPPED_GVA)
 528                 return -EFAULT;
 529
 530         real_gfn = gpa_to_gfn(real_gfn);
 531
 532         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 533 }
 534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 535
 536 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 537                                void *data, int offset, int len, u32 access)
 538 {
 539         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 540                                        data, offset, len, access);
 541 }
 542
 543 /*
 544  * Load the pae pdptrs.  Return true is they are all valid.
 545  */
 546 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 547 {
 548         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 549         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 550         int i;
 551         int ret;
 552         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 553
 554         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 555                                       offset * sizeof(u64), sizeof(pdpte),
 556                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 557         if (ret < 0) {
 558                 ret = 0;
 559                 goto out;
 560         }
 561         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 562                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 563                     (pdpte[i] &
 564                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 565                         ret = 0;
 566                         goto out;
 567                 }
 568         }
 569         ret = 1;
 570
 571         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 572         __set_bit(VCPU_EXREG_PDPTR,
 573                   (unsigned long *)&vcpu->arch.regs_avail);
 574         __set_bit(VCPU_EXREG_PDPTR,
 575                   (unsigned long *)&vcpu->arch.regs_dirty);
 576 out:
 577
 578         return ret;
 579 }
 580 EXPORT_SYMBOL_GPL(load_pdptrs);
 581
 582 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 583 {
 584         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 585         bool changed = true;
 586         int offset;
 587         gfn_t gfn;
 588         int r;
 589
 590         if (is_long_mode(vcpu) || !is_pae(vcpu))
 591                 return false;
 592
 593         if (!test_bit(VCPU_EXREG_PDPTR,
 594                       (unsigned long *)&vcpu->arch.regs_avail))
 595                 return true;
 596
 597         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 598         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 599         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 600                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 601         if (r < 0)
 602                 goto out;
 603         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 604 out:
 605
 606         return changed;
 607 }
 608 EXPORT_SYMBOL_GPL(pdptrs_changed);
 609
 610 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 611 {
 612         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 613         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 614
 615         cr0 |= X86_CR0_ET;
 616
 617 #ifdef CONFIG_X86_64
 618         if (cr0 & 0xffffffff00000000UL)
 619                 return 1;
 620 #endif
 621
 622         cr0 &= ~CR0_RESERVED_BITS;
 623
 624         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 625                 return 1;
 626
 627         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 628                 return 1;
 629
 630         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 631 #ifdef CONFIG_X86_64
 632                 if ((vcpu->arch.efer & EFER_LME)) {
 633                         int cs_db, cs_l;
 634
 635                         if (!is_pae(vcpu))
 636                                 return 1;
 637                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 638                         if (cs_l)
 639                                 return 1;
 640                 } else
 641 #endif
 642                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 643                                                  kvm_read_cr3(vcpu)))
 644                         return 1;
 645         }
 646
 647         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 648                 return 1;
 649
 650         kvm_x86_ops->set_cr0(vcpu, cr0);
 651
 652         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 653                 kvm_clear_async_pf_completion_queue(vcpu);
 654                 kvm_async_pf_hash_reset(vcpu);
 655         }
 656
 657         if ((cr0 ^ old_cr0) & update_bits)
 658                 kvm_mmu_reset_context(vcpu);
 659
 660         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 661             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 662             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 663                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 668
 669 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 670 {
 671         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_lmsw);
 674
 675 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 676 {
 677         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 678                         !vcpu->guest_xcr0_loaded) {
 679                 /* kvm_set_xcr() also depends on this */
 680                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 681                 vcpu->guest_xcr0_loaded = 1;
 682         }
 683 }
 684
 685 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 686 {
 687         if (vcpu->guest_xcr0_loaded) {
 688                 if (vcpu->arch.xcr0 != host_xcr0)
 689                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 690                 vcpu->guest_xcr0_loaded = 0;
 691         }
 692 }
 693
 694 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 695 {
 696         u64 xcr0 = xcr;
 697         u64 old_xcr0 = vcpu->arch.xcr0;
 698         u64 valid_bits;
 699
 700         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 701         if (index != XCR_XFEATURE_ENABLED_MASK)
 702                 return 1;
 703         if (!(xcr0 & XFEATURE_MASK_FP))
 704                 return 1;
 705         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 706                 return 1;
 707
 708         /*
 709          * Do not allow the guest to set bits that we do not support
 710          * saving.  However, xcr0 bit 0 is always set, even if the
 711          * emulated CPU does not support XSAVE (see fx_init).
 712          */
 713         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 714         if (xcr0 & ~valid_bits)
 715                 return 1;
 716
 717         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 718             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 719                 return 1;
 720
 721         if (xcr0 & XFEATURE_MASK_AVX512) {
 722                 if (!(xcr0 & XFEATURE_MASK_YMM))
 723                         return 1;
 724                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 725                         return 1;
 726         }
 727         vcpu->arch.xcr0 = xcr0;
 728
 729         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 730                 kvm_update_cpuid(vcpu);
 731         return 0;
 732 }
 733
 734 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 735 {
 736         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 737             __kvm_set_xcr(vcpu, index, xcr)) {
 738                 kvm_inject_gp(vcpu, 0);
 739                 return 1;
 740         }
 741         return 0;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 744
 745 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 746 {
 747         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 748         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 749                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 750
 751         if (cr4 & CR4_RESERVED_BITS)
 752                 return 1;
 753
 754         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 755                 return 1;
 756
 757         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 758                 return 1;
 759
 760         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 761                 return 1;
 762
 763         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 764                 return 1;
 765
 766         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 767                 return 1;
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (!(cr4 & X86_CR4_PAE))
 771                         return 1;
 772         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 773                    && ((cr4 ^ old_cr4) & pdptr_bits)
 774                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 775                                    kvm_read_cr3(vcpu)))
 776                 return 1;
 777
 778         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 779                 if (!guest_cpuid_has_pcid(vcpu))
 780                         return 1;
 781
 782                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 783                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 784                         return 1;
 785         }
 786
 787         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 788                 return 1;
 789
 790         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 791             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 792                 kvm_mmu_reset_context(vcpu);
 793
 794         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 795                 kvm_update_cpuid(vcpu);
 796
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 800
 801 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 802 {
 803 #ifdef CONFIG_X86_64
 804         cr3 &= ~CR3_PCID_INVD;
 805 #endif
 806
 807         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 808                 kvm_mmu_sync_roots(vcpu);
 809                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 810                 return 0;
 811         }
 812
 813         if (is_long_mode(vcpu)) {
 814                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 815                         return 1;
 816         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 817                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 818                 return 1;
 819
 820         vcpu->arch.cr3 = cr3;
 821         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 822         kvm_mmu_new_cr3(vcpu);
 823         return 0;
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 826
 827 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 828 {
 829         if (cr8 & CR8_RESERVED_BITS)
 830                 return 1;
 831         if (lapic_in_kernel(vcpu))
 832                 kvm_lapic_set_tpr(vcpu, cr8);
 833         else
 834                 vcpu->arch.cr8 = cr8;
 835         return 0;
 836 }
 837 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 838
 839 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 840 {
 841         if (lapic_in_kernel(vcpu))
 842                 return kvm_lapic_get_cr8(vcpu);
 843         else
 844                 return vcpu->arch.cr8;
 845 }
 846 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 847
 848 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 849 {
 850         int i;
 851
 852         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 853                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 854                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 855                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 856         }
 857 }
 858
 859 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 860 {
 861         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 862                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 863 }
 864
 865 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 866 {
 867         unsigned long dr7;
 868
 869         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 870                 dr7 = vcpu->arch.guest_debug_dr7;
 871         else
 872                 dr7 = vcpu->arch.dr7;
 873         kvm_x86_ops->set_dr7(vcpu, dr7);
 874         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 875         if (dr7 & DR7_BP_EN_MASK)
 876                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 877 }
 878
 879 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 880 {
 881         u64 fixed = DR6_FIXED_1;
 882
 883         if (!guest_cpuid_has_rtm(vcpu))
 884                 fixed |= DR6_RTM;
 885         return fixed;
 886 }
 887
 888 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 889 {
 890         switch (dr) {
 891         case 0 ... 3:
 892                 vcpu->arch.db[dr] = val;
 893                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 894                         vcpu->arch.eff_db[dr] = val;
 895                 break;
 896         case 4:
 897                 /* fall through */
 898         case 6:
 899                 if (val & 0xffffffff00000000ULL)
 900                         return -1; /* #GP */
 901                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 902                 kvm_update_dr6(vcpu);
 903                 break;
 904         case 5:
 905                 /* fall through */
 906         default: /* 7 */
 907                 if (val & 0xffffffff00000000ULL)
 908                         return -1; /* #GP */
 909                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 910                 kvm_update_dr7(vcpu);
 911                 break;
 912         }
 913
 914         return 0;
 915 }
 916
 917 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 918 {
 919         if (__kvm_set_dr(vcpu, dr, val)) {
 920                 kvm_inject_gp(vcpu, 0);
 921                 return 1;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_set_dr);
 926
 927 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 928 {
 929         switch (dr) {
 930         case 0 ... 3:
 931                 *val = vcpu->arch.db[dr];
 932                 break;
 933         case 4:
 934                 /* fall through */
 935         case 6:
 936                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 937                         *val = vcpu->arch.dr6;
 938                 else
 939                         *val = kvm_x86_ops->get_dr6(vcpu);
 940                 break;
 941         case 5:
 942                 /* fall through */
 943         default: /* 7 */
 944                 *val = vcpu->arch.dr7;
 945                 break;
 946         }
 947         return 0;
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_get_dr);
 950
 951 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 952 {
 953         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 954         u64 data;
 955         int err;
 956
 957         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 958         if (err)
 959                 return err;
 960         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 961         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 962         return err;
 963 }
 964 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 965
 966 /*
 967  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 968  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 969  *
 970  * This list is modified at module load time to reflect the
 971  * capabilities of the host cpu. This capabilities test skips MSRs that are
 972  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 973  * may depend on host virtualization features rather than host cpu features.
 974  */
 975
 976 static u32 msrs_to_save[] = {
 977         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 978         MSR_STAR,
 979 #ifdef CONFIG_X86_64
 980         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 981 #endif
 982         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 983         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 984 };
 985
 986 static unsigned num_msrs_to_save;
 987
 988 static u32 emulated_msrs[] = {
 989         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 990         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 991         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 992         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 993         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 994         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 995         HV_X64_MSR_RESET,
 996         HV_X64_MSR_VP_INDEX,
 997         HV_X64_MSR_VP_RUNTIME,
 998         HV_X64_MSR_SCONTROL,
 999         HV_X64_MSR_STIMER0_CONFIG,
1000         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1001         MSR_KVM_PV_EOI_EN,
1002
1003         MSR_IA32_TSC_ADJUST,
1004         MSR_IA32_TSCDEADLINE,
1005         MSR_IA32_MISC_ENABLE,
1006         MSR_IA32_MCG_STATUS,
1007         MSR_IA32_MCG_CTL,
1008         MSR_IA32_MCG_EXT_CTL,
1009         MSR_IA32_SMBASE,
1010         MSR_PLATFORM_INFO,
1011         MSR_MISC_FEATURES_ENABLES,
1012 };
1013
1014 static unsigned num_emulated_msrs;
1015
1016 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1017 {
1018         if (efer & efer_reserved_bits)
1019                 return false;
1020
1021         if (efer & EFER_FFXSR) {
1022                 struct kvm_cpuid_entry2 *feat;
1023
1024                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1025                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1026                         return false;
1027         }
1028
1029         if (efer & EFER_SVME) {
1030                 struct kvm_cpuid_entry2 *feat;
1031
1032                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1033                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1034                         return false;
1035         }
1036
1037         return true;
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1040
1041 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1042 {
1043         u64 old_efer = vcpu->arch.efer;
1044
1045         if (!kvm_valid_efer(vcpu, efer))
1046                 return 1;
1047
1048         if (is_paging(vcpu)
1049             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1050                 return 1;
1051
1052         efer &= ~EFER_LMA;
1053         efer |= vcpu->arch.efer & EFER_LMA;
1054
1055         kvm_x86_ops->set_efer(vcpu, efer);
1056
1057         /* Update reserved bits */
1058         if ((efer ^ old_efer) & EFER_NX)
1059                 kvm_mmu_reset_context(vcpu);
1060
1061         return 0;
1062 }
1063
1064 void kvm_enable_efer_bits(u64 mask)
1065 {
1066        efer_reserved_bits &= ~mask;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1069
1070 /*
1071  * Writes msr value into into the appropriate "register".
1072  * Returns 0 on success, non-0 otherwise.
1073  * Assumes vcpu_load() was already called.
1074  */
1075 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1076 {
1077         switch (msr->index) {
1078         case MSR_FS_BASE:
1079         case MSR_GS_BASE:
1080         case MSR_KERNEL_GS_BASE:
1081         case MSR_CSTAR:
1082         case MSR_LSTAR:
1083                 if (is_noncanonical_address(msr->data))
1084                         return 1;
1085                 break;
1086         case MSR_IA32_SYSENTER_EIP:
1087         case MSR_IA32_SYSENTER_ESP:
1088                 /*
1089                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1090                  * non-canonical address is written on Intel but not on
1091                  * AMD (which ignores the top 32-bits, because it does
1092                  * not implement 64-bit SYSENTER).
1093                  *
1094                  * 64-bit code should hence be able to write a non-canonical
1095                  * value on AMD.  Making the address canonical ensures that
1096                  * vmentry does not fail on Intel after writing a non-canonical
1097                  * value, and that something deterministic happens if the guest
1098                  * invokes 64-bit SYSENTER.
1099                  */
1100                 msr->data = get_canonical(msr->data);
1101         }
1102         return kvm_x86_ops->set_msr(vcpu, msr);
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_set_msr);
1105
1106 /*
1107  * Adapt set_msr() to msr_io()'s calling convention
1108  */
1109 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1110 {
1111         struct msr_data msr;
1112         int r;
1113
1114         msr.index = index;
1115         msr.host_initiated = true;
1116         r = kvm_get_msr(vcpu, &msr);
1117         if (r)
1118                 return r;
1119
1120         *data = msr.data;
1121         return 0;
1122 }
1123
1124 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1125 {
1126         struct msr_data msr;
1127
1128         msr.data = *data;
1129         msr.index = index;
1130         msr.host_initiated = true;
1131         return kvm_set_msr(vcpu, &msr);
1132 }
1133
1134 #ifdef CONFIG_X86_64
1135 struct pvclock_gtod_data {
1136         seqcount_t      seq;
1137
1138         struct { /* extract of a clocksource struct */
1139                 int vclock_mode;
1140                 u64     cycle_last;
1141                 u64     mask;
1142                 u32     mult;
1143                 u32     shift;
1144         } clock;
1145
1146         u64             boot_ns;
1147         u64             nsec_base;
1148         u64             wall_time_sec;
1149 };
1150
1151 static struct pvclock_gtod_data pvclock_gtod_data;
1152
1153 static void update_pvclock_gtod(struct timekeeper *tk)
1154 {
1155         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1156         u64 boot_ns;
1157
1158         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1159
1160         write_seqcount_begin(&vdata->seq);
1161
1162         /* copy pvclock gtod data */
1163         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1164         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1165         vdata->clock.mask               = tk->tkr_mono.mask;
1166         vdata->clock.mult               = tk->tkr_mono.mult;
1167         vdata->clock.shift              = tk->tkr_mono.shift;
1168
1169         vdata->boot_ns                  = boot_ns;
1170         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1171
1172         vdata->wall_time_sec            = tk->xtime_sec;
1173
1174         write_seqcount_end(&vdata->seq);
1175 }
1176 #endif
1177
1178 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1179 {
1180         /*
1181          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1182          * vcpu_enter_guest.  This function is only called from
1183          * the physical CPU that is running vcpu.
1184          */
1185         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1186 }
1187
1188 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1189 {
1190         int version;
1191         int r;
1192         struct pvclock_wall_clock wc;
1193         struct timespec64 boot;
1194
1195         if (!wall_clock)
1196                 return;
1197
1198         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1199         if (r)
1200                 return;
1201
1202         if (version & 1)
1203                 ++version;  /* first time write, random junk */
1204
1205         ++version;
1206
1207         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1208                 return;
1209
1210         /*
1211          * The guest calculates current wall clock time by adding
1212          * system time (updated by kvm_guest_time_update below) to the
1213          * wall clock specified here.  guest system time equals host
1214          * system time for us, thus we must fill in host boot time here.
1215          */
1216         getboottime64(&boot);
1217
1218         if (kvm->arch.kvmclock_offset) {
1219                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1220                 boot = timespec64_sub(boot, ts);
1221         }
1222         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1223         wc.nsec = boot.tv_nsec;
1224         wc.version = version;
1225
1226         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1227
1228         version++;
1229         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1230 }
1231
1232 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1233 {
1234         do_shl32_div32(dividend, divisor);
1235         return dividend;
1236 }
1237
1238 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1239                                s8 *pshift, u32 *pmultiplier)
1240 {
1241         uint64_t scaled64;
1242         int32_t  shift = 0;
1243         uint64_t tps64;
1244         uint32_t tps32;
1245
1246         tps64 = base_hz;
1247         scaled64 = scaled_hz;
1248         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1249                 tps64 >>= 1;
1250                 shift--;
1251         }
1252
1253         tps32 = (uint32_t)tps64;
1254         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1255                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1256                         scaled64 >>= 1;
1257                 else
1258                         tps32 <<= 1;
1259                 shift++;
1260         }
1261
1262         *pshift = shift;
1263         *pmultiplier = div_frac(scaled64, tps32);
1264
1265         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1266                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1267 }
1268
1269 #ifdef CONFIG_X86_64
1270 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1271 #endif
1272
1273 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1274 static unsigned long max_tsc_khz;
1275
1276 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1277 {
1278         u64 v = (u64)khz * (1000000 + ppm);
1279         do_div(v, 1000000);
1280         return v;
1281 }
1282
1283 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1284 {
1285         u64 ratio;
1286
1287         /* Guest TSC same frequency as host TSC? */
1288         if (!scale) {
1289                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1290                 return 0;
1291         }
1292
1293         /* TSC scaling supported? */
1294         if (!kvm_has_tsc_control) {
1295                 if (user_tsc_khz > tsc_khz) {
1296                         vcpu->arch.tsc_catchup = 1;
1297                         vcpu->arch.tsc_always_catchup = 1;
1298                         return 0;
1299                 } else {
1300                         WARN(1, "user requested TSC rate below hardware speed\n");
1301                         return -1;
1302                 }
1303         }
1304
1305         /* TSC scaling required  - calculate ratio */
1306         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1307                                 user_tsc_khz, tsc_khz);
1308
1309         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1310                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1311                           user_tsc_khz);
1312                 return -1;
1313         }
1314
1315         vcpu->arch.tsc_scaling_ratio = ratio;
1316         return 0;
1317 }
1318
1319 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1320 {
1321         u32 thresh_lo, thresh_hi;
1322         int use_scaling = 0;
1323
1324         /* tsc_khz can be zero if TSC calibration fails */
1325         if (user_tsc_khz == 0) {
1326                 /* set tsc_scaling_ratio to a safe value */
1327                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1328                 return -1;
1329         }
1330
1331         /* Compute a scale to convert nanoseconds in TSC cycles */
1332         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1333                            &vcpu->arch.virtual_tsc_shift,
1334                            &vcpu->arch.virtual_tsc_mult);
1335         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1336
1337         /*
1338          * Compute the variation in TSC rate which is acceptable
1339          * within the range of tolerance and decide if the
1340          * rate being applied is within that bounds of the hardware
1341          * rate.  If so, no scaling or compensation need be done.
1342          */
1343         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1344         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1345         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1346                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1347                 use_scaling = 1;
1348         }
1349         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1350 }
1351
1352 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1353 {
1354         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1355                                       vcpu->arch.virtual_tsc_mult,
1356                                       vcpu->arch.virtual_tsc_shift);
1357         tsc += vcpu->arch.this_tsc_write;
1358         return tsc;
1359 }
1360
1361 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1362 {
1363 #ifdef CONFIG_X86_64
1364         bool vcpus_matched;
1365         struct kvm_arch *ka = &vcpu->kvm->arch;
1366         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1367
1368         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1369                          atomic_read(&vcpu->kvm->online_vcpus));
1370
1371         /*
1372          * Once the masterclock is enabled, always perform request in
1373          * order to update it.
1374          *
1375          * In order to enable masterclock, the host clocksource must be TSC
1376          * and the vcpus need to have matched TSCs.  When that happens,
1377          * perform request to enable masterclock.
1378          */
1379         if (ka->use_master_clock ||
1380             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1381                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1382
1383         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1384                             atomic_read(&vcpu->kvm->online_vcpus),
1385                             ka->use_master_clock, gtod->clock.vclock_mode);
1386 #endif
1387 }
1388
1389 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1390 {
1391         u64 curr_offset = vcpu->arch.tsc_offset;
1392         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1393 }
1394
1395 /*
1396  * Multiply tsc by a fixed point number represented by ratio.
1397  *
1398  * The most significant 64-N bits (mult) of ratio represent the
1399  * integral part of the fixed point number; the remaining N bits
1400  * (frac) represent the fractional part, ie. ratio represents a fixed
1401  * point number (mult + frac * 2^(-N)).
1402  *
1403  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1404  */
1405 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1406 {
1407         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1408 }
1409
1410 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1411 {
1412         u64 _tsc = tsc;
1413         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1414
1415         if (ratio != kvm_default_tsc_scaling_ratio)
1416                 _tsc = __scale_tsc(ratio, tsc);
1417
1418         return _tsc;
1419 }
1420 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1421
1422 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1423 {
1424         u64 tsc;
1425
1426         tsc = kvm_scale_tsc(vcpu, rdtsc());
1427
1428         return target_tsc - tsc;
1429 }
1430
1431 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1432 {
1433         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1434 }
1435 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1436
1437 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1438 {
1439         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1440         vcpu->arch.tsc_offset = offset;
1441 }
1442
1443 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1444 {
1445         struct kvm *kvm = vcpu->kvm;
1446         u64 offset, ns, elapsed;
1447         unsigned long flags;
1448         bool matched;
1449         bool already_matched;
1450         u64 data = msr->data;
1451         bool synchronizing = false;
1452
1453         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1454         offset = kvm_compute_tsc_offset(vcpu, data);
1455         ns = ktime_get_boot_ns();
1456         elapsed = ns - kvm->arch.last_tsc_nsec;
1457
1458         if (vcpu->arch.virtual_tsc_khz) {
1459                 if (data == 0 && msr->host_initiated) {
1460                         /*
1461                          * detection of vcpu initialization -- need to sync
1462                          * with other vCPUs. This particularly helps to keep
1463                          * kvm_clock stable after CPU hotplug
1464                          */
1465                         synchronizing = true;
1466                 } else {
1467                         u64 tsc_exp = kvm->arch.last_tsc_write +
1468                                                 nsec_to_cycles(vcpu, elapsed);
1469                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1470                         /*
1471                          * Special case: TSC write with a small delta (1 second)
1472                          * of virtual cycle time against real time is
1473                          * interpreted as an attempt to synchronize the CPU.
1474                          */
1475                         synchronizing = data < tsc_exp + tsc_hz &&
1476                                         data + tsc_hz > tsc_exp;
1477                 }
1478         }
1479
1480         /*
1481          * For a reliable TSC, we can match TSC offsets, and for an unstable
1482          * TSC, we add elapsed time in this computation.  We could let the
1483          * compensation code attempt to catch up if we fall behind, but
1484          * it's better to try to match offsets from the beginning.
1485          */
1486         if (synchronizing &&
1487             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1488                 if (!check_tsc_unstable()) {
1489                         offset = kvm->arch.cur_tsc_offset;
1490                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1491                 } else {
1492                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1493                         data += delta;
1494                         offset = kvm_compute_tsc_offset(vcpu, data);
1495                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1496                 }
1497                 matched = true;
1498                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1499         } else {
1500                 /*
1501                  * We split periods of matched TSC writes into generations.
1502                  * For each generation, we track the original measured
1503                  * nanosecond time, offset, and write, so if TSCs are in
1504                  * sync, we can match exact offset, and if not, we can match
1505                  * exact software computation in compute_guest_tsc()
1506                  *
1507                  * These values are tracked in kvm->arch.cur_xxx variables.
1508                  */
1509                 kvm->arch.cur_tsc_generation++;
1510                 kvm->arch.cur_tsc_nsec = ns;
1511                 kvm->arch.cur_tsc_write = data;
1512                 kvm->arch.cur_tsc_offset = offset;
1513                 matched = false;
1514                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1515                          kvm->arch.cur_tsc_generation, data);
1516         }
1517
1518         /*
1519          * We also track th most recent recorded KHZ, write and time to
1520          * allow the matching interval to be extended at each write.
1521          */
1522         kvm->arch.last_tsc_nsec = ns;
1523         kvm->arch.last_tsc_write = data;
1524         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1525
1526         vcpu->arch.last_guest_tsc = data;
1527
1528         /* Keep track of which generation this VCPU has synchronized to */
1529         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1530         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1531         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1532
1533         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1534                 update_ia32_tsc_adjust_msr(vcpu, offset);
1535         kvm_vcpu_write_tsc_offset(vcpu, offset);
1536         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1537
1538         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1539         if (!matched) {
1540                 kvm->arch.nr_vcpus_matched_tsc = 0;
1541         } else if (!already_matched) {
1542                 kvm->arch.nr_vcpus_matched_tsc++;
1543         }
1544
1545         kvm_track_tsc_matching(vcpu);
1546         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1547 }
1548
1549 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1550
1551 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1552                                            s64 adjustment)
1553 {
1554         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1555 }
1556
1557 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1558 {
1559         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1560                 WARN_ON(adjustment < 0);
1561         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1562         adjust_tsc_offset_guest(vcpu, adjustment);
1563 }
1564
1565 #ifdef CONFIG_X86_64
1566
1567 static u64 read_tsc(void)
1568 {
1569         u64 ret = (u64)rdtsc_ordered();
1570         u64 last = pvclock_gtod_data.clock.cycle_last;
1571
1572         if (likely(ret >= last))
1573                 return ret;
1574
1575         /*
1576          * GCC likes to generate cmov here, but this branch is extremely
1577          * predictable (it's just a function of time and the likely is
1578          * very likely) and there's a data dependence, so force GCC
1579          * to generate a branch instead.  I don't barrier() because
1580          * we don't actually need a barrier, and if this function
1581          * ever gets inlined it will generate worse code.
1582          */
1583         asm volatile ("");
1584         return last;
1585 }
1586
1587 static inline u64 vgettsc(u64 *cycle_now)
1588 {
1589         long v;
1590         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1591
1592         *cycle_now = read_tsc();
1593
1594         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1595         return v * gtod->clock.mult;
1596 }
1597
1598 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1599 {
1600         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1601         unsigned long seq;
1602         int mode;
1603         u64 ns;
1604
1605         do {
1606                 seq = read_seqcount_begin(&gtod->seq);
1607                 mode = gtod->clock.vclock_mode;
1608                 ns = gtod->nsec_base;
1609                 ns += vgettsc(cycle_now);
1610                 ns >>= gtod->clock.shift;
1611                 ns += gtod->boot_ns;
1612         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1613         *t = ns;
1614
1615         return mode;
1616 }
1617
1618 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1619 {
1620         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1621         unsigned long seq;
1622         int mode;
1623         u64 ns;
1624
1625         do {
1626                 seq = read_seqcount_begin(&gtod->seq);
1627                 mode = gtod->clock.vclock_mode;
1628                 ts->tv_sec = gtod->wall_time_sec;
1629                 ns = gtod->nsec_base;
1630                 ns += vgettsc(cycle_now);
1631                 ns >>= gtod->clock.shift;
1632         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1633
1634         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1635         ts->tv_nsec = ns;
1636
1637         return mode;
1638 }
1639
1640 /* returns true if host is using tsc clocksource */
1641 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1642 {
1643         /* checked again under seqlock below */
1644         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1645                 return false;
1646
1647         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1648 }
1649
1650 /* returns true if host is using tsc clocksource */
1651 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1652                                            u64 *cycle_now)
1653 {
1654         /* checked again under seqlock below */
1655         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1656                 return false;
1657
1658         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1659 }
1660 #endif
1661
1662 /*
1663  *
1664  * Assuming a stable TSC across physical CPUS, and a stable TSC
1665  * across virtual CPUs, the following condition is possible.
1666  * Each numbered line represents an event visible to both
1667  * CPUs at the next numbered event.
1668  *
1669  * "timespecX" represents host monotonic time. "tscX" represents
1670  * RDTSC value.
1671  *
1672  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1673  *
1674  * 1.  read timespec0,tsc0
1675  * 2.                                   | timespec1 = timespec0 + N
1676  *                                      | tsc1 = tsc0 + M
1677  * 3. transition to guest               | transition to guest
1678  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1679  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1680  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1681  *
1682  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1683  *
1684  *      - ret0 < ret1
1685  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1686  *              ...
1687  *      - 0 < N - M => M < N
1688  *
1689  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1690  * always the case (the difference between two distinct xtime instances
1691  * might be smaller then the difference between corresponding TSC reads,
1692  * when updating guest vcpus pvclock areas).
1693  *
1694  * To avoid that problem, do not allow visibility of distinct
1695  * system_timestamp/tsc_timestamp values simultaneously: use a master
1696  * copy of host monotonic time values. Update that master copy
1697  * in lockstep.
1698  *
1699  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1700  *
1701  */
1702
1703 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1704 {
1705 #ifdef CONFIG_X86_64
1706         struct kvm_arch *ka = &kvm->arch;
1707         int vclock_mode;
1708         bool host_tsc_clocksource, vcpus_matched;
1709
1710         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1711                         atomic_read(&kvm->online_vcpus));
1712
1713         /*
1714          * If the host uses TSC clock, then passthrough TSC as stable
1715          * to the guest.
1716          */
1717         host_tsc_clocksource = kvm_get_time_and_clockread(
1718                                         &ka->master_kernel_ns,
1719                                         &ka->master_cycle_now);
1720
1721         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1722                                 && !backwards_tsc_observed
1723                                 && !ka->boot_vcpu_runs_old_kvmclock;
1724
1725         if (ka->use_master_clock)
1726                 atomic_set(&kvm_guest_has_master_clock, 1);
1727
1728         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1729         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1730                                         vcpus_matched);
1731 #endif
1732 }
1733
1734 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1735 {
1736         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1737 }
1738
1739 static void kvm_gen_update_masterclock(struct kvm *kvm)
1740 {
1741 #ifdef CONFIG_X86_64
1742         int i;
1743         struct kvm_vcpu *vcpu;
1744         struct kvm_arch *ka = &kvm->arch;
1745
1746         spin_lock(&ka->pvclock_gtod_sync_lock);
1747         kvm_make_mclock_inprogress_request(kvm);
1748         /* no guest entries from this point */
1749         pvclock_update_vm_gtod_copy(kvm);
1750
1751         kvm_for_each_vcpu(i, vcpu, kvm)
1752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1753
1754         /* guest entries allowed */
1755         kvm_for_each_vcpu(i, vcpu, kvm)
1756                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1757
1758         spin_unlock(&ka->pvclock_gtod_sync_lock);
1759 #endif
1760 }
1761
1762 u64 get_kvmclock_ns(struct kvm *kvm)
1763 {
1764         struct kvm_arch *ka = &kvm->arch;
1765         struct pvclock_vcpu_time_info hv_clock;
1766
1767         spin_lock(&ka->pvclock_gtod_sync_lock);
1768         if (!ka->use_master_clock) {
1769                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1770                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1771         }
1772
1773         hv_clock.tsc_timestamp = ka->master_cycle_now;
1774         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1775         spin_unlock(&ka->pvclock_gtod_sync_lock);
1776
1777         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1778                            &hv_clock.tsc_shift,
1779                            &hv_clock.tsc_to_system_mul);
1780         return __pvclock_read_cycles(&hv_clock, rdtsc());
1781 }
1782
1783 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1784 {
1785         struct kvm_vcpu_arch *vcpu = &v->arch;
1786         struct pvclock_vcpu_time_info guest_hv_clock;
1787
1788         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1789                 &guest_hv_clock, sizeof(guest_hv_clock))))
1790                 return;
1791
1792         /* This VCPU is paused, but it's legal for a guest to read another
1793          * VCPU's kvmclock, so we really have to follow the specification where
1794          * it says that version is odd if data is being modified, and even after
1795          * it is consistent.
1796          *
1797          * Version field updates must be kept separate.  This is because
1798          * kvm_write_guest_cached might use a "rep movs" instruction, and
1799          * writes within a string instruction are weakly ordered.  So there
1800          * are three writes overall.
1801          *
1802          * As a small optimization, only write the version field in the first
1803          * and third write.  The vcpu->pv_time cache is still valid, because the
1804          * version field is the first in the struct.
1805          */
1806         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1807
1808         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1809         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1810                                 &vcpu->hv_clock,
1811                                 sizeof(vcpu->hv_clock.version));
1812
1813         smp_wmb();
1814
1815         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1816         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1817
1818         if (vcpu->pvclock_set_guest_stopped_request) {
1819                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1820                 vcpu->pvclock_set_guest_stopped_request = false;
1821         }
1822
1823         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1824
1825         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1826                                 &vcpu->hv_clock,
1827                                 sizeof(vcpu->hv_clock));
1828
1829         smp_wmb();
1830
1831         vcpu->hv_clock.version++;
1832         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1833                                 &vcpu->hv_clock,
1834                                 sizeof(vcpu->hv_clock.version));
1835 }
1836
1837 static int kvm_guest_time_update(struct kvm_vcpu *v)
1838 {
1839         unsigned long flags, tgt_tsc_khz;
1840         struct kvm_vcpu_arch *vcpu = &v->arch;
1841         struct kvm_arch *ka = &v->kvm->arch;
1842         s64 kernel_ns;
1843         u64 tsc_timestamp, host_tsc;
1844         u8 pvclock_flags;
1845         bool use_master_clock;
1846
1847         kernel_ns = 0;
1848         host_tsc = 0;
1849
1850         /*
1851          * If the host uses TSC clock, then passthrough TSC as stable
1852          * to the guest.
1853          */
1854         spin_lock(&ka->pvclock_gtod_sync_lock);
1855         use_master_clock = ka->use_master_clock;
1856         if (use_master_clock) {
1857                 host_tsc = ka->master_cycle_now;
1858                 kernel_ns = ka->master_kernel_ns;
1859         }
1860         spin_unlock(&ka->pvclock_gtod_sync_lock);
1861
1862         /* Keep irq disabled to prevent changes to the clock */
1863         local_irq_save(flags);
1864         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1865         if (unlikely(tgt_tsc_khz == 0)) {
1866                 local_irq_restore(flags);
1867                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1868                 return 1;
1869         }
1870         if (!use_master_clock) {
1871                 host_tsc = rdtsc();
1872                 kernel_ns = ktime_get_boot_ns();
1873         }
1874
1875         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1876
1877         /*
1878          * We may have to catch up the TSC to match elapsed wall clock
1879          * time for two reasons, even if kvmclock is used.
1880          *   1) CPU could have been running below the maximum TSC rate
1881          *   2) Broken TSC compensation resets the base at each VCPU
1882          *      entry to avoid unknown leaps of TSC even when running
1883          *      again on the same CPU.  This may cause apparent elapsed
1884          *      time to disappear, and the guest to stand still or run
1885          *      very slowly.
1886          */
1887         if (vcpu->tsc_catchup) {
1888                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1889                 if (tsc > tsc_timestamp) {
1890                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1891                         tsc_timestamp = tsc;
1892                 }
1893         }
1894
1895         local_irq_restore(flags);
1896
1897         /* With all the info we got, fill in the values */
1898
1899         if (kvm_has_tsc_control)
1900                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1901
1902         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1903                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1904                                    &vcpu->hv_clock.tsc_shift,
1905                                    &vcpu->hv_clock.tsc_to_system_mul);
1906                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1907         }
1908
1909         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1910         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1911         vcpu->last_guest_tsc = tsc_timestamp;
1912
1913         /* If the host uses TSC clocksource, then it is stable */
1914         pvclock_flags = 0;
1915         if (use_master_clock)
1916                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1917
1918         vcpu->hv_clock.flags = pvclock_flags;
1919
1920         if (vcpu->pv_time_enabled)
1921                 kvm_setup_pvclock_page(v);
1922         if (v == kvm_get_vcpu(v->kvm, 0))
1923                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1924         return 0;
1925 }
1926
1927 /*
1928  * kvmclock updates which are isolated to a given vcpu, such as
1929  * vcpu->cpu migration, should not allow system_timestamp from
1930  * the rest of the vcpus to remain static. Otherwise ntp frequency
1931  * correction applies to one vcpu's system_timestamp but not
1932  * the others.
1933  *
1934  * So in those cases, request a kvmclock update for all vcpus.
1935  * We need to rate-limit these requests though, as they can
1936  * considerably slow guests that have a large number of vcpus.
1937  * The time for a remote vcpu to update its kvmclock is bound
1938  * by the delay we use to rate-limit the updates.
1939  */
1940
1941 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1942
1943 static void kvmclock_update_fn(struct work_struct *work)
1944 {
1945         int i;
1946         struct delayed_work *dwork = to_delayed_work(work);
1947         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1948                                            kvmclock_update_work);
1949         struct kvm *kvm = container_of(ka, struct kvm, arch);
1950         struct kvm_vcpu *vcpu;
1951
1952         kvm_for_each_vcpu(i, vcpu, kvm) {
1953                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1954                 kvm_vcpu_kick(vcpu);
1955         }
1956 }
1957
1958 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1959 {
1960         struct kvm *kvm = v->kvm;
1961
1962         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1963         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1964                                         KVMCLOCK_UPDATE_DELAY);
1965 }
1966
1967 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1968
1969 static void kvmclock_sync_fn(struct work_struct *work)
1970 {
1971         struct delayed_work *dwork = to_delayed_work(work);
1972         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1973                                            kvmclock_sync_work);
1974         struct kvm *kvm = container_of(ka, struct kvm, arch);
1975
1976         if (!kvmclock_periodic_sync)
1977                 return;
1978
1979         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1980         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1981                                         KVMCLOCK_SYNC_PERIOD);
1982 }
1983
1984 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1985 {
1986         u64 mcg_cap = vcpu->arch.mcg_cap;
1987         unsigned bank_num = mcg_cap & 0xff;
1988
1989         switch (msr) {
1990         case MSR_IA32_MCG_STATUS:
1991                 vcpu->arch.mcg_status = data;
1992                 break;
1993         case MSR_IA32_MCG_CTL:
1994                 if (!(mcg_cap & MCG_CTL_P))
1995                         return 1;
1996                 if (data != 0 && data != ~(u64)0)
1997                         return -1;
1998                 vcpu->arch.mcg_ctl = data;
1999                 break;
2000         default:
2001                 if (msr >= MSR_IA32_MC0_CTL &&
2002                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2003                         u32 offset = msr - MSR_IA32_MC0_CTL;
2004                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2005                          * some Linux kernels though clear bit 10 in bank 4 to
2006                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2007                          * this to avoid an uncatched #GP in the guest
2008                          */
2009                         if ((offset & 0x3) == 0 &&
2010                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2011                                 return -1;
2012                         vcpu->arch.mce_banks[offset] = data;
2013                         break;
2014                 }
2015                 return 1;
2016         }
2017         return 0;
2018 }
2019
2020 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2021 {
2022         struct kvm *kvm = vcpu->kvm;
2023         int lm = is_long_mode(vcpu);
2024         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2025                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2026         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2027                 : kvm->arch.xen_hvm_config.blob_size_32;
2028         u32 page_num = data & ~PAGE_MASK;
2029         u64 page_addr = data & PAGE_MASK;
2030         u8 *page;
2031         int r;
2032
2033         r = -E2BIG;
2034         if (page_num >= blob_size)
2035                 goto out;
2036         r = -ENOMEM;
2037         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2038         if (IS_ERR(page)) {
2039                 r = PTR_ERR(page);
2040                 goto out;
2041         }
2042         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2043                 goto out_free;
2044         r = 0;
2045 out_free:
2046         kfree(page);
2047 out:
2048         return r;
2049 }
2050
2051 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2052 {
2053         gpa_t gpa = data & ~0x3f;
2054
2055         /* Bits 2:5 are reserved, Should be zero */
2056         if (data & 0x3c)
2057                 return 1;
2058
2059         vcpu->arch.apf.msr_val = data;
2060
2061         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2062                 kvm_clear_async_pf_completion_queue(vcpu);
2063                 kvm_async_pf_hash_reset(vcpu);
2064                 return 0;
2065         }
2066
2067         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2068                                         sizeof(u32)))
2069                 return 1;
2070
2071         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2072         kvm_async_pf_wakeup_all(vcpu);
2073         return 0;
2074 }
2075
2076 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2077 {
2078         vcpu->arch.pv_time_enabled = false;
2079 }
2080
2081 static void record_steal_time(struct kvm_vcpu *vcpu)
2082 {
2083         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2084                 return;
2085
2086         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2087                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2088                 return;
2089
2090         vcpu->arch.st.steal.preempted = 0;
2091
2092         if (vcpu->arch.st.steal.version & 1)
2093                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2094
2095         vcpu->arch.st.steal.version += 1;
2096
2097         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2098                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2099
2100         smp_wmb();
2101
2102         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2103                 vcpu->arch.st.last_steal;
2104         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2105
2106         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2107                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2108
2109         smp_wmb();
2110
2111         vcpu->arch.st.steal.version += 1;
2112
2113         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2114                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2115 }
2116
2117 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2118 {
2119         bool pr = false;
2120         u32 msr = msr_info->index;
2121         u64 data = msr_info->data;
2122
2123         switch (msr) {
2124         case MSR_AMD64_NB_CFG:
2125         case MSR_IA32_UCODE_REV:
2126         case MSR_IA32_UCODE_WRITE:
2127         case MSR_VM_HSAVE_PA:
2128         case MSR_AMD64_PATCH_LOADER:
2129         case MSR_AMD64_BU_CFG2:
2130         case MSR_AMD64_DC_CFG:
2131                 break;
2132
2133         case MSR_EFER:
2134                 return set_efer(vcpu, data);
2135         case MSR_K7_HWCR:
2136                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2137                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2138                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2139                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2140                 if (data != 0) {
2141                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2142                                     data);
2143                         return 1;
2144                 }
2145                 break;
2146         case MSR_FAM10H_MMIO_CONF_BASE:
2147                 if (data != 0) {
2148                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2149                                     "0x%llx\n", data);
2150                         return 1;
2151                 }
2152                 break;
2153         case MSR_IA32_DEBUGCTLMSR:
2154                 if (!data) {
2155                         /* We support the non-activated case already */
2156                         break;
2157                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2158                         /* Values other than LBR and BTF are vendor-specific,
2159                            thus reserved and should throw a #GP */
2160                         return 1;
2161                 }
2162                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2163                             __func__, data);
2164                 break;
2165         case 0x200 ... 0x2ff:
2166                 return kvm_mtrr_set_msr(vcpu, msr, data);
2167         case MSR_IA32_APICBASE:
2168                 return kvm_set_apic_base(vcpu, msr_info);
2169         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2170                 return kvm_x2apic_msr_write(vcpu, msr, data);
2171         case MSR_IA32_TSCDEADLINE:
2172                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2173                 break;
2174         case MSR_IA32_TSC_ADJUST:
2175                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2176                         if (!msr_info->host_initiated) {
2177                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2178                                 adjust_tsc_offset_guest(vcpu, adj);
2179                         }
2180                         vcpu->arch.ia32_tsc_adjust_msr = data;
2181                 }
2182                 break;
2183         case MSR_IA32_MISC_ENABLE:
2184                 vcpu->arch.ia32_misc_enable_msr = data;
2185                 break;
2186         case MSR_IA32_SMBASE:
2187                 if (!msr_info->host_initiated)
2188                         return 1;
2189                 vcpu->arch.smbase = data;
2190                 break;
2191         case MSR_KVM_WALL_CLOCK_NEW:
2192         case MSR_KVM_WALL_CLOCK:
2193                 vcpu->kvm->arch.wall_clock = data;
2194                 kvm_write_wall_clock(vcpu->kvm, data);
2195                 break;
2196         case MSR_KVM_SYSTEM_TIME_NEW:
2197         case MSR_KVM_SYSTEM_TIME: {
2198                 struct kvm_arch *ka = &vcpu->kvm->arch;
2199
2200                 kvmclock_reset(vcpu);
2201
2202                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2203                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2204
2205                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2206                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2207
2208                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2209                 }
2210
2211                 vcpu->arch.time = data;
2212                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2213
2214                 /* we verify if the enable bit is set... */
2215                 if (!(data & 1))
2216                         break;
2217
2218                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2219                      &vcpu->arch.pv_time, data & ~1ULL,
2220                      sizeof(struct pvclock_vcpu_time_info)))
2221                         vcpu->arch.pv_time_enabled = false;
2222                 else
2223                         vcpu->arch.pv_time_enabled = true;
2224
2225                 break;
2226         }
2227         case MSR_KVM_ASYNC_PF_EN:
2228                 if (kvm_pv_enable_async_pf(vcpu, data))
2229                         return 1;
2230                 break;
2231         case MSR_KVM_STEAL_TIME:
2232
2233                 if (unlikely(!sched_info_on()))
2234                         return 1;
2235
2236                 if (data & KVM_STEAL_RESERVED_MASK)
2237                         return 1;
2238
2239                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2240                                                 data & KVM_STEAL_VALID_BITS,
2241                                                 sizeof(struct kvm_steal_time)))
2242                         return 1;
2243
2244                 vcpu->arch.st.msr_val = data;
2245
2246                 if (!(data & KVM_MSR_ENABLED))
2247                         break;
2248
2249                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2250
2251                 break;
2252         case MSR_KVM_PV_EOI_EN:
2253                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2254                         return 1;
2255                 break;
2256
2257         case MSR_IA32_MCG_CTL:
2258         case MSR_IA32_MCG_STATUS:
2259         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2260                 return set_msr_mce(vcpu, msr, data);
2261
2262         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2263         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2264                 pr = true; /* fall through */
2265         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2266         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2267                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2268                         return kvm_pmu_set_msr(vcpu, msr_info);
2269
2270                 if (pr || data != 0)
2271                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2272                                     "0x%x data 0x%llx\n", msr, data);
2273                 break;
2274         case MSR_K7_CLK_CTL:
2275                 /*
2276                  * Ignore all writes to this no longer documented MSR.
2277                  * Writes are only relevant for old K7 processors,
2278                  * all pre-dating SVM, but a recommended workaround from
2279                  * AMD for these chips. It is possible to specify the
2280                  * affected processor models on the command line, hence
2281                  * the need to ignore the workaround.
2282                  */
2283                 break;
2284         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2285         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2286         case HV_X64_MSR_CRASH_CTL:
2287         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2288                 return kvm_hv_set_msr_common(vcpu, msr, data,
2289                                              msr_info->host_initiated);
2290         case MSR_IA32_BBL_CR_CTL3:
2291                 /* Drop writes to this legacy MSR -- see rdmsr
2292                  * counterpart for further detail.
2293                  */
2294                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2295                 break;
2296         case MSR_AMD64_OSVW_ID_LENGTH:
2297                 if (!guest_cpuid_has_osvw(vcpu))
2298                         return 1;
2299                 vcpu->arch.osvw.length = data;
2300                 break;
2301         case MSR_AMD64_OSVW_STATUS:
2302                 if (!guest_cpuid_has_osvw(vcpu))
2303                         return 1;
2304                 vcpu->arch.osvw.status = data;
2305                 break;
2306         case MSR_PLATFORM_INFO:
2307                 if (!msr_info->host_initiated ||
2308                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2309                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2310                      cpuid_fault_enabled(vcpu)))
2311                         return 1;
2312                 vcpu->arch.msr_platform_info = data;
2313                 break;
2314         case MSR_MISC_FEATURES_ENABLES:
2315                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2316                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2317                      !supports_cpuid_fault(vcpu)))
2318                         return 1;
2319                 vcpu->arch.msr_misc_features_enables = data;
2320                 break;
2321         default:
2322                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2323                         return xen_hvm_config(vcpu, data);
2324                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2325                         return kvm_pmu_set_msr(vcpu, msr_info);
2326                 if (!ignore_msrs) {
2327                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2328                                     msr, data);
2329                         return 1;
2330                 } else {
2331                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2332                                     msr, data);
2333                         break;
2334                 }
2335         }
2336         return 0;
2337 }
2338 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2339
2340
2341 /*
2342  * Reads an msr value (of 'msr_index') into 'pdata'.
2343  * Returns 0 on success, non-0 otherwise.
2344  * Assumes vcpu_load() was already called.
2345  */
2346 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2347 {
2348         return kvm_x86_ops->get_msr(vcpu, msr);
2349 }
2350 EXPORT_SYMBOL_GPL(kvm_get_msr);
2351
2352 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2353 {
2354         u64 data;
2355         u64 mcg_cap = vcpu->arch.mcg_cap;
2356         unsigned bank_num = mcg_cap & 0xff;
2357
2358         switch (msr) {
2359         case MSR_IA32_P5_MC_ADDR:
2360         case MSR_IA32_P5_MC_TYPE:
2361                 data = 0;
2362                 break;
2363         case MSR_IA32_MCG_CAP:
2364                 data = vcpu->arch.mcg_cap;
2365                 break;
2366         case MSR_IA32_MCG_CTL:
2367                 if (!(mcg_cap & MCG_CTL_P))
2368                         return 1;
2369                 data = vcpu->arch.mcg_ctl;
2370                 break;
2371         case MSR_IA32_MCG_STATUS:
2372                 data = vcpu->arch.mcg_status;
2373                 break;
2374         default:
2375                 if (msr >= MSR_IA32_MC0_CTL &&
2376                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2377                         u32 offset = msr - MSR_IA32_MC0_CTL;
2378                         data = vcpu->arch.mce_banks[offset];
2379                         break;
2380                 }
2381                 return 1;
2382         }
2383         *pdata = data;
2384         return 0;
2385 }
2386
2387 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2388 {
2389         switch (msr_info->index) {
2390         case MSR_IA32_PLATFORM_ID:
2391         case MSR_IA32_EBL_CR_POWERON:
2392         case MSR_IA32_DEBUGCTLMSR:
2393         case MSR_IA32_LASTBRANCHFROMIP:
2394         case MSR_IA32_LASTBRANCHTOIP:
2395         case MSR_IA32_LASTINTFROMIP:
2396         case MSR_IA32_LASTINTTOIP:
2397         case MSR_K8_SYSCFG:
2398         case MSR_K8_TSEG_ADDR:
2399         case MSR_K8_TSEG_MASK:
2400         case MSR_K7_HWCR:
2401         case MSR_VM_HSAVE_PA:
2402         case MSR_K8_INT_PENDING_MSG:
2403         case MSR_AMD64_NB_CFG:
2404         case MSR_FAM10H_MMIO_CONF_BASE:
2405         case MSR_AMD64_BU_CFG2:
2406         case MSR_IA32_PERF_CTL:
2407         case MSR_AMD64_DC_CFG:
2408                 msr_info->data = 0;
2409                 break;
2410         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2411         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2412         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2413         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2414                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2415                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2416                 msr_info->data = 0;
2417                 break;
2418         case MSR_IA32_UCODE_REV:
2419                 msr_info->data = 0x100000000ULL;
2420                 break;
2421         case MSR_MTRRcap:
2422         case 0x200 ... 0x2ff:
2423                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2424         case 0xcd: /* fsb frequency */
2425                 msr_info->data = 3;
2426                 break;
2427                 /*
2428                  * MSR_EBC_FREQUENCY_ID
2429                  * Conservative value valid for even the basic CPU models.
2430                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2431                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2432                  * and 266MHz for model 3, or 4. Set Core Clock
2433                  * Frequency to System Bus Frequency Ratio to 1 (bits
2434                  * 31:24) even though these are only valid for CPU
2435                  * models > 2, however guests may end up dividing or
2436                  * multiplying by zero otherwise.
2437                  */
2438         case MSR_EBC_FREQUENCY_ID:
2439                 msr_info->data = 1 << 24;
2440                 break;
2441         case MSR_IA32_APICBASE:
2442                 msr_info->data = kvm_get_apic_base(vcpu);
2443                 break;
2444         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2445                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2446                 break;
2447         case MSR_IA32_TSCDEADLINE:
2448                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2449                 break;
2450         case MSR_IA32_TSC_ADJUST:
2451                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2452                 break;
2453         case MSR_IA32_MISC_ENABLE:
2454                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2455                 break;
2456         case MSR_IA32_SMBASE:
2457                 if (!msr_info->host_initiated)
2458                         return 1;
2459                 msr_info->data = vcpu->arch.smbase;
2460                 break;
2461         case MSR_IA32_PERF_STATUS:
2462                 /* TSC increment by tick */
2463                 msr_info->data = 1000ULL;
2464                 /* CPU multiplier */
2465                 msr_info->data |= (((uint64_t)4ULL) << 40);
2466                 break;
2467         case MSR_EFER:
2468                 msr_info->data = vcpu->arch.efer;
2469                 break;
2470         case MSR_KVM_WALL_CLOCK:
2471         case MSR_KVM_WALL_CLOCK_NEW:
2472                 msr_info->data = vcpu->kvm->arch.wall_clock;
2473                 break;
2474         case MSR_KVM_SYSTEM_TIME:
2475         case MSR_KVM_SYSTEM_TIME_NEW:
2476                 msr_info->data = vcpu->arch.time;
2477                 break;
2478         case MSR_KVM_ASYNC_PF_EN:
2479                 msr_info->data = vcpu->arch.apf.msr_val;
2480                 break;
2481         case MSR_KVM_STEAL_TIME:
2482                 msr_info->data = vcpu->arch.st.msr_val;
2483                 break;
2484         case MSR_KVM_PV_EOI_EN:
2485                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2486                 break;
2487         case MSR_IA32_P5_MC_ADDR:
2488         case MSR_IA32_P5_MC_TYPE:
2489         case MSR_IA32_MCG_CAP:
2490         case MSR_IA32_MCG_CTL:
2491         case MSR_IA32_MCG_STATUS:
2492         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2493                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2494         case MSR_K7_CLK_CTL:
2495                 /*
2496                  * Provide expected ramp-up count for K7. All other
2497                  * are set to zero, indicating minimum divisors for
2498                  * every field.
2499                  *
2500                  * This prevents guest kernels on AMD host with CPU
2501                  * type 6, model 8 and higher from exploding due to
2502                  * the rdmsr failing.
2503                  */
2504                 msr_info->data = 0x20000000;
2505                 break;
2506         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2507         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2508         case HV_X64_MSR_CRASH_CTL:
2509         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2510                 return kvm_hv_get_msr_common(vcpu,
2511                                              msr_info->index, &msr_info->data);
2512                 break;
2513         case MSR_IA32_BBL_CR_CTL3:
2514                 /* This legacy MSR exists but isn't fully documented in current
2515                  * silicon.  It is however accessed by winxp in very narrow
2516                  * scenarios where it sets bit #19, itself documented as
2517                  * a "reserved" bit.  Best effort attempt to source coherent
2518                  * read data here should the balance of the register be
2519                  * interpreted by the guest:
2520                  *
2521                  * L2 cache control register 3: 64GB range, 256KB size,
2522                  * enabled, latency 0x1, configured
2523                  */
2524                 msr_info->data = 0xbe702111;
2525                 break;
2526         case MSR_AMD64_OSVW_ID_LENGTH:
2527                 if (!guest_cpuid_has_osvw(vcpu))
2528                         return 1;
2529                 msr_info->data = vcpu->arch.osvw.length;
2530                 break;
2531         case MSR_AMD64_OSVW_STATUS:
2532                 if (!guest_cpuid_has_osvw(vcpu))
2533                         return 1;
2534                 msr_info->data = vcpu->arch.osvw.status;
2535                 break;
2536         case MSR_PLATFORM_INFO:
2537                 msr_info->data = vcpu->arch.msr_platform_info;
2538                 break;
2539         case MSR_MISC_FEATURES_ENABLES:
2540                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2541                 break;
2542         default:
2543                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2544                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2545                 if (!ignore_msrs) {
2546                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2547                                                msr_info->index);
2548                         return 1;
2549                 } else {
2550                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2551                         msr_info->data = 0;
2552                 }
2553                 break;
2554         }
2555         return 0;
2556 }
2557 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2558
2559 /*
2560  * Read or write a bunch of msrs. All parameters are kernel addresses.
2561  *
2562  * @return number of msrs set successfully.
2563  */
2564 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2565                     struct kvm_msr_entry *entries,
2566                     int (*do_msr)(struct kvm_vcpu *vcpu,
2567                                   unsigned index, u64 *data))
2568 {
2569         int i, idx;
2570
2571         idx = srcu_read_lock(&vcpu->kvm->srcu);
2572         for (i = 0; i < msrs->nmsrs; ++i)
2573                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2574                         break;
2575         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2576
2577         return i;
2578 }
2579
2580 /*
2581  * Read or write a bunch of msrs. Parameters are user addresses.
2582  *
2583  * @return number of msrs set successfully.
2584  */
2585 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2586                   int (*do_msr)(struct kvm_vcpu *vcpu,
2587                                 unsigned index, u64 *data),
2588                   int writeback)
2589 {
2590         struct kvm_msrs msrs;
2591         struct kvm_msr_entry *entries;
2592         int r, n;
2593         unsigned size;
2594
2595         r = -EFAULT;
2596         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2597                 goto out;
2598
2599         r = -E2BIG;
2600         if (msrs.nmsrs >= MAX_IO_MSRS)
2601                 goto out;
2602
2603         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2604         entries = memdup_user(user_msrs->entries, size);
2605         if (IS_ERR(entries)) {
2606                 r = PTR_ERR(entries);
2607                 goto out;
2608         }
2609
2610         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2611         if (r < 0)
2612                 goto out_free;
2613
2614         r = -EFAULT;
2615         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2616                 goto out_free;
2617
2618         r = n;
2619
2620 out_free:
2621         kfree(entries);
2622 out:
2623         return r;
2624 }
2625
2626 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2627 {
2628         int r;
2629
2630         switch (ext) {
2631         case KVM_CAP_IRQCHIP:
2632         case KVM_CAP_HLT:
2633         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2634         case KVM_CAP_SET_TSS_ADDR:
2635         case KVM_CAP_EXT_CPUID:
2636         case KVM_CAP_EXT_EMUL_CPUID:
2637         case KVM_CAP_CLOCKSOURCE:
2638         case KVM_CAP_PIT:
2639         case KVM_CAP_NOP_IO_DELAY:
2640         case KVM_CAP_MP_STATE:
2641         case KVM_CAP_SYNC_MMU:
2642         case KVM_CAP_USER_NMI:
2643         case KVM_CAP_REINJECT_CONTROL:
2644         case KVM_CAP_IRQ_INJECT_STATUS:
2645         case KVM_CAP_IOEVENTFD:
2646         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2647         case KVM_CAP_PIT2:
2648         case KVM_CAP_PIT_STATE2:
2649         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2650         case KVM_CAP_XEN_HVM:
2651         case KVM_CAP_VCPU_EVENTS:
2652         case KVM_CAP_HYPERV:
2653         case KVM_CAP_HYPERV_VAPIC:
2654         case KVM_CAP_HYPERV_SPIN:
2655         case KVM_CAP_HYPERV_SYNIC:
2656         case KVM_CAP_PCI_SEGMENT:
2657         case KVM_CAP_DEBUGREGS:
2658         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2659         case KVM_CAP_XSAVE:
2660         case KVM_CAP_ASYNC_PF:
2661         case KVM_CAP_GET_TSC_KHZ:
2662         case KVM_CAP_KVMCLOCK_CTRL:
2663         case KVM_CAP_READONLY_MEM:
2664         case KVM_CAP_HYPERV_TIME:
2665         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2666         case KVM_CAP_TSC_DEADLINE_TIMER:
2667         case KVM_CAP_ENABLE_CAP_VM:
2668         case KVM_CAP_DISABLE_QUIRKS:
2669         case KVM_CAP_SET_BOOT_CPU_ID:
2670         case KVM_CAP_SPLIT_IRQCHIP:
2671         case KVM_CAP_IMMEDIATE_EXIT:
2672                 r = 1;
2673                 break;
2674         case KVM_CAP_ADJUST_CLOCK:
2675                 r = KVM_CLOCK_TSC_STABLE;
2676                 break;
2677         case KVM_CAP_X86_GUEST_MWAIT:
2678                 r = kvm_mwait_in_guest();
2679                 break;
2680         case KVM_CAP_X86_SMM:
2681                 /* SMBASE is usually relocated above 1M on modern chipsets,
2682                  * and SMM handlers might indeed rely on 4G segment limits,
2683                  * so do not report SMM to be available if real mode is
2684                  * emulated via vm86 mode.  Still, do not go to great lengths
2685                  * to avoid userspace's usage of the feature, because it is a
2686                  * fringe case that is not enabled except via specific settings
2687                  * of the module parameters.
2688                  */
2689                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2690                 break;
2691         case KVM_CAP_VAPIC:
2692                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2693                 break;
2694         case KVM_CAP_NR_VCPUS:
2695                 r = KVM_SOFT_MAX_VCPUS;
2696                 break;
2697         case KVM_CAP_MAX_VCPUS:
2698                 r = KVM_MAX_VCPUS;
2699                 break;
2700         case KVM_CAP_NR_MEMSLOTS:
2701                 r = KVM_USER_MEM_SLOTS;
2702                 break;
2703         case KVM_CAP_PV_MMU:    /* obsolete */
2704                 r = 0;
2705                 break;
2706         case KVM_CAP_MCE:
2707                 r = KVM_MAX_MCE_BANKS;
2708                 break;
2709         case KVM_CAP_XCRS:
2710                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2711                 break;
2712         case KVM_CAP_TSC_CONTROL:
2713                 r = kvm_has_tsc_control;
2714                 break;
2715         case KVM_CAP_X2APIC_API:
2716                 r = KVM_X2APIC_API_VALID_FLAGS;
2717                 break;
2718         default:
2719                 r = 0;
2720                 break;
2721         }
2722         return r;
2723
2724 }
2725
2726 long kvm_arch_dev_ioctl(struct file *filp,
2727                         unsigned int ioctl, unsigned long arg)
2728 {
2729         void __user *argp = (void __user *)arg;
2730         long r;
2731
2732         switch (ioctl) {
2733         case KVM_GET_MSR_INDEX_LIST: {
2734                 struct kvm_msr_list __user *user_msr_list = argp;
2735                 struct kvm_msr_list msr_list;
2736                 unsigned n;
2737
2738                 r = -EFAULT;
2739                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2740                         goto out;
2741                 n = msr_list.nmsrs;
2742                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2743                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2744                         goto out;
2745                 r = -E2BIG;
2746                 if (n < msr_list.nmsrs)
2747                         goto out;
2748                 r = -EFAULT;
2749                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2750                                  num_msrs_to_save * sizeof(u32)))
2751                         goto out;
2752                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2753                                  &emulated_msrs,
2754                                  num_emulated_msrs * sizeof(u32)))
2755                         goto out;
2756                 r = 0;
2757                 break;
2758         }
2759         case KVM_GET_SUPPORTED_CPUID:
2760         case KVM_GET_EMULATED_CPUID: {
2761                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2762                 struct kvm_cpuid2 cpuid;
2763
2764                 r = -EFAULT;
2765                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2766                         goto out;
2767
2768                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2769                                             ioctl);
2770                 if (r)
2771                         goto out;
2772
2773                 r = -EFAULT;
2774                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2775                         goto out;
2776                 r = 0;
2777                 break;
2778         }
2779         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2780                 r = -EFAULT;
2781                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2782                                  sizeof(kvm_mce_cap_supported)))
2783                         goto out;
2784                 r = 0;
2785                 break;
2786         }
2787         default:
2788                 r = -EINVAL;
2789         }
2790 out:
2791         return r;
2792 }
2793
2794 static void wbinvd_ipi(void *garbage)
2795 {
2796         wbinvd();
2797 }
2798
2799 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2800 {
2801         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2802 }
2803
2804 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2805 {
2806         /* Address WBINVD may be executed by guest */
2807         if (need_emulate_wbinvd(vcpu)) {
2808                 if (kvm_x86_ops->has_wbinvd_exit())
2809                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2810                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2811                         smp_call_function_single(vcpu->cpu,
2812                                         wbinvd_ipi, NULL, 1);
2813         }
2814
2815         kvm_x86_ops->vcpu_load(vcpu, cpu);
2816
2817         /* Apply any externally detected TSC adjustments (due to suspend) */
2818         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2819                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2820                 vcpu->arch.tsc_offset_adjustment = 0;
2821                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2822         }
2823
2824         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2825                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2826                                 rdtsc() - vcpu->arch.last_host_tsc;
2827                 if (tsc_delta < 0)
2828                         mark_tsc_unstable("KVM discovered backwards TSC");
2829
2830                 if (check_tsc_unstable()) {
2831                         u64 offset = kvm_compute_tsc_offset(vcpu,
2832                                                 vcpu->arch.last_guest_tsc);
2833                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2834                         vcpu->arch.tsc_catchup = 1;
2835                 }
2836                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2837                                 kvm_x86_ops->set_hv_timer(vcpu,
2838                                         kvm_get_lapic_target_expiration_tsc(vcpu)))
2839                         kvm_lapic_switch_to_sw_timer(vcpu);
2840                 /*
2841                  * On a host with synchronized TSC, there is no need to update
2842                  * kvmclock on vcpu->cpu migration
2843                  */
2844                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2845                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2846                 if (vcpu->cpu != cpu)
2847                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2848                 vcpu->cpu = cpu;
2849         }
2850
2851         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2852 }
2853
2854 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2855 {
2856         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2857                 return;
2858
2859         vcpu->arch.st.steal.preempted = 1;
2860
2861         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2862                         &vcpu->arch.st.steal.preempted,
2863                         offsetof(struct kvm_steal_time, preempted),
2864                         sizeof(vcpu->arch.st.steal.preempted));
2865 }
2866
2867 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2868 {
2869         int idx;
2870         /*
2871          * Disable page faults because we're in atomic context here.
2872          * kvm_write_guest_offset_cached() would call might_fault()
2873          * that relies on pagefault_disable() to tell if there's a
2874          * bug. NOTE: the write to guest memory may not go through if
2875          * during postcopy live migration or if there's heavy guest
2876          * paging.
2877          */
2878         pagefault_disable();
2879         /*
2880          * kvm_memslots() will be called by
2881          * kvm_write_guest_offset_cached() so take the srcu lock.
2882          */
2883         idx = srcu_read_lock(&vcpu->kvm->srcu);
2884         kvm_steal_time_set_preempted(vcpu);
2885         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2886         pagefault_enable();
2887         kvm_x86_ops->vcpu_put(vcpu);
2888         kvm_put_guest_fpu(vcpu);
2889         vcpu->arch.last_host_tsc = rdtsc();
2890 }
2891
2892 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2893                                     struct kvm_lapic_state *s)
2894 {
2895         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2896                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2897
2898         return kvm_apic_get_state(vcpu, s);
2899 }
2900
2901 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2902                                     struct kvm_lapic_state *s)
2903 {
2904         int r;
2905
2906         r = kvm_apic_set_state(vcpu, s);
2907         if (r)
2908                 return r;
2909         update_cr8_intercept(vcpu);
2910
2911         return 0;
2912 }
2913
2914 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2915 {
2916         return (!lapic_in_kernel(vcpu) ||
2917                 kvm_apic_accept_pic_intr(vcpu));
2918 }
2919
2920 /*
2921  * if userspace requested an interrupt window, check that the
2922  * interrupt window is open.
2923  *
2924  * No need to exit to userspace if we already have an interrupt queued.
2925  */
2926 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2927 {
2928         return kvm_arch_interrupt_allowed(vcpu) &&
2929                 !kvm_cpu_has_interrupt(vcpu) &&
2930                 !kvm_event_needs_reinjection(vcpu) &&
2931                 kvm_cpu_accept_dm_intr(vcpu);
2932 }
2933
2934 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2935                                     struct kvm_interrupt *irq)
2936 {
2937         if (irq->irq >= KVM_NR_INTERRUPTS)
2938                 return -EINVAL;
2939
2940         if (!irqchip_in_kernel(vcpu->kvm)) {
2941                 kvm_queue_interrupt(vcpu, irq->irq, false);
2942                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2943                 return 0;
2944         }
2945
2946         /*
2947          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2948          * fail for in-kernel 8259.
2949          */
2950         if (pic_in_kernel(vcpu->kvm))
2951                 return -ENXIO;
2952
2953         if (vcpu->arch.pending_external_vector != -1)
2954                 return -EEXIST;
2955
2956         vcpu->arch.pending_external_vector = irq->irq;
2957         kvm_make_request(KVM_REQ_EVENT, vcpu);
2958         return 0;
2959 }
2960
2961 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2962 {
2963         kvm_inject_nmi(vcpu);
2964
2965         return 0;
2966 }
2967
2968 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2969 {
2970         kvm_make_request(KVM_REQ_SMI, vcpu);
2971
2972         return 0;
2973 }
2974
2975 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2976                                            struct kvm_tpr_access_ctl *tac)
2977 {
2978         if (tac->flags)
2979                 return -EINVAL;
2980         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2981         return 0;
2982 }
2983
2984 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2985                                         u64 mcg_cap)
2986 {
2987         int r;
2988         unsigned bank_num = mcg_cap & 0xff, bank;
2989
2990         r = -EINVAL;
2991         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2992                 goto out;
2993         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2994                 goto out;
2995         r = 0;
2996         vcpu->arch.mcg_cap = mcg_cap;
2997         /* Init IA32_MCG_CTL to all 1s */
2998         if (mcg_cap & MCG_CTL_P)
2999                 vcpu->arch.mcg_ctl = ~(u64)0;
3000         /* Init IA32_MCi_CTL to all 1s */
3001         for (bank = 0; bank < bank_num; bank++)
3002                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3003
3004         if (kvm_x86_ops->setup_mce)
3005                 kvm_x86_ops->setup_mce(vcpu);
3006 out:
3007         return r;
3008 }
3009
3010 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3011                                       struct kvm_x86_mce *mce)
3012 {
3013         u64 mcg_cap = vcpu->arch.mcg_cap;
3014         unsigned bank_num = mcg_cap & 0xff;
3015         u64 *banks = vcpu->arch.mce_banks;
3016
3017         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3018                 return -EINVAL;
3019         /*
3020          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3021          * reporting is disabled
3022          */
3023         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3024             vcpu->arch.mcg_ctl != ~(u64)0)
3025                 return 0;
3026         banks += 4 * mce->bank;
3027         /*
3028          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3029          * reporting is disabled for the bank
3030          */
3031         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3032                 return 0;
3033         if (mce->status & MCI_STATUS_UC) {
3034                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3035                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3036                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3037                         return 0;
3038                 }
3039                 if (banks[1] & MCI_STATUS_VAL)
3040                         mce->status |= MCI_STATUS_OVER;
3041                 banks[2] = mce->addr;
3042                 banks[3] = mce->misc;
3043                 vcpu->arch.mcg_status = mce->mcg_status;
3044                 banks[1] = mce->status;
3045                 kvm_queue_exception(vcpu, MC_VECTOR);
3046         } else if (!(banks[1] & MCI_STATUS_VAL)
3047                    || !(banks[1] & MCI_STATUS_UC)) {
3048                 if (banks[1] & MCI_STATUS_VAL)
3049                         mce->status |= MCI_STATUS_OVER;
3050                 banks[2] = mce->addr;
3051                 banks[3] = mce->misc;
3052                 banks[1] = mce->status;
3053         } else
3054                 banks[1] |= MCI_STATUS_OVER;
3055         return 0;
3056 }
3057
3058 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3059                                                struct kvm_vcpu_events *events)
3060 {
3061         process_nmi(vcpu);
3062         events->exception.injected =
3063                 vcpu->arch.exception.pending &&
3064                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3065         events->exception.nr = vcpu->arch.exception.nr;
3066         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3067         events->exception.pad = 0;
3068         events->exception.error_code = vcpu->arch.exception.error_code;
3069
3070         events->interrupt.injected =
3071                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3072         events->interrupt.nr = vcpu->arch.interrupt.nr;
3073         events->interrupt.soft = 0;
3074         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3075
3076         events->nmi.injected = vcpu->arch.nmi_injected;
3077         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3078         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3079         events->nmi.pad = 0;
3080
3081         events->sipi_vector = 0; /* never valid when reporting to user space */
3082
3083         events->smi.smm = is_smm(vcpu);
3084         events->smi.pending = vcpu->arch.smi_pending;
3085         events->smi.smm_inside_nmi =
3086                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3087         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3088
3089         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3090                          | KVM_VCPUEVENT_VALID_SHADOW
3091                          | KVM_VCPUEVENT_VALID_SMM);
3092         memset(&events->reserved, 0, sizeof(events->reserved));
3093 }
3094
3095 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3096
3097 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3098                                               struct kvm_vcpu_events *events)
3099 {
3100         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3101                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3102                               | KVM_VCPUEVENT_VALID_SHADOW
3103                               | KVM_VCPUEVENT_VALID_SMM))
3104                 return -EINVAL;
3105
3106         if (events->exception.injected &&
3107             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3108              is_guest_mode(vcpu)))
3109                 return -EINVAL;
3110
3111         /* INITs are latched while in SMM */
3112         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3113             (events->smi.smm || events->smi.pending) &&
3114             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3115                 return -EINVAL;
3116
3117         process_nmi(vcpu);
3118         vcpu->arch.exception.pending = events->exception.injected;
3119         vcpu->arch.exception.nr = events->exception.nr;
3120         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3121         vcpu->arch.exception.error_code = events->exception.error_code;
3122
3123         vcpu->arch.interrupt.pending = events->interrupt.injected;
3124         vcpu->arch.interrupt.nr = events->interrupt.nr;
3125         vcpu->arch.interrupt.soft = events->interrupt.soft;
3126         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3127                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3128                                                   events->interrupt.shadow);
3129
3130         vcpu->arch.nmi_injected = events->nmi.injected;
3131         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3132                 vcpu->arch.nmi_pending = events->nmi.pending;
3133         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3134
3135         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3136             lapic_in_kernel(vcpu))
3137                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3138
3139         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3140                 u32 hflags = vcpu->arch.hflags;
3141                 if (events->smi.smm)
3142                         hflags |= HF_SMM_MASK;
3143                 else
3144                         hflags &= ~HF_SMM_MASK;
3145                 kvm_set_hflags(vcpu, hflags);
3146
3147                 vcpu->arch.smi_pending = events->smi.pending;
3148                 if (events->smi.smm_inside_nmi)
3149                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3150                 else
3151                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3152                 if (lapic_in_kernel(vcpu)) {
3153                         if (events->smi.latched_init)
3154                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3155                         else
3156                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3157                 }
3158         }
3159
3160         kvm_make_request(KVM_REQ_EVENT, vcpu);
3161
3162         return 0;
3163 }
3164
3165 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3166                                              struct kvm_debugregs *dbgregs)
3167 {
3168         unsigned long val;
3169
3170         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3171         kvm_get_dr(vcpu, 6, &val);
3172         dbgregs->dr6 = val;
3173         dbgregs->dr7 = vcpu->arch.dr7;
3174         dbgregs->flags = 0;
3175         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3176 }
3177
3178 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3179                                             struct kvm_debugregs *dbgregs)
3180 {
3181         if (dbgregs->flags)
3182                 return -EINVAL;
3183
3184         if (dbgregs->dr6 & ~0xffffffffull)
3185                 return -EINVAL;
3186         if (dbgregs->dr7 & ~0xffffffffull)
3187                 return -EINVAL;
3188
3189         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3190         kvm_update_dr0123(vcpu);
3191         vcpu->arch.dr6 = dbgregs->dr6;
3192         kvm_update_dr6(vcpu);
3193         vcpu->arch.dr7 = dbgregs->dr7;
3194         kvm_update_dr7(vcpu);
3195
3196         return 0;
3197 }
3198
3199 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3200
3201 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3202 {
3203         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3204         u64 xstate_bv = xsave->header.xfeatures;
3205         u64 valid;
3206
3207         /*
3208          * Copy legacy XSAVE area, to avoid complications with CPUID
3209          * leaves 0 and 1 in the loop below.
3210          */
3211         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3212
3213         /* Set XSTATE_BV */
3214         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3215         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3216
3217         /*
3218          * Copy each region from the possibly compacted offset to the
3219          * non-compacted offset.
3220          */
3221         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3222         while (valid) {
3223                 u64 feature = valid & -valid;
3224                 int index = fls64(feature) - 1;
3225                 void *src = get_xsave_addr(xsave, feature);
3226
3227                 if (src) {
3228                         u32 size, offset, ecx, edx;
3229                         cpuid_count(XSTATE_CPUID, index,
3230                                     &size, &offset, &ecx, &edx);
3231                         memcpy(dest + offset, src, size);
3232                 }
3233
3234                 valid -= feature;
3235         }
3236 }
3237
3238 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3239 {
3240         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3241         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3242         u64 valid;
3243
3244         /*
3245          * Copy legacy XSAVE area, to avoid complications with CPUID
3246          * leaves 0 and 1 in the loop below.
3247          */
3248         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3249
3250         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3251         xsave->header.xfeatures = xstate_bv;
3252         if (boot_cpu_has(X86_FEATURE_XSAVES))
3253                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3254
3255         /*
3256          * Copy each region from the non-compacted offset to the
3257          * possibly compacted offset.
3258          */
3259         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3260         while (valid) {
3261                 u64 feature = valid & -valid;
3262                 int index = fls64(feature) - 1;
3263                 void *dest = get_xsave_addr(xsave, feature);
3264
3265                 if (dest) {
3266                         u32 size, offset, ecx, edx;
3267                         cpuid_count(XSTATE_CPUID, index,
3268                                     &size, &offset, &ecx, &edx);
3269                         memcpy(dest, src + offset, size);
3270                 }
3271
3272                 valid -= feature;
3273         }
3274 }
3275
3276 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3277                                          struct kvm_xsave *guest_xsave)
3278 {
3279         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3280                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3281                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3282         } else {
3283                 memcpy(guest_xsave->region,
3284                         &vcpu->arch.guest_fpu.state.fxsave,
3285                         sizeof(struct fxregs_state));
3286                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3287                         XFEATURE_MASK_FPSSE;
3288         }
3289 }
3290
3291 #define XSAVE_MXCSR_OFFSET 24
3292
3293 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3294                                         struct kvm_xsave *guest_xsave)
3295 {
3296         u64 xstate_bv =
3297                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3298         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3299
3300         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3301                 /*
3302                  * Here we allow setting states that are not present in
3303                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3304                  * with old userspace.
3305                  */
3306                 if (xstate_bv & ~kvm_supported_xcr0() ||
3307                         mxcsr & ~mxcsr_feature_mask)
3308                         return -EINVAL;
3309                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3310         } else {
3311                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3312                         mxcsr & ~mxcsr_feature_mask)
3313                         return -EINVAL;
3314                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3315                         guest_xsave->region, sizeof(struct fxregs_state));
3316         }
3317         return 0;
3318 }
3319
3320 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3321                                         struct kvm_xcrs *guest_xcrs)
3322 {
3323         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3324                 guest_xcrs->nr_xcrs = 0;
3325                 return;
3326         }
3327
3328         guest_xcrs->nr_xcrs = 1;
3329         guest_xcrs->flags = 0;
3330         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3331         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3332 }
3333
3334 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3335                                        struct kvm_xcrs *guest_xcrs)
3336 {
3337         int i, r = 0;
3338
3339         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3340                 return -EINVAL;
3341
3342         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3343                 return -EINVAL;
3344
3345         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3346                 /* Only support XCR0 currently */
3347                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3348                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3349                                 guest_xcrs->xcrs[i].value);
3350                         break;
3351                 }
3352         if (r)
3353                 r = -EINVAL;
3354         return r;
3355 }
3356
3357 /*
3358  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3359  * stopped by the hypervisor.  This function will be called from the host only.
3360  * EINVAL is returned when the host attempts to set the flag for a guest that
3361  * does not support pv clocks.
3362  */
3363 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3364 {
3365         if (!vcpu->arch.pv_time_enabled)
3366                 return -EINVAL;
3367         vcpu->arch.pvclock_set_guest_stopped_request = true;
3368         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3369         return 0;
3370 }
3371
3372 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3373                                      struct kvm_enable_cap *cap)
3374 {
3375         if (cap->flags)
3376                 return -EINVAL;
3377
3378         switch (cap->cap) {
3379         case KVM_CAP_HYPERV_SYNIC:
3380                 if (!irqchip_in_kernel(vcpu->kvm))
3381                         return -EINVAL;
3382                 return kvm_hv_activate_synic(vcpu);
3383         default:
3384                 return -EINVAL;
3385         }
3386 }
3387
3388 long kvm_arch_vcpu_ioctl(struct file *filp,
3389                          unsigned int ioctl, unsigned long arg)
3390 {
3391         struct kvm_vcpu *vcpu = filp->private_data;
3392         void __user *argp = (void __user *)arg;
3393         int r;
3394         union {
3395                 struct kvm_lapic_state *lapic;
3396                 struct kvm_xsave *xsave;
3397                 struct kvm_xcrs *xcrs;
3398                 void *buffer;
3399         } u;
3400
3401         u.buffer = NULL;
3402         switch (ioctl) {
3403         case KVM_GET_LAPIC: {
3404                 r = -EINVAL;
3405                 if (!lapic_in_kernel(vcpu))
3406                         goto out;
3407                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3408
3409                 r = -ENOMEM;
3410                 if (!u.lapic)
3411                         goto out;
3412                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3413                 if (r)
3414                         goto out;
3415                 r = -EFAULT;
3416                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3417                         goto out;
3418                 r = 0;
3419                 break;
3420         }
3421         case KVM_SET_LAPIC: {
3422                 r = -EINVAL;
3423                 if (!lapic_in_kernel(vcpu))
3424                         goto out;
3425                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3426                 if (IS_ERR(u.lapic))
3427                         return PTR_ERR(u.lapic);
3428
3429                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3430                 break;
3431         }
3432         case KVM_INTERRUPT: {
3433                 struct kvm_interrupt irq;
3434
3435                 r = -EFAULT;
3436                 if (copy_from_user(&irq, argp, sizeof irq))
3437                         goto out;
3438                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3439                 break;
3440         }
3441         case KVM_NMI: {
3442                 r = kvm_vcpu_ioctl_nmi(vcpu);
3443                 break;
3444         }
3445         case KVM_SMI: {
3446                 r = kvm_vcpu_ioctl_smi(vcpu);
3447                 break;
3448         }
3449         case KVM_SET_CPUID: {
3450                 struct kvm_cpuid __user *cpuid_arg = argp;
3451                 struct kvm_cpuid cpuid;
3452
3453                 r = -EFAULT;
3454                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3455                         goto out;
3456                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3457                 break;
3458         }
3459         case KVM_SET_CPUID2: {
3460                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3461                 struct kvm_cpuid2 cpuid;
3462
3463                 r = -EFAULT;
3464                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3465                         goto out;
3466                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3467                                               cpuid_arg->entries);
3468                 break;
3469         }
3470         case KVM_GET_CPUID2: {
3471                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3472                 struct kvm_cpuid2 cpuid;
3473
3474                 r = -EFAULT;
3475                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3476                         goto out;
3477                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3478                                               cpuid_arg->entries);
3479                 if (r)
3480                         goto out;
3481                 r = -EFAULT;
3482                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3483                         goto out;
3484                 r = 0;
3485                 break;
3486         }
3487         case KVM_GET_MSRS:
3488                 r = msr_io(vcpu, argp, do_get_msr, 1);
3489                 break;
3490         case KVM_SET_MSRS:
3491                 r = msr_io(vcpu, argp, do_set_msr, 0);
3492                 break;
3493         case KVM_TPR_ACCESS_REPORTING: {
3494                 struct kvm_tpr_access_ctl tac;
3495
3496                 r = -EFAULT;
3497                 if (copy_from_user(&tac, argp, sizeof tac))
3498                         goto out;
3499                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3500                 if (r)
3501                         goto out;
3502                 r = -EFAULT;
3503                 if (copy_to_user(argp, &tac, sizeof tac))
3504                         goto out;
3505                 r = 0;
3506                 break;
3507         };
3508         case KVM_SET_VAPIC_ADDR: {
3509                 struct kvm_vapic_addr va;
3510                 int idx;
3511
3512                 r = -EINVAL;
3513                 if (!lapic_in_kernel(vcpu))
3514                         goto out;
3515                 r = -EFAULT;
3516                 if (copy_from_user(&va, argp, sizeof va))
3517                         goto out;
3518                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3519                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3520                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3521                 break;
3522         }
3523         case KVM_X86_SETUP_MCE: {
3524                 u64 mcg_cap;
3525
3526                 r = -EFAULT;
3527                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3528                         goto out;
3529                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3530                 break;
3531         }
3532         case KVM_X86_SET_MCE: {
3533                 struct kvm_x86_mce mce;
3534
3535                 r = -EFAULT;
3536                 if (copy_from_user(&mce, argp, sizeof mce))
3537                         goto out;
3538                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3539                 break;
3540         }
3541         case KVM_GET_VCPU_EVENTS: {
3542                 struct kvm_vcpu_events events;
3543
3544                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3545
3546                 r = -EFAULT;
3547                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3548                         break;
3549                 r = 0;
3550                 break;
3551         }
3552         case KVM_SET_VCPU_EVENTS: {
3553                 struct kvm_vcpu_events events;
3554
3555                 r = -EFAULT;
3556                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3557                         break;
3558
3559                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3560                 break;
3561         }
3562         case KVM_GET_DEBUGREGS: {
3563                 struct kvm_debugregs dbgregs;
3564
3565                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3566
3567                 r = -EFAULT;
3568                 if (copy_to_user(argp, &dbgregs,
3569                                  sizeof(struct kvm_debugregs)))
3570                         break;
3571                 r = 0;
3572                 break;
3573         }
3574         case KVM_SET_DEBUGREGS: {
3575                 struct kvm_debugregs dbgregs;
3576
3577                 r = -EFAULT;
3578                 if (copy_from_user(&dbgregs, argp,
3579                                    sizeof(struct kvm_debugregs)))
3580                         break;
3581
3582                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3583                 break;
3584         }
3585         case KVM_GET_XSAVE: {
3586                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3587                 r = -ENOMEM;
3588                 if (!u.xsave)
3589                         break;
3590
3591                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3592
3593                 r = -EFAULT;
3594                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3595                         break;
3596                 r = 0;
3597                 break;
3598         }
3599         case KVM_SET_XSAVE: {
3600                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3601                 if (IS_ERR(u.xsave))
3602                         return PTR_ERR(u.xsave);
3603
3604                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3605                 break;
3606         }
3607         case KVM_GET_XCRS: {
3608                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3609                 r = -ENOMEM;
3610                 if (!u.xcrs)
3611                         break;
3612
3613                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3614
3615                 r = -EFAULT;
3616                 if (copy_to_user(argp, u.xcrs,
3617                                  sizeof(struct kvm_xcrs)))
3618                         break;
3619                 r = 0;
3620                 break;
3621         }
3622         case KVM_SET_XCRS: {
3623                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3624                 if (IS_ERR(u.xcrs))
3625                         return PTR_ERR(u.xcrs);
3626
3627                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3628                 break;
3629         }
3630         case KVM_SET_TSC_KHZ: {
3631                 u32 user_tsc_khz;
3632
3633                 r = -EINVAL;
3634                 user_tsc_khz = (u32)arg;
3635
3636                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3637                         goto out;
3638
3639                 if (user_tsc_khz == 0)
3640                         user_tsc_khz = tsc_khz;
3641
3642                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3643                         r = 0;
3644
3645                 goto out;
3646         }
3647         case KVM_GET_TSC_KHZ: {
3648                 r = vcpu->arch.virtual_tsc_khz;
3649                 goto out;
3650         }
3651         case KVM_KVMCLOCK_CTRL: {
3652                 r = kvm_set_guest_paused(vcpu);
3653                 goto out;
3654         }
3655         case KVM_ENABLE_CAP: {
3656                 struct kvm_enable_cap cap;
3657
3658                 r = -EFAULT;
3659                 if (copy_from_user(&cap, argp, sizeof(cap)))
3660                         goto out;
3661                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3662                 break;
3663         }
3664         default:
3665                 r = -EINVAL;
3666         }
3667 out:
3668         kfree(u.buffer);
3669         return r;
3670 }
3671
3672 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3673 {
3674         return VM_FAULT_SIGBUS;
3675 }
3676
3677 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3678 {
3679         int ret;
3680
3681         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3682                 return -EINVAL;
3683         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3684         return ret;
3685 }
3686
3687 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3688                                               u64 ident_addr)
3689 {
3690         kvm->arch.ept_identity_map_addr = ident_addr;
3691         return 0;
3692 }
3693
3694 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3695                                           u32 kvm_nr_mmu_pages)
3696 {
3697         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3698                 return -EINVAL;
3699
3700         mutex_lock(&kvm->slots_lock);
3701
3702         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3703         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3704
3705         mutex_unlock(&kvm->slots_lock);
3706         return 0;
3707 }
3708
3709 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3710 {
3711         return kvm->arch.n_max_mmu_pages;
3712 }
3713
3714 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3715 {
3716         struct kvm_pic *pic = kvm->arch.vpic;
3717         int r;
3718
3719         r = 0;
3720         switch (chip->chip_id) {
3721         case KVM_IRQCHIP_PIC_MASTER:
3722                 memcpy(&chip->chip.pic, &pic->pics[0],
3723                         sizeof(struct kvm_pic_state));
3724                 break;
3725         case KVM_IRQCHIP_PIC_SLAVE:
3726                 memcpy(&chip->chip.pic, &pic->pics[1],
3727                         sizeof(struct kvm_pic_state));
3728                 break;
3729         case KVM_IRQCHIP_IOAPIC:
3730                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3731                 break;
3732         default:
3733                 r = -EINVAL;
3734                 break;
3735         }
3736         return r;
3737 }
3738
3739 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3740 {
3741         struct kvm_pic *pic = kvm->arch.vpic;
3742         int r;
3743
3744         r = 0;
3745         switch (chip->chip_id) {
3746         case KVM_IRQCHIP_PIC_MASTER:
3747                 spin_lock(&pic->lock);
3748                 memcpy(&pic->pics[0], &chip->chip.pic,
3749                         sizeof(struct kvm_pic_state));
3750                 spin_unlock(&pic->lock);
3751                 break;
3752         case KVM_IRQCHIP_PIC_SLAVE:
3753                 spin_lock(&pic->lock);
3754                 memcpy(&pic->pics[1], &chip->chip.pic,
3755                         sizeof(struct kvm_pic_state));
3756                 spin_unlock(&pic->lock);
3757                 break;
3758         case KVM_IRQCHIP_IOAPIC:
3759                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3760                 break;
3761         default:
3762                 r = -EINVAL;
3763                 break;
3764         }
3765         kvm_pic_update_irq(pic);
3766         return r;
3767 }
3768
3769 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3770 {
3771         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3772
3773         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3774
3775         mutex_lock(&kps->lock);
3776         memcpy(ps, &kps->channels, sizeof(*ps));
3777         mutex_unlock(&kps->lock);
3778         return 0;
3779 }
3780
3781 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3782 {
3783         int i;
3784         struct kvm_pit *pit = kvm->arch.vpit;
3785
3786         mutex_lock(&pit->pit_state.lock);
3787         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3788         for (i = 0; i < 3; i++)
3789                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3790         mutex_unlock(&pit->pit_state.lock);
3791         return 0;
3792 }
3793
3794 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3795 {
3796         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3797         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3798                 sizeof(ps->channels));
3799         ps->flags = kvm->arch.vpit->pit_state.flags;
3800         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3801         memset(&ps->reserved, 0, sizeof(ps->reserved));
3802         return 0;
3803 }
3804
3805 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3806 {
3807         int start = 0;
3808         int i;
3809         u32 prev_legacy, cur_legacy;
3810         struct kvm_pit *pit = kvm->arch.vpit;
3811
3812         mutex_lock(&pit->pit_state.lock);
3813         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3814         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3815         if (!prev_legacy && cur_legacy)
3816                 start = 1;
3817         memcpy(&pit->pit_state.channels, &ps->channels,
3818                sizeof(pit->pit_state.channels));
3819         pit->pit_state.flags = ps->flags;
3820         for (i = 0; i < 3; i++)
3821                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3822                                    start && i == 0);
3823         mutex_unlock(&pit->pit_state.lock);
3824         return 0;
3825 }
3826
3827 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3828                                  struct kvm_reinject_control *control)
3829 {
3830         struct kvm_pit *pit = kvm->arch.vpit;
3831
3832         if (!pit)
3833                 return -ENXIO;
3834
3835         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3836          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3837          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3838          */
3839         mutex_lock(&pit->pit_state.lock);
3840         kvm_pit_set_reinject(pit, control->pit_reinject);
3841         mutex_unlock(&pit->pit_state.lock);
3842
3843         return 0;
3844 }
3845
3846 /**
3847  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3848  * @kvm: kvm instance
3849  * @log: slot id and address to which we copy the log
3850  *
3851  * Steps 1-4 below provide general overview of dirty page logging. See
3852  * kvm_get_dirty_log_protect() function description for additional details.
3853  *
3854  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3855  * always flush the TLB (step 4) even if previous step failed  and the dirty
3856  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3857  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3858  * writes will be marked dirty for next log read.
3859  *
3860  *   1. Take a snapshot of the bit and clear it if needed.
3861  *   2. Write protect the corresponding page.
3862  *   3. Copy the snapshot to the userspace.
3863  *   4. Flush TLB's if needed.
3864  */
3865 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3866 {
3867         bool is_dirty = false;
3868         int r;
3869
3870         mutex_lock(&kvm->slots_lock);
3871
3872         /*
3873          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3874          */
3875         if (kvm_x86_ops->flush_log_dirty)
3876                 kvm_x86_ops->flush_log_dirty(kvm);
3877
3878         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3879
3880         /*
3881          * All the TLBs can be flushed out of mmu lock, see the comments in
3882          * kvm_mmu_slot_remove_write_access().
3883          */
3884         lockdep_assert_held(&kvm->slots_lock);
3885         if (is_dirty)
3886                 kvm_flush_remote_tlbs(kvm);
3887
3888         mutex_unlock(&kvm->slots_lock);
3889         return r;
3890 }
3891
3892 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3893                         bool line_status)
3894 {
3895         if (!irqchip_in_kernel(kvm))
3896                 return -ENXIO;
3897
3898         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3899                                         irq_event->irq, irq_event->level,
3900                                         line_status);
3901         return 0;
3902 }
3903
3904 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3905                                    struct kvm_enable_cap *cap)
3906 {
3907         int r;
3908
3909         if (cap->flags)
3910                 return -EINVAL;
3911
3912         switch (cap->cap) {
3913         case KVM_CAP_DISABLE_QUIRKS:
3914                 kvm->arch.disabled_quirks = cap->args[0];
3915                 r = 0;
3916                 break;
3917         case KVM_CAP_SPLIT_IRQCHIP: {
3918                 mutex_lock(&kvm->lock);
3919                 r = -EINVAL;
3920                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3921                         goto split_irqchip_unlock;
3922                 r = -EEXIST;
3923                 if (irqchip_in_kernel(kvm))
3924                         goto split_irqchip_unlock;
3925                 if (kvm->created_vcpus)
3926                         goto split_irqchip_unlock;
3927                 r = kvm_setup_empty_irq_routing(kvm);
3928                 if (r)
3929                         goto split_irqchip_unlock;
3930                 /* Pairs with irqchip_in_kernel. */
3931                 smp_wmb();
3932                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3933                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3934                 r = 0;
3935 split_irqchip_unlock:
3936                 mutex_unlock(&kvm->lock);
3937                 break;
3938         }
3939         case KVM_CAP_X2APIC_API:
3940                 r = -EINVAL;
3941                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3942                         break;
3943
3944                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3945                         kvm->arch.x2apic_format = true;
3946                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3947                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3948
3949                 r = 0;
3950                 break;
3951         default:
3952                 r = -EINVAL;
3953                 break;
3954         }
3955         return r;
3956 }
3957
3958 long kvm_arch_vm_ioctl(struct file *filp,
3959                        unsigned int ioctl, unsigned long arg)
3960 {
3961         struct kvm *kvm = filp->private_data;
3962         void __user *argp = (void __user *)arg;
3963         int r = -ENOTTY;
3964         /*
3965          * This union makes it completely explicit to gcc-3.x
3966          * that these two variables' stack usage should be
3967          * combined, not added together.
3968          */
3969         union {
3970                 struct kvm_pit_state ps;
3971                 struct kvm_pit_state2 ps2;
3972                 struct kvm_pit_config pit_config;
3973         } u;
3974
3975         switch (ioctl) {
3976         case KVM_SET_TSS_ADDR:
3977                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3978                 break;
3979         case KVM_SET_IDENTITY_MAP_ADDR: {
3980                 u64 ident_addr;
3981
3982                 r = -EFAULT;
3983                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3984                         goto out;
3985                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3986                 break;
3987         }
3988         case KVM_SET_NR_MMU_PAGES:
3989                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3990                 break;
3991         case KVM_GET_NR_MMU_PAGES:
3992                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3993                 break;
3994         case KVM_CREATE_IRQCHIP: {
3995                 mutex_lock(&kvm->lock);
3996
3997                 r = -EEXIST;
3998                 if (irqchip_in_kernel(kvm))
3999                         goto create_irqchip_unlock;
4000
4001                 r = -EINVAL;
4002                 if (kvm->created_vcpus)
4003                         goto create_irqchip_unlock;
4004
4005                 r = kvm_pic_init(kvm);
4006                 if (r)
4007                         goto create_irqchip_unlock;
4008
4009                 r = kvm_ioapic_init(kvm);
4010                 if (r) {
4011                         kvm_pic_destroy(kvm);
4012                         goto create_irqchip_unlock;
4013                 }
4014
4015                 r = kvm_setup_default_irq_routing(kvm);
4016                 if (r) {
4017                         kvm_ioapic_destroy(kvm);
4018                         kvm_pic_destroy(kvm);
4019                         goto create_irqchip_unlock;
4020                 }
4021                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4022                 smp_wmb();
4023                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4024         create_irqchip_unlock:
4025                 mutex_unlock(&kvm->lock);
4026                 break;
4027         }
4028         case KVM_CREATE_PIT:
4029                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4030                 goto create_pit;
4031         case KVM_CREATE_PIT2:
4032                 r = -EFAULT;
4033                 if (copy_from_user(&u.pit_config, argp,
4034                                    sizeof(struct kvm_pit_config)))
4035                         goto out;
4036         create_pit:
4037                 mutex_lock(&kvm->lock);
4038                 r = -EEXIST;
4039                 if (kvm->arch.vpit)
4040                         goto create_pit_unlock;
4041                 r = -ENOMEM;
4042                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4043                 if (kvm->arch.vpit)
4044                         r = 0;
4045         create_pit_unlock:
4046                 mutex_unlock(&kvm->lock);
4047                 break;
4048         case KVM_GET_IRQCHIP: {
4049                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4050                 struct kvm_irqchip *chip;
4051
4052                 chip = memdup_user(argp, sizeof(*chip));
4053                 if (IS_ERR(chip)) {
4054                         r = PTR_ERR(chip);
4055                         goto out;
4056                 }
4057
4058                 r = -ENXIO;
4059                 if (!irqchip_kernel(kvm))
4060                         goto get_irqchip_out;
4061                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4062                 if (r)
4063                         goto get_irqchip_out;
4064                 r = -EFAULT;
4065                 if (copy_to_user(argp, chip, sizeof *chip))
4066                         goto get_irqchip_out;
4067                 r = 0;
4068         get_irqchip_out:
4069                 kfree(chip);
4070                 break;
4071         }
4072         case KVM_SET_IRQCHIP: {
4073                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4074                 struct kvm_irqchip *chip;
4075
4076                 chip = memdup_user(argp, sizeof(*chip));
4077                 if (IS_ERR(chip)) {
4078                         r = PTR_ERR(chip);
4079                         goto out;
4080                 }
4081
4082                 r = -ENXIO;
4083                 if (!irqchip_kernel(kvm))
4084                         goto set_irqchip_out;
4085                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4086                 if (r)
4087                         goto set_irqchip_out;
4088                 r = 0;
4089         set_irqchip_out:
4090                 kfree(chip);
4091                 break;
4092         }
4093         case KVM_GET_PIT: {
4094                 r = -EFAULT;
4095                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4096                         goto out;
4097                 r = -ENXIO;
4098                 if (!kvm->arch.vpit)
4099                         goto out;
4100                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4101                 if (r)
4102                         goto out;
4103                 r = -EFAULT;
4104                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4105                         goto out;
4106                 r = 0;
4107                 break;
4108         }
4109         case KVM_SET_PIT: {
4110                 r = -EFAULT;
4111                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4112                         goto out;
4113                 r = -ENXIO;
4114                 if (!kvm->arch.vpit)
4115                         goto out;
4116                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4117                 break;
4118         }
4119         case KVM_GET_PIT2: {
4120                 r = -ENXIO;
4121                 if (!kvm->arch.vpit)
4122                         goto out;
4123                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4124                 if (r)
4125                         goto out;
4126                 r = -EFAULT;
4127                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4128                         goto out;
4129                 r = 0;
4130                 break;
4131         }
4132         case KVM_SET_PIT2: {
4133                 r = -EFAULT;
4134                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4135                         goto out;
4136                 r = -ENXIO;
4137                 if (!kvm->arch.vpit)
4138                         goto out;
4139                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4140                 break;
4141         }
4142         case KVM_REINJECT_CONTROL: {
4143                 struct kvm_reinject_control control;
4144                 r =  -EFAULT;
4145                 if (copy_from_user(&control, argp, sizeof(control)))
4146                         goto out;
4147                 r = kvm_vm_ioctl_reinject(kvm, &control);
4148                 break;
4149         }
4150         case KVM_SET_BOOT_CPU_ID:
4151                 r = 0;
4152                 mutex_lock(&kvm->lock);
4153                 if (kvm->created_vcpus)
4154                         r = -EBUSY;
4155                 else
4156                         kvm->arch.bsp_vcpu_id = arg;
4157                 mutex_unlock(&kvm->lock);
4158                 break;
4159         case KVM_XEN_HVM_CONFIG: {
4160                 r = -EFAULT;
4161                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4162                                    sizeof(struct kvm_xen_hvm_config)))
4163                         goto out;
4164                 r = -EINVAL;
4165                 if (kvm->arch.xen_hvm_config.flags)
4166                         goto out;
4167                 r = 0;
4168                 break;
4169         }
4170         case KVM_SET_CLOCK: {
4171                 struct kvm_clock_data user_ns;
4172                 u64 now_ns;
4173
4174                 r = -EFAULT;
4175                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4176                         goto out;
4177
4178                 r = -EINVAL;
4179                 if (user_ns.flags)
4180                         goto out;
4181
4182                 r = 0;
4183                 now_ns = get_kvmclock_ns(kvm);
4184                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4185                 kvm_gen_update_masterclock(kvm);
4186                 break;
4187         }
4188         case KVM_GET_CLOCK: {
4189                 struct kvm_clock_data user_ns;
4190                 u64 now_ns;
4191
4192                 now_ns = get_kvmclock_ns(kvm);
4193                 user_ns.clock = now_ns;
4194                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4195                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4196
4197                 r = -EFAULT;
4198                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4199                         goto out;
4200                 r = 0;
4201                 break;
4202         }
4203         case KVM_ENABLE_CAP: {
4204                 struct kvm_enable_cap cap;
4205
4206                 r = -EFAULT;
4207                 if (copy_from_user(&cap, argp, sizeof(cap)))
4208                         goto out;
4209                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4210                 break;
4211         }
4212         default:
4213                 r = -ENOTTY;
4214         }
4215 out:
4216         return r;
4217 }
4218
4219 static void kvm_init_msr_list(void)
4220 {
4221         u32 dummy[2];
4222         unsigned i, j;
4223
4224         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4225                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4226                         continue;
4227
4228                 /*
4229                  * Even MSRs that are valid in the host may not be exposed
4230                  * to the guests in some cases.
4231                  */
4232                 switch (msrs_to_save[i]) {
4233                 case MSR_IA32_BNDCFGS:
4234                         if (!kvm_x86_ops->mpx_supported())
4235                                 continue;
4236                         break;
4237                 case MSR_TSC_AUX:
4238                         if (!kvm_x86_ops->rdtscp_supported())
4239                                 continue;
4240                         break;
4241                 default:
4242                         break;
4243                 }
4244
4245                 if (j < i)
4246                         msrs_to_save[j] = msrs_to_save[i];
4247                 j++;
4248         }
4249         num_msrs_to_save = j;
4250
4251         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4252                 switch (emulated_msrs[i]) {
4253                 case MSR_IA32_SMBASE:
4254                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4255                                 continue;
4256                         break;
4257                 default:
4258                         break;
4259                 }
4260
4261                 if (j < i)
4262                         emulated_msrs[j] = emulated_msrs[i];
4263                 j++;
4264         }
4265         num_emulated_msrs = j;
4266 }
4267
4268 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4269                            const void *v)
4270 {
4271         int handled = 0;
4272         int n;
4273
4274         do {
4275                 n = min(len, 8);
4276                 if (!(lapic_in_kernel(vcpu) &&
4277                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4278                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4279                         break;
4280                 handled += n;
4281                 addr += n;
4282                 len -= n;
4283                 v += n;
4284         } while (len);
4285
4286         return handled;
4287 }
4288
4289 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4290 {
4291         int handled = 0;
4292         int n;
4293
4294         do {
4295                 n = min(len, 8);
4296                 if (!(lapic_in_kernel(vcpu) &&
4297                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4298                                          addr, n, v))
4299                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4300                         break;
4301                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4302                 handled += n;
4303                 addr += n;
4304                 len -= n;
4305                 v += n;
4306         } while (len);
4307
4308         return handled;
4309 }
4310
4311 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4312                         struct kvm_segment *var, int seg)
4313 {
4314         kvm_x86_ops->set_segment(vcpu, var, seg);
4315 }
4316
4317 void kvm_get_segment(struct kvm_vcpu *vcpu,
4318                      struct kvm_segment *var, int seg)
4319 {
4320         kvm_x86_ops->get_segment(vcpu, var, seg);
4321 }
4322
4323 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4324                            struct x86_exception *exception)
4325 {
4326         gpa_t t_gpa;
4327
4328         BUG_ON(!mmu_is_nested(vcpu));
4329
4330         /* NPT walks are always user-walks */
4331         access |= PFERR_USER_MASK;
4332         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4333
4334         return t_gpa;
4335 }
4336
4337 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4338                               struct x86_exception *exception)
4339 {
4340         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4341         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4342 }
4343
4344  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4345                                 struct x86_exception *exception)
4346 {
4347         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4348         access |= PFERR_FETCH_MASK;
4349         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4350 }
4351
4352 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4353                                struct x86_exception *exception)
4354 {
4355         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4356         access |= PFERR_WRITE_MASK;
4357         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4358 }
4359
4360 /* uses this to access any guest's mapped memory without checking CPL */
4361 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4362                                 struct x86_exception *exception)
4363 {
4364         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4365 }
4366
4367 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4368                                       struct kvm_vcpu *vcpu, u32 access,
4369                                       struct x86_exception *exception)
4370 {
4371         void *data = val;
4372         int r = X86EMUL_CONTINUE;
4373
4374         while (bytes) {
4375                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4376                                                             exception);
4377                 unsigned offset = addr & (PAGE_SIZE-1);
4378                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4379                 int ret;
4380
4381                 if (gpa == UNMAPPED_GVA)
4382                         return X86EMUL_PROPAGATE_FAULT;
4383                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4384                                                offset, toread);
4385                 if (ret < 0) {
4386                         r = X86EMUL_IO_NEEDED;
4387                         goto out;
4388                 }
4389
4390                 bytes -= toread;
4391                 data += toread;
4392                 addr += toread;
4393         }
4394 out:
4395         return r;
4396 }
4397
4398 /* used for instruction fetching */
4399 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4400                                 gva_t addr, void *val, unsigned int bytes,
4401                                 struct x86_exception *exception)
4402 {
4403         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4404         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4405         unsigned offset;
4406         int ret;
4407
4408         /* Inline kvm_read_guest_virt_helper for speed.  */
4409         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4410                                                     exception);
4411         if (unlikely(gpa == UNMAPPED_GVA))
4412                 return X86EMUL_PROPAGATE_FAULT;
4413
4414         offset = addr & (PAGE_SIZE-1);
4415         if (WARN_ON(offset + bytes > PAGE_SIZE))
4416                 bytes = (unsigned)PAGE_SIZE - offset;
4417         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4418                                        offset, bytes);
4419         if (unlikely(ret < 0))
4420                 return X86EMUL_IO_NEEDED;
4421
4422         return X86EMUL_CONTINUE;
4423 }
4424
4425 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4426                                gva_t addr, void *val, unsigned int bytes,
4427                                struct x86_exception *exception)
4428 {
4429         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4430         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4431
4432         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4433                                           exception);
4434 }
4435 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4436
4437 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4438                                       gva_t addr, void *val, unsigned int bytes,
4439                                       struct x86_exception *exception)
4440 {
4441         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4442         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4443 }
4444
4445 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4446                 unsigned long addr, void *val, unsigned int bytes)
4447 {
4448         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4449         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4450
4451         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4452 }
4453
4454 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4455                                        gva_t addr, void *val,
4456                                        unsigned int bytes,
4457                                        struct x86_exception *exception)
4458 {
4459         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4460         void *data = val;
4461         int r = X86EMUL_CONTINUE;
4462
4463         while (bytes) {
4464                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4465                                                              PFERR_WRITE_MASK,
4466                                                              exception);
4467                 unsigned offset = addr & (PAGE_SIZE-1);
4468                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4469                 int ret;
4470
4471                 if (gpa == UNMAPPED_GVA)
4472                         return X86EMUL_PROPAGATE_FAULT;
4473                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4474                 if (ret < 0) {
4475                         r = X86EMUL_IO_NEEDED;
4476                         goto out;
4477                 }
4478
4479                 bytes -= towrite;
4480                 data += towrite;
4481                 addr += towrite;
4482         }
4483 out:
4484         return r;
4485 }
4486 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4487
4488 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4489                             gpa_t gpa, bool write)
4490 {
4491         /* For APIC access vmexit */
4492         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4493                 return 1;
4494
4495         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4496                 trace_vcpu_match_mmio(gva, gpa, write, true);
4497                 return 1;
4498         }
4499
4500         return 0;
4501 }
4502
4503 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4504                                 gpa_t *gpa, struct x86_exception *exception,
4505                                 bool write)
4506 {
4507         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4508                 | (write ? PFERR_WRITE_MASK : 0);
4509
4510         /*
4511          * currently PKRU is only applied to ept enabled guest so
4512          * there is no pkey in EPT page table for L1 guest or EPT
4513          * shadow page table for L2 guest.
4514          */
4515         if (vcpu_match_mmio_gva(vcpu, gva)
4516             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4517                                  vcpu->arch.access, 0, access)) {
4518                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4519                                         (gva & (PAGE_SIZE - 1));
4520                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4521                 return 1;
4522         }
4523
4524         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4525
4526         if (*gpa == UNMAPPED_GVA)
4527                 return -1;
4528
4529         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4530 }
4531
4532 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4533                         const void *val, int bytes)
4534 {
4535         int ret;
4536
4537         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4538         if (ret < 0)
4539                 return 0;
4540         kvm_page_track_write(vcpu, gpa, val, bytes);
4541         return 1;
4542 }
4543
4544 struct read_write_emulator_ops {
4545         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4546                                   int bytes);
4547         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4548                                   void *val, int bytes);
4549         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4550                                int bytes, void *val);
4551         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4552                                     void *val, int bytes);
4553         bool write;
4554 };
4555
4556 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4557 {
4558         if (vcpu->mmio_read_completed) {
4559                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4560                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4561                 vcpu->mmio_read_completed = 0;
4562                 return 1;
4563         }
4564
4565         return 0;
4566 }
4567
4568 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4569                         void *val, int bytes)
4570 {
4571         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4572 }
4573
4574 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4575                          void *val, int bytes)
4576 {
4577         return emulator_write_phys(vcpu, gpa, val, bytes);
4578 }
4579
4580 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4581 {
4582         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4583         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4584 }
4585
4586 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4587                           void *val, int bytes)
4588 {
4589         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4590         return X86EMUL_IO_NEEDED;
4591 }
4592
4593 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4594                            void *val, int bytes)
4595 {
4596         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4597
4598         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4599         return X86EMUL_CONTINUE;
4600 }
4601
4602 static const struct read_write_emulator_ops read_emultor = {
4603         .read_write_prepare = read_prepare,
4604         .read_write_emulate = read_emulate,
4605         .read_write_mmio = vcpu_mmio_read,
4606         .read_write_exit_mmio = read_exit_mmio,
4607 };
4608
4609 static const struct read_write_emulator_ops write_emultor = {
4610         .read_write_emulate = write_emulate,
4611         .read_write_mmio = write_mmio,
4612         .read_write_exit_mmio = write_exit_mmio,
4613         .write = true,
4614 };
4615
4616 static int emulator_read_write_onepage(unsigned long addr, void *val,
4617                                        unsigned int bytes,
4618                                        struct x86_exception *exception,
4619                                        struct kvm_vcpu *vcpu,
4620                                        const struct read_write_emulator_ops *ops)
4621 {
4622         gpa_t gpa;
4623         int handled, ret;
4624         bool write = ops->write;
4625         struct kvm_mmio_fragment *frag;
4626         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4627
4628         /*
4629          * If the exit was due to a NPF we may already have a GPA.
4630          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4631          * Note, this cannot be used on string operations since string
4632          * operation using rep will only have the initial GPA from the NPF
4633          * occurred.
4634          */
4635         if (vcpu->arch.gpa_available &&
4636             emulator_can_use_gpa(ctxt) &&
4637             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4638             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4639                 gpa = exception->address;
4640                 goto mmio;
4641         }
4642
4643         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4644
4645         if (ret < 0)
4646                 return X86EMUL_PROPAGATE_FAULT;
4647
4648         /* For APIC access vmexit */
4649         if (ret)
4650                 goto mmio;
4651
4652         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4653                 return X86EMUL_CONTINUE;
4654
4655 mmio:
4656         /*
4657          * Is this MMIO handled locally?
4658          */
4659         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4660         if (handled == bytes)
4661                 return X86EMUL_CONTINUE;
4662
4663         gpa += handled;
4664         bytes -= handled;
4665         val += handled;
4666
4667         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4668         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4669         frag->gpa = gpa;
4670         frag->data = val;
4671         frag->len = bytes;
4672         return X86EMUL_CONTINUE;
4673 }
4674
4675 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4676                         unsigned long addr,
4677                         void *val, unsigned int bytes,
4678                         struct x86_exception *exception,
4679                         const struct read_write_emulator_ops *ops)
4680 {
4681         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4682         gpa_t gpa;
4683         int rc;
4684
4685         if (ops->read_write_prepare &&
4686                   ops->read_write_prepare(vcpu, val, bytes))
4687                 return X86EMUL_CONTINUE;
4688
4689         vcpu->mmio_nr_fragments = 0;
4690
4691         /* Crossing a page boundary? */
4692         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4693                 int now;
4694
4695                 now = -addr & ~PAGE_MASK;
4696                 rc = emulator_read_write_onepage(addr, val, now, exception,
4697                                                  vcpu, ops);
4698
4699                 if (rc != X86EMUL_CONTINUE)
4700                         return rc;
4701                 addr += now;
4702                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4703                         addr = (u32)addr;
4704                 val += now;
4705                 bytes -= now;
4706         }
4707
4708         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4709                                          vcpu, ops);
4710         if (rc != X86EMUL_CONTINUE)
4711                 return rc;
4712
4713         if (!vcpu->mmio_nr_fragments)
4714                 return rc;
4715
4716         gpa = vcpu->mmio_fragments[0].gpa;
4717
4718         vcpu->mmio_needed = 1;
4719         vcpu->mmio_cur_fragment = 0;
4720
4721         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4722         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4723         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4724         vcpu->run->mmio.phys_addr = gpa;
4725
4726         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4727 }
4728
4729 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4730                                   unsigned long addr,
4731                                   void *val,
4732                                   unsigned int bytes,
4733                                   struct x86_exception *exception)
4734 {
4735         return emulator_read_write(ctxt, addr, val, bytes,
4736                                    exception, &read_emultor);
4737 }
4738
4739 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4740                             unsigned long addr,
4741                             const void *val,
4742                             unsigned int bytes,
4743                             struct x86_exception *exception)
4744 {
4745         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4746                                    exception, &write_emultor);
4747 }
4748
4749 #define CMPXCHG_TYPE(t, ptr, old, new) \
4750         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4751
4752 #ifdef CONFIG_X86_64
4753 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4754 #else
4755 #  define CMPXCHG64(ptr, old, new) \
4756         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4757 #endif
4758
4759 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4760                                      unsigned long addr,
4761                                      const void *old,
4762                                      const void *new,
4763                                      unsigned int bytes,
4764                                      struct x86_exception *exception)
4765 {
4766         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4767         gpa_t gpa;
4768         struct page *page;
4769         char *kaddr;
4770         bool exchanged;
4771
4772         /* guests cmpxchg8b have to be emulated atomically */
4773         if (bytes > 8 || (bytes & (bytes - 1)))
4774                 goto emul_write;
4775
4776         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4777
4778         if (gpa == UNMAPPED_GVA ||
4779             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4780                 goto emul_write;
4781
4782         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4783                 goto emul_write;
4784
4785         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4786         if (is_error_page(page))
4787                 goto emul_write;
4788
4789         kaddr = kmap_atomic(page);
4790         kaddr += offset_in_page(gpa);
4791         switch (bytes) {
4792         case 1:
4793                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4794                 break;
4795         case 2:
4796                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4797                 break;
4798         case 4:
4799                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4800                 break;
4801         case 8:
4802                 exchanged = CMPXCHG64(kaddr, old, new);
4803                 break;
4804         default:
4805                 BUG();
4806         }
4807         kunmap_atomic(kaddr);
4808         kvm_release_page_dirty(page);
4809
4810         if (!exchanged)
4811                 return X86EMUL_CMPXCHG_FAILED;
4812
4813         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4814         kvm_page_track_write(vcpu, gpa, new, bytes);
4815
4816         return X86EMUL_CONTINUE;
4817
4818 emul_write:
4819         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4820
4821         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4822 }
4823
4824 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4825 {
4826         /* TODO: String I/O for in kernel device */
4827         int r;
4828
4829         if (vcpu->arch.pio.in)
4830                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4831                                     vcpu->arch.pio.size, pd);
4832         else
4833                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4834                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4835                                      pd);
4836         return r;
4837 }
4838
4839 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4840                                unsigned short port, void *val,
4841                                unsigned int count, bool in)
4842 {
4843         vcpu->arch.pio.port = port;
4844         vcpu->arch.pio.in = in;
4845         vcpu->arch.pio.count  = count;
4846         vcpu->arch.pio.size = size;
4847
4848         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4849                 vcpu->arch.pio.count = 0;
4850                 return 1;
4851         }
4852
4853         vcpu->run->exit_reason = KVM_EXIT_IO;
4854         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4855         vcpu->run->io.size = size;
4856         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4857         vcpu->run->io.count = count;
4858         vcpu->run->io.port = port;
4859
4860         return 0;
4861 }
4862
4863 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4864                                     int size, unsigned short port, void *val,
4865                                     unsigned int count)
4866 {
4867         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4868         int ret;
4869
4870         if (vcpu->arch.pio.count)
4871                 goto data_avail;
4872
4873         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4874         if (ret) {
4875 data_avail:
4876                 memcpy(val, vcpu->arch.pio_data, size * count);
4877                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4878                 vcpu->arch.pio.count = 0;
4879                 return 1;
4880         }
4881
4882         return 0;
4883 }
4884
4885 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4886                                      int size, unsigned short port,
4887                                      const void *val, unsigned int count)
4888 {
4889         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4890
4891         memcpy(vcpu->arch.pio_data, val, size * count);
4892         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4893         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4894 }
4895
4896 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4897 {
4898         return kvm_x86_ops->get_segment_base(vcpu, seg);
4899 }
4900
4901 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4902 {
4903         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4904 }
4905
4906 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4907 {
4908         if (!need_emulate_wbinvd(vcpu))
4909                 return X86EMUL_CONTINUE;
4910
4911         if (kvm_x86_ops->has_wbinvd_exit()) {
4912                 int cpu = get_cpu();
4913
4914                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4915                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4916                                 wbinvd_ipi, NULL, 1);
4917                 put_cpu();
4918                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4919         } else
4920                 wbinvd();
4921         return X86EMUL_CONTINUE;
4922 }
4923
4924 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4925 {
4926         kvm_emulate_wbinvd_noskip(vcpu);
4927         return kvm_skip_emulated_instruction(vcpu);
4928 }
4929 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4930
4931
4932
4933 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4934 {
4935         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4936 }
4937
4938 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4939                            unsigned long *dest)
4940 {
4941         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4942 }
4943
4944 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4945                            unsigned long value)
4946 {
4947
4948         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4949 }
4950
4951 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4952 {
4953         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4954 }
4955
4956 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4957 {
4958         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4959         unsigned long value;
4960
4961         switch (cr) {
4962         case 0:
4963                 value = kvm_read_cr0(vcpu);
4964                 break;
4965         case 2:
4966                 value = vcpu->arch.cr2;
4967                 break;
4968         case 3:
4969                 value = kvm_read_cr3(vcpu);
4970                 break;
4971         case 4:
4972                 value = kvm_read_cr4(vcpu);
4973                 break;
4974         case 8:
4975                 value = kvm_get_cr8(vcpu);
4976                 break;
4977         default:
4978                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4979                 return 0;
4980         }
4981
4982         return value;
4983 }
4984
4985 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4986 {
4987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4988         int res = 0;
4989
4990         switch (cr) {
4991         case 0:
4992                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4993                 break;
4994         case 2:
4995                 vcpu->arch.cr2 = val;
4996                 break;
4997         case 3:
4998                 res = kvm_set_cr3(vcpu, val);
4999                 break;
5000         case 4:
5001                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5002                 break;
5003         case 8:
5004                 res = kvm_set_cr8(vcpu, val);
5005                 break;
5006         default:
5007                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5008                 res = -1;
5009         }
5010
5011         return res;
5012 }
5013
5014 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5015 {
5016         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5017 }
5018
5019 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5020 {
5021         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5022 }
5023
5024 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5025 {
5026         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5027 }
5028
5029 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5030 {
5031         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5032 }
5033
5034 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5035 {
5036         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5037 }
5038
5039 static unsigned long emulator_get_cached_segment_base(
5040         struct x86_emulate_ctxt *ctxt, int seg)
5041 {
5042         return get_segment_base(emul_to_vcpu(ctxt), seg);
5043 }
5044
5045 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5046                                  struct desc_struct *desc, u32 *base3,
5047                                  int seg)
5048 {
5049         struct kvm_segment var;
5050
5051         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5052         *selector = var.selector;
5053
5054         if (var.unusable) {
5055                 memset(desc, 0, sizeof(*desc));
5056                 return false;
5057         }
5058
5059         if (var.g)
5060                 var.limit >>= 12;
5061         set_desc_limit(desc, var.limit);
5062         set_desc_base(desc, (unsigned long)var.base);
5063 #ifdef CONFIG_X86_64
5064         if (base3)
5065                 *base3 = var.base >> 32;
5066 #endif
5067         desc->type = var.type;
5068         desc->s = var.s;
5069         desc->dpl = var.dpl;
5070         desc->p = var.present;
5071         desc->avl = var.avl;
5072         desc->l = var.l;
5073         desc->d = var.db;
5074         desc->g = var.g;
5075
5076         return true;
5077 }
5078
5079 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5080                                  struct desc_struct *desc, u32 base3,
5081                                  int seg)
5082 {
5083         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5084         struct kvm_segment var;
5085
5086         var.selector = selector;
5087         var.base = get_desc_base(desc);
5088 #ifdef CONFIG_X86_64
5089         var.base |= ((u64)base3) << 32;
5090 #endif
5091         var.limit = get_desc_limit(desc);
5092         if (desc->g)
5093                 var.limit = (var.limit << 12) | 0xfff;
5094         var.type = desc->type;
5095         var.dpl = desc->dpl;
5096         var.db = desc->d;
5097         var.s = desc->s;
5098         var.l = desc->l;
5099         var.g = desc->g;
5100         var.avl = desc->avl;
5101         var.present = desc->p;
5102         var.unusable = !var.present;
5103         var.padding = 0;
5104
5105         kvm_set_segment(vcpu, &var, seg);
5106         return;
5107 }
5108
5109 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5110                             u32 msr_index, u64 *pdata)
5111 {
5112         struct msr_data msr;
5113         int r;
5114
5115         msr.index = msr_index;
5116         msr.host_initiated = false;
5117         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5118         if (r)
5119                 return r;
5120
5121         *pdata = msr.data;
5122         return 0;
5123 }
5124
5125 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5126                             u32 msr_index, u64 data)
5127 {
5128         struct msr_data msr;
5129
5130         msr.data = data;
5131         msr.index = msr_index;
5132         msr.host_initiated = false;
5133         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5134 }
5135
5136 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5137 {
5138         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5139
5140         return vcpu->arch.smbase;
5141 }
5142
5143 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5144 {
5145         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5146
5147         vcpu->arch.smbase = smbase;
5148 }
5149
5150 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5151                               u32 pmc)
5152 {
5153         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5154 }
5155
5156 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5157                              u32 pmc, u64 *pdata)
5158 {
5159         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5160 }
5161
5162 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5163 {
5164         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5165 }
5166
5167 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5168 {
5169         preempt_disable();
5170         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5171 }
5172
5173 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5174 {
5175         preempt_enable();
5176 }
5177
5178 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5179                               struct x86_instruction_info *info,
5180                               enum x86_intercept_stage stage)
5181 {
5182         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5183 }
5184
5185 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5186                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5187 {
5188         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5189 }
5190
5191 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5192 {
5193         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5194 }
5195
5196 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5197 {
5198         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5199 }
5200
5201 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5202 {
5203         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5204 }
5205
5206 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5207 {
5208         return emul_to_vcpu(ctxt)->arch.hflags;
5209 }
5210
5211 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5212 {
5213         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5214 }
5215
5216 static const struct x86_emulate_ops emulate_ops = {
5217         .read_gpr            = emulator_read_gpr,
5218         .write_gpr           = emulator_write_gpr,
5219         .read_std            = kvm_read_guest_virt_system,
5220         .write_std           = kvm_write_guest_virt_system,
5221         .read_phys           = kvm_read_guest_phys_system,
5222         .fetch               = kvm_fetch_guest_virt,
5223         .read_emulated       = emulator_read_emulated,
5224         .write_emulated      = emulator_write_emulated,
5225         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5226         .invlpg              = emulator_invlpg,
5227         .pio_in_emulated     = emulator_pio_in_emulated,
5228         .pio_out_emulated    = emulator_pio_out_emulated,
5229         .get_segment         = emulator_get_segment,
5230         .set_segment         = emulator_set_segment,
5231         .get_cached_segment_base = emulator_get_cached_segment_base,
5232         .get_gdt             = emulator_get_gdt,
5233         .get_idt             = emulator_get_idt,
5234         .set_gdt             = emulator_set_gdt,
5235         .set_idt             = emulator_set_idt,
5236         .get_cr              = emulator_get_cr,
5237         .set_cr              = emulator_set_cr,
5238         .cpl                 = emulator_get_cpl,
5239         .get_dr              = emulator_get_dr,
5240         .set_dr              = emulator_set_dr,
5241         .get_smbase          = emulator_get_smbase,
5242         .set_smbase          = emulator_set_smbase,
5243         .set_msr             = emulator_set_msr,
5244         .get_msr             = emulator_get_msr,
5245         .check_pmc           = emulator_check_pmc,
5246         .read_pmc            = emulator_read_pmc,
5247         .halt                = emulator_halt,
5248         .wbinvd              = emulator_wbinvd,
5249         .fix_hypercall       = emulator_fix_hypercall,
5250         .get_fpu             = emulator_get_fpu,
5251         .put_fpu             = emulator_put_fpu,
5252         .intercept           = emulator_intercept,
5253         .get_cpuid           = emulator_get_cpuid,
5254         .set_nmi_mask        = emulator_set_nmi_mask,
5255         .get_hflags          = emulator_get_hflags,
5256         .set_hflags          = emulator_set_hflags,
5257 };
5258
5259 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5260 {
5261         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5262         /*
5263          * an sti; sti; sequence only disable interrupts for the first
5264          * instruction. So, if the last instruction, be it emulated or
5265          * not, left the system with the INT_STI flag enabled, it
5266          * means that the last instruction is an sti. We should not
5267          * leave the flag on in this case. The same goes for mov ss
5268          */
5269         if (int_shadow & mask)
5270                 mask = 0;
5271         if (unlikely(int_shadow || mask)) {
5272                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5273                 if (!mask)
5274                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5275         }
5276 }
5277
5278 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5279 {
5280         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5281         if (ctxt->exception.vector == PF_VECTOR)
5282                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5283
5284         if (ctxt->exception.error_code_valid)
5285                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5286                                       ctxt->exception.error_code);
5287         else
5288                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5289         return false;
5290 }
5291
5292 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5293 {
5294         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5295         int cs_db, cs_l;
5296
5297         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5298
5299         ctxt->eflags = kvm_get_rflags(vcpu);
5300         ctxt->eip = kvm_rip_read(vcpu);
5301         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5302                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5303                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5304                      cs_db                              ? X86EMUL_MODE_PROT32 :
5305                                                           X86EMUL_MODE_PROT16;
5306         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5307         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5308         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5309
5310         init_decode_cache(ctxt);
5311         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5312 }
5313
5314 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5315 {
5316         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5317         int ret;
5318
5319         init_emulate_ctxt(vcpu);
5320
5321         ctxt->op_bytes = 2;
5322         ctxt->ad_bytes = 2;
5323         ctxt->_eip = ctxt->eip + inc_eip;
5324         ret = emulate_int_real(ctxt, irq);
5325
5326         if (ret != X86EMUL_CONTINUE)
5327                 return EMULATE_FAIL;
5328
5329         ctxt->eip = ctxt->_eip;
5330         kvm_rip_write(vcpu, ctxt->eip);
5331         kvm_set_rflags(vcpu, ctxt->eflags);
5332
5333         if (irq == NMI_VECTOR)
5334                 vcpu->arch.nmi_pending = 0;
5335         else
5336                 vcpu->arch.interrupt.pending = false;
5337
5338         return EMULATE_DONE;
5339 }
5340 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5341
5342 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5343 {
5344         int r = EMULATE_DONE;
5345
5346         ++vcpu->stat.insn_emulation_fail;
5347         trace_kvm_emulate_insn_failed(vcpu);
5348         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5349                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5350                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5351                 vcpu->run->internal.ndata = 0;
5352                 r = EMULATE_FAIL;
5353         }
5354         kvm_queue_exception(vcpu, UD_VECTOR);
5355
5356         return r;
5357 }
5358
5359 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5360                                   bool write_fault_to_shadow_pgtable,
5361                                   int emulation_type)
5362 {
5363         gpa_t gpa = cr2;
5364         kvm_pfn_t pfn;
5365
5366         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5367                 return false;
5368
5369         if (!vcpu->arch.mmu.direct_map) {
5370                 /*
5371                  * Write permission should be allowed since only
5372                  * write access need to be emulated.
5373                  */
5374                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5375
5376                 /*
5377                  * If the mapping is invalid in guest, let cpu retry
5378                  * it to generate fault.
5379                  */
5380                 if (gpa == UNMAPPED_GVA)
5381                         return true;
5382         }
5383
5384         /*
5385          * Do not retry the unhandleable instruction if it faults on the
5386          * readonly host memory, otherwise it will goto a infinite loop:
5387          * retry instruction -> write #PF -> emulation fail -> retry
5388          * instruction -> ...
5389          */
5390         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5391
5392         /*
5393          * If the instruction failed on the error pfn, it can not be fixed,
5394          * report the error to userspace.
5395          */
5396         if (is_error_noslot_pfn(pfn))
5397                 return false;
5398
5399         kvm_release_pfn_clean(pfn);
5400
5401         /* The instructions are well-emulated on direct mmu. */
5402         if (vcpu->arch.mmu.direct_map) {
5403                 unsigned int indirect_shadow_pages;
5404
5405                 spin_lock(&vcpu->kvm->mmu_lock);
5406                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5407                 spin_unlock(&vcpu->kvm->mmu_lock);
5408
5409                 if (indirect_shadow_pages)
5410                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5411
5412                 return true;
5413         }
5414
5415         /*
5416          * if emulation was due to access to shadowed page table
5417          * and it failed try to unshadow page and re-enter the
5418          * guest to let CPU execute the instruction.
5419          */
5420         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5421
5422         /*
5423          * If the access faults on its page table, it can not
5424          * be fixed by unprotecting shadow page and it should
5425          * be reported to userspace.
5426          */
5427         return !write_fault_to_shadow_pgtable;
5428 }
5429
5430 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5431                               unsigned long cr2,  int emulation_type)
5432 {
5433         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5434         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5435
5436         last_retry_eip = vcpu->arch.last_retry_eip;
5437         last_retry_addr = vcpu->arch.last_retry_addr;
5438
5439         /*
5440          * If the emulation is caused by #PF and it is non-page_table
5441          * writing instruction, it means the VM-EXIT is caused by shadow
5442          * page protected, we can zap the shadow page and retry this
5443          * instruction directly.
5444          *
5445          * Note: if the guest uses a non-page-table modifying instruction
5446          * on the PDE that points to the instruction, then we will unmap
5447          * the instruction and go to an infinite loop. So, we cache the
5448          * last retried eip and the last fault address, if we meet the eip
5449          * and the address again, we can break out of the potential infinite
5450          * loop.
5451          */
5452         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5453
5454         if (!(emulation_type & EMULTYPE_RETRY))
5455                 return false;
5456
5457         if (x86_page_table_writing_insn(ctxt))
5458                 return false;
5459
5460         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5461                 return false;
5462
5463         vcpu->arch.last_retry_eip = ctxt->eip;
5464         vcpu->arch.last_retry_addr = cr2;
5465
5466         if (!vcpu->arch.mmu.direct_map)
5467                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5468
5469         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5470
5471         return true;
5472 }
5473
5474 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5475 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5476
5477 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5478 {
5479         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5480                 /* This is a good place to trace that we are exiting SMM.  */
5481                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5482
5483                 /* Process a latched INIT or SMI, if any.  */
5484                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5485         }
5486
5487         kvm_mmu_reset_context(vcpu);
5488 }
5489
5490 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5491 {
5492         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5493
5494         vcpu->arch.hflags = emul_flags;
5495
5496         if (changed & HF_SMM_MASK)
5497                 kvm_smm_changed(vcpu);
5498 }
5499
5500 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5501                                 unsigned long *db)
5502 {
5503         u32 dr6 = 0;
5504         int i;
5505         u32 enable, rwlen;
5506
5507         enable = dr7;
5508         rwlen = dr7 >> 16;
5509         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5510                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5511                         dr6 |= (1 << i);
5512         return dr6;
5513 }
5514
5515 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5516 {
5517         struct kvm_run *kvm_run = vcpu->run;
5518
5519         /*
5520          * rflags is the old, "raw" value of the flags.  The new value has
5521          * not been saved yet.
5522          *
5523          * This is correct even for TF set by the guest, because "the
5524          * processor will not generate this exception after the instruction
5525          * that sets the TF flag".
5526          */
5527         if (unlikely(rflags & X86_EFLAGS_TF)) {
5528                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5529                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5530                                                   DR6_RTM;
5531                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5532                         kvm_run->debug.arch.exception = DB_VECTOR;
5533                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5534                         *r = EMULATE_USER_EXIT;
5535                 } else {
5536                         /*
5537                          * "Certain debug exceptions may clear bit 0-3.  The
5538                          * remaining contents of the DR6 register are never
5539                          * cleared by the processor".
5540                          */
5541                         vcpu->arch.dr6 &= ~15;
5542                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5543                         kvm_queue_exception(vcpu, DB_VECTOR);
5544                 }
5545         }
5546 }
5547
5548 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5549 {
5550         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5551         int r = EMULATE_DONE;
5552
5553         kvm_x86_ops->skip_emulated_instruction(vcpu);
5554         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5555         return r == EMULATE_DONE;
5556 }
5557 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5558
5559 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5560 {
5561         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5562             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5563                 struct kvm_run *kvm_run = vcpu->run;
5564                 unsigned long eip = kvm_get_linear_rip(vcpu);
5565                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5566                                            vcpu->arch.guest_debug_dr7,
5567                                            vcpu->arch.eff_db);
5568
5569                 if (dr6 != 0) {
5570                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5571                         kvm_run->debug.arch.pc = eip;
5572                         kvm_run->debug.arch.exception = DB_VECTOR;
5573                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5574                         *r = EMULATE_USER_EXIT;
5575                         return true;
5576                 }
5577         }
5578
5579         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5580             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5581                 unsigned long eip = kvm_get_linear_rip(vcpu);
5582                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5583                                            vcpu->arch.dr7,
5584                                            vcpu->arch.db);
5585
5586                 if (dr6 != 0) {
5587                         vcpu->arch.dr6 &= ~15;
5588                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5589                         kvm_queue_exception(vcpu, DB_VECTOR);
5590                         *r = EMULATE_DONE;
5591                         return true;
5592                 }
5593         }
5594
5595         return false;
5596 }
5597
5598 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5599                             unsigned long cr2,
5600                             int emulation_type,
5601                             void *insn,
5602                             int insn_len)
5603 {
5604         int r;
5605         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5606         bool writeback = true;
5607         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5608
5609         /*
5610          * Clear write_fault_to_shadow_pgtable here to ensure it is
5611          * never reused.
5612          */
5613         vcpu->arch.write_fault_to_shadow_pgtable = false;
5614         kvm_clear_exception_queue(vcpu);
5615
5616         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5617                 init_emulate_ctxt(vcpu);
5618
5619                 /*
5620                  * We will reenter on the same instruction since
5621                  * we do not set complete_userspace_io.  This does not
5622                  * handle watchpoints yet, those would be handled in
5623                  * the emulate_ops.
5624                  */
5625                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5626                         return r;
5627
5628                 ctxt->interruptibility = 0;
5629                 ctxt->have_exception = false;
5630                 ctxt->exception.vector = -1;
5631                 ctxt->perm_ok = false;
5632
5633                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5634
5635                 r = x86_decode_insn(ctxt, insn, insn_len);
5636
5637                 trace_kvm_emulate_insn_start(vcpu);
5638                 ++vcpu->stat.insn_emulation;
5639                 if (r != EMULATION_OK)  {
5640                         if (emulation_type & EMULTYPE_TRAP_UD)
5641                                 return EMULATE_FAIL;
5642                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5643                                                 emulation_type))
5644                                 return EMULATE_DONE;
5645                         if (emulation_type & EMULTYPE_SKIP)
5646                                 return EMULATE_FAIL;
5647                         return handle_emulation_failure(vcpu);
5648                 }
5649         }
5650
5651         if (emulation_type & EMULTYPE_SKIP) {
5652                 kvm_rip_write(vcpu, ctxt->_eip);
5653                 if (ctxt->eflags & X86_EFLAGS_RF)
5654                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5655                 return EMULATE_DONE;
5656         }
5657
5658         if (retry_instruction(ctxt, cr2, emulation_type))
5659                 return EMULATE_DONE;
5660
5661         /* this is needed for vmware backdoor interface to work since it
5662            changes registers values  during IO operation */
5663         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5664                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5665                 emulator_invalidate_register_cache(ctxt);
5666         }
5667
5668 restart:
5669         /* Save the faulting GPA (cr2) in the address field */
5670         ctxt->exception.address = cr2;
5671
5672         r = x86_emulate_insn(ctxt);
5673
5674         if (r == EMULATION_INTERCEPTED)
5675                 return EMULATE_DONE;
5676
5677         if (r == EMULATION_FAILED) {
5678                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5679                                         emulation_type))
5680                         return EMULATE_DONE;
5681
5682                 return handle_emulation_failure(vcpu);
5683         }
5684
5685         if (ctxt->have_exception) {
5686                 r = EMULATE_DONE;
5687                 if (inject_emulated_exception(vcpu))
5688                         return r;
5689         } else if (vcpu->arch.pio.count) {
5690                 if (!vcpu->arch.pio.in) {
5691                         /* FIXME: return into emulator if single-stepping.  */
5692                         vcpu->arch.pio.count = 0;
5693                 } else {
5694                         writeback = false;
5695                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5696                 }
5697                 r = EMULATE_USER_EXIT;
5698         } else if (vcpu->mmio_needed) {
5699                 if (!vcpu->mmio_is_write)
5700                         writeback = false;
5701                 r = EMULATE_USER_EXIT;
5702                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5703         } else if (r == EMULATION_RESTART)
5704                 goto restart;
5705         else
5706                 r = EMULATE_DONE;
5707
5708         if (writeback) {
5709                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5710                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5711                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5712                 kvm_rip_write(vcpu, ctxt->eip);
5713                 if (r == EMULATE_DONE)
5714                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5715                 if (!ctxt->have_exception ||
5716                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5717                         __kvm_set_rflags(vcpu, ctxt->eflags);
5718
5719                 /*
5720                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5721                  * do nothing, and it will be requested again as soon as
5722                  * the shadow expires.  But we still need to check here,
5723                  * because POPF has no interrupt shadow.
5724                  */
5725                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5726                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5727         } else
5728                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5729
5730         return r;
5731 }
5732 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5733
5734 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5735 {
5736         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5737         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5738                                             size, port, &val, 1);
5739         /* do not return to emulator after return from userspace */
5740         vcpu->arch.pio.count = 0;
5741         return ret;
5742 }
5743 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5744
5745 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5746 {
5747         unsigned long val;
5748
5749         /* We should only ever be called with arch.pio.count equal to 1 */
5750         BUG_ON(vcpu->arch.pio.count != 1);
5751
5752         /* For size less than 4 we merge, else we zero extend */
5753         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5754                                         : 0;
5755
5756         /*
5757          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5758          * the copy and tracing
5759          */
5760         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5761                                  vcpu->arch.pio.port, &val, 1);
5762         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5763
5764         return 1;
5765 }
5766
5767 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5768 {
5769         unsigned long val;
5770         int ret;
5771
5772         /* For size less than 4 we merge, else we zero extend */
5773         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5774
5775         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5776                                        &val, 1);
5777         if (ret) {
5778                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5779                 return ret;
5780         }
5781
5782         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5783
5784         return 0;
5785 }
5786 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5787
5788 static int kvmclock_cpu_down_prep(unsigned int cpu)
5789 {
5790         __this_cpu_write(cpu_tsc_khz, 0);
5791         return 0;
5792 }
5793
5794 static void tsc_khz_changed(void *data)
5795 {
5796         struct cpufreq_freqs *freq = data;
5797         unsigned long khz = 0;
5798
5799         if (data)
5800                 khz = freq->new;
5801         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5802                 khz = cpufreq_quick_get(raw_smp_processor_id());
5803         if (!khz)
5804                 khz = tsc_khz;
5805         __this_cpu_write(cpu_tsc_khz, khz);
5806 }
5807
5808 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5809                                      void *data)
5810 {
5811         struct cpufreq_freqs *freq = data;
5812         struct kvm *kvm;
5813         struct kvm_vcpu *vcpu;
5814         int i, send_ipi = 0;
5815
5816         /*
5817          * We allow guests to temporarily run on slowing clocks,
5818          * provided we notify them after, or to run on accelerating
5819          * clocks, provided we notify them before.  Thus time never
5820          * goes backwards.
5821          *
5822          * However, we have a problem.  We can't atomically update
5823          * the frequency of a given CPU from this function; it is
5824          * merely a notifier, which can be called from any CPU.
5825          * Changing the TSC frequency at arbitrary points in time
5826          * requires a recomputation of local variables related to
5827          * the TSC for each VCPU.  We must flag these local variables
5828          * to be updated and be sure the update takes place with the
5829          * new frequency before any guests proceed.
5830          *
5831          * Unfortunately, the combination of hotplug CPU and frequency
5832          * change creates an intractable locking scenario; the order
5833          * of when these callouts happen is undefined with respect to
5834          * CPU hotplug, and they can race with each other.  As such,
5835          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5836          * undefined; you can actually have a CPU frequency change take
5837          * place in between the computation of X and the setting of the
5838          * variable.  To protect against this problem, all updates of
5839          * the per_cpu tsc_khz variable are done in an interrupt
5840          * protected IPI, and all callers wishing to update the value
5841          * must wait for a synchronous IPI to complete (which is trivial
5842          * if the caller is on the CPU already).  This establishes the
5843          * necessary total order on variable updates.
5844          *
5845          * Note that because a guest time update may take place
5846          * anytime after the setting of the VCPU's request bit, the
5847          * correct TSC value must be set before the request.  However,
5848          * to ensure the update actually makes it to any guest which
5849          * starts running in hardware virtualization between the set
5850          * and the acquisition of the spinlock, we must also ping the
5851          * CPU after setting the request bit.
5852          *
5853          */
5854
5855         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5856                 return 0;
5857         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5858                 return 0;
5859
5860         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5861
5862         spin_lock(&kvm_lock);
5863         list_for_each_entry(kvm, &vm_list, vm_list) {
5864                 kvm_for_each_vcpu(i, vcpu, kvm) {
5865                         if (vcpu->cpu != freq->cpu)
5866                                 continue;
5867                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5868                         if (vcpu->cpu != smp_processor_id())
5869                                 send_ipi = 1;
5870                 }
5871         }
5872         spin_unlock(&kvm_lock);
5873
5874         if (freq->old < freq->new && send_ipi) {
5875                 /*
5876                  * We upscale the frequency.  Must make the guest
5877                  * doesn't see old kvmclock values while running with
5878                  * the new frequency, otherwise we risk the guest sees
5879                  * time go backwards.
5880                  *
5881                  * In case we update the frequency for another cpu
5882                  * (which might be in guest context) send an interrupt
5883                  * to kick the cpu out of guest context.  Next time
5884                  * guest context is entered kvmclock will be updated,
5885                  * so the guest will not see stale values.
5886                  */
5887                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5888         }
5889         return 0;
5890 }
5891
5892 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5893         .notifier_call  = kvmclock_cpufreq_notifier
5894 };
5895
5896 static int kvmclock_cpu_online(unsigned int cpu)
5897 {
5898         tsc_khz_changed(NULL);
5899         return 0;
5900 }
5901
5902 static void kvm_timer_init(void)
5903 {
5904         max_tsc_khz = tsc_khz;
5905
5906         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5907 #ifdef CONFIG_CPU_FREQ
5908                 struct cpufreq_policy policy;
5909                 int cpu;
5910
5911                 memset(&policy, 0, sizeof(policy));
5912                 cpu = get_cpu();
5913                 cpufreq_get_policy(&policy, cpu);
5914                 if (policy.cpuinfo.max_freq)
5915                         max_tsc_khz = policy.cpuinfo.max_freq;
5916                 put_cpu();
5917 #endif
5918                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5919                                           CPUFREQ_TRANSITION_NOTIFIER);
5920         }
5921         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5922
5923         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5924                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5925 }
5926
5927 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5928
5929 int kvm_is_in_guest(void)
5930 {
5931         return __this_cpu_read(current_vcpu) != NULL;
5932 }
5933
5934 static int kvm_is_user_mode(void)
5935 {
5936         int user_mode = 3;
5937
5938         if (__this_cpu_read(current_vcpu))
5939                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5940
5941         return user_mode != 0;
5942 }
5943
5944 static unsigned long kvm_get_guest_ip(void)
5945 {
5946         unsigned long ip = 0;
5947
5948         if (__this_cpu_read(current_vcpu))
5949                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5950
5951         return ip;
5952 }
5953
5954 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5955         .is_in_guest            = kvm_is_in_guest,
5956         .is_user_mode           = kvm_is_user_mode,
5957         .get_guest_ip           = kvm_get_guest_ip,
5958 };
5959
5960 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5961 {
5962         __this_cpu_write(current_vcpu, vcpu);
5963 }
5964 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5965
5966 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5967 {
5968         __this_cpu_write(current_vcpu, NULL);
5969 }
5970 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5971
5972 static void kvm_set_mmio_spte_mask(void)
5973 {
5974         u64 mask;
5975         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5976
5977         /*
5978          * Set the reserved bits and the present bit of an paging-structure
5979          * entry to generate page fault with PFER.RSV = 1.
5980          */
5981          /* Mask the reserved physical address bits. */
5982         mask = rsvd_bits(maxphyaddr, 51);
5983
5984         /* Set the present bit. */
5985         mask |= 1ull;
5986
5987 #ifdef CONFIG_X86_64
5988         /*
5989          * If reserved bit is not supported, clear the present bit to disable
5990          * mmio page fault.
5991          */
5992         if (maxphyaddr == 52)
5993                 mask &= ~1ull;
5994 #endif
5995
5996         kvm_mmu_set_mmio_spte_mask(mask);
5997 }
5998
5999 #ifdef CONFIG_X86_64
6000 static void pvclock_gtod_update_fn(struct work_struct *work)
6001 {
6002         struct kvm *kvm;
6003
6004         struct kvm_vcpu *vcpu;
6005         int i;
6006
6007         spin_lock(&kvm_lock);
6008         list_for_each_entry(kvm, &vm_list, vm_list)
6009                 kvm_for_each_vcpu(i, vcpu, kvm)
6010                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6011         atomic_set(&kvm_guest_has_master_clock, 0);
6012         spin_unlock(&kvm_lock);
6013 }
6014
6015 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6016
6017 /*
6018  * Notification about pvclock gtod data update.
6019  */
6020 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6021                                void *priv)
6022 {
6023         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6024         struct timekeeper *tk = priv;
6025
6026         update_pvclock_gtod(tk);
6027
6028         /* disable master clock if host does not trust, or does not
6029          * use, TSC clocksource
6030          */
6031         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6032             atomic_read(&kvm_guest_has_master_clock) != 0)
6033                 queue_work(system_long_wq, &pvclock_gtod_work);
6034
6035         return 0;
6036 }
6037
6038 static struct notifier_block pvclock_gtod_notifier = {
6039         .notifier_call = pvclock_gtod_notify,
6040 };
6041 #endif
6042
6043 int kvm_arch_init(void *opaque)
6044 {
6045         int r;
6046         struct kvm_x86_ops *ops = opaque;
6047
6048         if (kvm_x86_ops) {
6049                 printk(KERN_ERR "kvm: already loaded the other module\n");
6050                 r = -EEXIST;
6051                 goto out;
6052         }
6053
6054         if (!ops->cpu_has_kvm_support()) {
6055                 printk(KERN_ERR "kvm: no hardware support\n");
6056                 r = -EOPNOTSUPP;
6057                 goto out;
6058         }
6059         if (ops->disabled_by_bios()) {
6060                 printk(KERN_ERR "kvm: disabled by bios\n");
6061                 r = -EOPNOTSUPP;
6062                 goto out;
6063         }
6064
6065         r = -ENOMEM;
6066         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6067         if (!shared_msrs) {
6068                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6069                 goto out;
6070         }
6071
6072         r = kvm_mmu_module_init();
6073         if (r)
6074                 goto out_free_percpu;
6075
6076         kvm_set_mmio_spte_mask();
6077
6078         kvm_x86_ops = ops;
6079
6080         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6081                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6082                         PT_PRESENT_MASK, 0);
6083         kvm_timer_init();
6084
6085         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6086
6087         if (boot_cpu_has(X86_FEATURE_XSAVE))
6088                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6089
6090         kvm_lapic_init();
6091 #ifdef CONFIG_X86_64
6092         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6093 #endif
6094
6095         return 0;
6096
6097 out_free_percpu:
6098         free_percpu(shared_msrs);
6099 out:
6100         return r;
6101 }
6102
6103 void kvm_arch_exit(void)
6104 {
6105         kvm_lapic_exit();
6106         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6107
6108         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6109                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6110                                             CPUFREQ_TRANSITION_NOTIFIER);
6111         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6112 #ifdef CONFIG_X86_64
6113         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6114 #endif
6115         kvm_x86_ops = NULL;
6116         kvm_mmu_module_exit();
6117         free_percpu(shared_msrs);
6118 }
6119
6120 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6121 {
6122         ++vcpu->stat.halt_exits;
6123         if (lapic_in_kernel(vcpu)) {
6124                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6125                 return 1;
6126         } else {
6127                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6128                 return 0;
6129         }
6130 }
6131 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6132
6133 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6134 {
6135         int ret = kvm_skip_emulated_instruction(vcpu);
6136         /*
6137          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6138          * KVM_EXIT_DEBUG here.
6139          */
6140         return kvm_vcpu_halt(vcpu) && ret;
6141 }
6142 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6143
6144 #ifdef CONFIG_X86_64
6145 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6146                                 unsigned long clock_type)
6147 {
6148         struct kvm_clock_pairing clock_pairing;
6149         struct timespec ts;
6150         u64 cycle;
6151         int ret;
6152
6153         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6154                 return -KVM_EOPNOTSUPP;
6155
6156         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6157                 return -KVM_EOPNOTSUPP;
6158
6159         clock_pairing.sec = ts.tv_sec;
6160         clock_pairing.nsec = ts.tv_nsec;
6161         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6162         clock_pairing.flags = 0;
6163
6164         ret = 0;
6165         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6166                             sizeof(struct kvm_clock_pairing)))
6167                 ret = -KVM_EFAULT;
6168
6169         return ret;
6170 }
6171 #endif
6172
6173 /*
6174  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6175  *
6176  * @apicid - apicid of vcpu to be kicked.
6177  */
6178 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6179 {
6180         struct kvm_lapic_irq lapic_irq;
6181
6182         lapic_irq.shorthand = 0;
6183         lapic_irq.dest_mode = 0;
6184         lapic_irq.dest_id = apicid;
6185         lapic_irq.msi_redir_hint = false;
6186
6187         lapic_irq.delivery_mode = APIC_DM_REMRD;
6188         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6189 }
6190
6191 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6192 {
6193         vcpu->arch.apicv_active = false;
6194         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6195 }
6196
6197 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6198 {
6199         unsigned long nr, a0, a1, a2, a3, ret;
6200         int op_64_bit, r;
6201
6202         r = kvm_skip_emulated_instruction(vcpu);
6203
6204         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6205                 return kvm_hv_hypercall(vcpu);
6206
6207         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6208         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6209         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6210         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6211         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6212
6213         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6214
6215         op_64_bit = is_64_bit_mode(vcpu);
6216         if (!op_64_bit) {
6217                 nr &= 0xFFFFFFFF;
6218                 a0 &= 0xFFFFFFFF;
6219                 a1 &= 0xFFFFFFFF;
6220                 a2 &= 0xFFFFFFFF;
6221                 a3 &= 0xFFFFFFFF;
6222         }
6223
6224         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6225                 ret = -KVM_EPERM;
6226                 goto out;
6227         }
6228
6229         switch (nr) {
6230         case KVM_HC_VAPIC_POLL_IRQ:
6231                 ret = 0;
6232                 break;
6233         case KVM_HC_KICK_CPU:
6234                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6235                 ret = 0;
6236                 break;
6237 #ifdef CONFIG_X86_64
6238         case KVM_HC_CLOCK_PAIRING:
6239                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6240                 break;
6241 #endif
6242         default:
6243                 ret = -KVM_ENOSYS;
6244                 break;
6245         }
6246 out:
6247         if (!op_64_bit)
6248                 ret = (u32)ret;
6249         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6250         ++vcpu->stat.hypercalls;
6251         return r;
6252 }
6253 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6254
6255 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6256 {
6257         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6258         char instruction[3];
6259         unsigned long rip = kvm_rip_read(vcpu);
6260
6261         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6262
6263         return emulator_write_emulated(ctxt, rip, instruction, 3,
6264                 &ctxt->exception);
6265 }
6266
6267 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6268 {
6269         return vcpu->run->request_interrupt_window &&
6270                 likely(!pic_in_kernel(vcpu->kvm));
6271 }
6272
6273 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6274 {
6275         struct kvm_run *kvm_run = vcpu->run;
6276
6277         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6278         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6279         kvm_run->cr8 = kvm_get_cr8(vcpu);
6280         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6281         kvm_run->ready_for_interrupt_injection =
6282                 pic_in_kernel(vcpu->kvm) ||
6283                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6284 }
6285
6286 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6287 {
6288         int max_irr, tpr;
6289
6290         if (!kvm_x86_ops->update_cr8_intercept)
6291                 return;
6292
6293         if (!lapic_in_kernel(vcpu))
6294                 return;
6295
6296         if (vcpu->arch.apicv_active)
6297                 return;
6298
6299         if (!vcpu->arch.apic->vapic_addr)
6300                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6301         else
6302                 max_irr = -1;
6303
6304         if (max_irr != -1)
6305                 max_irr >>= 4;
6306
6307         tpr = kvm_lapic_get_cr8(vcpu);
6308
6309         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6310 }
6311
6312 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6313 {
6314         int r;
6315
6316         /* try to reinject previous events if any */
6317         if (vcpu->arch.exception.pending) {
6318                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6319                                         vcpu->arch.exception.has_error_code,
6320                                         vcpu->arch.exception.error_code);
6321
6322                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6323                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6324                                              X86_EFLAGS_RF);
6325
6326                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6327                     (vcpu->arch.dr7 & DR7_GD)) {
6328                         vcpu->arch.dr7 &= ~DR7_GD;
6329                         kvm_update_dr7(vcpu);
6330                 }
6331
6332                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6333                                           vcpu->arch.exception.has_error_code,
6334                                           vcpu->arch.exception.error_code,
6335                                           vcpu->arch.exception.reinject);
6336                 return 0;
6337         }
6338
6339         if (vcpu->arch.nmi_injected) {
6340                 kvm_x86_ops->set_nmi(vcpu);
6341                 return 0;
6342         }
6343
6344         if (vcpu->arch.interrupt.pending) {
6345                 kvm_x86_ops->set_irq(vcpu);
6346                 return 0;
6347         }
6348
6349         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6350                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6351                 if (r != 0)
6352                         return r;
6353         }
6354
6355         /* try to inject new event if pending */
6356         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6357                 vcpu->arch.smi_pending = false;
6358                 enter_smm(vcpu);
6359         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6360                 --vcpu->arch.nmi_pending;
6361                 vcpu->arch.nmi_injected = true;
6362                 kvm_x86_ops->set_nmi(vcpu);
6363         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6364                 /*
6365                  * Because interrupts can be injected asynchronously, we are
6366                  * calling check_nested_events again here to avoid a race condition.
6367                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6368                  * proposal and current concerns.  Perhaps we should be setting
6369                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6370                  */
6371                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6372                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6373                         if (r != 0)
6374                                 return r;
6375                 }
6376                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6377                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6378                                             false);
6379                         kvm_x86_ops->set_irq(vcpu);
6380                 }
6381         }
6382
6383         return 0;
6384 }
6385
6386 static void process_nmi(struct kvm_vcpu *vcpu)
6387 {
6388         unsigned limit = 2;
6389
6390         /*
6391          * x86 is limited to one NMI running, and one NMI pending after it.
6392          * If an NMI is already in progress, limit further NMIs to just one.
6393          * Otherwise, allow two (and we'll inject the first one immediately).
6394          */
6395         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6396                 limit = 1;
6397
6398         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6399         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6400         kvm_make_request(KVM_REQ_EVENT, vcpu);
6401 }
6402
6403 #define put_smstate(type, buf, offset, val)                       \
6404         *(type *)((buf) + (offset) - 0x7e00) = val
6405
6406 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6407 {
6408         u32 flags = 0;
6409         flags |= seg->g       << 23;
6410         flags |= seg->db      << 22;
6411         flags |= seg->l       << 21;
6412         flags |= seg->avl     << 20;
6413         flags |= seg->present << 15;
6414         flags |= seg->dpl     << 13;
6415         flags |= seg->s       << 12;
6416         flags |= seg->type    << 8;
6417         return flags;
6418 }
6419
6420 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6421 {
6422         struct kvm_segment seg;
6423         int offset;
6424
6425         kvm_get_segment(vcpu, &seg, n);
6426         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6427
6428         if (n < 3)
6429                 offset = 0x7f84 + n * 12;
6430         else
6431                 offset = 0x7f2c + (n - 3) * 12;
6432
6433         put_smstate(u32, buf, offset + 8, seg.base);
6434         put_smstate(u32, buf, offset + 4, seg.limit);
6435         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6436 }
6437
6438 #ifdef CONFIG_X86_64
6439 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6440 {
6441         struct kvm_segment seg;
6442         int offset;
6443         u16 flags;
6444
6445         kvm_get_segment(vcpu, &seg, n);
6446         offset = 0x7e00 + n * 16;
6447
6448         flags = enter_smm_get_segment_flags(&seg) >> 8;
6449         put_smstate(u16, buf, offset, seg.selector);
6450         put_smstate(u16, buf, offset + 2, flags);
6451         put_smstate(u32, buf, offset + 4, seg.limit);
6452         put_smstate(u64, buf, offset + 8, seg.base);
6453 }
6454 #endif
6455
6456 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6457 {
6458         struct desc_ptr dt;
6459         struct kvm_segment seg;
6460         unsigned long val;
6461         int i;
6462
6463         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6464         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6465         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6466         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6467
6468         for (i = 0; i < 8; i++)
6469                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6470
6471         kvm_get_dr(vcpu, 6, &val);
6472         put_smstate(u32, buf, 0x7fcc, (u32)val);
6473         kvm_get_dr(vcpu, 7, &val);
6474         put_smstate(u32, buf, 0x7fc8, (u32)val);
6475
6476         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6477         put_smstate(u32, buf, 0x7fc4, seg.selector);
6478         put_smstate(u32, buf, 0x7f64, seg.base);
6479         put_smstate(u32, buf, 0x7f60, seg.limit);
6480         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6481
6482         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6483         put_smstate(u32, buf, 0x7fc0, seg.selector);
6484         put_smstate(u32, buf, 0x7f80, seg.base);
6485         put_smstate(u32, buf, 0x7f7c, seg.limit);
6486         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6487
6488         kvm_x86_ops->get_gdt(vcpu, &dt);
6489         put_smstate(u32, buf, 0x7f74, dt.address);
6490         put_smstate(u32, buf, 0x7f70, dt.size);
6491
6492         kvm_x86_ops->get_idt(vcpu, &dt);
6493         put_smstate(u32, buf, 0x7f58, dt.address);
6494         put_smstate(u32, buf, 0x7f54, dt.size);
6495
6496         for (i = 0; i < 6; i++)
6497                 enter_smm_save_seg_32(vcpu, buf, i);
6498
6499         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6500
6501         /* revision id */
6502         put_smstate(u32, buf, 0x7efc, 0x00020000);
6503         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6504 }
6505
6506 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6507 {
6508 #ifdef CONFIG_X86_64
6509         struct desc_ptr dt;
6510         struct kvm_segment seg;
6511         unsigned long val;
6512         int i;
6513
6514         for (i = 0; i < 16; i++)
6515                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6516
6517         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6518         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6519
6520         kvm_get_dr(vcpu, 6, &val);
6521         put_smstate(u64, buf, 0x7f68, val);
6522         kvm_get_dr(vcpu, 7, &val);
6523         put_smstate(u64, buf, 0x7f60, val);
6524
6525         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6526         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6527         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6528
6529         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6530
6531         /* revision id */
6532         put_smstate(u32, buf, 0x7efc, 0x00020064);
6533
6534         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6535
6536         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6537         put_smstate(u16, buf, 0x7e90, seg.selector);
6538         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6539         put_smstate(u32, buf, 0x7e94, seg.limit);
6540         put_smstate(u64, buf, 0x7e98, seg.base);
6541
6542         kvm_x86_ops->get_idt(vcpu, &dt);
6543         put_smstate(u32, buf, 0x7e84, dt.size);
6544         put_smstate(u64, buf, 0x7e88, dt.address);
6545
6546         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6547         put_smstate(u16, buf, 0x7e70, seg.selector);
6548         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6549         put_smstate(u32, buf, 0x7e74, seg.limit);
6550         put_smstate(u64, buf, 0x7e78, seg.base);
6551
6552         kvm_x86_ops->get_gdt(vcpu, &dt);
6553         put_smstate(u32, buf, 0x7e64, dt.size);
6554         put_smstate(u64, buf, 0x7e68, dt.address);
6555
6556         for (i = 0; i < 6; i++)
6557                 enter_smm_save_seg_64(vcpu, buf, i);
6558 #else
6559         WARN_ON_ONCE(1);
6560 #endif
6561 }
6562
6563 static void enter_smm(struct kvm_vcpu *vcpu)
6564 {
6565         struct kvm_segment cs, ds;
6566         struct desc_ptr dt;
6567         char buf[512];
6568         u32 cr0;
6569
6570         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6571         vcpu->arch.hflags |= HF_SMM_MASK;
6572         memset(buf, 0, 512);
6573         if (guest_cpuid_has_longmode(vcpu))
6574                 enter_smm_save_state_64(vcpu, buf);
6575         else
6576                 enter_smm_save_state_32(vcpu, buf);
6577
6578         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6579
6580         if (kvm_x86_ops->get_nmi_mask(vcpu))
6581                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6582         else
6583                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6584
6585         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6586         kvm_rip_write(vcpu, 0x8000);
6587
6588         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6589         kvm_x86_ops->set_cr0(vcpu, cr0);
6590         vcpu->arch.cr0 = cr0;
6591
6592         kvm_x86_ops->set_cr4(vcpu, 0);
6593
6594         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6595         dt.address = dt.size = 0;
6596         kvm_x86_ops->set_idt(vcpu, &dt);
6597
6598         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6599
6600         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6601         cs.base = vcpu->arch.smbase;
6602
6603         ds.selector = 0;
6604         ds.base = 0;
6605
6606         cs.limit    = ds.limit = 0xffffffff;
6607         cs.type     = ds.type = 0x3;
6608         cs.dpl      = ds.dpl = 0;
6609         cs.db       = ds.db = 0;
6610         cs.s        = ds.s = 1;
6611         cs.l        = ds.l = 0;
6612         cs.g        = ds.g = 1;
6613         cs.avl      = ds.avl = 0;
6614         cs.present  = ds.present = 1;
6615         cs.unusable = ds.unusable = 0;
6616         cs.padding  = ds.padding = 0;
6617
6618         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6619         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6620         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6621         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6622         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6623         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6624
6625         if (guest_cpuid_has_longmode(vcpu))
6626                 kvm_x86_ops->set_efer(vcpu, 0);
6627
6628         kvm_update_cpuid(vcpu);
6629         kvm_mmu_reset_context(vcpu);
6630 }
6631
6632 static void process_smi(struct kvm_vcpu *vcpu)
6633 {
6634         vcpu->arch.smi_pending = true;
6635         kvm_make_request(KVM_REQ_EVENT, vcpu);
6636 }
6637
6638 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6639 {
6640         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6641 }
6642
6643 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6644 {
6645         u64 eoi_exit_bitmap[4];
6646
6647         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6648                 return;
6649
6650         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6651
6652         if (irqchip_split(vcpu->kvm))
6653                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6654         else {
6655                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6656                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6657                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6658         }
6659         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6660                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6661         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6662 }
6663
6664 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6665 {
6666         ++vcpu->stat.tlb_flush;
6667         kvm_x86_ops->tlb_flush(vcpu);
6668 }
6669
6670 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6671 {
6672         struct page *page = NULL;
6673
6674         if (!lapic_in_kernel(vcpu))
6675                 return;
6676
6677         if (!kvm_x86_ops->set_apic_access_page_addr)
6678                 return;
6679
6680         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6681         if (is_error_page(page))
6682                 return;
6683         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6684
6685         /*
6686          * Do not pin apic access page in memory, the MMU notifier
6687          * will call us again if it is migrated or swapped out.
6688          */
6689         put_page(page);
6690 }
6691 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6692
6693 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6694                                            unsigned long address)
6695 {
6696         /*
6697          * The physical address of apic access page is stored in the VMCS.
6698          * Update it when it becomes invalid.
6699          */
6700         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6701                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6702 }
6703
6704 /*
6705  * Returns 1 to let vcpu_run() continue the guest execution loop without
6706  * exiting to the userspace.  Otherwise, the value will be returned to the
6707  * userspace.
6708  */
6709 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6710 {
6711         int r;
6712         bool req_int_win =
6713                 dm_request_for_irq_injection(vcpu) &&
6714                 kvm_cpu_accept_dm_intr(vcpu);
6715
6716         bool req_immediate_exit = false;
6717
6718         if (vcpu->requests) {
6719                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6720                         kvm_mmu_unload(vcpu);
6721                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6722                         __kvm_migrate_timers(vcpu);
6723                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6724                         kvm_gen_update_masterclock(vcpu->kvm);
6725                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6726                         kvm_gen_kvmclock_update(vcpu);
6727                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6728                         r = kvm_guest_time_update(vcpu);
6729                         if (unlikely(r))
6730                                 goto out;
6731                 }
6732                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6733                         kvm_mmu_sync_roots(vcpu);
6734                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6735                         kvm_vcpu_flush_tlb(vcpu);
6736                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6737                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6738                         r = 0;
6739                         goto out;
6740                 }
6741                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6742                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6743                         r = 0;
6744                         goto out;
6745                 }
6746                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6747                         /* Page is swapped out. Do synthetic halt */
6748                         vcpu->arch.apf.halted = true;
6749                         r = 1;
6750                         goto out;
6751                 }
6752                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6753                         record_steal_time(vcpu);
6754                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6755                         process_smi(vcpu);
6756                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6757                         process_nmi(vcpu);
6758                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6759                         kvm_pmu_handle_event(vcpu);
6760                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6761                         kvm_pmu_deliver_pmi(vcpu);
6762                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6763                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6764                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6765                                      vcpu->arch.ioapic_handled_vectors)) {
6766                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6767                                 vcpu->run->eoi.vector =
6768                                                 vcpu->arch.pending_ioapic_eoi;
6769                                 r = 0;
6770                                 goto out;
6771                         }
6772                 }
6773                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6774                         vcpu_scan_ioapic(vcpu);
6775                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6776                         kvm_vcpu_reload_apic_access_page(vcpu);
6777                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6778                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6779                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6780                         r = 0;
6781                         goto out;
6782                 }
6783                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6784                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6785                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6786                         r = 0;
6787                         goto out;
6788                 }
6789                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6790                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6791                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6792                         r = 0;
6793                         goto out;
6794                 }
6795
6796                 /*
6797                  * KVM_REQ_HV_STIMER has to be processed after
6798                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6799                  * depend on the guest clock being up-to-date
6800                  */
6801                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6802                         kvm_hv_process_stimers(vcpu);
6803         }
6804
6805         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6806                 ++vcpu->stat.req_event;
6807                 kvm_apic_accept_events(vcpu);
6808                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6809                         r = 1;
6810                         goto out;
6811                 }
6812
6813                 if (inject_pending_event(vcpu, req_int_win) != 0)
6814                         req_immediate_exit = true;
6815                 else {
6816                         /* Enable NMI/IRQ window open exits if needed.
6817                          *
6818                          * SMIs have two cases: 1) they can be nested, and
6819                          * then there is nothing to do here because RSM will
6820                          * cause a vmexit anyway; 2) or the SMI can be pending
6821                          * because inject_pending_event has completed the
6822                          * injection of an IRQ or NMI from the previous vmexit,
6823                          * and then we request an immediate exit to inject the SMI.
6824                          */
6825                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6826                                 req_immediate_exit = true;
6827                         if (vcpu->arch.nmi_pending)
6828                                 kvm_x86_ops->enable_nmi_window(vcpu);
6829                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6830                                 kvm_x86_ops->enable_irq_window(vcpu);
6831                 }
6832
6833                 if (kvm_lapic_enabled(vcpu)) {
6834                         update_cr8_intercept(vcpu);
6835                         kvm_lapic_sync_to_vapic(vcpu);
6836                 }
6837         }
6838
6839         r = kvm_mmu_reload(vcpu);
6840         if (unlikely(r)) {
6841                 goto cancel_injection;
6842         }
6843
6844         preempt_disable();
6845
6846         kvm_x86_ops->prepare_guest_switch(vcpu);
6847         kvm_load_guest_fpu(vcpu);
6848
6849         /*
6850          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6851          * IPI are then delayed after guest entry, which ensures that they
6852          * result in virtual interrupt delivery.
6853          */
6854         local_irq_disable();
6855         vcpu->mode = IN_GUEST_MODE;
6856
6857         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6858
6859         /*
6860          * 1) We should set ->mode before checking ->requests.  Please see
6861          * the comment in kvm_vcpu_exiting_guest_mode().
6862          *
6863          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6864          * pairs with the memory barrier implicit in pi_test_and_set_on
6865          * (see vmx_deliver_posted_interrupt).
6866          *
6867          * 3) This also orders the write to mode from any reads to the page
6868          * tables done while the VCPU is running.  Please see the comment
6869          * in kvm_flush_remote_tlbs.
6870          */
6871         smp_mb__after_srcu_read_unlock();
6872
6873         /*
6874          * This handles the case where a posted interrupt was
6875          * notified with kvm_vcpu_kick.
6876          */
6877         if (kvm_lapic_enabled(vcpu)) {
6878                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6879                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6880         }
6881
6882         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6883             || need_resched() || signal_pending(current)) {
6884                 vcpu->mode = OUTSIDE_GUEST_MODE;
6885                 smp_wmb();
6886                 local_irq_enable();
6887                 preempt_enable();
6888                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6889                 r = 1;
6890                 goto cancel_injection;
6891         }
6892
6893         kvm_load_guest_xcr0(vcpu);
6894
6895         if (req_immediate_exit) {
6896                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6897                 smp_send_reschedule(vcpu->cpu);
6898         }
6899
6900         trace_kvm_entry(vcpu->vcpu_id);
6901         wait_lapic_expire(vcpu);
6902         guest_enter_irqoff();
6903
6904         if (unlikely(vcpu->arch.switch_db_regs)) {
6905                 set_debugreg(0, 7);
6906                 set_debugreg(vcpu->arch.eff_db[0], 0);
6907                 set_debugreg(vcpu->arch.eff_db[1], 1);
6908                 set_debugreg(vcpu->arch.eff_db[2], 2);
6909                 set_debugreg(vcpu->arch.eff_db[3], 3);
6910                 set_debugreg(vcpu->arch.dr6, 6);
6911                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6912         }
6913
6914         kvm_x86_ops->run(vcpu);
6915
6916         /*
6917          * Do this here before restoring debug registers on the host.  And
6918          * since we do this before handling the vmexit, a DR access vmexit
6919          * can (a) read the correct value of the debug registers, (b) set
6920          * KVM_DEBUGREG_WONT_EXIT again.
6921          */
6922         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6923                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6924                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6925                 kvm_update_dr0123(vcpu);
6926                 kvm_update_dr6(vcpu);
6927                 kvm_update_dr7(vcpu);
6928                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6929         }
6930
6931         /*
6932          * If the guest has used debug registers, at least dr7
6933          * will be disabled while returning to the host.
6934          * If we don't have active breakpoints in the host, we don't
6935          * care about the messed up debug address registers. But if
6936          * we have some of them active, restore the old state.
6937          */
6938         if (hw_breakpoint_active())
6939                 hw_breakpoint_restore();
6940
6941         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6942
6943         vcpu->mode = OUTSIDE_GUEST_MODE;
6944         smp_wmb();
6945
6946         kvm_put_guest_xcr0(vcpu);
6947
6948         kvm_x86_ops->handle_external_intr(vcpu);
6949
6950         ++vcpu->stat.exits;
6951
6952         guest_exit_irqoff();
6953
6954         local_irq_enable();
6955         preempt_enable();
6956
6957         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6958
6959         /*
6960          * Profile KVM exit RIPs:
6961          */
6962         if (unlikely(prof_on == KVM_PROFILING)) {
6963                 unsigned long rip = kvm_rip_read(vcpu);
6964                 profile_hit(KVM_PROFILING, (void *)rip);
6965         }
6966
6967         if (unlikely(vcpu->arch.tsc_always_catchup))
6968                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6969
6970         if (vcpu->arch.apic_attention)
6971                 kvm_lapic_sync_from_vapic(vcpu);
6972
6973         r = kvm_x86_ops->handle_exit(vcpu);
6974         return r;
6975
6976 cancel_injection:
6977         kvm_x86_ops->cancel_injection(vcpu);
6978         if (unlikely(vcpu->arch.apic_attention))
6979                 kvm_lapic_sync_from_vapic(vcpu);
6980 out:
6981         return r;
6982 }
6983
6984 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6985 {
6986         if (!kvm_arch_vcpu_runnable(vcpu) &&
6987             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6988                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6989                 kvm_vcpu_block(vcpu);
6990                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6991
6992                 if (kvm_x86_ops->post_block)
6993                         kvm_x86_ops->post_block(vcpu);
6994
6995                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6996                         return 1;
6997         }
6998
6999         kvm_apic_accept_events(vcpu);
7000         switch(vcpu->arch.mp_state) {
7001         case KVM_MP_STATE_HALTED:
7002                 vcpu->arch.pv.pv_unhalted = false;
7003                 vcpu->arch.mp_state =
7004                         KVM_MP_STATE_RUNNABLE;
7005         case KVM_MP_STATE_RUNNABLE:
7006                 vcpu->arch.apf.halted = false;
7007                 break;
7008         case KVM_MP_STATE_INIT_RECEIVED:
7009                 break;
7010         default:
7011                 return -EINTR;
7012                 break;
7013         }
7014         return 1;
7015 }
7016
7017 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7018 {
7019         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7020                 kvm_x86_ops->check_nested_events(vcpu, false);
7021
7022         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7023                 !vcpu->arch.apf.halted);
7024 }
7025
7026 static int vcpu_run(struct kvm_vcpu *vcpu)
7027 {
7028         int r;
7029         struct kvm *kvm = vcpu->kvm;
7030
7031         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7032
7033         for (;;) {
7034                 if (kvm_vcpu_running(vcpu)) {
7035                         r = vcpu_enter_guest(vcpu);
7036                 } else {
7037                         r = vcpu_block(kvm, vcpu);
7038                 }
7039
7040                 if (r <= 0)
7041                         break;
7042
7043                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7044                 if (kvm_cpu_has_pending_timer(vcpu))
7045                         kvm_inject_pending_timer_irqs(vcpu);
7046
7047                 if (dm_request_for_irq_injection(vcpu) &&
7048                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7049                         r = 0;
7050                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7051                         ++vcpu->stat.request_irq_exits;
7052                         break;
7053                 }
7054
7055                 kvm_check_async_pf_completion(vcpu);
7056
7057                 if (signal_pending(current)) {
7058                         r = -EINTR;
7059                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7060                         ++vcpu->stat.signal_exits;
7061                         break;
7062                 }
7063                 if (need_resched()) {
7064                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7065                         cond_resched();
7066                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7067                 }
7068         }
7069
7070         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7071
7072         return r;
7073 }
7074
7075 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7076 {
7077         int r;
7078         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7079         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7080         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7081         if (r != EMULATE_DONE)
7082                 return 0;
7083         return 1;
7084 }
7085
7086 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7087 {
7088         BUG_ON(!vcpu->arch.pio.count);
7089
7090         return complete_emulated_io(vcpu);
7091 }
7092
7093 /*
7094  * Implements the following, as a state machine:
7095  *
7096  * read:
7097  *   for each fragment
7098  *     for each mmio piece in the fragment
7099  *       write gpa, len
7100  *       exit
7101  *       copy data
7102  *   execute insn
7103  *
7104  * write:
7105  *   for each fragment
7106  *     for each mmio piece in the fragment
7107  *       write gpa, len
7108  *       copy data
7109  *       exit
7110  */
7111 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7112 {
7113         struct kvm_run *run = vcpu->run;
7114         struct kvm_mmio_fragment *frag;
7115         unsigned len;
7116
7117         BUG_ON(!vcpu->mmio_needed);
7118
7119         /* Complete previous fragment */
7120         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7121         len = min(8u, frag->len);
7122         if (!vcpu->mmio_is_write)
7123                 memcpy(frag->data, run->mmio.data, len);
7124
7125         if (frag->len <= 8) {
7126                 /* Switch to the next fragment. */
7127                 frag++;
7128                 vcpu->mmio_cur_fragment++;
7129         } else {
7130                 /* Go forward to the next mmio piece. */
7131                 frag->data += len;
7132                 frag->gpa += len;
7133                 frag->len -= len;
7134         }
7135
7136         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7137                 vcpu->mmio_needed = 0;
7138
7139                 /* FIXME: return into emulator if single-stepping.  */
7140                 if (vcpu->mmio_is_write)
7141                         return 1;
7142                 vcpu->mmio_read_completed = 1;
7143                 return complete_emulated_io(vcpu);
7144         }
7145
7146         run->exit_reason = KVM_EXIT_MMIO;
7147         run->mmio.phys_addr = frag->gpa;
7148         if (vcpu->mmio_is_write)
7149                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7150         run->mmio.len = min(8u, frag->len);
7151         run->mmio.is_write = vcpu->mmio_is_write;
7152         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7153         return 0;
7154 }
7155
7156
7157 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7158 {
7159         struct fpu *fpu = &current->thread.fpu;
7160         int r;
7161         sigset_t sigsaved;
7162
7163         fpu__activate_curr(fpu);
7164
7165         if (vcpu->sigset_active)
7166                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7167
7168         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7169                 kvm_vcpu_block(vcpu);
7170                 kvm_apic_accept_events(vcpu);
7171                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7172                 r = -EAGAIN;
7173                 goto out;
7174         }
7175
7176         /* re-sync apic's tpr */
7177         if (!lapic_in_kernel(vcpu)) {
7178                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7179                         r = -EINVAL;
7180                         goto out;
7181                 }
7182         }
7183
7184         if (unlikely(vcpu->arch.complete_userspace_io)) {
7185                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7186                 vcpu->arch.complete_userspace_io = NULL;
7187                 r = cui(vcpu);
7188                 if (r <= 0)
7189                         goto out;
7190         } else
7191                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7192
7193         if (kvm_run->immediate_exit)
7194                 r = -EINTR;
7195         else
7196                 r = vcpu_run(vcpu);
7197
7198 out:
7199         post_kvm_run_save(vcpu);
7200         if (vcpu->sigset_active)
7201                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7202
7203         return r;
7204 }
7205
7206 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7207 {
7208         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7209                 /*
7210                  * We are here if userspace calls get_regs() in the middle of
7211                  * instruction emulation. Registers state needs to be copied
7212                  * back from emulation context to vcpu. Userspace shouldn't do
7213                  * that usually, but some bad designed PV devices (vmware
7214                  * backdoor interface) need this to work
7215                  */
7216                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7217                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7218         }
7219         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7220         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7221         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7222         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7223         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7224         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7225         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7226         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7227 #ifdef CONFIG_X86_64
7228         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7229         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7230         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7231         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7232         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7233         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7234         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7235         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7236 #endif
7237
7238         regs->rip = kvm_rip_read(vcpu);
7239         regs->rflags = kvm_get_rflags(vcpu);
7240
7241         return 0;
7242 }
7243
7244 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7245 {
7246         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7247         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7248
7249         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7250         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7251         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7252         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7253         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7254         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7255         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7256         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7257 #ifdef CONFIG_X86_64
7258         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7259         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7260         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7261         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7262         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7263         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7264         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7265         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7266 #endif
7267
7268         kvm_rip_write(vcpu, regs->rip);
7269         kvm_set_rflags(vcpu, regs->rflags);
7270
7271         vcpu->arch.exception.pending = false;
7272
7273         kvm_make_request(KVM_REQ_EVENT, vcpu);
7274
7275         return 0;
7276 }
7277
7278 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7279 {
7280         struct kvm_segment cs;
7281
7282         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7283         *db = cs.db;
7284         *l = cs.l;
7285 }
7286 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7287
7288 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7289                                   struct kvm_sregs *sregs)
7290 {
7291         struct desc_ptr dt;
7292
7293         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7294         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7295         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7296         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7297         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7298         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7299
7300         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7301         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7302
7303         kvm_x86_ops->get_idt(vcpu, &dt);
7304         sregs->idt.limit = dt.size;
7305         sregs->idt.base = dt.address;
7306         kvm_x86_ops->get_gdt(vcpu, &dt);
7307         sregs->gdt.limit = dt.size;
7308         sregs->gdt.base = dt.address;
7309
7310         sregs->cr0 = kvm_read_cr0(vcpu);
7311         sregs->cr2 = vcpu->arch.cr2;
7312         sregs->cr3 = kvm_read_cr3(vcpu);
7313         sregs->cr4 = kvm_read_cr4(vcpu);
7314         sregs->cr8 = kvm_get_cr8(vcpu);
7315         sregs->efer = vcpu->arch.efer;
7316         sregs->apic_base = kvm_get_apic_base(vcpu);
7317
7318         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7319
7320         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7321                 set_bit(vcpu->arch.interrupt.nr,
7322                         (unsigned long *)sregs->interrupt_bitmap);
7323
7324         return 0;
7325 }
7326
7327 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7328                                     struct kvm_mp_state *mp_state)
7329 {
7330         kvm_apic_accept_events(vcpu);
7331         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7332                                         vcpu->arch.pv.pv_unhalted)
7333                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7334         else
7335                 mp_state->mp_state = vcpu->arch.mp_state;
7336
7337         return 0;
7338 }
7339
7340 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7341                                     struct kvm_mp_state *mp_state)
7342 {
7343         if (!lapic_in_kernel(vcpu) &&
7344             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7345                 return -EINVAL;
7346
7347         /* INITs are latched while in SMM */
7348         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7349             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7350              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7351                 return -EINVAL;
7352
7353         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7354                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7355                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7356         } else
7357                 vcpu->arch.mp_state = mp_state->mp_state;
7358         kvm_make_request(KVM_REQ_EVENT, vcpu);
7359         return 0;
7360 }
7361
7362 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7363                     int reason, bool has_error_code, u32 error_code)
7364 {
7365         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7366         int ret;
7367
7368         init_emulate_ctxt(vcpu);
7369
7370         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7371                                    has_error_code, error_code);
7372
7373         if (ret)
7374                 return EMULATE_FAIL;
7375
7376         kvm_rip_write(vcpu, ctxt->eip);
7377         kvm_set_rflags(vcpu, ctxt->eflags);
7378         kvm_make_request(KVM_REQ_EVENT, vcpu);
7379         return EMULATE_DONE;
7380 }
7381 EXPORT_SYMBOL_GPL(kvm_task_switch);
7382
7383 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7384                                   struct kvm_sregs *sregs)
7385 {
7386         struct msr_data apic_base_msr;
7387         int mmu_reset_needed = 0;
7388         int pending_vec, max_bits, idx;
7389         struct desc_ptr dt;
7390
7391         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7392                 return -EINVAL;
7393
7394         dt.size = sregs->idt.limit;
7395         dt.address = sregs->idt.base;
7396         kvm_x86_ops->set_idt(vcpu, &dt);
7397         dt.size = sregs->gdt.limit;
7398         dt.address = sregs->gdt.base;
7399         kvm_x86_ops->set_gdt(vcpu, &dt);
7400
7401         vcpu->arch.cr2 = sregs->cr2;
7402         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7403         vcpu->arch.cr3 = sregs->cr3;
7404         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7405
7406         kvm_set_cr8(vcpu, sregs->cr8);
7407
7408         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7409         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7410         apic_base_msr.data = sregs->apic_base;
7411         apic_base_msr.host_initiated = true;
7412         kvm_set_apic_base(vcpu, &apic_base_msr);
7413
7414         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7415         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7416         vcpu->arch.cr0 = sregs->cr0;
7417
7418         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7419         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7420         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7421                 kvm_update_cpuid(vcpu);
7422
7423         idx = srcu_read_lock(&vcpu->kvm->srcu);
7424         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7425                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7426                 mmu_reset_needed = 1;
7427         }
7428         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7429
7430         if (mmu_reset_needed)
7431                 kvm_mmu_reset_context(vcpu);
7432
7433         max_bits = KVM_NR_INTERRUPTS;
7434         pending_vec = find_first_bit(
7435                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7436         if (pending_vec < max_bits) {
7437                 kvm_queue_interrupt(vcpu, pending_vec, false);
7438                 pr_debug("Set back pending irq %d\n", pending_vec);
7439         }
7440
7441         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7442         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7443         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7444         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7445         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7446         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7447
7448         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7449         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7450
7451         update_cr8_intercept(vcpu);
7452
7453         /* Older userspace won't unhalt the vcpu on reset. */
7454         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7455             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7456             !is_protmode(vcpu))
7457                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7458
7459         kvm_make_request(KVM_REQ_EVENT, vcpu);
7460
7461         return 0;
7462 }
7463
7464 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7465                                         struct kvm_guest_debug *dbg)
7466 {
7467         unsigned long rflags;
7468         int i, r;
7469
7470         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7471                 r = -EBUSY;
7472                 if (vcpu->arch.exception.pending)
7473                         goto out;
7474                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7475                         kvm_queue_exception(vcpu, DB_VECTOR);
7476                 else
7477                         kvm_queue_exception(vcpu, BP_VECTOR);
7478         }
7479
7480         /*
7481          * Read rflags as long as potentially injected trace flags are still
7482          * filtered out.
7483          */
7484         rflags = kvm_get_rflags(vcpu);
7485
7486         vcpu->guest_debug = dbg->control;
7487         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7488                 vcpu->guest_debug = 0;
7489
7490         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7491                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7492                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7493                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7494         } else {
7495                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7496                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7497         }
7498         kvm_update_dr7(vcpu);
7499
7500         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7501                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7502                         get_segment_base(vcpu, VCPU_SREG_CS);
7503
7504         /*
7505          * Trigger an rflags update that will inject or remove the trace
7506          * flags.
7507          */
7508         kvm_set_rflags(vcpu, rflags);
7509
7510         kvm_x86_ops->update_bp_intercept(vcpu);
7511
7512         r = 0;
7513
7514 out:
7515
7516         return r;
7517 }
7518
7519 /*
7520  * Translate a guest virtual address to a guest physical address.
7521  */
7522 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7523                                     struct kvm_translation *tr)
7524 {
7525         unsigned long vaddr = tr->linear_address;
7526         gpa_t gpa;
7527         int idx;
7528
7529         idx = srcu_read_lock(&vcpu->kvm->srcu);
7530         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7531         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7532         tr->physical_address = gpa;
7533         tr->valid = gpa != UNMAPPED_GVA;
7534         tr->writeable = 1;
7535         tr->usermode = 0;
7536
7537         return 0;
7538 }
7539
7540 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7541 {
7542         struct fxregs_state *fxsave =
7543                         &vcpu->arch.guest_fpu.state.fxsave;
7544
7545         memcpy(fpu->fpr, fxsave->st_space, 128);
7546         fpu->fcw = fxsave->cwd;
7547         fpu->fsw = fxsave->swd;
7548         fpu->ftwx = fxsave->twd;
7549         fpu->last_opcode = fxsave->fop;
7550         fpu->last_ip = fxsave->rip;
7551         fpu->last_dp = fxsave->rdp;
7552         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7553
7554         return 0;
7555 }
7556
7557 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7558 {
7559         struct fxregs_state *fxsave =
7560                         &vcpu->arch.guest_fpu.state.fxsave;
7561
7562         memcpy(fxsave->st_space, fpu->fpr, 128);
7563         fxsave->cwd = fpu->fcw;
7564         fxsave->swd = fpu->fsw;
7565         fxsave->twd = fpu->ftwx;
7566         fxsave->fop = fpu->last_opcode;
7567         fxsave->rip = fpu->last_ip;
7568         fxsave->rdp = fpu->last_dp;
7569         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7570
7571         return 0;
7572 }
7573
7574 static void fx_init(struct kvm_vcpu *vcpu)
7575 {
7576         fpstate_init(&vcpu->arch.guest_fpu.state);
7577         if (boot_cpu_has(X86_FEATURE_XSAVES))
7578                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7579                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7580
7581         /*
7582          * Ensure guest xcr0 is valid for loading
7583          */
7584         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7585
7586         vcpu->arch.cr0 |= X86_CR0_ET;
7587 }
7588
7589 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7590 {
7591         if (vcpu->guest_fpu_loaded)
7592                 return;
7593
7594         /*
7595          * Restore all possible states in the guest,
7596          * and assume host would use all available bits.
7597          * Guest xcr0 would be loaded later.
7598          */
7599         vcpu->guest_fpu_loaded = 1;
7600         __kernel_fpu_begin();
7601         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7602         trace_kvm_fpu(1);
7603 }
7604
7605 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7606 {
7607         if (!vcpu->guest_fpu_loaded)
7608                 return;
7609
7610         vcpu->guest_fpu_loaded = 0;
7611         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7612         __kernel_fpu_end();
7613         ++vcpu->stat.fpu_reload;
7614         trace_kvm_fpu(0);
7615 }
7616
7617 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7618 {
7619         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7620
7621         kvmclock_reset(vcpu);
7622
7623         kvm_x86_ops->vcpu_free(vcpu);
7624         free_cpumask_var(wbinvd_dirty_mask);
7625 }
7626
7627 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7628                                                 unsigned int id)
7629 {
7630         struct kvm_vcpu *vcpu;
7631
7632         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7633                 printk_once(KERN_WARNING
7634                 "kvm: SMP vm created on host with unstable TSC; "
7635                 "guest TSC will not be reliable\n");
7636
7637         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7638
7639         return vcpu;
7640 }
7641
7642 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7643 {
7644         int r;
7645
7646         kvm_vcpu_mtrr_init(vcpu);
7647         r = vcpu_load(vcpu);
7648         if (r)
7649                 return r;
7650         kvm_vcpu_reset(vcpu, false);
7651         kvm_mmu_setup(vcpu);
7652         vcpu_put(vcpu);
7653         return r;
7654 }
7655
7656 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7657 {
7658         struct msr_data msr;
7659         struct kvm *kvm = vcpu->kvm;
7660
7661         if (vcpu_load(vcpu))
7662                 return;
7663         msr.data = 0x0;
7664         msr.index = MSR_IA32_TSC;
7665         msr.host_initiated = true;
7666         kvm_write_tsc(vcpu, &msr);
7667         vcpu_put(vcpu);
7668
7669         if (!kvmclock_periodic_sync)
7670                 return;
7671
7672         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7673                                         KVMCLOCK_SYNC_PERIOD);
7674 }
7675
7676 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7677 {
7678         int r;
7679         vcpu->arch.apf.msr_val = 0;
7680
7681         r = vcpu_load(vcpu);
7682         BUG_ON(r);
7683         kvm_mmu_unload(vcpu);
7684         vcpu_put(vcpu);
7685
7686         kvm_x86_ops->vcpu_free(vcpu);
7687 }
7688
7689 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7690 {
7691         vcpu->arch.hflags = 0;
7692
7693         vcpu->arch.smi_pending = 0;
7694         atomic_set(&vcpu->arch.nmi_queued, 0);
7695         vcpu->arch.nmi_pending = 0;
7696         vcpu->arch.nmi_injected = false;
7697         kvm_clear_interrupt_queue(vcpu);
7698         kvm_clear_exception_queue(vcpu);
7699
7700         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7701         kvm_update_dr0123(vcpu);
7702         vcpu->arch.dr6 = DR6_INIT;
7703         kvm_update_dr6(vcpu);
7704         vcpu->arch.dr7 = DR7_FIXED_1;
7705         kvm_update_dr7(vcpu);
7706
7707         vcpu->arch.cr2 = 0;
7708
7709         kvm_make_request(KVM_REQ_EVENT, vcpu);
7710         vcpu->arch.apf.msr_val = 0;
7711         vcpu->arch.st.msr_val = 0;
7712
7713         kvmclock_reset(vcpu);
7714
7715         kvm_clear_async_pf_completion_queue(vcpu);
7716         kvm_async_pf_hash_reset(vcpu);
7717         vcpu->arch.apf.halted = false;
7718
7719         if (!init_event) {
7720                 kvm_pmu_reset(vcpu);
7721                 vcpu->arch.smbase = 0x30000;
7722
7723                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7724                 vcpu->arch.msr_misc_features_enables = 0;
7725         }
7726
7727         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7728         vcpu->arch.regs_avail = ~0;
7729         vcpu->arch.regs_dirty = ~0;
7730
7731         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7732 }
7733
7734 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7735 {
7736         struct kvm_segment cs;
7737
7738         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7739         cs.selector = vector << 8;
7740         cs.base = vector << 12;
7741         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7742         kvm_rip_write(vcpu, 0);
7743 }
7744
7745 int kvm_arch_hardware_enable(void)
7746 {
7747         struct kvm *kvm;
7748         struct kvm_vcpu *vcpu;
7749         int i;
7750         int ret;
7751         u64 local_tsc;
7752         u64 max_tsc = 0;
7753         bool stable, backwards_tsc = false;
7754
7755         kvm_shared_msr_cpu_online();
7756         ret = kvm_x86_ops->hardware_enable();
7757         if (ret != 0)
7758                 return ret;
7759
7760         local_tsc = rdtsc();
7761         stable = !check_tsc_unstable();
7762         list_for_each_entry(kvm, &vm_list, vm_list) {
7763                 kvm_for_each_vcpu(i, vcpu, kvm) {
7764                         if (!stable && vcpu->cpu == smp_processor_id())
7765                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7766                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7767                                 backwards_tsc = true;
7768                                 if (vcpu->arch.last_host_tsc > max_tsc)
7769                                         max_tsc = vcpu->arch.last_host_tsc;
7770                         }
7771                 }
7772         }
7773
7774         /*
7775          * Sometimes, even reliable TSCs go backwards.  This happens on
7776          * platforms that reset TSC during suspend or hibernate actions, but
7777          * maintain synchronization.  We must compensate.  Fortunately, we can
7778          * detect that condition here, which happens early in CPU bringup,
7779          * before any KVM threads can be running.  Unfortunately, we can't
7780          * bring the TSCs fully up to date with real time, as we aren't yet far
7781          * enough into CPU bringup that we know how much real time has actually
7782          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7783          * variables that haven't been updated yet.
7784          *
7785          * So we simply find the maximum observed TSC above, then record the
7786          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7787          * the adjustment will be applied.  Note that we accumulate
7788          * adjustments, in case multiple suspend cycles happen before some VCPU
7789          * gets a chance to run again.  In the event that no KVM threads get a
7790          * chance to run, we will miss the entire elapsed period, as we'll have
7791          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7792          * loose cycle time.  This isn't too big a deal, since the loss will be
7793          * uniform across all VCPUs (not to mention the scenario is extremely
7794          * unlikely). It is possible that a second hibernate recovery happens
7795          * much faster than a first, causing the observed TSC here to be
7796          * smaller; this would require additional padding adjustment, which is
7797          * why we set last_host_tsc to the local tsc observed here.
7798          *
7799          * N.B. - this code below runs only on platforms with reliable TSC,
7800          * as that is the only way backwards_tsc is set above.  Also note
7801          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7802          * have the same delta_cyc adjustment applied if backwards_tsc
7803          * is detected.  Note further, this adjustment is only done once,
7804          * as we reset last_host_tsc on all VCPUs to stop this from being
7805          * called multiple times (one for each physical CPU bringup).
7806          *
7807          * Platforms with unreliable TSCs don't have to deal with this, they
7808          * will be compensated by the logic in vcpu_load, which sets the TSC to
7809          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7810          * guarantee that they stay in perfect synchronization.
7811          */
7812         if (backwards_tsc) {
7813                 u64 delta_cyc = max_tsc - local_tsc;
7814                 backwards_tsc_observed = true;
7815                 list_for_each_entry(kvm, &vm_list, vm_list) {
7816                         kvm_for_each_vcpu(i, vcpu, kvm) {
7817                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7818                                 vcpu->arch.last_host_tsc = local_tsc;
7819                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7820                         }
7821
7822                         /*
7823                          * We have to disable TSC offset matching.. if you were
7824                          * booting a VM while issuing an S4 host suspend....
7825                          * you may have some problem.  Solving this issue is
7826                          * left as an exercise to the reader.
7827                          */
7828                         kvm->arch.last_tsc_nsec = 0;
7829                         kvm->arch.last_tsc_write = 0;
7830                 }
7831
7832         }
7833         return 0;
7834 }
7835
7836 void kvm_arch_hardware_disable(void)
7837 {
7838         kvm_x86_ops->hardware_disable();
7839         drop_user_return_notifiers();
7840 }
7841
7842 int kvm_arch_hardware_setup(void)
7843 {
7844         int r;
7845
7846         r = kvm_x86_ops->hardware_setup();
7847         if (r != 0)
7848                 return r;
7849
7850         if (kvm_has_tsc_control) {
7851                 /*
7852                  * Make sure the user can only configure tsc_khz values that
7853                  * fit into a signed integer.
7854                  * A min value is not calculated needed because it will always
7855                  * be 1 on all machines.
7856                  */
7857                 u64 max = min(0x7fffffffULL,
7858                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7859                 kvm_max_guest_tsc_khz = max;
7860
7861                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7862         }
7863
7864         kvm_init_msr_list();
7865         return 0;
7866 }
7867
7868 void kvm_arch_hardware_unsetup(void)
7869 {
7870         kvm_x86_ops->hardware_unsetup();
7871 }
7872
7873 void kvm_arch_check_processor_compat(void *rtn)
7874 {
7875         kvm_x86_ops->check_processor_compatibility(rtn);
7876 }
7877
7878 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7879 {
7880         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7881 }
7882 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7883
7884 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7885 {
7886         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7887 }
7888
7889 struct static_key kvm_no_apic_vcpu __read_mostly;
7890 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7891
7892 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7893 {
7894         struct page *page;
7895         struct kvm *kvm;
7896         int r;
7897
7898         BUG_ON(vcpu->kvm == NULL);
7899         kvm = vcpu->kvm;
7900
7901         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7902         vcpu->arch.pv.pv_unhalted = false;
7903         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7904         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7905                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7906         else
7907                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7908
7909         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7910         if (!page) {
7911                 r = -ENOMEM;
7912                 goto fail;
7913         }
7914         vcpu->arch.pio_data = page_address(page);
7915
7916         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7917
7918         r = kvm_mmu_create(vcpu);
7919         if (r < 0)
7920                 goto fail_free_pio_data;
7921
7922         if (irqchip_in_kernel(kvm)) {
7923                 r = kvm_create_lapic(vcpu);
7924                 if (r < 0)
7925                         goto fail_mmu_destroy;
7926         } else
7927                 static_key_slow_inc(&kvm_no_apic_vcpu);
7928
7929         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7930                                        GFP_KERNEL);
7931         if (!vcpu->arch.mce_banks) {
7932                 r = -ENOMEM;
7933                 goto fail_free_lapic;
7934         }
7935         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7936
7937         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7938                 r = -ENOMEM;
7939                 goto fail_free_mce_banks;
7940         }
7941
7942         fx_init(vcpu);
7943
7944         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7945         vcpu->arch.pv_time_enabled = false;
7946
7947         vcpu->arch.guest_supported_xcr0 = 0;
7948         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7949
7950         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7951
7952         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7953
7954         kvm_async_pf_hash_reset(vcpu);
7955         kvm_pmu_init(vcpu);
7956
7957         vcpu->arch.pending_external_vector = -1;
7958
7959         kvm_hv_vcpu_init(vcpu);
7960
7961         return 0;
7962
7963 fail_free_mce_banks:
7964         kfree(vcpu->arch.mce_banks);
7965 fail_free_lapic:
7966         kvm_free_lapic(vcpu);
7967 fail_mmu_destroy:
7968         kvm_mmu_destroy(vcpu);
7969 fail_free_pio_data:
7970         free_page((unsigned long)vcpu->arch.pio_data);
7971 fail:
7972         return r;
7973 }
7974
7975 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7976 {
7977         int idx;
7978
7979         kvm_hv_vcpu_uninit(vcpu);
7980         kvm_pmu_destroy(vcpu);
7981         kfree(vcpu->arch.mce_banks);
7982         kvm_free_lapic(vcpu);
7983         idx = srcu_read_lock(&vcpu->kvm->srcu);
7984         kvm_mmu_destroy(vcpu);
7985         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7986         free_page((unsigned long)vcpu->arch.pio_data);
7987         if (!lapic_in_kernel(vcpu))
7988                 static_key_slow_dec(&kvm_no_apic_vcpu);
7989 }
7990
7991 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7992 {
7993         kvm_x86_ops->sched_in(vcpu, cpu);
7994 }
7995
7996 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7997 {
7998         if (type)
7999                 return -EINVAL;
8000
8001         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8002         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8003         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8004         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8005         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8006
8007         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8008         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8009         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8010         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8011                 &kvm->arch.irq_sources_bitmap);
8012
8013         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8014         mutex_init(&kvm->arch.apic_map_lock);
8015         mutex_init(&kvm->arch.hyperv.hv_lock);
8016         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8017
8018         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8019         pvclock_update_vm_gtod_copy(kvm);
8020
8021         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8022         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8023
8024         kvm_page_track_init(kvm);
8025         kvm_mmu_init_vm(kvm);
8026
8027         if (kvm_x86_ops->vm_init)
8028                 return kvm_x86_ops->vm_init(kvm);
8029
8030         return 0;
8031 }
8032
8033 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8034 {
8035         int r;
8036         r = vcpu_load(vcpu);
8037         BUG_ON(r);
8038         kvm_mmu_unload(vcpu);
8039         vcpu_put(vcpu);
8040 }
8041
8042 static void kvm_free_vcpus(struct kvm *kvm)
8043 {
8044         unsigned int i;
8045         struct kvm_vcpu *vcpu;
8046
8047         /*
8048          * Unpin any mmu pages first.
8049          */
8050         kvm_for_each_vcpu(i, vcpu, kvm) {
8051                 kvm_clear_async_pf_completion_queue(vcpu);
8052                 kvm_unload_vcpu_mmu(vcpu);
8053         }
8054         kvm_for_each_vcpu(i, vcpu, kvm)
8055                 kvm_arch_vcpu_free(vcpu);
8056
8057         mutex_lock(&kvm->lock);
8058         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8059                 kvm->vcpus[i] = NULL;
8060
8061         atomic_set(&kvm->online_vcpus, 0);
8062         mutex_unlock(&kvm->lock);
8063 }
8064
8065 void kvm_arch_sync_events(struct kvm *kvm)
8066 {
8067         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8068         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8069         kvm_free_pit(kvm);
8070 }
8071
8072 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8073 {
8074         int i, r;
8075         unsigned long hva;
8076         struct kvm_memslots *slots = kvm_memslots(kvm);
8077         struct kvm_memory_slot *slot, old;
8078
8079         /* Called with kvm->slots_lock held.  */
8080         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8081                 return -EINVAL;
8082
8083         slot = id_to_memslot(slots, id);
8084         if (size) {
8085                 if (slot->npages)
8086                         return -EEXIST;
8087
8088                 /*
8089                  * MAP_SHARED to prevent internal slot pages from being moved
8090                  * by fork()/COW.
8091                  */
8092                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8093                               MAP_SHARED | MAP_ANONYMOUS, 0);
8094                 if (IS_ERR((void *)hva))
8095                         return PTR_ERR((void *)hva);
8096         } else {
8097                 if (!slot->npages)
8098                         return 0;
8099
8100                 hva = 0;
8101         }
8102
8103         old = *slot;
8104         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8105                 struct kvm_userspace_memory_region m;
8106
8107                 m.slot = id | (i << 16);
8108                 m.flags = 0;
8109                 m.guest_phys_addr = gpa;
8110                 m.userspace_addr = hva;
8111                 m.memory_size = size;
8112                 r = __kvm_set_memory_region(kvm, &m);
8113                 if (r < 0)
8114                         return r;
8115         }
8116
8117         if (!size) {
8118                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8119                 WARN_ON(r < 0);
8120         }
8121
8122         return 0;
8123 }
8124 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8125
8126 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8127 {
8128         int r;
8129
8130         mutex_lock(&kvm->slots_lock);
8131         r = __x86_set_memory_region(kvm, id, gpa, size);
8132         mutex_unlock(&kvm->slots_lock);
8133
8134         return r;
8135 }
8136 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8137
8138 void kvm_arch_destroy_vm(struct kvm *kvm)
8139 {
8140         if (current->mm == kvm->mm) {
8141                 /*
8142                  * Free memory regions allocated on behalf of userspace,
8143                  * unless the the memory map has changed due to process exit
8144                  * or fd copying.
8145                  */
8146                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8147                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8148                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8149         }
8150         if (kvm_x86_ops->vm_destroy)
8151                 kvm_x86_ops->vm_destroy(kvm);
8152         kvm_pic_destroy(kvm);
8153         kvm_ioapic_destroy(kvm);
8154         kvm_free_vcpus(kvm);
8155         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8156         kvm_mmu_uninit_vm(kvm);
8157         kvm_page_track_cleanup(kvm);
8158 }
8159
8160 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8161                            struct kvm_memory_slot *dont)
8162 {
8163         int i;
8164
8165         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8166                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8167                         kvfree(free->arch.rmap[i]);
8168                         free->arch.rmap[i] = NULL;
8169                 }
8170                 if (i == 0)
8171                         continue;
8172
8173                 if (!dont || free->arch.lpage_info[i - 1] !=
8174                              dont->arch.lpage_info[i - 1]) {
8175                         kvfree(free->arch.lpage_info[i - 1]);
8176                         free->arch.lpage_info[i - 1] = NULL;
8177                 }
8178         }
8179
8180         kvm_page_track_free_memslot(free, dont);
8181 }
8182
8183 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8184                             unsigned long npages)
8185 {
8186         int i;
8187
8188         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8189                 struct kvm_lpage_info *linfo;
8190                 unsigned long ugfn;
8191                 int lpages;
8192                 int level = i + 1;
8193
8194                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8195                                       slot->base_gfn, level) + 1;
8196
8197                 slot->arch.rmap[i] =
8198                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8199                 if (!slot->arch.rmap[i])
8200                         goto out_free;
8201                 if (i == 0)
8202                         continue;
8203
8204                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8205                 if (!linfo)
8206                         goto out_free;
8207
8208                 slot->arch.lpage_info[i - 1] = linfo;
8209
8210                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8211                         linfo[0].disallow_lpage = 1;
8212                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8213                         linfo[lpages - 1].disallow_lpage = 1;
8214                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8215                 /*
8216                  * If the gfn and userspace address are not aligned wrt each
8217                  * other, or if explicitly asked to, disable large page
8218                  * support for this slot
8219                  */
8220                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8221                     !kvm_largepages_enabled()) {
8222                         unsigned long j;
8223
8224                         for (j = 0; j < lpages; ++j)
8225                                 linfo[j].disallow_lpage = 1;
8226                 }
8227         }
8228
8229         if (kvm_page_track_create_memslot(slot, npages))
8230                 goto out_free;
8231
8232         return 0;
8233
8234 out_free:
8235         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8236                 kvfree(slot->arch.rmap[i]);
8237                 slot->arch.rmap[i] = NULL;
8238                 if (i == 0)
8239                         continue;
8240
8241                 kvfree(slot->arch.lpage_info[i - 1]);
8242                 slot->arch.lpage_info[i - 1] = NULL;
8243         }
8244         return -ENOMEM;
8245 }
8246
8247 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8248 {
8249         /*
8250          * memslots->generation has been incremented.
8251          * mmio generation may have reached its maximum value.
8252          */
8253         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8254 }
8255
8256 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8257                                 struct kvm_memory_slot *memslot,
8258                                 const struct kvm_userspace_memory_region *mem,
8259                                 enum kvm_mr_change change)
8260 {
8261         return 0;
8262 }
8263
8264 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8265                                      struct kvm_memory_slot *new)
8266 {
8267         /* Still write protect RO slot */
8268         if (new->flags & KVM_MEM_READONLY) {
8269                 kvm_mmu_slot_remove_write_access(kvm, new);
8270                 return;
8271         }
8272
8273         /*
8274          * Call kvm_x86_ops dirty logging hooks when they are valid.
8275          *
8276          * kvm_x86_ops->slot_disable_log_dirty is called when:
8277          *
8278          *  - KVM_MR_CREATE with dirty logging is disabled
8279          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8280          *
8281          * The reason is, in case of PML, we need to set D-bit for any slots
8282          * with dirty logging disabled in order to eliminate unnecessary GPA
8283          * logging in PML buffer (and potential PML buffer full VMEXT). This
8284          * guarantees leaving PML enabled during guest's lifetime won't have
8285          * any additonal overhead from PML when guest is running with dirty
8286          * logging disabled for memory slots.
8287          *
8288          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8289          * to dirty logging mode.
8290          *
8291          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8292          *
8293          * In case of write protect:
8294          *
8295          * Write protect all pages for dirty logging.
8296          *
8297          * All the sptes including the large sptes which point to this
8298          * slot are set to readonly. We can not create any new large
8299          * spte on this slot until the end of the logging.
8300          *
8301          * See the comments in fast_page_fault().
8302          */
8303         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8304                 if (kvm_x86_ops->slot_enable_log_dirty)
8305                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8306                 else
8307                         kvm_mmu_slot_remove_write_access(kvm, new);
8308         } else {
8309                 if (kvm_x86_ops->slot_disable_log_dirty)
8310                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8311         }
8312 }
8313
8314 void kvm_arch_commit_memory_region(struct kvm *kvm,
8315                                 const struct kvm_userspace_memory_region *mem,
8316                                 const struct kvm_memory_slot *old,
8317                                 const struct kvm_memory_slot *new,
8318                                 enum kvm_mr_change change)
8319 {
8320         int nr_mmu_pages = 0;
8321
8322         if (!kvm->arch.n_requested_mmu_pages)
8323                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8324
8325         if (nr_mmu_pages)
8326                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8327
8328         /*
8329          * Dirty logging tracks sptes in 4k granularity, meaning that large
8330          * sptes have to be split.  If live migration is successful, the guest
8331          * in the source machine will be destroyed and large sptes will be
8332          * created in the destination. However, if the guest continues to run
8333          * in the source machine (for example if live migration fails), small
8334          * sptes will remain around and cause bad performance.
8335          *
8336          * Scan sptes if dirty logging has been stopped, dropping those
8337          * which can be collapsed into a single large-page spte.  Later
8338          * page faults will create the large-page sptes.
8339          */
8340         if ((change != KVM_MR_DELETE) &&
8341                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8342                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8343                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8344
8345         /*
8346          * Set up write protection and/or dirty logging for the new slot.
8347          *
8348          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8349          * been zapped so no dirty logging staff is needed for old slot. For
8350          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8351          * new and it's also covered when dealing with the new slot.
8352          *
8353          * FIXME: const-ify all uses of struct kvm_memory_slot.
8354          */
8355         if (change != KVM_MR_DELETE)
8356                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8357 }
8358
8359 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8360 {
8361         kvm_mmu_invalidate_zap_all_pages(kvm);
8362 }
8363
8364 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8365                                    struct kvm_memory_slot *slot)
8366 {
8367         kvm_page_track_flush_slot(kvm, slot);
8368 }
8369
8370 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8371 {
8372         if (!list_empty_careful(&vcpu->async_pf.done))
8373                 return true;
8374
8375         if (kvm_apic_has_events(vcpu))
8376                 return true;
8377
8378         if (vcpu->arch.pv.pv_unhalted)
8379                 return true;
8380
8381         if (atomic_read(&vcpu->arch.nmi_queued))
8382                 return true;
8383
8384         if (kvm_test_request(KVM_REQ_SMI, vcpu))
8385                 return true;
8386
8387         if (kvm_arch_interrupt_allowed(vcpu) &&
8388             kvm_cpu_has_interrupt(vcpu))
8389                 return true;
8390
8391         if (kvm_hv_has_stimer_pending(vcpu))
8392                 return true;
8393
8394         return false;
8395 }
8396
8397 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8398 {
8399         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8400 }
8401
8402 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8403 {
8404         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8405 }
8406
8407 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8408 {
8409         return kvm_x86_ops->interrupt_allowed(vcpu);
8410 }
8411
8412 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8413 {
8414         if (is_64_bit_mode(vcpu))
8415                 return kvm_rip_read(vcpu);
8416         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8417                      kvm_rip_read(vcpu));
8418 }
8419 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8420
8421 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8422 {
8423         return kvm_get_linear_rip(vcpu) == linear_rip;
8424 }
8425 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8426
8427 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8428 {
8429         unsigned long rflags;
8430
8431         rflags = kvm_x86_ops->get_rflags(vcpu);
8432         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8433                 rflags &= ~X86_EFLAGS_TF;
8434         return rflags;
8435 }
8436 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8437
8438 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8439 {
8440         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8441             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8442                 rflags |= X86_EFLAGS_TF;
8443         kvm_x86_ops->set_rflags(vcpu, rflags);
8444 }
8445
8446 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8447 {
8448         __kvm_set_rflags(vcpu, rflags);
8449         kvm_make_request(KVM_REQ_EVENT, vcpu);
8450 }
8451 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8452
8453 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8454 {
8455         int r;
8456
8457         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8458               work->wakeup_all)
8459                 return;
8460
8461         r = kvm_mmu_reload(vcpu);
8462         if (unlikely(r))
8463                 return;
8464
8465         if (!vcpu->arch.mmu.direct_map &&
8466               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8467                 return;
8468
8469         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8470 }
8471
8472 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8473 {
8474         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8475 }
8476
8477 static inline u32 kvm_async_pf_next_probe(u32 key)
8478 {
8479         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8480 }
8481
8482 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8483 {
8484         u32 key = kvm_async_pf_hash_fn(gfn);
8485
8486         while (vcpu->arch.apf.gfns[key] != ~0)
8487                 key = kvm_async_pf_next_probe(key);
8488
8489         vcpu->arch.apf.gfns[key] = gfn;
8490 }
8491
8492 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8493 {
8494         int i;
8495         u32 key = kvm_async_pf_hash_fn(gfn);
8496
8497         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8498                      (vcpu->arch.apf.gfns[key] != gfn &&
8499                       vcpu->arch.apf.gfns[key] != ~0); i++)
8500                 key = kvm_async_pf_next_probe(key);
8501
8502         return key;
8503 }
8504
8505 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8506 {
8507         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8508 }
8509
8510 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8511 {
8512         u32 i, j, k;
8513
8514         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8515         while (true) {
8516                 vcpu->arch.apf.gfns[i] = ~0;
8517                 do {
8518                         j = kvm_async_pf_next_probe(j);
8519                         if (vcpu->arch.apf.gfns[j] == ~0)
8520                                 return;
8521                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8522                         /*
8523                          * k lies cyclically in ]i,j]
8524                          * |    i.k.j |
8525                          * |....j i.k.| or  |.k..j i...|
8526                          */
8527                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8528                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8529                 i = j;
8530         }
8531 }
8532
8533 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8534 {
8535
8536         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8537                                       sizeof(val));
8538 }
8539
8540 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8541                                      struct kvm_async_pf *work)
8542 {
8543         struct x86_exception fault;
8544
8545         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8546         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8547
8548         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8549             (vcpu->arch.apf.send_user_only &&
8550              kvm_x86_ops->get_cpl(vcpu) == 0))
8551                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8552         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8553                 fault.vector = PF_VECTOR;
8554                 fault.error_code_valid = true;
8555                 fault.error_code = 0;
8556                 fault.nested_page_fault = false;
8557                 fault.address = work->arch.token;
8558                 kvm_inject_page_fault(vcpu, &fault);
8559         }
8560 }
8561
8562 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8563                                  struct kvm_async_pf *work)
8564 {
8565         struct x86_exception fault;
8566
8567         if (work->wakeup_all)
8568                 work->arch.token = ~0; /* broadcast wakeup */
8569         else
8570                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8571         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8572
8573         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8574             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8575                 fault.vector = PF_VECTOR;
8576                 fault.error_code_valid = true;
8577                 fault.error_code = 0;
8578                 fault.nested_page_fault = false;
8579                 fault.address = work->arch.token;
8580                 kvm_inject_page_fault(vcpu, &fault);
8581         }
8582         vcpu->arch.apf.halted = false;
8583         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8584 }
8585
8586 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8587 {
8588         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8589                 return true;
8590         else
8591                 return !kvm_event_needs_reinjection(vcpu) &&
8592                         kvm_x86_ops->interrupt_allowed(vcpu);
8593 }
8594
8595 void kvm_arch_start_assignment(struct kvm *kvm)
8596 {
8597         atomic_inc(&kvm->arch.assigned_device_count);
8598 }
8599 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8600
8601 void kvm_arch_end_assignment(struct kvm *kvm)
8602 {
8603         atomic_dec(&kvm->arch.assigned_device_count);
8604 }
8605 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8606
8607 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8608 {
8609         return atomic_read(&kvm->arch.assigned_device_count);
8610 }
8611 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8612
8613 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8614 {
8615         atomic_inc(&kvm->arch.noncoherent_dma_count);
8616 }
8617 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8618
8619 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8620 {
8621         atomic_dec(&kvm->arch.noncoherent_dma_count);
8622 }
8623 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8624
8625 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8626 {
8627         return atomic_read(&kvm->arch.noncoherent_dma_count);
8628 }
8629 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8630
8631 bool kvm_arch_has_irq_bypass(void)
8632 {
8633         return kvm_x86_ops->update_pi_irte != NULL;
8634 }
8635
8636 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8637                                       struct irq_bypass_producer *prod)
8638 {
8639         struct kvm_kernel_irqfd *irqfd =
8640                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8641
8642         irqfd->producer = prod;
8643
8644         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8645                                            prod->irq, irqfd->gsi, 1);
8646 }
8647
8648 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8649                                       struct irq_bypass_producer *prod)
8650 {
8651         int ret;
8652         struct kvm_kernel_irqfd *irqfd =
8653                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8654
8655         WARN_ON(irqfd->producer != prod);
8656         irqfd->producer = NULL;
8657
8658         /*
8659          * When producer of consumer is unregistered, we change back to
8660          * remapped mode, so we can re-use the current implementation
8661          * when the irq is masked/disabled or the consumer side (KVM
8662          * int this case doesn't want to receive the interrupts.
8663         */
8664         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8665         if (ret)
8666                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8667                        " fails: %d\n", irqfd->consumer.token, ret);
8668 }
8669
8670 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8671                                    uint32_t guest_irq, bool set)
8672 {
8673         if (!kvm_x86_ops->update_pi_irte)
8674                 return -EINVAL;
8675
8676         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8677 }
8678
8679 bool kvm_vector_hashing_enabled(void)
8680 {
8681         return vector_hashing;
8682 }
8683 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8684
8685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8699 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8700 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8701 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8702 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8703 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);