arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72 #include <asm/intel_pt.h>
  73
  74 #define CREATE_TRACE_POINTS
  75 #include "trace.h"
  76
  77 #define MAX_IO_MSRS 256
  78 #define KVM_MAX_MCE_BANKS 32
  79 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  80 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  81
  82 #define emul_to_vcpu(ctxt) \
  83         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  84
  85 /* EFER defaults:
  86  * - enable syscall per default because its emulated by KVM
  87  * - enable LME and LMA per default on 64 bit KVM
  88  */
  89 #ifdef CONFIG_X86_64
  90 static
  91 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  92 #else
  93 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  94 #endif
  95
  96 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  97 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  98
  99 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 100                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 101
 102 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 103 static void process_nmi(struct kvm_vcpu *vcpu);
 104 static void enter_smm(struct kvm_vcpu *vcpu);
 105 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 106 static void store_regs(struct kvm_vcpu *vcpu);
 107 static int sync_regs(struct kvm_vcpu *vcpu);
 108
 109 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 110 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 111
 112 static bool __read_mostly ignore_msrs = 0;
 113 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 114
 115 static bool __read_mostly report_ignored_msrs = true;
 116 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 117
 118 unsigned int min_timer_period_us = 200;
 119 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 120
 121 static bool __read_mostly kvmclock_periodic_sync = true;
 122 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 123
 124 bool __read_mostly kvm_has_tsc_control;
 125 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 126 u32  __read_mostly kvm_max_guest_tsc_khz;
 127 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 128 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 129 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 130 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 131 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 132 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 133 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 134
 135 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 136 static u32 __read_mostly tsc_tolerance_ppm = 250;
 137 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 138
 139 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 140 unsigned int __read_mostly lapic_timer_advance_ns = 1000;
 141 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 142 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 143
 144 static bool __read_mostly vector_hashing = true;
 145 module_param(vector_hashing, bool, S_IRUGO);
 146
 147 bool __read_mostly enable_vmware_backdoor = false;
 148 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 149 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 150
 151 static bool __read_mostly force_emulation_prefix = false;
 152 module_param(force_emulation_prefix, bool, S_IRUGO);
 153
 154 #define KVM_NR_SHARED_MSRS 16
 155
 156 struct kvm_shared_msrs_global {
 157         int nr;
 158         u32 msrs[KVM_NR_SHARED_MSRS];
 159 };
 160
 161 struct kvm_shared_msrs {
 162         struct user_return_notifier urn;
 163         bool registered;
 164         struct kvm_shared_msr_values {
 165                 u64 host;
 166                 u64 curr;
 167         } values[KVM_NR_SHARED_MSRS];
 168 };
 169
 170 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 171 static struct kvm_shared_msrs __percpu *shared_msrs;
 172
 173 struct kvm_stats_debugfs_item debugfs_entries[] = {
 174         { "pf_fixed", VCPU_STAT(pf_fixed) },
 175         { "pf_guest", VCPU_STAT(pf_guest) },
 176         { "tlb_flush", VCPU_STAT(tlb_flush) },
 177         { "invlpg", VCPU_STAT(invlpg) },
 178         { "exits", VCPU_STAT(exits) },
 179         { "io_exits", VCPU_STAT(io_exits) },
 180         { "mmio_exits", VCPU_STAT(mmio_exits) },
 181         { "signal_exits", VCPU_STAT(signal_exits) },
 182         { "irq_window", VCPU_STAT(irq_window_exits) },
 183         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 184         { "halt_exits", VCPU_STAT(halt_exits) },
 185         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 186         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 187         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 188         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 189         { "hypercalls", VCPU_STAT(hypercalls) },
 190         { "request_irq", VCPU_STAT(request_irq_exits) },
 191         { "irq_exits", VCPU_STAT(irq_exits) },
 192         { "host_state_reload", VCPU_STAT(host_state_reload) },
 193         { "fpu_reload", VCPU_STAT(fpu_reload) },
 194         { "insn_emulation", VCPU_STAT(insn_emulation) },
 195         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 196         { "irq_injections", VCPU_STAT(irq_injections) },
 197         { "nmi_injections", VCPU_STAT(nmi_injections) },
 198         { "req_event", VCPU_STAT(req_event) },
 199         { "l1d_flush", VCPU_STAT(l1d_flush) },
 200         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 201         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 202         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 203         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 204         { "mmu_flooded", VM_STAT(mmu_flooded) },
 205         { "mmu_recycled", VM_STAT(mmu_recycled) },
 206         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 207         { "mmu_unsync", VM_STAT(mmu_unsync) },
 208         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 209         { "largepages", VM_STAT(lpages) },
 210         { "max_mmu_page_hash_collisions",
 211                 VM_STAT(max_mmu_page_hash_collisions) },
 212         { NULL }
 213 };
 214
 215 u64 __read_mostly host_xcr0;
 216
 217 struct kmem_cache *x86_fpu_cache;
 218 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 219
 220 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 221
 222 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 223 {
 224         int i;
 225         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 226                 vcpu->arch.apf.gfns[i] = ~0;
 227 }
 228
 229 static void kvm_on_user_return(struct user_return_notifier *urn)
 230 {
 231         unsigned slot;
 232         struct kvm_shared_msrs *locals
 233                 = container_of(urn, struct kvm_shared_msrs, urn);
 234         struct kvm_shared_msr_values *values;
 235         unsigned long flags;
 236
 237         /*
 238          * Disabling irqs at this point since the following code could be
 239          * interrupted and executed through kvm_arch_hardware_disable()
 240          */
 241         local_irq_save(flags);
 242         if (locals->registered) {
 243                 locals->registered = false;
 244                 user_return_notifier_unregister(urn);
 245         }
 246         local_irq_restore(flags);
 247         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 248                 values = &locals->values[slot];
 249                 if (values->host != values->curr) {
 250                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 251                         values->curr = values->host;
 252                 }
 253         }
 254 }
 255
 256 static void shared_msr_update(unsigned slot, u32 msr)
 257 {
 258         u64 value;
 259         unsigned int cpu = smp_processor_id();
 260         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 261
 262         /* only read, and nobody should modify it at this time,
 263          * so don't need lock */
 264         if (slot >= shared_msrs_global.nr) {
 265                 printk(KERN_ERR "kvm: invalid MSR slot!");
 266                 return;
 267         }
 268         rdmsrl_safe(msr, &value);
 269         smsr->values[slot].host = value;
 270         smsr->values[slot].curr = value;
 271 }
 272
 273 void kvm_define_shared_msr(unsigned slot, u32 msr)
 274 {
 275         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 276         shared_msrs_global.msrs[slot] = msr;
 277         if (slot >= shared_msrs_global.nr)
 278                 shared_msrs_global.nr = slot + 1;
 279 }
 280 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 281
 282 static void kvm_shared_msr_cpu_online(void)
 283 {
 284         unsigned i;
 285
 286         for (i = 0; i < shared_msrs_global.nr; ++i)
 287                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 288 }
 289
 290 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 291 {
 292         unsigned int cpu = smp_processor_id();
 293         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 294         int err;
 295
 296         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 297                 return 0;
 298         smsr->values[slot].curr = value;
 299         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 300         if (err)
 301                 return 1;
 302
 303         if (!smsr->registered) {
 304                 smsr->urn.on_user_return = kvm_on_user_return;
 305                 user_return_notifier_register(&smsr->urn);
 306                 smsr->registered = true;
 307         }
 308         return 0;
 309 }
 310 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 311
 312 static void drop_user_return_notifiers(void)
 313 {
 314         unsigned int cpu = smp_processor_id();
 315         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 316
 317         if (smsr->registered)
 318                 kvm_on_user_return(&smsr->urn);
 319 }
 320
 321 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 322 {
 323         return vcpu->arch.apic_base;
 324 }
 325 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 326
 327 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 328 {
 329         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 332
 333 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 334 {
 335         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 336         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 337         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 338                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 339
 340         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 341                 return 1;
 342         if (!msr_info->host_initiated) {
 343                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 344                         return 1;
 345                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 346                         return 1;
 347         }
 348
 349         kvm_lapic_set_base(vcpu, msr_info->data);
 350         return 0;
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 353
 354 asmlinkage __visible void kvm_spurious_fault(void)
 355 {
 356         /* Fault while not rebooting.  We want the trace. */
 357         BUG();
 358 }
 359 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 360
 361 #define EXCPT_BENIGN            0
 362 #define EXCPT_CONTRIBUTORY      1
 363 #define EXCPT_PF                2
 364
 365 static int exception_class(int vector)
 366 {
 367         switch (vector) {
 368         case PF_VECTOR:
 369                 return EXCPT_PF;
 370         case DE_VECTOR:
 371         case TS_VECTOR:
 372         case NP_VECTOR:
 373         case SS_VECTOR:
 374         case GP_VECTOR:
 375                 return EXCPT_CONTRIBUTORY;
 376         default:
 377                 break;
 378         }
 379         return EXCPT_BENIGN;
 380 }
 381
 382 #define EXCPT_FAULT             0
 383 #define EXCPT_TRAP              1
 384 #define EXCPT_ABORT             2
 385 #define EXCPT_INTERRUPT         3
 386
 387 static int exception_type(int vector)
 388 {
 389         unsigned int mask;
 390
 391         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 392                 return EXCPT_INTERRUPT;
 393
 394         mask = 1 << vector;
 395
 396         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 397         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 398                 return EXCPT_TRAP;
 399
 400         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 401                 return EXCPT_ABORT;
 402
 403         /* Reserved exceptions will result in fault */
 404         return EXCPT_FAULT;
 405 }
 406
 407 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 408 {
 409         unsigned nr = vcpu->arch.exception.nr;
 410         bool has_payload = vcpu->arch.exception.has_payload;
 411         unsigned long payload = vcpu->arch.exception.payload;
 412
 413         if (!has_payload)
 414                 return;
 415
 416         switch (nr) {
 417         case DB_VECTOR:
 418                 /*
 419                  * "Certain debug exceptions may clear bit 0-3.  The
 420                  * remaining contents of the DR6 register are never
 421                  * cleared by the processor".
 422                  */
 423                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 424                 /*
 425                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 426                  */
 427                 vcpu->arch.dr6 |= DR6_RTM;
 428                 vcpu->arch.dr6 |= payload;
 429                 /*
 430                  * Bit 16 should be set in the payload whenever the #DB
 431                  * exception should clear DR6.RTM. This makes the payload
 432                  * compatible with the pending debug exceptions under VMX.
 433                  * Though not currently documented in the SDM, this also
 434                  * makes the payload compatible with the exit qualification
 435                  * for #DB exceptions under VMX.
 436                  */
 437                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 438                 break;
 439         case PF_VECTOR:
 440                 vcpu->arch.cr2 = payload;
 441                 break;
 442         }
 443
 444         vcpu->arch.exception.has_payload = false;
 445         vcpu->arch.exception.payload = 0;
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 448
 449 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 450                 unsigned nr, bool has_error, u32 error_code,
 451                 bool has_payload, unsigned long payload, bool reinject)
 452 {
 453         u32 prev_nr;
 454         int class1, class2;
 455
 456         kvm_make_request(KVM_REQ_EVENT, vcpu);
 457
 458         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 459         queue:
 460                 if (has_error && !is_protmode(vcpu))
 461                         has_error = false;
 462                 if (reinject) {
 463                         /*
 464                          * On vmentry, vcpu->arch.exception.pending is only
 465                          * true if an event injection was blocked by
 466                          * nested_run_pending.  In that case, however,
 467                          * vcpu_enter_guest requests an immediate exit,
 468                          * and the guest shouldn't proceed far enough to
 469                          * need reinjection.
 470                          */
 471                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 472                         vcpu->arch.exception.injected = true;
 473                         if (WARN_ON_ONCE(has_payload)) {
 474                                 /*
 475                                  * A reinjected event has already
 476                                  * delivered its payload.
 477                                  */
 478                                 has_payload = false;
 479                                 payload = 0;
 480                         }
 481                 } else {
 482                         vcpu->arch.exception.pending = true;
 483                         vcpu->arch.exception.injected = false;
 484                 }
 485                 vcpu->arch.exception.has_error_code = has_error;
 486                 vcpu->arch.exception.nr = nr;
 487                 vcpu->arch.exception.error_code = error_code;
 488                 vcpu->arch.exception.has_payload = has_payload;
 489                 vcpu->arch.exception.payload = payload;
 490                 /*
 491                  * In guest mode, payload delivery should be deferred,
 492                  * so that the L1 hypervisor can intercept #PF before
 493                  * CR2 is modified (or intercept #DB before DR6 is
 494                  * modified under nVMX).  However, for ABI
 495                  * compatibility with KVM_GET_VCPU_EVENTS and
 496                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 497                  * delivery unless userspace has enabled this
 498                  * functionality via the per-VM capability,
 499                  * KVM_CAP_EXCEPTION_PAYLOAD.
 500                  */
 501                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 502                     !is_guest_mode(vcpu))
 503                         kvm_deliver_exception_payload(vcpu);
 504                 return;
 505         }
 506
 507         /* to check exception */
 508         prev_nr = vcpu->arch.exception.nr;
 509         if (prev_nr == DF_VECTOR) {
 510                 /* triple fault -> shutdown */
 511                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 512                 return;
 513         }
 514         class1 = exception_class(prev_nr);
 515         class2 = exception_class(nr);
 516         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 517                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 518                 /*
 519                  * Generate double fault per SDM Table 5-5.  Set
 520                  * exception.pending = true so that the double fault
 521                  * can trigger a nested vmexit.
 522                  */
 523                 vcpu->arch.exception.pending = true;
 524                 vcpu->arch.exception.injected = false;
 525                 vcpu->arch.exception.has_error_code = true;
 526                 vcpu->arch.exception.nr = DF_VECTOR;
 527                 vcpu->arch.exception.error_code = 0;
 528                 vcpu->arch.exception.has_payload = false;
 529                 vcpu->arch.exception.payload = 0;
 530         } else
 531                 /* replace previous exception with a new one in a hope
 532                    that instruction re-execution will regenerate lost
 533                    exception */
 534                 goto queue;
 535 }
 536
 537 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 538 {
 539         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 542
 543 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 548
 549 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 550                                   unsigned long payload)
 551 {
 552         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 553 }
 554
 555 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                     u32 error_code, unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, true, error_code,
 559                                true, payload, false);
 560 }
 561
 562 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 563 {
 564         if (err)
 565                 kvm_inject_gp(vcpu, 0);
 566         else
 567                 return kvm_skip_emulated_instruction(vcpu);
 568
 569         return 1;
 570 }
 571 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 572
 573 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 574 {
 575         ++vcpu->stat.pf_guest;
 576         vcpu->arch.exception.nested_apf =
 577                 is_guest_mode(vcpu) && fault->async_page_fault;
 578         if (vcpu->arch.exception.nested_apf) {
 579                 vcpu->arch.apf.nested_apf_token = fault->address;
 580                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 581         } else {
 582                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 583                                         fault->address);
 584         }
 585 }
 586 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 587
 588 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 589 {
 590         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 591                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 592         else
 593                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 594
 595         return fault->nested_page_fault;
 596 }
 597
 598 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 599 {
 600         atomic_inc(&vcpu->arch.nmi_queued);
 601         kvm_make_request(KVM_REQ_NMI, vcpu);
 602 }
 603 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 604
 605 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 606 {
 607         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 610
 611 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 616
 617 /*
 618  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 619  * a #GP and return false.
 620  */
 621 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 622 {
 623         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 624                 return true;
 625         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 626         return false;
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 629
 630 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 631 {
 632         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 633                 return true;
 634
 635         kvm_queue_exception(vcpu, UD_VECTOR);
 636         return false;
 637 }
 638 EXPORT_SYMBOL_GPL(kvm_require_dr);
 639
 640 /*
 641  * This function will be used to read from the physical memory of the currently
 642  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 643  * can read from guest physical or from the guest's guest physical memory.
 644  */
 645 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 646                             gfn_t ngfn, void *data, int offset, int len,
 647                             u32 access)
 648 {
 649         struct x86_exception exception;
 650         gfn_t real_gfn;
 651         gpa_t ngpa;
 652
 653         ngpa     = gfn_to_gpa(ngfn);
 654         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 655         if (real_gfn == UNMAPPED_GVA)
 656                 return -EFAULT;
 657
 658         real_gfn = gpa_to_gfn(real_gfn);
 659
 660         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 663
 664 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 665                                void *data, int offset, int len, u32 access)
 666 {
 667         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 668                                        data, offset, len, access);
 669 }
 670
 671 /*
 672  * Load the pae pdptrs.  Return true is they are all valid.
 673  */
 674 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 675 {
 676         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 677         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 678         int i;
 679         int ret;
 680         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 681
 682         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 683                                       offset * sizeof(u64), sizeof(pdpte),
 684                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 685         if (ret < 0) {
 686                 ret = 0;
 687                 goto out;
 688         }
 689         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 690                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 691                     (pdpte[i] &
 692                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 693                         ret = 0;
 694                         goto out;
 695                 }
 696         }
 697         ret = 1;
 698
 699         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 700         __set_bit(VCPU_EXREG_PDPTR,
 701                   (unsigned long *)&vcpu->arch.regs_avail);
 702         __set_bit(VCPU_EXREG_PDPTR,
 703                   (unsigned long *)&vcpu->arch.regs_dirty);
 704 out:
 705
 706         return ret;
 707 }
 708 EXPORT_SYMBOL_GPL(load_pdptrs);
 709
 710 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 711 {
 712         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 713         bool changed = true;
 714         int offset;
 715         gfn_t gfn;
 716         int r;
 717
 718         if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
 719                 return false;
 720
 721         if (!test_bit(VCPU_EXREG_PDPTR,
 722                       (unsigned long *)&vcpu->arch.regs_avail))
 723                 return true;
 724
 725         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 726         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 727         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 728                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 729         if (r < 0)
 730                 goto out;
 731         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 732 out:
 733
 734         return changed;
 735 }
 736 EXPORT_SYMBOL_GPL(pdptrs_changed);
 737
 738 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 739 {
 740         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 741         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 742
 743         cr0 |= X86_CR0_ET;
 744
 745 #ifdef CONFIG_X86_64
 746         if (cr0 & 0xffffffff00000000UL)
 747                 return 1;
 748 #endif
 749
 750         cr0 &= ~CR0_RESERVED_BITS;
 751
 752         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 753                 return 1;
 754
 755         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 756                 return 1;
 757
 758         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 759 #ifdef CONFIG_X86_64
 760                 if ((vcpu->arch.efer & EFER_LME)) {
 761                         int cs_db, cs_l;
 762
 763                         if (!is_pae(vcpu))
 764                                 return 1;
 765                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 766                         if (cs_l)
 767                                 return 1;
 768                 } else
 769 #endif
 770                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 771                                                  kvm_read_cr3(vcpu)))
 772                         return 1;
 773         }
 774
 775         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 776                 return 1;
 777
 778         kvm_x86_ops->set_cr0(vcpu, cr0);
 779
 780         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 781                 kvm_clear_async_pf_completion_queue(vcpu);
 782                 kvm_async_pf_hash_reset(vcpu);
 783         }
 784
 785         if ((cr0 ^ old_cr0) & update_bits)
 786                 kvm_mmu_reset_context(vcpu);
 787
 788         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 789             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 790             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 791                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 792
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 796
 797 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 798 {
 799         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_lmsw);
 802
 803 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 804 {
 805         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 806                         !vcpu->guest_xcr0_loaded) {
 807                 /* kvm_set_xcr() also depends on this */
 808                 if (vcpu->arch.xcr0 != host_xcr0)
 809                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 810                 vcpu->guest_xcr0_loaded = 1;
 811         }
 812 }
 813
 814 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (vcpu->guest_xcr0_loaded) {
 817                 if (vcpu->arch.xcr0 != host_xcr0)
 818                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 819                 vcpu->guest_xcr0_loaded = 0;
 820         }
 821 }
 822
 823 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 824 {
 825         u64 xcr0 = xcr;
 826         u64 old_xcr0 = vcpu->arch.xcr0;
 827         u64 valid_bits;
 828
 829         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 830         if (index != XCR_XFEATURE_ENABLED_MASK)
 831                 return 1;
 832         if (!(xcr0 & XFEATURE_MASK_FP))
 833                 return 1;
 834         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 835                 return 1;
 836
 837         /*
 838          * Do not allow the guest to set bits that we do not support
 839          * saving.  However, xcr0 bit 0 is always set, even if the
 840          * emulated CPU does not support XSAVE (see fx_init).
 841          */
 842         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 843         if (xcr0 & ~valid_bits)
 844                 return 1;
 845
 846         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 847             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 848                 return 1;
 849
 850         if (xcr0 & XFEATURE_MASK_AVX512) {
 851                 if (!(xcr0 & XFEATURE_MASK_YMM))
 852                         return 1;
 853                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 854                         return 1;
 855         }
 856         vcpu->arch.xcr0 = xcr0;
 857
 858         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 859                 kvm_update_cpuid(vcpu);
 860         return 0;
 861 }
 862
 863 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 864 {
 865         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 866             __kvm_set_xcr(vcpu, index, xcr)) {
 867                 kvm_inject_gp(vcpu, 0);
 868                 return 1;
 869         }
 870         return 0;
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 873
 874 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 875 {
 876         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 877         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 878                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 879
 880         if (cr4 & CR4_RESERVED_BITS)
 881                 return 1;
 882
 883         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 884                 return 1;
 885
 886         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 887                 return 1;
 888
 889         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 890                 return 1;
 891
 892         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 893                 return 1;
 894
 895         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 896                 return 1;
 897
 898         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 899                 return 1;
 900
 901         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 902                 return 1;
 903
 904         if (is_long_mode(vcpu)) {
 905                 if (!(cr4 & X86_CR4_PAE))
 906                         return 1;
 907         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 908                    && ((cr4 ^ old_cr4) & pdptr_bits)
 909                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 910                                    kvm_read_cr3(vcpu)))
 911                 return 1;
 912
 913         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 914                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 915                         return 1;
 916
 917                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 918                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 919                         return 1;
 920         }
 921
 922         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 923                 return 1;
 924
 925         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 926             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 927                 kvm_mmu_reset_context(vcpu);
 928
 929         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 930                 kvm_update_cpuid(vcpu);
 931
 932         return 0;
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 935
 936 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 937 {
 938         bool skip_tlb_flush = false;
 939 #ifdef CONFIG_X86_64
 940         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 941
 942         if (pcid_enabled) {
 943                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 944                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 945         }
 946 #endif
 947
 948         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 949                 if (!skip_tlb_flush) {
 950                         kvm_mmu_sync_roots(vcpu);
 951                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 952                 }
 953                 return 0;
 954         }
 955
 956         if (is_long_mode(vcpu) &&
 957             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 958                 return 1;
 959         else if (is_pae(vcpu) && is_paging(vcpu) &&
 960                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 961                 return 1;
 962
 963         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 964         vcpu->arch.cr3 = cr3;
 965         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 966
 967         return 0;
 968 }
 969 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 970
 971 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 972 {
 973         if (cr8 & CR8_RESERVED_BITS)
 974                 return 1;
 975         if (lapic_in_kernel(vcpu))
 976                 kvm_lapic_set_tpr(vcpu, cr8);
 977         else
 978                 vcpu->arch.cr8 = cr8;
 979         return 0;
 980 }
 981 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 982
 983 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 984 {
 985         if (lapic_in_kernel(vcpu))
 986                 return kvm_lapic_get_cr8(vcpu);
 987         else
 988                 return vcpu->arch.cr8;
 989 }
 990 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 991
 992 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 993 {
 994         int i;
 995
 996         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 997                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 998                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 999                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1000         }
1001 }
1002
1003 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1004 {
1005         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1006                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1007 }
1008
1009 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1010 {
1011         unsigned long dr7;
1012
1013         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1014                 dr7 = vcpu->arch.guest_debug_dr7;
1015         else
1016                 dr7 = vcpu->arch.dr7;
1017         kvm_x86_ops->set_dr7(vcpu, dr7);
1018         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1019         if (dr7 & DR7_BP_EN_MASK)
1020                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1021 }
1022
1023 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1024 {
1025         u64 fixed = DR6_FIXED_1;
1026
1027         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1028                 fixed |= DR6_RTM;
1029         return fixed;
1030 }
1031
1032 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1033 {
1034         switch (dr) {
1035         case 0 ... 3:
1036                 vcpu->arch.db[dr] = val;
1037                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1038                         vcpu->arch.eff_db[dr] = val;
1039                 break;
1040         case 4:
1041                 /* fall through */
1042         case 6:
1043                 if (val & 0xffffffff00000000ULL)
1044                         return -1; /* #GP */
1045                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1046                 kvm_update_dr6(vcpu);
1047                 break;
1048         case 5:
1049                 /* fall through */
1050         default: /* 7 */
1051                 if (val & 0xffffffff00000000ULL)
1052                         return -1; /* #GP */
1053                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1054                 kvm_update_dr7(vcpu);
1055                 break;
1056         }
1057
1058         return 0;
1059 }
1060
1061 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1062 {
1063         if (__kvm_set_dr(vcpu, dr, val)) {
1064                 kvm_inject_gp(vcpu, 0);
1065                 return 1;
1066         }
1067         return 0;
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_dr);
1070
1071 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1072 {
1073         switch (dr) {
1074         case 0 ... 3:
1075                 *val = vcpu->arch.db[dr];
1076                 break;
1077         case 4:
1078                 /* fall through */
1079         case 6:
1080                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1081                         *val = vcpu->arch.dr6;
1082                 else
1083                         *val = kvm_x86_ops->get_dr6(vcpu);
1084                 break;
1085         case 5:
1086                 /* fall through */
1087         default: /* 7 */
1088                 *val = vcpu->arch.dr7;
1089                 break;
1090         }
1091         return 0;
1092 }
1093 EXPORT_SYMBOL_GPL(kvm_get_dr);
1094
1095 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1096 {
1097         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1098         u64 data;
1099         int err;
1100
1101         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1102         if (err)
1103                 return err;
1104         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1105         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1106         return err;
1107 }
1108 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1109
1110 /*
1111  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1112  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1113  *
1114  * This list is modified at module load time to reflect the
1115  * capabilities of the host cpu. This capabilities test skips MSRs that are
1116  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1117  * may depend on host virtualization features rather than host cpu features.
1118  */
1119
1120 static u32 msrs_to_save[] = {
1121         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1122         MSR_STAR,
1123 #ifdef CONFIG_X86_64
1124         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1125 #endif
1126         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1127         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1128         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES,
1129         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1130         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1131         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1132         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1133         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1134         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1135 };
1136
1137 static unsigned num_msrs_to_save;
1138
1139 static u32 emulated_msrs[] = {
1140         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1141         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1142         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1143         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1144         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1145         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1146         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1147         HV_X64_MSR_RESET,
1148         HV_X64_MSR_VP_INDEX,
1149         HV_X64_MSR_VP_RUNTIME,
1150         HV_X64_MSR_SCONTROL,
1151         HV_X64_MSR_STIMER0_CONFIG,
1152         HV_X64_MSR_VP_ASSIST_PAGE,
1153         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1154         HV_X64_MSR_TSC_EMULATION_STATUS,
1155
1156         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1157         MSR_KVM_PV_EOI_EN,
1158
1159         MSR_IA32_TSC_ADJUST,
1160         MSR_IA32_TSCDEADLINE,
1161         MSR_IA32_MISC_ENABLE,
1162         MSR_IA32_MCG_STATUS,
1163         MSR_IA32_MCG_CTL,
1164         MSR_IA32_MCG_EXT_CTL,
1165         MSR_IA32_SMBASE,
1166         MSR_SMI_COUNT,
1167         MSR_PLATFORM_INFO,
1168         MSR_MISC_FEATURES_ENABLES,
1169         MSR_AMD64_VIRT_SPEC_CTRL,
1170 };
1171
1172 static unsigned num_emulated_msrs;
1173
1174 /*
1175  * List of msr numbers which are used to expose MSR-based features that
1176  * can be used by a hypervisor to validate requested CPU features.
1177  */
1178 static u32 msr_based_features[] = {
1179         MSR_IA32_VMX_BASIC,
1180         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1181         MSR_IA32_VMX_PINBASED_CTLS,
1182         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1183         MSR_IA32_VMX_PROCBASED_CTLS,
1184         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1185         MSR_IA32_VMX_EXIT_CTLS,
1186         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1187         MSR_IA32_VMX_ENTRY_CTLS,
1188         MSR_IA32_VMX_MISC,
1189         MSR_IA32_VMX_CR0_FIXED0,
1190         MSR_IA32_VMX_CR0_FIXED1,
1191         MSR_IA32_VMX_CR4_FIXED0,
1192         MSR_IA32_VMX_CR4_FIXED1,
1193         MSR_IA32_VMX_VMCS_ENUM,
1194         MSR_IA32_VMX_PROCBASED_CTLS2,
1195         MSR_IA32_VMX_EPT_VPID_CAP,
1196         MSR_IA32_VMX_VMFUNC,
1197
1198         MSR_F10H_DECFG,
1199         MSR_IA32_UCODE_REV,
1200         MSR_IA32_ARCH_CAPABILITIES,
1201 };
1202
1203 static unsigned int num_msr_based_features;
1204
1205 u64 kvm_get_arch_capabilities(void)
1206 {
1207         u64 data;
1208
1209         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1210
1211         /*
1212          * If we're doing cache flushes (either "always" or "cond")
1213          * we will do one whenever the guest does a vmlaunch/vmresume.
1214          * If an outer hypervisor is doing the cache flush for us
1215          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1216          * capability to the guest too, and if EPT is disabled we're not
1217          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1218          * require a nested hypervisor to do a flush of its own.
1219          */
1220         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1221                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1222
1223         return data;
1224 }
1225 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1226
1227 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1228 {
1229         switch (msr->index) {
1230         case MSR_IA32_ARCH_CAPABILITIES:
1231                 msr->data = kvm_get_arch_capabilities();
1232                 break;
1233         case MSR_IA32_UCODE_REV:
1234                 rdmsrl_safe(msr->index, &msr->data);
1235                 break;
1236         default:
1237                 if (kvm_x86_ops->get_msr_feature(msr))
1238                         return 1;
1239         }
1240         return 0;
1241 }
1242
1243 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1244 {
1245         struct kvm_msr_entry msr;
1246         int r;
1247
1248         msr.index = index;
1249         r = kvm_get_msr_feature(&msr);
1250         if (r)
1251                 return r;
1252
1253         *data = msr.data;
1254
1255         return 0;
1256 }
1257
1258 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1259 {
1260         if (efer & efer_reserved_bits)
1261                 return false;
1262
1263         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1264                         return false;
1265
1266         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1267                         return false;
1268
1269         return true;
1270 }
1271 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1272
1273 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1274 {
1275         u64 old_efer = vcpu->arch.efer;
1276
1277         if (!kvm_valid_efer(vcpu, efer))
1278                 return 1;
1279
1280         if (is_paging(vcpu)
1281             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1282                 return 1;
1283
1284         efer &= ~EFER_LMA;
1285         efer |= vcpu->arch.efer & EFER_LMA;
1286
1287         kvm_x86_ops->set_efer(vcpu, efer);
1288
1289         /* Update reserved bits */
1290         if ((efer ^ old_efer) & EFER_NX)
1291                 kvm_mmu_reset_context(vcpu);
1292
1293         return 0;
1294 }
1295
1296 void kvm_enable_efer_bits(u64 mask)
1297 {
1298        efer_reserved_bits &= ~mask;
1299 }
1300 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1301
1302 /*
1303  * Writes msr value into into the appropriate "register".
1304  * Returns 0 on success, non-0 otherwise.
1305  * Assumes vcpu_load() was already called.
1306  */
1307 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1308 {
1309         switch (msr->index) {
1310         case MSR_FS_BASE:
1311         case MSR_GS_BASE:
1312         case MSR_KERNEL_GS_BASE:
1313         case MSR_CSTAR:
1314         case MSR_LSTAR:
1315                 if (is_noncanonical_address(msr->data, vcpu))
1316                         return 1;
1317                 break;
1318         case MSR_IA32_SYSENTER_EIP:
1319         case MSR_IA32_SYSENTER_ESP:
1320                 /*
1321                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1322                  * non-canonical address is written on Intel but not on
1323                  * AMD (which ignores the top 32-bits, because it does
1324                  * not implement 64-bit SYSENTER).
1325                  *
1326                  * 64-bit code should hence be able to write a non-canonical
1327                  * value on AMD.  Making the address canonical ensures that
1328                  * vmentry does not fail on Intel after writing a non-canonical
1329                  * value, and that something deterministic happens if the guest
1330                  * invokes 64-bit SYSENTER.
1331                  */
1332                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1333         }
1334         return kvm_x86_ops->set_msr(vcpu, msr);
1335 }
1336 EXPORT_SYMBOL_GPL(kvm_set_msr);
1337
1338 /*
1339  * Adapt set_msr() to msr_io()'s calling convention
1340  */
1341 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1342 {
1343         struct msr_data msr;
1344         int r;
1345
1346         msr.index = index;
1347         msr.host_initiated = true;
1348         r = kvm_get_msr(vcpu, &msr);
1349         if (r)
1350                 return r;
1351
1352         *data = msr.data;
1353         return 0;
1354 }
1355
1356 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1357 {
1358         struct msr_data msr;
1359
1360         msr.data = *data;
1361         msr.index = index;
1362         msr.host_initiated = true;
1363         return kvm_set_msr(vcpu, &msr);
1364 }
1365
1366 #ifdef CONFIG_X86_64
1367 struct pvclock_gtod_data {
1368         seqcount_t      seq;
1369
1370         struct { /* extract of a clocksource struct */
1371                 int vclock_mode;
1372                 u64     cycle_last;
1373                 u64     mask;
1374                 u32     mult;
1375                 u32     shift;
1376         } clock;
1377
1378         u64             boot_ns;
1379         u64             nsec_base;
1380         u64             wall_time_sec;
1381 };
1382
1383 static struct pvclock_gtod_data pvclock_gtod_data;
1384
1385 static void update_pvclock_gtod(struct timekeeper *tk)
1386 {
1387         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1388         u64 boot_ns;
1389
1390         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1391
1392         write_seqcount_begin(&vdata->seq);
1393
1394         /* copy pvclock gtod data */
1395         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1396         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1397         vdata->clock.mask               = tk->tkr_mono.mask;
1398         vdata->clock.mult               = tk->tkr_mono.mult;
1399         vdata->clock.shift              = tk->tkr_mono.shift;
1400
1401         vdata->boot_ns                  = boot_ns;
1402         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1403
1404         vdata->wall_time_sec            = tk->xtime_sec;
1405
1406         write_seqcount_end(&vdata->seq);
1407 }
1408 #endif
1409
1410 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1411 {
1412         /*
1413          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1414          * vcpu_enter_guest.  This function is only called from
1415          * the physical CPU that is running vcpu.
1416          */
1417         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1418 }
1419
1420 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1421 {
1422         int version;
1423         int r;
1424         struct pvclock_wall_clock wc;
1425         struct timespec64 boot;
1426
1427         if (!wall_clock)
1428                 return;
1429
1430         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1431         if (r)
1432                 return;
1433
1434         if (version & 1)
1435                 ++version;  /* first time write, random junk */
1436
1437         ++version;
1438
1439         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1440                 return;
1441
1442         /*
1443          * The guest calculates current wall clock time by adding
1444          * system time (updated by kvm_guest_time_update below) to the
1445          * wall clock specified here.  guest system time equals host
1446          * system time for us, thus we must fill in host boot time here.
1447          */
1448         getboottime64(&boot);
1449
1450         if (kvm->arch.kvmclock_offset) {
1451                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1452                 boot = timespec64_sub(boot, ts);
1453         }
1454         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1455         wc.nsec = boot.tv_nsec;
1456         wc.version = version;
1457
1458         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1459
1460         version++;
1461         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1462 }
1463
1464 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1465 {
1466         do_shl32_div32(dividend, divisor);
1467         return dividend;
1468 }
1469
1470 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1471                                s8 *pshift, u32 *pmultiplier)
1472 {
1473         uint64_t scaled64;
1474         int32_t  shift = 0;
1475         uint64_t tps64;
1476         uint32_t tps32;
1477
1478         tps64 = base_hz;
1479         scaled64 = scaled_hz;
1480         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1481                 tps64 >>= 1;
1482                 shift--;
1483         }
1484
1485         tps32 = (uint32_t)tps64;
1486         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1487                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1488                         scaled64 >>= 1;
1489                 else
1490                         tps32 <<= 1;
1491                 shift++;
1492         }
1493
1494         *pshift = shift;
1495         *pmultiplier = div_frac(scaled64, tps32);
1496
1497         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1498                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1499 }
1500
1501 #ifdef CONFIG_X86_64
1502 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1503 #endif
1504
1505 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1506 static unsigned long max_tsc_khz;
1507
1508 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1509 {
1510         u64 v = (u64)khz * (1000000 + ppm);
1511         do_div(v, 1000000);
1512         return v;
1513 }
1514
1515 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1516 {
1517         u64 ratio;
1518
1519         /* Guest TSC same frequency as host TSC? */
1520         if (!scale) {
1521                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1522                 return 0;
1523         }
1524
1525         /* TSC scaling supported? */
1526         if (!kvm_has_tsc_control) {
1527                 if (user_tsc_khz > tsc_khz) {
1528                         vcpu->arch.tsc_catchup = 1;
1529                         vcpu->arch.tsc_always_catchup = 1;
1530                         return 0;
1531                 } else {
1532                         WARN(1, "user requested TSC rate below hardware speed\n");
1533                         return -1;
1534                 }
1535         }
1536
1537         /* TSC scaling required  - calculate ratio */
1538         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1539                                 user_tsc_khz, tsc_khz);
1540
1541         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1542                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1543                           user_tsc_khz);
1544                 return -1;
1545         }
1546
1547         vcpu->arch.tsc_scaling_ratio = ratio;
1548         return 0;
1549 }
1550
1551 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1552 {
1553         u32 thresh_lo, thresh_hi;
1554         int use_scaling = 0;
1555
1556         /* tsc_khz can be zero if TSC calibration fails */
1557         if (user_tsc_khz == 0) {
1558                 /* set tsc_scaling_ratio to a safe value */
1559                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1560                 return -1;
1561         }
1562
1563         /* Compute a scale to convert nanoseconds in TSC cycles */
1564         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1565                            &vcpu->arch.virtual_tsc_shift,
1566                            &vcpu->arch.virtual_tsc_mult);
1567         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1568
1569         /*
1570          * Compute the variation in TSC rate which is acceptable
1571          * within the range of tolerance and decide if the
1572          * rate being applied is within that bounds of the hardware
1573          * rate.  If so, no scaling or compensation need be done.
1574          */
1575         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1576         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1577         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1578                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1579                 use_scaling = 1;
1580         }
1581         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1582 }
1583
1584 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1585 {
1586         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1587                                       vcpu->arch.virtual_tsc_mult,
1588                                       vcpu->arch.virtual_tsc_shift);
1589         tsc += vcpu->arch.this_tsc_write;
1590         return tsc;
1591 }
1592
1593 static inline int gtod_is_based_on_tsc(int mode)
1594 {
1595         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1596 }
1597
1598 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1599 {
1600 #ifdef CONFIG_X86_64
1601         bool vcpus_matched;
1602         struct kvm_arch *ka = &vcpu->kvm->arch;
1603         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1604
1605         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1606                          atomic_read(&vcpu->kvm->online_vcpus));
1607
1608         /*
1609          * Once the masterclock is enabled, always perform request in
1610          * order to update it.
1611          *
1612          * In order to enable masterclock, the host clocksource must be TSC
1613          * and the vcpus need to have matched TSCs.  When that happens,
1614          * perform request to enable masterclock.
1615          */
1616         if (ka->use_master_clock ||
1617             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1618                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1619
1620         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1621                             atomic_read(&vcpu->kvm->online_vcpus),
1622                             ka->use_master_clock, gtod->clock.vclock_mode);
1623 #endif
1624 }
1625
1626 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1627 {
1628         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1629         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1630 }
1631
1632 /*
1633  * Multiply tsc by a fixed point number represented by ratio.
1634  *
1635  * The most significant 64-N bits (mult) of ratio represent the
1636  * integral part of the fixed point number; the remaining N bits
1637  * (frac) represent the fractional part, ie. ratio represents a fixed
1638  * point number (mult + frac * 2^(-N)).
1639  *
1640  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1641  */
1642 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1643 {
1644         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1645 }
1646
1647 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1648 {
1649         u64 _tsc = tsc;
1650         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1651
1652         if (ratio != kvm_default_tsc_scaling_ratio)
1653                 _tsc = __scale_tsc(ratio, tsc);
1654
1655         return _tsc;
1656 }
1657 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1658
1659 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1660 {
1661         u64 tsc;
1662
1663         tsc = kvm_scale_tsc(vcpu, rdtsc());
1664
1665         return target_tsc - tsc;
1666 }
1667
1668 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1669 {
1670         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1671
1672         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1673 }
1674 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1675
1676 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1677 {
1678         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1679 }
1680
1681 static inline bool kvm_check_tsc_unstable(void)
1682 {
1683 #ifdef CONFIG_X86_64
1684         /*
1685          * TSC is marked unstable when we're running on Hyper-V,
1686          * 'TSC page' clocksource is good.
1687          */
1688         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1689                 return false;
1690 #endif
1691         return check_tsc_unstable();
1692 }
1693
1694 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1695 {
1696         struct kvm *kvm = vcpu->kvm;
1697         u64 offset, ns, elapsed;
1698         unsigned long flags;
1699         bool matched;
1700         bool already_matched;
1701         u64 data = msr->data;
1702         bool synchronizing = false;
1703
1704         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1705         offset = kvm_compute_tsc_offset(vcpu, data);
1706         ns = ktime_get_boot_ns();
1707         elapsed = ns - kvm->arch.last_tsc_nsec;
1708
1709         if (vcpu->arch.virtual_tsc_khz) {
1710                 if (data == 0 && msr->host_initiated) {
1711                         /*
1712                          * detection of vcpu initialization -- need to sync
1713                          * with other vCPUs. This particularly helps to keep
1714                          * kvm_clock stable after CPU hotplug
1715                          */
1716                         synchronizing = true;
1717                 } else {
1718                         u64 tsc_exp = kvm->arch.last_tsc_write +
1719                                                 nsec_to_cycles(vcpu, elapsed);
1720                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1721                         /*
1722                          * Special case: TSC write with a small delta (1 second)
1723                          * of virtual cycle time against real time is
1724                          * interpreted as an attempt to synchronize the CPU.
1725                          */
1726                         synchronizing = data < tsc_exp + tsc_hz &&
1727                                         data + tsc_hz > tsc_exp;
1728                 }
1729         }
1730
1731         /*
1732          * For a reliable TSC, we can match TSC offsets, and for an unstable
1733          * TSC, we add elapsed time in this computation.  We could let the
1734          * compensation code attempt to catch up if we fall behind, but
1735          * it's better to try to match offsets from the beginning.
1736          */
1737         if (synchronizing &&
1738             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1739                 if (!kvm_check_tsc_unstable()) {
1740                         offset = kvm->arch.cur_tsc_offset;
1741                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1742                 } else {
1743                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1744                         data += delta;
1745                         offset = kvm_compute_tsc_offset(vcpu, data);
1746                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1747                 }
1748                 matched = true;
1749                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1750         } else {
1751                 /*
1752                  * We split periods of matched TSC writes into generations.
1753                  * For each generation, we track the original measured
1754                  * nanosecond time, offset, and write, so if TSCs are in
1755                  * sync, we can match exact offset, and if not, we can match
1756                  * exact software computation in compute_guest_tsc()
1757                  *
1758                  * These values are tracked in kvm->arch.cur_xxx variables.
1759                  */
1760                 kvm->arch.cur_tsc_generation++;
1761                 kvm->arch.cur_tsc_nsec = ns;
1762                 kvm->arch.cur_tsc_write = data;
1763                 kvm->arch.cur_tsc_offset = offset;
1764                 matched = false;
1765                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1766                          kvm->arch.cur_tsc_generation, data);
1767         }
1768
1769         /*
1770          * We also track th most recent recorded KHZ, write and time to
1771          * allow the matching interval to be extended at each write.
1772          */
1773         kvm->arch.last_tsc_nsec = ns;
1774         kvm->arch.last_tsc_write = data;
1775         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1776
1777         vcpu->arch.last_guest_tsc = data;
1778
1779         /* Keep track of which generation this VCPU has synchronized to */
1780         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1781         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1782         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1783
1784         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1785                 update_ia32_tsc_adjust_msr(vcpu, offset);
1786
1787         kvm_vcpu_write_tsc_offset(vcpu, offset);
1788         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1789
1790         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1791         if (!matched) {
1792                 kvm->arch.nr_vcpus_matched_tsc = 0;
1793         } else if (!already_matched) {
1794                 kvm->arch.nr_vcpus_matched_tsc++;
1795         }
1796
1797         kvm_track_tsc_matching(vcpu);
1798         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1799 }
1800
1801 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1802
1803 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1804                                            s64 adjustment)
1805 {
1806         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1807         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1808 }
1809
1810 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1811 {
1812         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1813                 WARN_ON(adjustment < 0);
1814         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1815         adjust_tsc_offset_guest(vcpu, adjustment);
1816 }
1817
1818 #ifdef CONFIG_X86_64
1819
1820 static u64 read_tsc(void)
1821 {
1822         u64 ret = (u64)rdtsc_ordered();
1823         u64 last = pvclock_gtod_data.clock.cycle_last;
1824
1825         if (likely(ret >= last))
1826                 return ret;
1827
1828         /*
1829          * GCC likes to generate cmov here, but this branch is extremely
1830          * predictable (it's just a function of time and the likely is
1831          * very likely) and there's a data dependence, so force GCC
1832          * to generate a branch instead.  I don't barrier() because
1833          * we don't actually need a barrier, and if this function
1834          * ever gets inlined it will generate worse code.
1835          */
1836         asm volatile ("");
1837         return last;
1838 }
1839
1840 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1841 {
1842         long v;
1843         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1844         u64 tsc_pg_val;
1845
1846         switch (gtod->clock.vclock_mode) {
1847         case VCLOCK_HVCLOCK:
1848                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1849                                                   tsc_timestamp);
1850                 if (tsc_pg_val != U64_MAX) {
1851                         /* TSC page valid */
1852                         *mode = VCLOCK_HVCLOCK;
1853                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1854                                 gtod->clock.mask;
1855                 } else {
1856                         /* TSC page invalid */
1857                         *mode = VCLOCK_NONE;
1858                 }
1859                 break;
1860         case VCLOCK_TSC:
1861                 *mode = VCLOCK_TSC;
1862                 *tsc_timestamp = read_tsc();
1863                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1864                         gtod->clock.mask;
1865                 break;
1866         default:
1867                 *mode = VCLOCK_NONE;
1868         }
1869
1870         if (*mode == VCLOCK_NONE)
1871                 *tsc_timestamp = v = 0;
1872
1873         return v * gtod->clock.mult;
1874 }
1875
1876 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1877 {
1878         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1879         unsigned long seq;
1880         int mode;
1881         u64 ns;
1882
1883         do {
1884                 seq = read_seqcount_begin(&gtod->seq);
1885                 ns = gtod->nsec_base;
1886                 ns += vgettsc(tsc_timestamp, &mode);
1887                 ns >>= gtod->clock.shift;
1888                 ns += gtod->boot_ns;
1889         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1890         *t = ns;
1891
1892         return mode;
1893 }
1894
1895 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1896 {
1897         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1898         unsigned long seq;
1899         int mode;
1900         u64 ns;
1901
1902         do {
1903                 seq = read_seqcount_begin(&gtod->seq);
1904                 ts->tv_sec = gtod->wall_time_sec;
1905                 ns = gtod->nsec_base;
1906                 ns += vgettsc(tsc_timestamp, &mode);
1907                 ns >>= gtod->clock.shift;
1908         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1909
1910         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1911         ts->tv_nsec = ns;
1912
1913         return mode;
1914 }
1915
1916 /* returns true if host is using TSC based clocksource */
1917 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1918 {
1919         /* checked again under seqlock below */
1920         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1921                 return false;
1922
1923         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1924                                                       tsc_timestamp));
1925 }
1926
1927 /* returns true if host is using TSC based clocksource */
1928 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1929                                            u64 *tsc_timestamp)
1930 {
1931         /* checked again under seqlock below */
1932         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1933                 return false;
1934
1935         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1936 }
1937 #endif
1938
1939 /*
1940  *
1941  * Assuming a stable TSC across physical CPUS, and a stable TSC
1942  * across virtual CPUs, the following condition is possible.
1943  * Each numbered line represents an event visible to both
1944  * CPUs at the next numbered event.
1945  *
1946  * "timespecX" represents host monotonic time. "tscX" represents
1947  * RDTSC value.
1948  *
1949  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1950  *
1951  * 1.  read timespec0,tsc0
1952  * 2.                                   | timespec1 = timespec0 + N
1953  *                                      | tsc1 = tsc0 + M
1954  * 3. transition to guest               | transition to guest
1955  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1956  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1957  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1958  *
1959  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1960  *
1961  *      - ret0 < ret1
1962  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1963  *              ...
1964  *      - 0 < N - M => M < N
1965  *
1966  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1967  * always the case (the difference between two distinct xtime instances
1968  * might be smaller then the difference between corresponding TSC reads,
1969  * when updating guest vcpus pvclock areas).
1970  *
1971  * To avoid that problem, do not allow visibility of distinct
1972  * system_timestamp/tsc_timestamp values simultaneously: use a master
1973  * copy of host monotonic time values. Update that master copy
1974  * in lockstep.
1975  *
1976  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1977  *
1978  */
1979
1980 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1981 {
1982 #ifdef CONFIG_X86_64
1983         struct kvm_arch *ka = &kvm->arch;
1984         int vclock_mode;
1985         bool host_tsc_clocksource, vcpus_matched;
1986
1987         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1988                         atomic_read(&kvm->online_vcpus));
1989
1990         /*
1991          * If the host uses TSC clock, then passthrough TSC as stable
1992          * to the guest.
1993          */
1994         host_tsc_clocksource = kvm_get_time_and_clockread(
1995                                         &ka->master_kernel_ns,
1996                                         &ka->master_cycle_now);
1997
1998         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1999                                 && !ka->backwards_tsc_observed
2000                                 && !ka->boot_vcpu_runs_old_kvmclock;
2001
2002         if (ka->use_master_clock)
2003                 atomic_set(&kvm_guest_has_master_clock, 1);
2004
2005         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2006         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2007                                         vcpus_matched);
2008 #endif
2009 }
2010
2011 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2012 {
2013         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2014 }
2015
2016 static void kvm_gen_update_masterclock(struct kvm *kvm)
2017 {
2018 #ifdef CONFIG_X86_64
2019         int i;
2020         struct kvm_vcpu *vcpu;
2021         struct kvm_arch *ka = &kvm->arch;
2022
2023         spin_lock(&ka->pvclock_gtod_sync_lock);
2024         kvm_make_mclock_inprogress_request(kvm);
2025         /* no guest entries from this point */
2026         pvclock_update_vm_gtod_copy(kvm);
2027
2028         kvm_for_each_vcpu(i, vcpu, kvm)
2029                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2030
2031         /* guest entries allowed */
2032         kvm_for_each_vcpu(i, vcpu, kvm)
2033                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2034
2035         spin_unlock(&ka->pvclock_gtod_sync_lock);
2036 #endif
2037 }
2038
2039 u64 get_kvmclock_ns(struct kvm *kvm)
2040 {
2041         struct kvm_arch *ka = &kvm->arch;
2042         struct pvclock_vcpu_time_info hv_clock;
2043         u64 ret;
2044
2045         spin_lock(&ka->pvclock_gtod_sync_lock);
2046         if (!ka->use_master_clock) {
2047                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2048                 return ktime_get_boot_ns() + ka->kvmclock_offset;
2049         }
2050
2051         hv_clock.tsc_timestamp = ka->master_cycle_now;
2052         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2053         spin_unlock(&ka->pvclock_gtod_sync_lock);
2054
2055         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2056         get_cpu();
2057
2058         if (__this_cpu_read(cpu_tsc_khz)) {
2059                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2060                                    &hv_clock.tsc_shift,
2061                                    &hv_clock.tsc_to_system_mul);
2062                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2063         } else
2064                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2065
2066         put_cpu();
2067
2068         return ret;
2069 }
2070
2071 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2072 {
2073         struct kvm_vcpu_arch *vcpu = &v->arch;
2074         struct pvclock_vcpu_time_info guest_hv_clock;
2075
2076         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2077                 &guest_hv_clock, sizeof(guest_hv_clock))))
2078                 return;
2079
2080         /* This VCPU is paused, but it's legal for a guest to read another
2081          * VCPU's kvmclock, so we really have to follow the specification where
2082          * it says that version is odd if data is being modified, and even after
2083          * it is consistent.
2084          *
2085          * Version field updates must be kept separate.  This is because
2086          * kvm_write_guest_cached might use a "rep movs" instruction, and
2087          * writes within a string instruction are weakly ordered.  So there
2088          * are three writes overall.
2089          *
2090          * As a small optimization, only write the version field in the first
2091          * and third write.  The vcpu->pv_time cache is still valid, because the
2092          * version field is the first in the struct.
2093          */
2094         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2095
2096         if (guest_hv_clock.version & 1)
2097                 ++guest_hv_clock.version;  /* first time write, random junk */
2098
2099         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2100         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2101                                 &vcpu->hv_clock,
2102                                 sizeof(vcpu->hv_clock.version));
2103
2104         smp_wmb();
2105
2106         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2107         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2108
2109         if (vcpu->pvclock_set_guest_stopped_request) {
2110                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2111                 vcpu->pvclock_set_guest_stopped_request = false;
2112         }
2113
2114         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2115
2116         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2117                                 &vcpu->hv_clock,
2118                                 sizeof(vcpu->hv_clock));
2119
2120         smp_wmb();
2121
2122         vcpu->hv_clock.version++;
2123         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2124                                 &vcpu->hv_clock,
2125                                 sizeof(vcpu->hv_clock.version));
2126 }
2127
2128 static int kvm_guest_time_update(struct kvm_vcpu *v)
2129 {
2130         unsigned long flags, tgt_tsc_khz;
2131         struct kvm_vcpu_arch *vcpu = &v->arch;
2132         struct kvm_arch *ka = &v->kvm->arch;
2133         s64 kernel_ns;
2134         u64 tsc_timestamp, host_tsc;
2135         u8 pvclock_flags;
2136         bool use_master_clock;
2137
2138         kernel_ns = 0;
2139         host_tsc = 0;
2140
2141         /*
2142          * If the host uses TSC clock, then passthrough TSC as stable
2143          * to the guest.
2144          */
2145         spin_lock(&ka->pvclock_gtod_sync_lock);
2146         use_master_clock = ka->use_master_clock;
2147         if (use_master_clock) {
2148                 host_tsc = ka->master_cycle_now;
2149                 kernel_ns = ka->master_kernel_ns;
2150         }
2151         spin_unlock(&ka->pvclock_gtod_sync_lock);
2152
2153         /* Keep irq disabled to prevent changes to the clock */
2154         local_irq_save(flags);
2155         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2156         if (unlikely(tgt_tsc_khz == 0)) {
2157                 local_irq_restore(flags);
2158                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2159                 return 1;
2160         }
2161         if (!use_master_clock) {
2162                 host_tsc = rdtsc();
2163                 kernel_ns = ktime_get_boot_ns();
2164         }
2165
2166         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2167
2168         /*
2169          * We may have to catch up the TSC to match elapsed wall clock
2170          * time for two reasons, even if kvmclock is used.
2171          *   1) CPU could have been running below the maximum TSC rate
2172          *   2) Broken TSC compensation resets the base at each VCPU
2173          *      entry to avoid unknown leaps of TSC even when running
2174          *      again on the same CPU.  This may cause apparent elapsed
2175          *      time to disappear, and the guest to stand still or run
2176          *      very slowly.
2177          */
2178         if (vcpu->tsc_catchup) {
2179                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2180                 if (tsc > tsc_timestamp) {
2181                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2182                         tsc_timestamp = tsc;
2183                 }
2184         }
2185
2186         local_irq_restore(flags);
2187
2188         /* With all the info we got, fill in the values */
2189
2190         if (kvm_has_tsc_control)
2191                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2192
2193         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2194                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2195                                    &vcpu->hv_clock.tsc_shift,
2196                                    &vcpu->hv_clock.tsc_to_system_mul);
2197                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2198         }
2199
2200         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2201         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2202         vcpu->last_guest_tsc = tsc_timestamp;
2203
2204         /* If the host uses TSC clocksource, then it is stable */
2205         pvclock_flags = 0;
2206         if (use_master_clock)
2207                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2208
2209         vcpu->hv_clock.flags = pvclock_flags;
2210
2211         if (vcpu->pv_time_enabled)
2212                 kvm_setup_pvclock_page(v);
2213         if (v == kvm_get_vcpu(v->kvm, 0))
2214                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2215         return 0;
2216 }
2217
2218 /*
2219  * kvmclock updates which are isolated to a given vcpu, such as
2220  * vcpu->cpu migration, should not allow system_timestamp from
2221  * the rest of the vcpus to remain static. Otherwise ntp frequency
2222  * correction applies to one vcpu's system_timestamp but not
2223  * the others.
2224  *
2225  * So in those cases, request a kvmclock update for all vcpus.
2226  * We need to rate-limit these requests though, as they can
2227  * considerably slow guests that have a large number of vcpus.
2228  * The time for a remote vcpu to update its kvmclock is bound
2229  * by the delay we use to rate-limit the updates.
2230  */
2231
2232 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2233
2234 static void kvmclock_update_fn(struct work_struct *work)
2235 {
2236         int i;
2237         struct delayed_work *dwork = to_delayed_work(work);
2238         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2239                                            kvmclock_update_work);
2240         struct kvm *kvm = container_of(ka, struct kvm, arch);
2241         struct kvm_vcpu *vcpu;
2242
2243         kvm_for_each_vcpu(i, vcpu, kvm) {
2244                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2245                 kvm_vcpu_kick(vcpu);
2246         }
2247 }
2248
2249 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2250 {
2251         struct kvm *kvm = v->kvm;
2252
2253         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2254         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2255                                         KVMCLOCK_UPDATE_DELAY);
2256 }
2257
2258 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2259
2260 static void kvmclock_sync_fn(struct work_struct *work)
2261 {
2262         struct delayed_work *dwork = to_delayed_work(work);
2263         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2264                                            kvmclock_sync_work);
2265         struct kvm *kvm = container_of(ka, struct kvm, arch);
2266
2267         if (!kvmclock_periodic_sync)
2268                 return;
2269
2270         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2271         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2272                                         KVMCLOCK_SYNC_PERIOD);
2273 }
2274
2275 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2276 {
2277         u64 mcg_cap = vcpu->arch.mcg_cap;
2278         unsigned bank_num = mcg_cap & 0xff;
2279         u32 msr = msr_info->index;
2280         u64 data = msr_info->data;
2281
2282         switch (msr) {
2283         case MSR_IA32_MCG_STATUS:
2284                 vcpu->arch.mcg_status = data;
2285                 break;
2286         case MSR_IA32_MCG_CTL:
2287                 if (!(mcg_cap & MCG_CTL_P) &&
2288                     (data || !msr_info->host_initiated))
2289                         return 1;
2290                 if (data != 0 && data != ~(u64)0)
2291                         return 1;
2292                 vcpu->arch.mcg_ctl = data;
2293                 break;
2294         default:
2295                 if (msr >= MSR_IA32_MC0_CTL &&
2296                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2297                         u32 offset = msr - MSR_IA32_MC0_CTL;
2298                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2299                          * some Linux kernels though clear bit 10 in bank 4 to
2300                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2301                          * this to avoid an uncatched #GP in the guest
2302                          */
2303                         if ((offset & 0x3) == 0 &&
2304                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2305                                 return -1;
2306                         if (!msr_info->host_initiated &&
2307                                 (offset & 0x3) == 1 && data != 0)
2308                                 return -1;
2309                         vcpu->arch.mce_banks[offset] = data;
2310                         break;
2311                 }
2312                 return 1;
2313         }
2314         return 0;
2315 }
2316
2317 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2318 {
2319         struct kvm *kvm = vcpu->kvm;
2320         int lm = is_long_mode(vcpu);
2321         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2322                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2323         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2324                 : kvm->arch.xen_hvm_config.blob_size_32;
2325         u32 page_num = data & ~PAGE_MASK;
2326         u64 page_addr = data & PAGE_MASK;
2327         u8 *page;
2328         int r;
2329
2330         r = -E2BIG;
2331         if (page_num >= blob_size)
2332                 goto out;
2333         r = -ENOMEM;
2334         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2335         if (IS_ERR(page)) {
2336                 r = PTR_ERR(page);
2337                 goto out;
2338         }
2339         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2340                 goto out_free;
2341         r = 0;
2342 out_free:
2343         kfree(page);
2344 out:
2345         return r;
2346 }
2347
2348 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2349 {
2350         gpa_t gpa = data & ~0x3f;
2351
2352         /* Bits 3:5 are reserved, Should be zero */
2353         if (data & 0x38)
2354                 return 1;
2355
2356         vcpu->arch.apf.msr_val = data;
2357
2358         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2359                 kvm_clear_async_pf_completion_queue(vcpu);
2360                 kvm_async_pf_hash_reset(vcpu);
2361                 return 0;
2362         }
2363
2364         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2365                                         sizeof(u32)))
2366                 return 1;
2367
2368         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2369         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2370         kvm_async_pf_wakeup_all(vcpu);
2371         return 0;
2372 }
2373
2374 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2375 {
2376         vcpu->arch.pv_time_enabled = false;
2377 }
2378
2379 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2380 {
2381         ++vcpu->stat.tlb_flush;
2382         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2383 }
2384
2385 static void record_steal_time(struct kvm_vcpu *vcpu)
2386 {
2387         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2388                 return;
2389
2390         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2391                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2392                 return;
2393
2394         /*
2395          * Doing a TLB flush here, on the guest's behalf, can avoid
2396          * expensive IPIs.
2397          */
2398         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2399                 kvm_vcpu_flush_tlb(vcpu, false);
2400
2401         if (vcpu->arch.st.steal.version & 1)
2402                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2403
2404         vcpu->arch.st.steal.version += 1;
2405
2406         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2407                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2408
2409         smp_wmb();
2410
2411         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2412                 vcpu->arch.st.last_steal;
2413         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2414
2415         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2416                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2417
2418         smp_wmb();
2419
2420         vcpu->arch.st.steal.version += 1;
2421
2422         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2423                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2424 }
2425
2426 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2427 {
2428         bool pr = false;
2429         u32 msr = msr_info->index;
2430         u64 data = msr_info->data;
2431
2432         switch (msr) {
2433         case MSR_AMD64_NB_CFG:
2434         case MSR_IA32_UCODE_WRITE:
2435         case MSR_VM_HSAVE_PA:
2436         case MSR_AMD64_PATCH_LOADER:
2437         case MSR_AMD64_BU_CFG2:
2438         case MSR_AMD64_DC_CFG:
2439         case MSR_F15H_EX_CFG:
2440                 break;
2441
2442         case MSR_IA32_UCODE_REV:
2443                 if (msr_info->host_initiated)
2444                         vcpu->arch.microcode_version = data;
2445                 break;
2446         case MSR_EFER:
2447                 return set_efer(vcpu, data);
2448         case MSR_K7_HWCR:
2449                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2450                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2451                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2452                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2453                 if (data != 0) {
2454                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2455                                     data);
2456                         return 1;
2457                 }
2458                 break;
2459         case MSR_FAM10H_MMIO_CONF_BASE:
2460                 if (data != 0) {
2461                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2462                                     "0x%llx\n", data);
2463                         return 1;
2464                 }
2465                 break;
2466         case MSR_IA32_DEBUGCTLMSR:
2467                 if (!data) {
2468                         /* We support the non-activated case already */
2469                         break;
2470                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2471                         /* Values other than LBR and BTF are vendor-specific,
2472                            thus reserved and should throw a #GP */
2473                         return 1;
2474                 }
2475                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2476                             __func__, data);
2477                 break;
2478         case 0x200 ... 0x2ff:
2479                 return kvm_mtrr_set_msr(vcpu, msr, data);
2480         case MSR_IA32_APICBASE:
2481                 return kvm_set_apic_base(vcpu, msr_info);
2482         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2483                 return kvm_x2apic_msr_write(vcpu, msr, data);
2484         case MSR_IA32_TSCDEADLINE:
2485                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2486                 break;
2487         case MSR_IA32_TSC_ADJUST:
2488                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2489                         if (!msr_info->host_initiated) {
2490                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2491                                 adjust_tsc_offset_guest(vcpu, adj);
2492                         }
2493                         vcpu->arch.ia32_tsc_adjust_msr = data;
2494                 }
2495                 break;
2496         case MSR_IA32_MISC_ENABLE:
2497                 vcpu->arch.ia32_misc_enable_msr = data;
2498                 break;
2499         case MSR_IA32_SMBASE:
2500                 if (!msr_info->host_initiated)
2501                         return 1;
2502                 vcpu->arch.smbase = data;
2503                 break;
2504         case MSR_IA32_TSC:
2505                 kvm_write_tsc(vcpu, msr_info);
2506                 break;
2507         case MSR_SMI_COUNT:
2508                 if (!msr_info->host_initiated)
2509                         return 1;
2510                 vcpu->arch.smi_count = data;
2511                 break;
2512         case MSR_KVM_WALL_CLOCK_NEW:
2513         case MSR_KVM_WALL_CLOCK:
2514                 vcpu->kvm->arch.wall_clock = data;
2515                 kvm_write_wall_clock(vcpu->kvm, data);
2516                 break;
2517         case MSR_KVM_SYSTEM_TIME_NEW:
2518         case MSR_KVM_SYSTEM_TIME: {
2519                 struct kvm_arch *ka = &vcpu->kvm->arch;
2520
2521                 kvmclock_reset(vcpu);
2522
2523                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2524                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2525
2526                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2527                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2528
2529                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2530                 }
2531
2532                 vcpu->arch.time = data;
2533                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2534
2535                 /* we verify if the enable bit is set... */
2536                 if (!(data & 1))
2537                         break;
2538
2539                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2540                      &vcpu->arch.pv_time, data & ~1ULL,
2541                      sizeof(struct pvclock_vcpu_time_info)))
2542                         vcpu->arch.pv_time_enabled = false;
2543                 else
2544                         vcpu->arch.pv_time_enabled = true;
2545
2546                 break;
2547         }
2548         case MSR_KVM_ASYNC_PF_EN:
2549                 if (kvm_pv_enable_async_pf(vcpu, data))
2550                         return 1;
2551                 break;
2552         case MSR_KVM_STEAL_TIME:
2553
2554                 if (unlikely(!sched_info_on()))
2555                         return 1;
2556
2557                 if (data & KVM_STEAL_RESERVED_MASK)
2558                         return 1;
2559
2560                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2561                                                 data & KVM_STEAL_VALID_BITS,
2562                                                 sizeof(struct kvm_steal_time)))
2563                         return 1;
2564
2565                 vcpu->arch.st.msr_val = data;
2566
2567                 if (!(data & KVM_MSR_ENABLED))
2568                         break;
2569
2570                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2571
2572                 break;
2573         case MSR_KVM_PV_EOI_EN:
2574                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2575                         return 1;
2576                 break;
2577
2578         case MSR_IA32_MCG_CTL:
2579         case MSR_IA32_MCG_STATUS:
2580         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2581                 return set_msr_mce(vcpu, msr_info);
2582
2583         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2584         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2585                 pr = true; /* fall through */
2586         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2587         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2588                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2589                         return kvm_pmu_set_msr(vcpu, msr_info);
2590
2591                 if (pr || data != 0)
2592                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2593                                     "0x%x data 0x%llx\n", msr, data);
2594                 break;
2595         case MSR_K7_CLK_CTL:
2596                 /*
2597                  * Ignore all writes to this no longer documented MSR.
2598                  * Writes are only relevant for old K7 processors,
2599                  * all pre-dating SVM, but a recommended workaround from
2600                  * AMD for these chips. It is possible to specify the
2601                  * affected processor models on the command line, hence
2602                  * the need to ignore the workaround.
2603                  */
2604                 break;
2605         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2606         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2607         case HV_X64_MSR_CRASH_CTL:
2608         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2609         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2610         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2611         case HV_X64_MSR_TSC_EMULATION_STATUS:
2612                 return kvm_hv_set_msr_common(vcpu, msr, data,
2613                                              msr_info->host_initiated);
2614         case MSR_IA32_BBL_CR_CTL3:
2615                 /* Drop writes to this legacy MSR -- see rdmsr
2616                  * counterpart for further detail.
2617                  */
2618                 if (report_ignored_msrs)
2619                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2620                                 msr, data);
2621                 break;
2622         case MSR_AMD64_OSVW_ID_LENGTH:
2623                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2624                         return 1;
2625                 vcpu->arch.osvw.length = data;
2626                 break;
2627         case MSR_AMD64_OSVW_STATUS:
2628                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2629                         return 1;
2630                 vcpu->arch.osvw.status = data;
2631                 break;
2632         case MSR_PLATFORM_INFO:
2633                 if (!msr_info->host_initiated ||
2634                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2635                      cpuid_fault_enabled(vcpu)))
2636                         return 1;
2637                 vcpu->arch.msr_platform_info = data;
2638                 break;
2639         case MSR_MISC_FEATURES_ENABLES:
2640                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2641                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2642                      !supports_cpuid_fault(vcpu)))
2643                         return 1;
2644                 vcpu->arch.msr_misc_features_enables = data;
2645                 break;
2646         default:
2647                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2648                         return xen_hvm_config(vcpu, data);
2649                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2650                         return kvm_pmu_set_msr(vcpu, msr_info);
2651                 if (!ignore_msrs) {
2652                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2653                                     msr, data);
2654                         return 1;
2655                 } else {
2656                         if (report_ignored_msrs)
2657                                 vcpu_unimpl(vcpu,
2658                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2659                                         msr, data);
2660                         break;
2661                 }
2662         }
2663         return 0;
2664 }
2665 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2666
2667
2668 /*
2669  * Reads an msr value (of 'msr_index') into 'pdata'.
2670  * Returns 0 on success, non-0 otherwise.
2671  * Assumes vcpu_load() was already called.
2672  */
2673 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2674 {
2675         return kvm_x86_ops->get_msr(vcpu, msr);
2676 }
2677 EXPORT_SYMBOL_GPL(kvm_get_msr);
2678
2679 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2680 {
2681         u64 data;
2682         u64 mcg_cap = vcpu->arch.mcg_cap;
2683         unsigned bank_num = mcg_cap & 0xff;
2684
2685         switch (msr) {
2686         case MSR_IA32_P5_MC_ADDR:
2687         case MSR_IA32_P5_MC_TYPE:
2688                 data = 0;
2689                 break;
2690         case MSR_IA32_MCG_CAP:
2691                 data = vcpu->arch.mcg_cap;
2692                 break;
2693         case MSR_IA32_MCG_CTL:
2694                 if (!(mcg_cap & MCG_CTL_P) && !host)
2695                         return 1;
2696                 data = vcpu->arch.mcg_ctl;
2697                 break;
2698         case MSR_IA32_MCG_STATUS:
2699                 data = vcpu->arch.mcg_status;
2700                 break;
2701         default:
2702                 if (msr >= MSR_IA32_MC0_CTL &&
2703                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2704                         u32 offset = msr - MSR_IA32_MC0_CTL;
2705                         data = vcpu->arch.mce_banks[offset];
2706                         break;
2707                 }
2708                 return 1;
2709         }
2710         *pdata = data;
2711         return 0;
2712 }
2713
2714 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2715 {
2716         switch (msr_info->index) {
2717         case MSR_IA32_PLATFORM_ID:
2718         case MSR_IA32_EBL_CR_POWERON:
2719         case MSR_IA32_DEBUGCTLMSR:
2720         case MSR_IA32_LASTBRANCHFROMIP:
2721         case MSR_IA32_LASTBRANCHTOIP:
2722         case MSR_IA32_LASTINTFROMIP:
2723         case MSR_IA32_LASTINTTOIP:
2724         case MSR_K8_SYSCFG:
2725         case MSR_K8_TSEG_ADDR:
2726         case MSR_K8_TSEG_MASK:
2727         case MSR_K7_HWCR:
2728         case MSR_VM_HSAVE_PA:
2729         case MSR_K8_INT_PENDING_MSG:
2730         case MSR_AMD64_NB_CFG:
2731         case MSR_FAM10H_MMIO_CONF_BASE:
2732         case MSR_AMD64_BU_CFG2:
2733         case MSR_IA32_PERF_CTL:
2734         case MSR_AMD64_DC_CFG:
2735         case MSR_F15H_EX_CFG:
2736                 msr_info->data = 0;
2737                 break;
2738         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2739         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2740         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2741         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2742         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2743                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2744                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2745                 msr_info->data = 0;
2746                 break;
2747         case MSR_IA32_UCODE_REV:
2748                 msr_info->data = vcpu->arch.microcode_version;
2749                 break;
2750         case MSR_IA32_TSC:
2751                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2752                 break;
2753         case MSR_MTRRcap:
2754         case 0x200 ... 0x2ff:
2755                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2756         case 0xcd: /* fsb frequency */
2757                 msr_info->data = 3;
2758                 break;
2759                 /*
2760                  * MSR_EBC_FREQUENCY_ID
2761                  * Conservative value valid for even the basic CPU models.
2762                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2763                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2764                  * and 266MHz for model 3, or 4. Set Core Clock
2765                  * Frequency to System Bus Frequency Ratio to 1 (bits
2766                  * 31:24) even though these are only valid for CPU
2767                  * models > 2, however guests may end up dividing or
2768                  * multiplying by zero otherwise.
2769                  */
2770         case MSR_EBC_FREQUENCY_ID:
2771                 msr_info->data = 1 << 24;
2772                 break;
2773         case MSR_IA32_APICBASE:
2774                 msr_info->data = kvm_get_apic_base(vcpu);
2775                 break;
2776         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2777                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2778                 break;
2779         case MSR_IA32_TSCDEADLINE:
2780                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2781                 break;
2782         case MSR_IA32_TSC_ADJUST:
2783                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2784                 break;
2785         case MSR_IA32_MISC_ENABLE:
2786                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2787                 break;
2788         case MSR_IA32_SMBASE:
2789                 if (!msr_info->host_initiated)
2790                         return 1;
2791                 msr_info->data = vcpu->arch.smbase;
2792                 break;
2793         case MSR_SMI_COUNT:
2794                 msr_info->data = vcpu->arch.smi_count;
2795                 break;
2796         case MSR_IA32_PERF_STATUS:
2797                 /* TSC increment by tick */
2798                 msr_info->data = 1000ULL;
2799                 /* CPU multiplier */
2800                 msr_info->data |= (((uint64_t)4ULL) << 40);
2801                 break;
2802         case MSR_EFER:
2803                 msr_info->data = vcpu->arch.efer;
2804                 break;
2805         case MSR_KVM_WALL_CLOCK:
2806         case MSR_KVM_WALL_CLOCK_NEW:
2807                 msr_info->data = vcpu->kvm->arch.wall_clock;
2808                 break;
2809         case MSR_KVM_SYSTEM_TIME:
2810         case MSR_KVM_SYSTEM_TIME_NEW:
2811                 msr_info->data = vcpu->arch.time;
2812                 break;
2813         case MSR_KVM_ASYNC_PF_EN:
2814                 msr_info->data = vcpu->arch.apf.msr_val;
2815                 break;
2816         case MSR_KVM_STEAL_TIME:
2817                 msr_info->data = vcpu->arch.st.msr_val;
2818                 break;
2819         case MSR_KVM_PV_EOI_EN:
2820                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2821                 break;
2822         case MSR_IA32_P5_MC_ADDR:
2823         case MSR_IA32_P5_MC_TYPE:
2824         case MSR_IA32_MCG_CAP:
2825         case MSR_IA32_MCG_CTL:
2826         case MSR_IA32_MCG_STATUS:
2827         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2828                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2829                                    msr_info->host_initiated);
2830         case MSR_K7_CLK_CTL:
2831                 /*
2832                  * Provide expected ramp-up count for K7. All other
2833                  * are set to zero, indicating minimum divisors for
2834                  * every field.
2835                  *
2836                  * This prevents guest kernels on AMD host with CPU
2837                  * type 6, model 8 and higher from exploding due to
2838                  * the rdmsr failing.
2839                  */
2840                 msr_info->data = 0x20000000;
2841                 break;
2842         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2843         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2844         case HV_X64_MSR_CRASH_CTL:
2845         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2846         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2847         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2848         case HV_X64_MSR_TSC_EMULATION_STATUS:
2849                 return kvm_hv_get_msr_common(vcpu,
2850                                              msr_info->index, &msr_info->data,
2851                                              msr_info->host_initiated);
2852                 break;
2853         case MSR_IA32_BBL_CR_CTL3:
2854                 /* This legacy MSR exists but isn't fully documented in current
2855                  * silicon.  It is however accessed by winxp in very narrow
2856                  * scenarios where it sets bit #19, itself documented as
2857                  * a "reserved" bit.  Best effort attempt to source coherent
2858                  * read data here should the balance of the register be
2859                  * interpreted by the guest:
2860                  *
2861                  * L2 cache control register 3: 64GB range, 256KB size,
2862                  * enabled, latency 0x1, configured
2863                  */
2864                 msr_info->data = 0xbe702111;
2865                 break;
2866         case MSR_AMD64_OSVW_ID_LENGTH:
2867                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2868                         return 1;
2869                 msr_info->data = vcpu->arch.osvw.length;
2870                 break;
2871         case MSR_AMD64_OSVW_STATUS:
2872                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2873                         return 1;
2874                 msr_info->data = vcpu->arch.osvw.status;
2875                 break;
2876         case MSR_PLATFORM_INFO:
2877                 if (!msr_info->host_initiated &&
2878                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2879                         return 1;
2880                 msr_info->data = vcpu->arch.msr_platform_info;
2881                 break;
2882         case MSR_MISC_FEATURES_ENABLES:
2883                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2884                 break;
2885         default:
2886                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2887                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2888                 if (!ignore_msrs) {
2889                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2890                                                msr_info->index);
2891                         return 1;
2892                 } else {
2893                         if (report_ignored_msrs)
2894                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2895                                         msr_info->index);
2896                         msr_info->data = 0;
2897                 }
2898                 break;
2899         }
2900         return 0;
2901 }
2902 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2903
2904 /*
2905  * Read or write a bunch of msrs. All parameters are kernel addresses.
2906  *
2907  * @return number of msrs set successfully.
2908  */
2909 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2910                     struct kvm_msr_entry *entries,
2911                     int (*do_msr)(struct kvm_vcpu *vcpu,
2912                                   unsigned index, u64 *data))
2913 {
2914         int i;
2915
2916         for (i = 0; i < msrs->nmsrs; ++i)
2917                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2918                         break;
2919
2920         return i;
2921 }
2922
2923 /*
2924  * Read or write a bunch of msrs. Parameters are user addresses.
2925  *
2926  * @return number of msrs set successfully.
2927  */
2928 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2929                   int (*do_msr)(struct kvm_vcpu *vcpu,
2930                                 unsigned index, u64 *data),
2931                   int writeback)
2932 {
2933         struct kvm_msrs msrs;
2934         struct kvm_msr_entry *entries;
2935         int r, n;
2936         unsigned size;
2937
2938         r = -EFAULT;
2939         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2940                 goto out;
2941
2942         r = -E2BIG;
2943         if (msrs.nmsrs >= MAX_IO_MSRS)
2944                 goto out;
2945
2946         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2947         entries = memdup_user(user_msrs->entries, size);
2948         if (IS_ERR(entries)) {
2949                 r = PTR_ERR(entries);
2950                 goto out;
2951         }
2952
2953         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2954         if (r < 0)
2955                 goto out_free;
2956
2957         r = -EFAULT;
2958         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2959                 goto out_free;
2960
2961         r = n;
2962
2963 out_free:
2964         kfree(entries);
2965 out:
2966         return r;
2967 }
2968
2969 static inline bool kvm_can_mwait_in_guest(void)
2970 {
2971         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2972                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2973                 boot_cpu_has(X86_FEATURE_ARAT);
2974 }
2975
2976 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2977 {
2978         int r = 0;
2979
2980         switch (ext) {
2981         case KVM_CAP_IRQCHIP:
2982         case KVM_CAP_HLT:
2983         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2984         case KVM_CAP_SET_TSS_ADDR:
2985         case KVM_CAP_EXT_CPUID:
2986         case KVM_CAP_EXT_EMUL_CPUID:
2987         case KVM_CAP_CLOCKSOURCE:
2988         case KVM_CAP_PIT:
2989         case KVM_CAP_NOP_IO_DELAY:
2990         case KVM_CAP_MP_STATE:
2991         case KVM_CAP_SYNC_MMU:
2992         case KVM_CAP_USER_NMI:
2993         case KVM_CAP_REINJECT_CONTROL:
2994         case KVM_CAP_IRQ_INJECT_STATUS:
2995         case KVM_CAP_IOEVENTFD:
2996         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2997         case KVM_CAP_PIT2:
2998         case KVM_CAP_PIT_STATE2:
2999         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3000         case KVM_CAP_XEN_HVM:
3001         case KVM_CAP_VCPU_EVENTS:
3002         case KVM_CAP_HYPERV:
3003         case KVM_CAP_HYPERV_VAPIC:
3004         case KVM_CAP_HYPERV_SPIN:
3005         case KVM_CAP_HYPERV_SYNIC:
3006         case KVM_CAP_HYPERV_SYNIC2:
3007         case KVM_CAP_HYPERV_VP_INDEX:
3008         case KVM_CAP_HYPERV_EVENTFD:
3009         case KVM_CAP_HYPERV_TLBFLUSH:
3010         case KVM_CAP_HYPERV_SEND_IPI:
3011         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3012         case KVM_CAP_HYPERV_CPUID:
3013         case KVM_CAP_PCI_SEGMENT:
3014         case KVM_CAP_DEBUGREGS:
3015         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3016         case KVM_CAP_XSAVE:
3017         case KVM_CAP_ASYNC_PF:
3018         case KVM_CAP_GET_TSC_KHZ:
3019         case KVM_CAP_KVMCLOCK_CTRL:
3020         case KVM_CAP_READONLY_MEM:
3021         case KVM_CAP_HYPERV_TIME:
3022         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3023         case KVM_CAP_TSC_DEADLINE_TIMER:
3024         case KVM_CAP_DISABLE_QUIRKS:
3025         case KVM_CAP_SET_BOOT_CPU_ID:
3026         case KVM_CAP_SPLIT_IRQCHIP:
3027         case KVM_CAP_IMMEDIATE_EXIT:
3028         case KVM_CAP_GET_MSR_FEATURES:
3029         case KVM_CAP_MSR_PLATFORM_INFO:
3030         case KVM_CAP_EXCEPTION_PAYLOAD:
3031                 r = 1;
3032                 break;
3033         case KVM_CAP_SYNC_REGS:
3034                 r = KVM_SYNC_X86_VALID_FIELDS;
3035                 break;
3036         case KVM_CAP_ADJUST_CLOCK:
3037                 r = KVM_CLOCK_TSC_STABLE;
3038                 break;
3039         case KVM_CAP_X86_DISABLE_EXITS:
3040                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3041                 if(kvm_can_mwait_in_guest())
3042                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3043                 break;
3044         case KVM_CAP_X86_SMM:
3045                 /* SMBASE is usually relocated above 1M on modern chipsets,
3046                  * and SMM handlers might indeed rely on 4G segment limits,
3047                  * so do not report SMM to be available if real mode is
3048                  * emulated via vm86 mode.  Still, do not go to great lengths
3049                  * to avoid userspace's usage of the feature, because it is a
3050                  * fringe case that is not enabled except via specific settings
3051                  * of the module parameters.
3052                  */
3053                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3054                 break;
3055         case KVM_CAP_VAPIC:
3056                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3057                 break;
3058         case KVM_CAP_NR_VCPUS:
3059                 r = KVM_SOFT_MAX_VCPUS;
3060                 break;
3061         case KVM_CAP_MAX_VCPUS:
3062                 r = KVM_MAX_VCPUS;
3063                 break;
3064         case KVM_CAP_NR_MEMSLOTS:
3065                 r = KVM_USER_MEM_SLOTS;
3066                 break;
3067         case KVM_CAP_PV_MMU:    /* obsolete */
3068                 r = 0;
3069                 break;
3070         case KVM_CAP_MCE:
3071                 r = KVM_MAX_MCE_BANKS;
3072                 break;
3073         case KVM_CAP_XCRS:
3074                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3075                 break;
3076         case KVM_CAP_TSC_CONTROL:
3077                 r = kvm_has_tsc_control;
3078                 break;
3079         case KVM_CAP_X2APIC_API:
3080                 r = KVM_X2APIC_API_VALID_FLAGS;
3081                 break;
3082         case KVM_CAP_NESTED_STATE:
3083                 r = kvm_x86_ops->get_nested_state ?
3084                         kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
3085                 break;
3086         default:
3087                 break;
3088         }
3089         return r;
3090
3091 }
3092
3093 long kvm_arch_dev_ioctl(struct file *filp,
3094                         unsigned int ioctl, unsigned long arg)
3095 {
3096         void __user *argp = (void __user *)arg;
3097         long r;
3098
3099         switch (ioctl) {
3100         case KVM_GET_MSR_INDEX_LIST: {
3101                 struct kvm_msr_list __user *user_msr_list = argp;
3102                 struct kvm_msr_list msr_list;
3103                 unsigned n;
3104
3105                 r = -EFAULT;
3106                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3107                         goto out;
3108                 n = msr_list.nmsrs;
3109                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3110                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3111                         goto out;
3112                 r = -E2BIG;
3113                 if (n < msr_list.nmsrs)
3114                         goto out;
3115                 r = -EFAULT;
3116                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3117                                  num_msrs_to_save * sizeof(u32)))
3118                         goto out;
3119                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3120                                  &emulated_msrs,
3121                                  num_emulated_msrs * sizeof(u32)))
3122                         goto out;
3123                 r = 0;
3124                 break;
3125         }
3126         case KVM_GET_SUPPORTED_CPUID:
3127         case KVM_GET_EMULATED_CPUID: {
3128                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3129                 struct kvm_cpuid2 cpuid;
3130
3131                 r = -EFAULT;
3132                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3133                         goto out;
3134
3135                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3136                                             ioctl);
3137                 if (r)
3138                         goto out;
3139
3140                 r = -EFAULT;
3141                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3142                         goto out;
3143                 r = 0;
3144                 break;
3145         }
3146         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3147                 r = -EFAULT;
3148                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3149                                  sizeof(kvm_mce_cap_supported)))
3150                         goto out;
3151                 r = 0;
3152                 break;
3153         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3154                 struct kvm_msr_list __user *user_msr_list = argp;
3155                 struct kvm_msr_list msr_list;
3156                 unsigned int n;
3157
3158                 r = -EFAULT;
3159                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3160                         goto out;
3161                 n = msr_list.nmsrs;
3162                 msr_list.nmsrs = num_msr_based_features;
3163                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3164                         goto out;
3165                 r = -E2BIG;
3166                 if (n < msr_list.nmsrs)
3167                         goto out;
3168                 r = -EFAULT;
3169                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3170                                  num_msr_based_features * sizeof(u32)))
3171                         goto out;
3172                 r = 0;
3173                 break;
3174         }
3175         case KVM_GET_MSRS:
3176                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3177                 break;
3178         }
3179         default:
3180                 r = -EINVAL;
3181         }
3182 out:
3183         return r;
3184 }
3185
3186 static void wbinvd_ipi(void *garbage)
3187 {
3188         wbinvd();
3189 }
3190
3191 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3192 {
3193         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3194 }
3195
3196 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3197 {
3198         /* Address WBINVD may be executed by guest */
3199         if (need_emulate_wbinvd(vcpu)) {
3200                 if (kvm_x86_ops->has_wbinvd_exit())
3201                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3202                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3203                         smp_call_function_single(vcpu->cpu,
3204                                         wbinvd_ipi, NULL, 1);
3205         }
3206
3207         kvm_x86_ops->vcpu_load(vcpu, cpu);
3208
3209         /* Apply any externally detected TSC adjustments (due to suspend) */
3210         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3211                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3212                 vcpu->arch.tsc_offset_adjustment = 0;
3213                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3214         }
3215
3216         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3217                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3218                                 rdtsc() - vcpu->arch.last_host_tsc;
3219                 if (tsc_delta < 0)
3220                         mark_tsc_unstable("KVM discovered backwards TSC");
3221
3222                 if (kvm_check_tsc_unstable()) {
3223                         u64 offset = kvm_compute_tsc_offset(vcpu,
3224                                                 vcpu->arch.last_guest_tsc);
3225                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3226                         vcpu->arch.tsc_catchup = 1;
3227                 }
3228
3229                 if (kvm_lapic_hv_timer_in_use(vcpu))
3230                         kvm_lapic_restart_hv_timer(vcpu);
3231
3232                 /*
3233                  * On a host with synchronized TSC, there is no need to update
3234                  * kvmclock on vcpu->cpu migration
3235                  */
3236                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3237                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3238                 if (vcpu->cpu != cpu)
3239                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3240                 vcpu->cpu = cpu;
3241         }
3242
3243         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3244 }
3245
3246 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3247 {
3248         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3249                 return;
3250
3251         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3252
3253         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3254                         &vcpu->arch.st.steal.preempted,
3255                         offsetof(struct kvm_steal_time, preempted),
3256                         sizeof(vcpu->arch.st.steal.preempted));
3257 }
3258
3259 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3260 {
3261         int idx;
3262
3263         if (vcpu->preempted)
3264                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3265
3266         /*
3267          * Disable page faults because we're in atomic context here.
3268          * kvm_write_guest_offset_cached() would call might_fault()
3269          * that relies on pagefault_disable() to tell if there's a
3270          * bug. NOTE: the write to guest memory may not go through if
3271          * during postcopy live migration or if there's heavy guest
3272          * paging.
3273          */
3274         pagefault_disable();
3275         /*
3276          * kvm_memslots() will be called by
3277          * kvm_write_guest_offset_cached() so take the srcu lock.
3278          */
3279         idx = srcu_read_lock(&vcpu->kvm->srcu);
3280         kvm_steal_time_set_preempted(vcpu);
3281         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3282         pagefault_enable();
3283         kvm_x86_ops->vcpu_put(vcpu);
3284         vcpu->arch.last_host_tsc = rdtsc();
3285         /*
3286          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3287          * on every vmexit, but if not, we might have a stale dr6 from the
3288          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3289          */
3290         set_debugreg(0, 6);
3291 }
3292
3293 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3294                                     struct kvm_lapic_state *s)
3295 {
3296         if (vcpu->arch.apicv_active)
3297                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3298
3299         return kvm_apic_get_state(vcpu, s);
3300 }
3301
3302 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3303                                     struct kvm_lapic_state *s)
3304 {
3305         int r;
3306
3307         r = kvm_apic_set_state(vcpu, s);
3308         if (r)
3309                 return r;
3310         update_cr8_intercept(vcpu);
3311
3312         return 0;
3313 }
3314
3315 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3316 {
3317         return (!lapic_in_kernel(vcpu) ||
3318                 kvm_apic_accept_pic_intr(vcpu));
3319 }
3320
3321 /*
3322  * if userspace requested an interrupt window, check that the
3323  * interrupt window is open.
3324  *
3325  * No need to exit to userspace if we already have an interrupt queued.
3326  */
3327 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3328 {
3329         return kvm_arch_interrupt_allowed(vcpu) &&
3330                 !kvm_cpu_has_interrupt(vcpu) &&
3331                 !kvm_event_needs_reinjection(vcpu) &&
3332                 kvm_cpu_accept_dm_intr(vcpu);
3333 }
3334
3335 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3336                                     struct kvm_interrupt *irq)
3337 {
3338         if (irq->irq >= KVM_NR_INTERRUPTS)
3339                 return -EINVAL;
3340
3341         if (!irqchip_in_kernel(vcpu->kvm)) {
3342                 kvm_queue_interrupt(vcpu, irq->irq, false);
3343                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3344                 return 0;
3345         }
3346
3347         /*
3348          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3349          * fail for in-kernel 8259.
3350          */
3351         if (pic_in_kernel(vcpu->kvm))
3352                 return -ENXIO;
3353
3354         if (vcpu->arch.pending_external_vector != -1)
3355                 return -EEXIST;
3356
3357         vcpu->arch.pending_external_vector = irq->irq;
3358         kvm_make_request(KVM_REQ_EVENT, vcpu);
3359         return 0;
3360 }
3361
3362 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3363 {
3364         kvm_inject_nmi(vcpu);
3365
3366         return 0;
3367 }
3368
3369 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3370 {
3371         kvm_make_request(KVM_REQ_SMI, vcpu);
3372
3373         return 0;
3374 }
3375
3376 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3377                                            struct kvm_tpr_access_ctl *tac)
3378 {
3379         if (tac->flags)
3380                 return -EINVAL;
3381         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3382         return 0;
3383 }
3384
3385 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3386                                         u64 mcg_cap)
3387 {
3388         int r;
3389         unsigned bank_num = mcg_cap & 0xff, bank;
3390
3391         r = -EINVAL;
3392         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3393                 goto out;
3394         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3395                 goto out;
3396         r = 0;
3397         vcpu->arch.mcg_cap = mcg_cap;
3398         /* Init IA32_MCG_CTL to all 1s */
3399         if (mcg_cap & MCG_CTL_P)
3400                 vcpu->arch.mcg_ctl = ~(u64)0;
3401         /* Init IA32_MCi_CTL to all 1s */
3402         for (bank = 0; bank < bank_num; bank++)
3403                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3404
3405         if (kvm_x86_ops->setup_mce)
3406                 kvm_x86_ops->setup_mce(vcpu);
3407 out:
3408         return r;
3409 }
3410
3411 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3412                                       struct kvm_x86_mce *mce)
3413 {
3414         u64 mcg_cap = vcpu->arch.mcg_cap;
3415         unsigned bank_num = mcg_cap & 0xff;
3416         u64 *banks = vcpu->arch.mce_banks;
3417
3418         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3419                 return -EINVAL;
3420         /*
3421          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3422          * reporting is disabled
3423          */
3424         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3425             vcpu->arch.mcg_ctl != ~(u64)0)
3426                 return 0;
3427         banks += 4 * mce->bank;
3428         /*
3429          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3430          * reporting is disabled for the bank
3431          */
3432         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3433                 return 0;
3434         if (mce->status & MCI_STATUS_UC) {
3435                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3436                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3437                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3438                         return 0;
3439                 }
3440                 if (banks[1] & MCI_STATUS_VAL)
3441                         mce->status |= MCI_STATUS_OVER;
3442                 banks[2] = mce->addr;
3443                 banks[3] = mce->misc;
3444                 vcpu->arch.mcg_status = mce->mcg_status;
3445                 banks[1] = mce->status;
3446                 kvm_queue_exception(vcpu, MC_VECTOR);
3447         } else if (!(banks[1] & MCI_STATUS_VAL)
3448                    || !(banks[1] & MCI_STATUS_UC)) {
3449                 if (banks[1] & MCI_STATUS_VAL)
3450                         mce->status |= MCI_STATUS_OVER;
3451                 banks[2] = mce->addr;
3452                 banks[3] = mce->misc;
3453                 banks[1] = mce->status;
3454         } else
3455                 banks[1] |= MCI_STATUS_OVER;
3456         return 0;
3457 }
3458
3459 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3460                                                struct kvm_vcpu_events *events)
3461 {
3462         process_nmi(vcpu);
3463
3464         /*
3465          * The API doesn't provide the instruction length for software
3466          * exceptions, so don't report them. As long as the guest RIP
3467          * isn't advanced, we should expect to encounter the exception
3468          * again.
3469          */
3470         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3471                 events->exception.injected = 0;
3472                 events->exception.pending = 0;
3473         } else {
3474                 events->exception.injected = vcpu->arch.exception.injected;
3475                 events->exception.pending = vcpu->arch.exception.pending;
3476                 /*
3477                  * For ABI compatibility, deliberately conflate
3478                  * pending and injected exceptions when
3479                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3480                  */
3481                 if (!vcpu->kvm->arch.exception_payload_enabled)
3482                         events->exception.injected |=
3483                                 vcpu->arch.exception.pending;
3484         }
3485         events->exception.nr = vcpu->arch.exception.nr;
3486         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3487         events->exception.error_code = vcpu->arch.exception.error_code;
3488         events->exception_has_payload = vcpu->arch.exception.has_payload;
3489         events->exception_payload = vcpu->arch.exception.payload;
3490
3491         events->interrupt.injected =
3492                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3493         events->interrupt.nr = vcpu->arch.interrupt.nr;
3494         events->interrupt.soft = 0;
3495         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3496
3497         events->nmi.injected = vcpu->arch.nmi_injected;
3498         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3499         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3500         events->nmi.pad = 0;
3501
3502         events->sipi_vector = 0; /* never valid when reporting to user space */
3503
3504         events->smi.smm = is_smm(vcpu);
3505         events->smi.pending = vcpu->arch.smi_pending;
3506         events->smi.smm_inside_nmi =
3507                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3508         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3509
3510         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3511                          | KVM_VCPUEVENT_VALID_SHADOW
3512                          | KVM_VCPUEVENT_VALID_SMM);
3513         if (vcpu->kvm->arch.exception_payload_enabled)
3514                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3515
3516         memset(&events->reserved, 0, sizeof(events->reserved));
3517 }
3518
3519 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3520
3521 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3522                                               struct kvm_vcpu_events *events)
3523 {
3524         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3525                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3526                               | KVM_VCPUEVENT_VALID_SHADOW
3527                               | KVM_VCPUEVENT_VALID_SMM
3528                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3529                 return -EINVAL;
3530
3531         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3532                 if (!vcpu->kvm->arch.exception_payload_enabled)
3533                         return -EINVAL;
3534                 if (events->exception.pending)
3535                         events->exception.injected = 0;
3536                 else
3537                         events->exception_has_payload = 0;
3538         } else {
3539                 events->exception.pending = 0;
3540                 events->exception_has_payload = 0;
3541         }
3542
3543         if ((events->exception.injected || events->exception.pending) &&
3544             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3545                 return -EINVAL;
3546
3547         /* INITs are latched while in SMM */
3548         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3549             (events->smi.smm || events->smi.pending) &&
3550             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3551                 return -EINVAL;
3552
3553         process_nmi(vcpu);
3554         vcpu->arch.exception.injected = events->exception.injected;
3555         vcpu->arch.exception.pending = events->exception.pending;
3556         vcpu->arch.exception.nr = events->exception.nr;
3557         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3558         vcpu->arch.exception.error_code = events->exception.error_code;
3559         vcpu->arch.exception.has_payload = events->exception_has_payload;
3560         vcpu->arch.exception.payload = events->exception_payload;
3561
3562         vcpu->arch.interrupt.injected = events->interrupt.injected;
3563         vcpu->arch.interrupt.nr = events->interrupt.nr;
3564         vcpu->arch.interrupt.soft = events->interrupt.soft;
3565         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3566                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3567                                                   events->interrupt.shadow);
3568
3569         vcpu->arch.nmi_injected = events->nmi.injected;
3570         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3571                 vcpu->arch.nmi_pending = events->nmi.pending;
3572         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3573
3574         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3575             lapic_in_kernel(vcpu))
3576                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3577
3578         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3579                 u32 hflags = vcpu->arch.hflags;
3580                 if (events->smi.smm)
3581                         hflags |= HF_SMM_MASK;
3582                 else
3583                         hflags &= ~HF_SMM_MASK;
3584                 kvm_set_hflags(vcpu, hflags);
3585
3586                 vcpu->arch.smi_pending = events->smi.pending;
3587
3588                 if (events->smi.smm) {
3589                         if (events->smi.smm_inside_nmi)
3590                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3591                         else
3592                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3593                         if (lapic_in_kernel(vcpu)) {
3594                                 if (events->smi.latched_init)
3595                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3596                                 else
3597                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3598                         }
3599                 }
3600         }
3601
3602         kvm_make_request(KVM_REQ_EVENT, vcpu);
3603
3604         return 0;
3605 }
3606
3607 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3608                                              struct kvm_debugregs *dbgregs)
3609 {
3610         unsigned long val;
3611
3612         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3613         kvm_get_dr(vcpu, 6, &val);
3614         dbgregs->dr6 = val;
3615         dbgregs->dr7 = vcpu->arch.dr7;
3616         dbgregs->flags = 0;
3617         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3618 }
3619
3620 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3621                                             struct kvm_debugregs *dbgregs)
3622 {
3623         if (dbgregs->flags)
3624                 return -EINVAL;
3625
3626         if (dbgregs->dr6 & ~0xffffffffull)
3627                 return -EINVAL;
3628         if (dbgregs->dr7 & ~0xffffffffull)
3629                 return -EINVAL;
3630
3631         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3632         kvm_update_dr0123(vcpu);
3633         vcpu->arch.dr6 = dbgregs->dr6;
3634         kvm_update_dr6(vcpu);
3635         vcpu->arch.dr7 = dbgregs->dr7;
3636         kvm_update_dr7(vcpu);
3637
3638         return 0;
3639 }
3640
3641 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3642
3643 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3644 {
3645         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3646         u64 xstate_bv = xsave->header.xfeatures;
3647         u64 valid;
3648
3649         /*
3650          * Copy legacy XSAVE area, to avoid complications with CPUID
3651          * leaves 0 and 1 in the loop below.
3652          */
3653         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3654
3655         /* Set XSTATE_BV */
3656         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3657         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3658
3659         /*
3660          * Copy each region from the possibly compacted offset to the
3661          * non-compacted offset.
3662          */
3663         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3664         while (valid) {
3665                 u64 feature = valid & -valid;
3666                 int index = fls64(feature) - 1;
3667                 void *src = get_xsave_addr(xsave, feature);
3668
3669                 if (src) {
3670                         u32 size, offset, ecx, edx;
3671                         cpuid_count(XSTATE_CPUID, index,
3672                                     &size, &offset, &ecx, &edx);
3673                         if (feature == XFEATURE_MASK_PKRU)
3674                                 memcpy(dest + offset, &vcpu->arch.pkru,
3675                                        sizeof(vcpu->arch.pkru));
3676                         else
3677                                 memcpy(dest + offset, src, size);
3678
3679                 }
3680
3681                 valid -= feature;
3682         }
3683 }
3684
3685 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3686 {
3687         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3688         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3689         u64 valid;
3690
3691         /*
3692          * Copy legacy XSAVE area, to avoid complications with CPUID
3693          * leaves 0 and 1 in the loop below.
3694          */
3695         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3696
3697         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3698         xsave->header.xfeatures = xstate_bv;
3699         if (boot_cpu_has(X86_FEATURE_XSAVES))
3700                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3701
3702         /*
3703          * Copy each region from the non-compacted offset to the
3704          * possibly compacted offset.
3705          */
3706         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3707         while (valid) {
3708                 u64 feature = valid & -valid;
3709                 int index = fls64(feature) - 1;
3710                 void *dest = get_xsave_addr(xsave, feature);
3711
3712                 if (dest) {
3713                         u32 size, offset, ecx, edx;
3714                         cpuid_count(XSTATE_CPUID, index,
3715                                     &size, &offset, &ecx, &edx);
3716                         if (feature == XFEATURE_MASK_PKRU)
3717                                 memcpy(&vcpu->arch.pkru, src + offset,
3718                                        sizeof(vcpu->arch.pkru));
3719                         else
3720                                 memcpy(dest, src + offset, size);
3721                 }
3722
3723                 valid -= feature;
3724         }
3725 }
3726
3727 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3728                                          struct kvm_xsave *guest_xsave)
3729 {
3730         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3731                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3732                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3733         } else {
3734                 memcpy(guest_xsave->region,
3735                         &vcpu->arch.guest_fpu->state.fxsave,
3736                         sizeof(struct fxregs_state));
3737                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3738                         XFEATURE_MASK_FPSSE;
3739         }
3740 }
3741
3742 #define XSAVE_MXCSR_OFFSET 24
3743
3744 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3745                                         struct kvm_xsave *guest_xsave)
3746 {
3747         u64 xstate_bv =
3748                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3749         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3750
3751         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3752                 /*
3753                  * Here we allow setting states that are not present in
3754                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3755                  * with old userspace.
3756                  */
3757                 if (xstate_bv & ~kvm_supported_xcr0() ||
3758                         mxcsr & ~mxcsr_feature_mask)
3759                         return -EINVAL;
3760                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3761         } else {
3762                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3763                         mxcsr & ~mxcsr_feature_mask)
3764                         return -EINVAL;
3765                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3766                         guest_xsave->region, sizeof(struct fxregs_state));
3767         }
3768         return 0;
3769 }
3770
3771 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3772                                         struct kvm_xcrs *guest_xcrs)
3773 {
3774         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3775                 guest_xcrs->nr_xcrs = 0;
3776                 return;
3777         }
3778
3779         guest_xcrs->nr_xcrs = 1;
3780         guest_xcrs->flags = 0;
3781         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3782         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3783 }
3784
3785 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3786                                        struct kvm_xcrs *guest_xcrs)
3787 {
3788         int i, r = 0;
3789
3790         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3791                 return -EINVAL;
3792
3793         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3794                 return -EINVAL;
3795
3796         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3797                 /* Only support XCR0 currently */
3798                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3799                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3800                                 guest_xcrs->xcrs[i].value);
3801                         break;
3802                 }
3803         if (r)
3804                 r = -EINVAL;
3805         return r;
3806 }
3807
3808 /*
3809  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3810  * stopped by the hypervisor.  This function will be called from the host only.
3811  * EINVAL is returned when the host attempts to set the flag for a guest that
3812  * does not support pv clocks.
3813  */
3814 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3815 {
3816         if (!vcpu->arch.pv_time_enabled)
3817                 return -EINVAL;
3818         vcpu->arch.pvclock_set_guest_stopped_request = true;
3819         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3820         return 0;
3821 }
3822
3823 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3824                                      struct kvm_enable_cap *cap)
3825 {
3826         int r;
3827         uint16_t vmcs_version;
3828         void __user *user_ptr;
3829
3830         if (cap->flags)
3831                 return -EINVAL;
3832
3833         switch (cap->cap) {
3834         case KVM_CAP_HYPERV_SYNIC2:
3835                 if (cap->args[0])
3836                         return -EINVAL;
3837                 /* fall through */
3838
3839         case KVM_CAP_HYPERV_SYNIC:
3840                 if (!irqchip_in_kernel(vcpu->kvm))
3841                         return -EINVAL;
3842                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3843                                              KVM_CAP_HYPERV_SYNIC2);
3844         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3845                 if (!kvm_x86_ops->nested_enable_evmcs)
3846                         return -ENOTTY;
3847                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3848                 if (!r) {
3849                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3850                         if (copy_to_user(user_ptr, &vmcs_version,
3851                                          sizeof(vmcs_version)))
3852                                 r = -EFAULT;
3853                 }
3854                 return r;
3855
3856         default:
3857                 return -EINVAL;
3858         }
3859 }
3860
3861 long kvm_arch_vcpu_ioctl(struct file *filp,
3862                          unsigned int ioctl, unsigned long arg)
3863 {
3864         struct kvm_vcpu *vcpu = filp->private_data;
3865         void __user *argp = (void __user *)arg;
3866         int r;
3867         union {
3868                 struct kvm_lapic_state *lapic;
3869                 struct kvm_xsave *xsave;
3870                 struct kvm_xcrs *xcrs;
3871                 void *buffer;
3872         } u;
3873
3874         vcpu_load(vcpu);
3875
3876         u.buffer = NULL;
3877         switch (ioctl) {
3878         case KVM_GET_LAPIC: {
3879                 r = -EINVAL;
3880                 if (!lapic_in_kernel(vcpu))
3881                         goto out;
3882                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3883
3884                 r = -ENOMEM;
3885                 if (!u.lapic)
3886                         goto out;
3887                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3888                 if (r)
3889                         goto out;
3890                 r = -EFAULT;
3891                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3892                         goto out;
3893                 r = 0;
3894                 break;
3895         }
3896         case KVM_SET_LAPIC: {
3897                 r = -EINVAL;
3898                 if (!lapic_in_kernel(vcpu))
3899                         goto out;
3900                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3901                 if (IS_ERR(u.lapic)) {
3902                         r = PTR_ERR(u.lapic);
3903                         goto out_nofree;
3904                 }
3905
3906                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3907                 break;
3908         }
3909         case KVM_INTERRUPT: {
3910                 struct kvm_interrupt irq;
3911
3912                 r = -EFAULT;
3913                 if (copy_from_user(&irq, argp, sizeof(irq)))
3914                         goto out;
3915                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3916                 break;
3917         }
3918         case KVM_NMI: {
3919                 r = kvm_vcpu_ioctl_nmi(vcpu);
3920                 break;
3921         }
3922         case KVM_SMI: {
3923                 r = kvm_vcpu_ioctl_smi(vcpu);
3924                 break;
3925         }
3926         case KVM_SET_CPUID: {
3927                 struct kvm_cpuid __user *cpuid_arg = argp;
3928                 struct kvm_cpuid cpuid;
3929
3930                 r = -EFAULT;
3931                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3932                         goto out;
3933                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3934                 break;
3935         }
3936         case KVM_SET_CPUID2: {
3937                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3938                 struct kvm_cpuid2 cpuid;
3939
3940                 r = -EFAULT;
3941                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3942                         goto out;
3943                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3944                                               cpuid_arg->entries);
3945                 break;
3946         }
3947         case KVM_GET_CPUID2: {
3948                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3949                 struct kvm_cpuid2 cpuid;
3950
3951                 r = -EFAULT;
3952                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3953                         goto out;
3954                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3955                                               cpuid_arg->entries);
3956                 if (r)
3957                         goto out;
3958                 r = -EFAULT;
3959                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3960                         goto out;
3961                 r = 0;
3962                 break;
3963         }
3964         case KVM_GET_MSRS: {
3965                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3966                 r = msr_io(vcpu, argp, do_get_msr, 1);
3967                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3968                 break;
3969         }
3970         case KVM_SET_MSRS: {
3971                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3972                 r = msr_io(vcpu, argp, do_set_msr, 0);
3973                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3974                 break;
3975         }
3976         case KVM_TPR_ACCESS_REPORTING: {
3977                 struct kvm_tpr_access_ctl tac;
3978
3979                 r = -EFAULT;
3980                 if (copy_from_user(&tac, argp, sizeof(tac)))
3981                         goto out;
3982                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3983                 if (r)
3984                         goto out;
3985                 r = -EFAULT;
3986                 if (copy_to_user(argp, &tac, sizeof(tac)))
3987                         goto out;
3988                 r = 0;
3989                 break;
3990         };
3991         case KVM_SET_VAPIC_ADDR: {
3992                 struct kvm_vapic_addr va;
3993                 int idx;
3994
3995                 r = -EINVAL;
3996                 if (!lapic_in_kernel(vcpu))
3997                         goto out;
3998                 r = -EFAULT;
3999                 if (copy_from_user(&va, argp, sizeof(va)))
4000                         goto out;
4001                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4002                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4003                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4004                 break;
4005         }
4006         case KVM_X86_SETUP_MCE: {
4007                 u64 mcg_cap;
4008
4009                 r = -EFAULT;
4010                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4011                         goto out;
4012                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4013                 break;
4014         }
4015         case KVM_X86_SET_MCE: {
4016                 struct kvm_x86_mce mce;
4017
4018                 r = -EFAULT;
4019                 if (copy_from_user(&mce, argp, sizeof(mce)))
4020                         goto out;
4021                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4022                 break;
4023         }
4024         case KVM_GET_VCPU_EVENTS: {
4025                 struct kvm_vcpu_events events;
4026
4027                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4028
4029                 r = -EFAULT;
4030                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4031                         break;
4032                 r = 0;
4033                 break;
4034         }
4035         case KVM_SET_VCPU_EVENTS: {
4036                 struct kvm_vcpu_events events;
4037
4038                 r = -EFAULT;
4039                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4040                         break;
4041
4042                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4043                 break;
4044         }
4045         case KVM_GET_DEBUGREGS: {
4046                 struct kvm_debugregs dbgregs;
4047
4048                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4049
4050                 r = -EFAULT;
4051                 if (copy_to_user(argp, &dbgregs,
4052                                  sizeof(struct kvm_debugregs)))
4053                         break;
4054                 r = 0;
4055                 break;
4056         }
4057         case KVM_SET_DEBUGREGS: {
4058                 struct kvm_debugregs dbgregs;
4059
4060                 r = -EFAULT;
4061                 if (copy_from_user(&dbgregs, argp,
4062                                    sizeof(struct kvm_debugregs)))
4063                         break;
4064
4065                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4066                 break;
4067         }
4068         case KVM_GET_XSAVE: {
4069                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
4070                 r = -ENOMEM;
4071                 if (!u.xsave)
4072                         break;
4073
4074                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4075
4076                 r = -EFAULT;
4077                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4078                         break;
4079                 r = 0;
4080                 break;
4081         }
4082         case KVM_SET_XSAVE: {
4083                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4084                 if (IS_ERR(u.xsave)) {
4085                         r = PTR_ERR(u.xsave);
4086                         goto out_nofree;
4087                 }
4088
4089                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4090                 break;
4091         }
4092         case KVM_GET_XCRS: {
4093                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
4094                 r = -ENOMEM;
4095                 if (!u.xcrs)
4096                         break;
4097
4098                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4099
4100                 r = -EFAULT;
4101                 if (copy_to_user(argp, u.xcrs,
4102                                  sizeof(struct kvm_xcrs)))
4103                         break;
4104                 r = 0;
4105                 break;
4106         }
4107         case KVM_SET_XCRS: {
4108                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4109                 if (IS_ERR(u.xcrs)) {
4110                         r = PTR_ERR(u.xcrs);
4111                         goto out_nofree;
4112                 }
4113
4114                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4115                 break;
4116         }
4117         case KVM_SET_TSC_KHZ: {
4118                 u32 user_tsc_khz;
4119
4120                 r = -EINVAL;
4121                 user_tsc_khz = (u32)arg;
4122
4123                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4124                         goto out;
4125
4126                 if (user_tsc_khz == 0)
4127                         user_tsc_khz = tsc_khz;
4128
4129                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4130                         r = 0;
4131
4132                 goto out;
4133         }
4134         case KVM_GET_TSC_KHZ: {
4135                 r = vcpu->arch.virtual_tsc_khz;
4136                 goto out;
4137         }
4138         case KVM_KVMCLOCK_CTRL: {
4139                 r = kvm_set_guest_paused(vcpu);
4140                 goto out;
4141         }
4142         case KVM_ENABLE_CAP: {
4143                 struct kvm_enable_cap cap;
4144
4145                 r = -EFAULT;
4146                 if (copy_from_user(&cap, argp, sizeof(cap)))
4147                         goto out;
4148                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4149                 break;
4150         }
4151         case KVM_GET_NESTED_STATE: {
4152                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4153                 u32 user_data_size;
4154
4155                 r = -EINVAL;
4156                 if (!kvm_x86_ops->get_nested_state)
4157                         break;
4158
4159                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4160                 r = -EFAULT;
4161                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4162                         break;
4163
4164                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4165                                                   user_data_size);
4166                 if (r < 0)
4167                         break;
4168
4169                 if (r > user_data_size) {
4170                         if (put_user(r, &user_kvm_nested_state->size))
4171                                 r = -EFAULT;
4172                         else
4173                                 r = -E2BIG;
4174                         break;
4175                 }
4176
4177                 r = 0;
4178                 break;
4179         }
4180         case KVM_SET_NESTED_STATE: {
4181                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4182                 struct kvm_nested_state kvm_state;
4183
4184                 r = -EINVAL;
4185                 if (!kvm_x86_ops->set_nested_state)
4186                         break;
4187
4188                 r = -EFAULT;
4189                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4190                         break;
4191
4192                 r = -EINVAL;
4193                 if (kvm_state.size < sizeof(kvm_state))
4194                         break;
4195
4196                 if (kvm_state.flags &
4197                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4198                       | KVM_STATE_NESTED_EVMCS))
4199                         break;
4200
4201                 /* nested_run_pending implies guest_mode.  */
4202                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4203                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4204                         break;
4205
4206                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4207                 break;
4208         }
4209         case KVM_GET_SUPPORTED_HV_CPUID: {
4210                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4211                 struct kvm_cpuid2 cpuid;
4212
4213                 r = -EFAULT;
4214                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4215                         goto out;
4216
4217                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4218                                                 cpuid_arg->entries);
4219                 if (r)
4220                         goto out;
4221
4222                 r = -EFAULT;
4223                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4224                         goto out;
4225                 r = 0;
4226                 break;
4227         }
4228         default:
4229                 r = -EINVAL;
4230         }
4231 out:
4232         kfree(u.buffer);
4233 out_nofree:
4234         vcpu_put(vcpu);
4235         return r;
4236 }
4237
4238 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4239 {
4240         return VM_FAULT_SIGBUS;
4241 }
4242
4243 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4244 {
4245         int ret;
4246
4247         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4248                 return -EINVAL;
4249         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4250         return ret;
4251 }
4252
4253 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4254                                               u64 ident_addr)
4255 {
4256         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4257 }
4258
4259 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4260                                           u32 kvm_nr_mmu_pages)
4261 {
4262         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4263                 return -EINVAL;
4264
4265         mutex_lock(&kvm->slots_lock);
4266
4267         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4268         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4269
4270         mutex_unlock(&kvm->slots_lock);
4271         return 0;
4272 }
4273
4274 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4275 {
4276         return kvm->arch.n_max_mmu_pages;
4277 }
4278
4279 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4280 {
4281         struct kvm_pic *pic = kvm->arch.vpic;
4282         int r;
4283
4284         r = 0;
4285         switch (chip->chip_id) {
4286         case KVM_IRQCHIP_PIC_MASTER:
4287                 memcpy(&chip->chip.pic, &pic->pics[0],
4288                         sizeof(struct kvm_pic_state));
4289                 break;
4290         case KVM_IRQCHIP_PIC_SLAVE:
4291                 memcpy(&chip->chip.pic, &pic->pics[1],
4292                         sizeof(struct kvm_pic_state));
4293                 break;
4294         case KVM_IRQCHIP_IOAPIC:
4295                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4296                 break;
4297         default:
4298                 r = -EINVAL;
4299                 break;
4300         }
4301         return r;
4302 }
4303
4304 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4305 {
4306         struct kvm_pic *pic = kvm->arch.vpic;
4307         int r;
4308
4309         r = 0;
4310         switch (chip->chip_id) {
4311         case KVM_IRQCHIP_PIC_MASTER:
4312                 spin_lock(&pic->lock);
4313                 memcpy(&pic->pics[0], &chip->chip.pic,
4314                         sizeof(struct kvm_pic_state));
4315                 spin_unlock(&pic->lock);
4316                 break;
4317         case KVM_IRQCHIP_PIC_SLAVE:
4318                 spin_lock(&pic->lock);
4319                 memcpy(&pic->pics[1], &chip->chip.pic,
4320                         sizeof(struct kvm_pic_state));
4321                 spin_unlock(&pic->lock);
4322                 break;
4323         case KVM_IRQCHIP_IOAPIC:
4324                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4325                 break;
4326         default:
4327                 r = -EINVAL;
4328                 break;
4329         }
4330         kvm_pic_update_irq(pic);
4331         return r;
4332 }
4333
4334 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4335 {
4336         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4337
4338         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4339
4340         mutex_lock(&kps->lock);
4341         memcpy(ps, &kps->channels, sizeof(*ps));
4342         mutex_unlock(&kps->lock);
4343         return 0;
4344 }
4345
4346 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4347 {
4348         int i;
4349         struct kvm_pit *pit = kvm->arch.vpit;
4350
4351         mutex_lock(&pit->pit_state.lock);
4352         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4353         for (i = 0; i < 3; i++)
4354                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4355         mutex_unlock(&pit->pit_state.lock);
4356         return 0;
4357 }
4358
4359 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4360 {
4361         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4362         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4363                 sizeof(ps->channels));
4364         ps->flags = kvm->arch.vpit->pit_state.flags;
4365         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4366         memset(&ps->reserved, 0, sizeof(ps->reserved));
4367         return 0;
4368 }
4369
4370 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4371 {
4372         int start = 0;
4373         int i;
4374         u32 prev_legacy, cur_legacy;
4375         struct kvm_pit *pit = kvm->arch.vpit;
4376
4377         mutex_lock(&pit->pit_state.lock);
4378         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4379         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4380         if (!prev_legacy && cur_legacy)
4381                 start = 1;
4382         memcpy(&pit->pit_state.channels, &ps->channels,
4383                sizeof(pit->pit_state.channels));
4384         pit->pit_state.flags = ps->flags;
4385         for (i = 0; i < 3; i++)
4386                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4387                                    start && i == 0);
4388         mutex_unlock(&pit->pit_state.lock);
4389         return 0;
4390 }
4391
4392 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4393                                  struct kvm_reinject_control *control)
4394 {
4395         struct kvm_pit *pit = kvm->arch.vpit;
4396
4397         if (!pit)
4398                 return -ENXIO;
4399
4400         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4401          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4402          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4403          */
4404         mutex_lock(&pit->pit_state.lock);
4405         kvm_pit_set_reinject(pit, control->pit_reinject);
4406         mutex_unlock(&pit->pit_state.lock);
4407
4408         return 0;
4409 }
4410
4411 /**
4412  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4413  * @kvm: kvm instance
4414  * @log: slot id and address to which we copy the log
4415  *
4416  * Steps 1-4 below provide general overview of dirty page logging. See
4417  * kvm_get_dirty_log_protect() function description for additional details.
4418  *
4419  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4420  * always flush the TLB (step 4) even if previous step failed  and the dirty
4421  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4422  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4423  * writes will be marked dirty for next log read.
4424  *
4425  *   1. Take a snapshot of the bit and clear it if needed.
4426  *   2. Write protect the corresponding page.
4427  *   3. Copy the snapshot to the userspace.
4428  *   4. Flush TLB's if needed.
4429  */
4430 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4431 {
4432         bool flush = false;
4433         int r;
4434
4435         mutex_lock(&kvm->slots_lock);
4436
4437         /*
4438          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4439          */
4440         if (kvm_x86_ops->flush_log_dirty)
4441                 kvm_x86_ops->flush_log_dirty(kvm);
4442
4443         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4444
4445         /*
4446          * All the TLBs can be flushed out of mmu lock, see the comments in
4447          * kvm_mmu_slot_remove_write_access().
4448          */
4449         lockdep_assert_held(&kvm->slots_lock);
4450         if (flush)
4451                 kvm_flush_remote_tlbs(kvm);
4452
4453         mutex_unlock(&kvm->slots_lock);
4454         return r;
4455 }
4456
4457 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4458 {
4459         bool flush = false;
4460         int r;
4461
4462         mutex_lock(&kvm->slots_lock);
4463
4464         /*
4465          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4466          */
4467         if (kvm_x86_ops->flush_log_dirty)
4468                 kvm_x86_ops->flush_log_dirty(kvm);
4469
4470         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4471
4472         /*
4473          * All the TLBs can be flushed out of mmu lock, see the comments in
4474          * kvm_mmu_slot_remove_write_access().
4475          */
4476         lockdep_assert_held(&kvm->slots_lock);
4477         if (flush)
4478                 kvm_flush_remote_tlbs(kvm);
4479
4480         mutex_unlock(&kvm->slots_lock);
4481         return r;
4482 }
4483
4484 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4485                         bool line_status)
4486 {
4487         if (!irqchip_in_kernel(kvm))
4488                 return -ENXIO;
4489
4490         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4491                                         irq_event->irq, irq_event->level,
4492                                         line_status);
4493         return 0;
4494 }
4495
4496 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4497                             struct kvm_enable_cap *cap)
4498 {
4499         int r;
4500
4501         if (cap->flags)
4502                 return -EINVAL;
4503
4504         switch (cap->cap) {
4505         case KVM_CAP_DISABLE_QUIRKS:
4506                 kvm->arch.disabled_quirks = cap->args[0];
4507                 r = 0;
4508                 break;
4509         case KVM_CAP_SPLIT_IRQCHIP: {
4510                 mutex_lock(&kvm->lock);
4511                 r = -EINVAL;
4512                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4513                         goto split_irqchip_unlock;
4514                 r = -EEXIST;
4515                 if (irqchip_in_kernel(kvm))
4516                         goto split_irqchip_unlock;
4517                 if (kvm->created_vcpus)
4518                         goto split_irqchip_unlock;
4519                 r = kvm_setup_empty_irq_routing(kvm);
4520                 if (r)
4521                         goto split_irqchip_unlock;
4522                 /* Pairs with irqchip_in_kernel. */
4523                 smp_wmb();
4524                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4525                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4526                 r = 0;
4527 split_irqchip_unlock:
4528                 mutex_unlock(&kvm->lock);
4529                 break;
4530         }
4531         case KVM_CAP_X2APIC_API:
4532                 r = -EINVAL;
4533                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4534                         break;
4535
4536                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4537                         kvm->arch.x2apic_format = true;
4538                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4539                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4540
4541                 r = 0;
4542                 break;
4543         case KVM_CAP_X86_DISABLE_EXITS:
4544                 r = -EINVAL;
4545                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4546                         break;
4547
4548                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4549                         kvm_can_mwait_in_guest())
4550                         kvm->arch.mwait_in_guest = true;
4551                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4552                         kvm->arch.hlt_in_guest = true;
4553                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4554                         kvm->arch.pause_in_guest = true;
4555                 r = 0;
4556                 break;
4557         case KVM_CAP_MSR_PLATFORM_INFO:
4558                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4559                 r = 0;
4560                 break;
4561         case KVM_CAP_EXCEPTION_PAYLOAD:
4562                 kvm->arch.exception_payload_enabled = cap->args[0];
4563                 r = 0;
4564                 break;
4565         default:
4566                 r = -EINVAL;
4567                 break;
4568         }
4569         return r;
4570 }
4571
4572 long kvm_arch_vm_ioctl(struct file *filp,
4573                        unsigned int ioctl, unsigned long arg)
4574 {
4575         struct kvm *kvm = filp->private_data;
4576         void __user *argp = (void __user *)arg;
4577         int r = -ENOTTY;
4578         /*
4579          * This union makes it completely explicit to gcc-3.x
4580          * that these two variables' stack usage should be
4581          * combined, not added together.
4582          */
4583         union {
4584                 struct kvm_pit_state ps;
4585                 struct kvm_pit_state2 ps2;
4586                 struct kvm_pit_config pit_config;
4587         } u;
4588
4589         switch (ioctl) {
4590         case KVM_SET_TSS_ADDR:
4591                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4592                 break;
4593         case KVM_SET_IDENTITY_MAP_ADDR: {
4594                 u64 ident_addr;
4595
4596                 mutex_lock(&kvm->lock);
4597                 r = -EINVAL;
4598                 if (kvm->created_vcpus)
4599                         goto set_identity_unlock;
4600                 r = -EFAULT;
4601                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4602                         goto set_identity_unlock;
4603                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4604 set_identity_unlock:
4605                 mutex_unlock(&kvm->lock);
4606                 break;
4607         }
4608         case KVM_SET_NR_MMU_PAGES:
4609                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4610                 break;
4611         case KVM_GET_NR_MMU_PAGES:
4612                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4613                 break;
4614         case KVM_CREATE_IRQCHIP: {
4615                 mutex_lock(&kvm->lock);
4616
4617                 r = -EEXIST;
4618                 if (irqchip_in_kernel(kvm))
4619                         goto create_irqchip_unlock;
4620
4621                 r = -EINVAL;
4622                 if (kvm->created_vcpus)
4623                         goto create_irqchip_unlock;
4624
4625                 r = kvm_pic_init(kvm);
4626                 if (r)
4627                         goto create_irqchip_unlock;
4628
4629                 r = kvm_ioapic_init(kvm);
4630                 if (r) {
4631                         kvm_pic_destroy(kvm);
4632                         goto create_irqchip_unlock;
4633                 }
4634
4635                 r = kvm_setup_default_irq_routing(kvm);
4636                 if (r) {
4637                         kvm_ioapic_destroy(kvm);
4638                         kvm_pic_destroy(kvm);
4639                         goto create_irqchip_unlock;
4640                 }
4641                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4642                 smp_wmb();
4643                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4644         create_irqchip_unlock:
4645                 mutex_unlock(&kvm->lock);
4646                 break;
4647         }
4648         case KVM_CREATE_PIT:
4649                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4650                 goto create_pit;
4651         case KVM_CREATE_PIT2:
4652                 r = -EFAULT;
4653                 if (copy_from_user(&u.pit_config, argp,
4654                                    sizeof(struct kvm_pit_config)))
4655                         goto out;
4656         create_pit:
4657                 mutex_lock(&kvm->lock);
4658                 r = -EEXIST;
4659                 if (kvm->arch.vpit)
4660                         goto create_pit_unlock;
4661                 r = -ENOMEM;
4662                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4663                 if (kvm->arch.vpit)
4664                         r = 0;
4665         create_pit_unlock:
4666                 mutex_unlock(&kvm->lock);
4667                 break;
4668         case KVM_GET_IRQCHIP: {
4669                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4670                 struct kvm_irqchip *chip;
4671
4672                 chip = memdup_user(argp, sizeof(*chip));
4673                 if (IS_ERR(chip)) {
4674                         r = PTR_ERR(chip);
4675                         goto out;
4676                 }
4677
4678                 r = -ENXIO;
4679                 if (!irqchip_kernel(kvm))
4680                         goto get_irqchip_out;
4681                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4682                 if (r)
4683                         goto get_irqchip_out;
4684                 r = -EFAULT;
4685                 if (copy_to_user(argp, chip, sizeof(*chip)))
4686                         goto get_irqchip_out;
4687                 r = 0;
4688         get_irqchip_out:
4689                 kfree(chip);
4690                 break;
4691         }
4692         case KVM_SET_IRQCHIP: {
4693                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4694                 struct kvm_irqchip *chip;
4695
4696                 chip = memdup_user(argp, sizeof(*chip));
4697                 if (IS_ERR(chip)) {
4698                         r = PTR_ERR(chip);
4699                         goto out;
4700                 }
4701
4702                 r = -ENXIO;
4703                 if (!irqchip_kernel(kvm))
4704                         goto set_irqchip_out;
4705                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4706                 if (r)
4707                         goto set_irqchip_out;
4708                 r = 0;
4709         set_irqchip_out:
4710                 kfree(chip);
4711                 break;
4712         }
4713         case KVM_GET_PIT: {
4714                 r = -EFAULT;
4715                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4716                         goto out;
4717                 r = -ENXIO;
4718                 if (!kvm->arch.vpit)
4719                         goto out;
4720                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4721                 if (r)
4722                         goto out;
4723                 r = -EFAULT;
4724                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4725                         goto out;
4726                 r = 0;
4727                 break;
4728         }
4729         case KVM_SET_PIT: {
4730                 r = -EFAULT;
4731                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4732                         goto out;
4733                 r = -ENXIO;
4734                 if (!kvm->arch.vpit)
4735                         goto out;
4736                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4737                 break;
4738         }
4739         case KVM_GET_PIT2: {
4740                 r = -ENXIO;
4741                 if (!kvm->arch.vpit)
4742                         goto out;
4743                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4744                 if (r)
4745                         goto out;
4746                 r = -EFAULT;
4747                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4748                         goto out;
4749                 r = 0;
4750                 break;
4751         }
4752         case KVM_SET_PIT2: {
4753                 r = -EFAULT;
4754                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4755                         goto out;
4756                 r = -ENXIO;
4757                 if (!kvm->arch.vpit)
4758                         goto out;
4759                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4760                 break;
4761         }
4762         case KVM_REINJECT_CONTROL: {
4763                 struct kvm_reinject_control control;
4764                 r =  -EFAULT;
4765                 if (copy_from_user(&control, argp, sizeof(control)))
4766                         goto out;
4767                 r = kvm_vm_ioctl_reinject(kvm, &control);
4768                 break;
4769         }
4770         case KVM_SET_BOOT_CPU_ID:
4771                 r = 0;
4772                 mutex_lock(&kvm->lock);
4773                 if (kvm->created_vcpus)
4774                         r = -EBUSY;
4775                 else
4776                         kvm->arch.bsp_vcpu_id = arg;
4777                 mutex_unlock(&kvm->lock);
4778                 break;
4779         case KVM_XEN_HVM_CONFIG: {
4780                 struct kvm_xen_hvm_config xhc;
4781                 r = -EFAULT;
4782                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4783                         goto out;
4784                 r = -EINVAL;
4785                 if (xhc.flags)
4786                         goto out;
4787                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4788                 r = 0;
4789                 break;
4790         }
4791         case KVM_SET_CLOCK: {
4792                 struct kvm_clock_data user_ns;
4793                 u64 now_ns;
4794
4795                 r = -EFAULT;
4796                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4797                         goto out;
4798
4799                 r = -EINVAL;
4800                 if (user_ns.flags)
4801                         goto out;
4802
4803                 r = 0;
4804                 /*
4805                  * TODO: userspace has to take care of races with VCPU_RUN, so
4806                  * kvm_gen_update_masterclock() can be cut down to locked
4807                  * pvclock_update_vm_gtod_copy().
4808                  */
4809                 kvm_gen_update_masterclock(kvm);
4810                 now_ns = get_kvmclock_ns(kvm);
4811                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4812                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4813                 break;
4814         }
4815         case KVM_GET_CLOCK: {
4816                 struct kvm_clock_data user_ns;
4817                 u64 now_ns;
4818
4819                 now_ns = get_kvmclock_ns(kvm);
4820                 user_ns.clock = now_ns;
4821                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4822                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4823
4824                 r = -EFAULT;
4825                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4826                         goto out;
4827                 r = 0;
4828                 break;
4829         }
4830         case KVM_MEMORY_ENCRYPT_OP: {
4831                 r = -ENOTTY;
4832                 if (kvm_x86_ops->mem_enc_op)
4833                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4834                 break;
4835         }
4836         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4837                 struct kvm_enc_region region;
4838
4839                 r = -EFAULT;
4840                 if (copy_from_user(&region, argp, sizeof(region)))
4841                         goto out;
4842
4843                 r = -ENOTTY;
4844                 if (kvm_x86_ops->mem_enc_reg_region)
4845                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4846                 break;
4847         }
4848         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4849                 struct kvm_enc_region region;
4850
4851                 r = -EFAULT;
4852                 if (copy_from_user(&region, argp, sizeof(region)))
4853                         goto out;
4854
4855                 r = -ENOTTY;
4856                 if (kvm_x86_ops->mem_enc_unreg_region)
4857                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4858                 break;
4859         }
4860         case KVM_HYPERV_EVENTFD: {
4861                 struct kvm_hyperv_eventfd hvevfd;
4862
4863                 r = -EFAULT;
4864                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4865                         goto out;
4866                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4867                 break;
4868         }
4869         default:
4870                 r = -ENOTTY;
4871         }
4872 out:
4873         return r;
4874 }
4875
4876 static void kvm_init_msr_list(void)
4877 {
4878         u32 dummy[2];
4879         unsigned i, j;
4880
4881         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4882                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4883                         continue;
4884
4885                 /*
4886                  * Even MSRs that are valid in the host may not be exposed
4887                  * to the guests in some cases.
4888                  */
4889                 switch (msrs_to_save[i]) {
4890                 case MSR_IA32_BNDCFGS:
4891                         if (!kvm_mpx_supported())
4892                                 continue;
4893                         break;
4894                 case MSR_TSC_AUX:
4895                         if (!kvm_x86_ops->rdtscp_supported())
4896                                 continue;
4897                         break;
4898                 case MSR_IA32_RTIT_CTL:
4899                 case MSR_IA32_RTIT_STATUS:
4900                         if (!kvm_x86_ops->pt_supported())
4901                                 continue;
4902                         break;
4903                 case MSR_IA32_RTIT_CR3_MATCH:
4904                         if (!kvm_x86_ops->pt_supported() ||
4905                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
4906                                 continue;
4907                         break;
4908                 case MSR_IA32_RTIT_OUTPUT_BASE:
4909                 case MSR_IA32_RTIT_OUTPUT_MASK:
4910                         if (!kvm_x86_ops->pt_supported() ||
4911                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
4912                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
4913                                 continue;
4914                         break;
4915                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
4916                         if (!kvm_x86_ops->pt_supported() ||
4917                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
4918                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
4919                                 continue;
4920                         break;
4921                 }
4922                 default:
4923                         break;
4924                 }
4925
4926                 if (j < i)
4927                         msrs_to_save[j] = msrs_to_save[i];
4928                 j++;
4929         }
4930         num_msrs_to_save = j;
4931
4932         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4933                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4934                         continue;
4935
4936                 if (j < i)
4937                         emulated_msrs[j] = emulated_msrs[i];
4938                 j++;
4939         }
4940         num_emulated_msrs = j;
4941
4942         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4943                 struct kvm_msr_entry msr;
4944
4945                 msr.index = msr_based_features[i];
4946                 if (kvm_get_msr_feature(&msr))
4947                         continue;
4948
4949                 if (j < i)
4950                         msr_based_features[j] = msr_based_features[i];
4951                 j++;
4952         }
4953         num_msr_based_features = j;
4954 }
4955
4956 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4957                            const void *v)
4958 {
4959         int handled = 0;
4960         int n;
4961
4962         do {
4963                 n = min(len, 8);
4964                 if (!(lapic_in_kernel(vcpu) &&
4965                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4966                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4967                         break;
4968                 handled += n;
4969                 addr += n;
4970                 len -= n;
4971                 v += n;
4972         } while (len);
4973
4974         return handled;
4975 }
4976
4977 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4978 {
4979         int handled = 0;
4980         int n;
4981
4982         do {
4983                 n = min(len, 8);
4984                 if (!(lapic_in_kernel(vcpu) &&
4985                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4986                                          addr, n, v))
4987                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4988                         break;
4989                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4990                 handled += n;
4991                 addr += n;
4992                 len -= n;
4993                 v += n;
4994         } while (len);
4995
4996         return handled;
4997 }
4998
4999 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5000                         struct kvm_segment *var, int seg)
5001 {
5002         kvm_x86_ops->set_segment(vcpu, var, seg);
5003 }
5004
5005 void kvm_get_segment(struct kvm_vcpu *vcpu,
5006                      struct kvm_segment *var, int seg)
5007 {
5008         kvm_x86_ops->get_segment(vcpu, var, seg);
5009 }
5010
5011 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5012                            struct x86_exception *exception)
5013 {
5014         gpa_t t_gpa;
5015
5016         BUG_ON(!mmu_is_nested(vcpu));
5017
5018         /* NPT walks are always user-walks */
5019         access |= PFERR_USER_MASK;
5020         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5021
5022         return t_gpa;
5023 }
5024
5025 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5026                               struct x86_exception *exception)
5027 {
5028         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5029         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5030 }
5031
5032  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5033                                 struct x86_exception *exception)
5034 {
5035         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5036         access |= PFERR_FETCH_MASK;
5037         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5038 }
5039
5040 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5041                                struct x86_exception *exception)
5042 {
5043         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5044         access |= PFERR_WRITE_MASK;
5045         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5046 }
5047
5048 /* uses this to access any guest's mapped memory without checking CPL */
5049 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5050                                 struct x86_exception *exception)
5051 {
5052         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5053 }
5054
5055 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5056                                       struct kvm_vcpu *vcpu, u32 access,
5057                                       struct x86_exception *exception)
5058 {
5059         void *data = val;
5060         int r = X86EMUL_CONTINUE;
5061
5062         while (bytes) {
5063                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5064                                                             exception);
5065                 unsigned offset = addr & (PAGE_SIZE-1);
5066                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5067                 int ret;
5068
5069                 if (gpa == UNMAPPED_GVA)
5070                         return X86EMUL_PROPAGATE_FAULT;
5071                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5072                                                offset, toread);
5073                 if (ret < 0) {
5074                         r = X86EMUL_IO_NEEDED;
5075                         goto out;
5076                 }
5077
5078                 bytes -= toread;
5079                 data += toread;
5080                 addr += toread;
5081         }
5082 out:
5083         return r;
5084 }
5085
5086 /* used for instruction fetching */
5087 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5088                                 gva_t addr, void *val, unsigned int bytes,
5089                                 struct x86_exception *exception)
5090 {
5091         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5092         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5093         unsigned offset;
5094         int ret;
5095
5096         /* Inline kvm_read_guest_virt_helper for speed.  */
5097         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5098                                                     exception);
5099         if (unlikely(gpa == UNMAPPED_GVA))
5100                 return X86EMUL_PROPAGATE_FAULT;
5101
5102         offset = addr & (PAGE_SIZE-1);
5103         if (WARN_ON(offset + bytes > PAGE_SIZE))
5104                 bytes = (unsigned)PAGE_SIZE - offset;
5105         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5106                                        offset, bytes);
5107         if (unlikely(ret < 0))
5108                 return X86EMUL_IO_NEEDED;
5109
5110         return X86EMUL_CONTINUE;
5111 }
5112
5113 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5114                                gva_t addr, void *val, unsigned int bytes,
5115                                struct x86_exception *exception)
5116 {
5117         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5118
5119         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5120                                           exception);
5121 }
5122 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5123
5124 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5125                              gva_t addr, void *val, unsigned int bytes,
5126                              struct x86_exception *exception, bool system)
5127 {
5128         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5129         u32 access = 0;
5130
5131         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5132                 access |= PFERR_USER_MASK;
5133
5134         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5135 }
5136
5137 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5138                 unsigned long addr, void *val, unsigned int bytes)
5139 {
5140         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5141         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5142
5143         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5144 }
5145
5146 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5147                                       struct kvm_vcpu *vcpu, u32 access,
5148                                       struct x86_exception *exception)
5149 {
5150         void *data = val;
5151         int r = X86EMUL_CONTINUE;
5152
5153         while (bytes) {
5154                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5155                                                              access,
5156                                                              exception);
5157                 unsigned offset = addr & (PAGE_SIZE-1);
5158                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5159                 int ret;
5160
5161                 if (gpa == UNMAPPED_GVA)
5162                         return X86EMUL_PROPAGATE_FAULT;
5163                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5164                 if (ret < 0) {
5165                         r = X86EMUL_IO_NEEDED;
5166                         goto out;
5167                 }
5168
5169                 bytes -= towrite;
5170                 data += towrite;
5171                 addr += towrite;
5172         }
5173 out:
5174         return r;
5175 }
5176
5177 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5178                               unsigned int bytes, struct x86_exception *exception,
5179                               bool system)
5180 {
5181         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5182         u32 access = PFERR_WRITE_MASK;
5183
5184         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5185                 access |= PFERR_USER_MASK;
5186
5187         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5188                                            access, exception);
5189 }
5190
5191 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5192                                 unsigned int bytes, struct x86_exception *exception)
5193 {
5194         /* kvm_write_guest_virt_system can pull in tons of pages. */
5195         vcpu->arch.l1tf_flush_l1d = true;
5196
5197         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5198                                            PFERR_WRITE_MASK, exception);
5199 }
5200 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5201
5202 int handle_ud(struct kvm_vcpu *vcpu)
5203 {
5204         int emul_type = EMULTYPE_TRAP_UD;
5205         enum emulation_result er;
5206         char sig[5]; /* ud2; .ascii "kvm" */
5207         struct x86_exception e;
5208
5209         if (force_emulation_prefix &&
5210             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5211                                 sig, sizeof(sig), &e) == 0 &&
5212             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5213                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5214                 emul_type = 0;
5215         }
5216
5217         er = kvm_emulate_instruction(vcpu, emul_type);
5218         if (er == EMULATE_USER_EXIT)
5219                 return 0;
5220         if (er != EMULATE_DONE)
5221                 kvm_queue_exception(vcpu, UD_VECTOR);
5222         return 1;
5223 }
5224 EXPORT_SYMBOL_GPL(handle_ud);
5225
5226 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5227                             gpa_t gpa, bool write)
5228 {
5229         /* For APIC access vmexit */
5230         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5231                 return 1;
5232
5233         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5234                 trace_vcpu_match_mmio(gva, gpa, write, true);
5235                 return 1;
5236         }
5237
5238         return 0;
5239 }
5240
5241 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5242                                 gpa_t *gpa, struct x86_exception *exception,
5243                                 bool write)
5244 {
5245         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5246                 | (write ? PFERR_WRITE_MASK : 0);
5247
5248         /*
5249          * currently PKRU is only applied to ept enabled guest so
5250          * there is no pkey in EPT page table for L1 guest or EPT
5251          * shadow page table for L2 guest.
5252          */
5253         if (vcpu_match_mmio_gva(vcpu, gva)
5254             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5255                                  vcpu->arch.access, 0, access)) {
5256                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5257                                         (gva & (PAGE_SIZE - 1));
5258                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5259                 return 1;
5260         }
5261
5262         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5263
5264         if (*gpa == UNMAPPED_GVA)
5265                 return -1;
5266
5267         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5268 }
5269
5270 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5271                         const void *val, int bytes)
5272 {
5273         int ret;
5274
5275         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5276         if (ret < 0)
5277                 return 0;
5278         kvm_page_track_write(vcpu, gpa, val, bytes);
5279         return 1;
5280 }
5281
5282 struct read_write_emulator_ops {
5283         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5284                                   int bytes);
5285         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5286                                   void *val, int bytes);
5287         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5288                                int bytes, void *val);
5289         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5290                                     void *val, int bytes);
5291         bool write;
5292 };
5293
5294 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5295 {
5296         if (vcpu->mmio_read_completed) {
5297                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5298                                vcpu->mmio_fragments[0].gpa, val);
5299                 vcpu->mmio_read_completed = 0;
5300                 return 1;
5301         }
5302
5303         return 0;
5304 }
5305
5306 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5307                         void *val, int bytes)
5308 {
5309         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5310 }
5311
5312 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5313                          void *val, int bytes)
5314 {
5315         return emulator_write_phys(vcpu, gpa, val, bytes);
5316 }
5317
5318 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5319 {
5320         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5321         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5322 }
5323
5324 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5325                           void *val, int bytes)
5326 {
5327         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5328         return X86EMUL_IO_NEEDED;
5329 }
5330
5331 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5332                            void *val, int bytes)
5333 {
5334         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5335
5336         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5337         return X86EMUL_CONTINUE;
5338 }
5339
5340 static const struct read_write_emulator_ops read_emultor = {
5341         .read_write_prepare = read_prepare,
5342         .read_write_emulate = read_emulate,
5343         .read_write_mmio = vcpu_mmio_read,
5344         .read_write_exit_mmio = read_exit_mmio,
5345 };
5346
5347 static const struct read_write_emulator_ops write_emultor = {
5348         .read_write_emulate = write_emulate,
5349         .read_write_mmio = write_mmio,
5350         .read_write_exit_mmio = write_exit_mmio,
5351         .write = true,
5352 };
5353
5354 static int emulator_read_write_onepage(unsigned long addr, void *val,
5355                                        unsigned int bytes,
5356                                        struct x86_exception *exception,
5357                                        struct kvm_vcpu *vcpu,
5358                                        const struct read_write_emulator_ops *ops)
5359 {
5360         gpa_t gpa;
5361         int handled, ret;
5362         bool write = ops->write;
5363         struct kvm_mmio_fragment *frag;
5364         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5365
5366         /*
5367          * If the exit was due to a NPF we may already have a GPA.
5368          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5369          * Note, this cannot be used on string operations since string
5370          * operation using rep will only have the initial GPA from the NPF
5371          * occurred.
5372          */
5373         if (vcpu->arch.gpa_available &&
5374             emulator_can_use_gpa(ctxt) &&
5375             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5376                 gpa = vcpu->arch.gpa_val;
5377                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5378         } else {
5379                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5380                 if (ret < 0)
5381                         return X86EMUL_PROPAGATE_FAULT;
5382         }
5383
5384         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5385                 return X86EMUL_CONTINUE;
5386
5387         /*
5388          * Is this MMIO handled locally?
5389          */
5390         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5391         if (handled == bytes)
5392                 return X86EMUL_CONTINUE;
5393
5394         gpa += handled;
5395         bytes -= handled;
5396         val += handled;
5397
5398         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5399         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5400         frag->gpa = gpa;
5401         frag->data = val;
5402         frag->len = bytes;
5403         return X86EMUL_CONTINUE;
5404 }
5405
5406 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5407                         unsigned long addr,
5408                         void *val, unsigned int bytes,
5409                         struct x86_exception *exception,
5410                         const struct read_write_emulator_ops *ops)
5411 {
5412         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5413         gpa_t gpa;
5414         int rc;
5415
5416         if (ops->read_write_prepare &&
5417                   ops->read_write_prepare(vcpu, val, bytes))
5418                 return X86EMUL_CONTINUE;
5419
5420         vcpu->mmio_nr_fragments = 0;
5421
5422         /* Crossing a page boundary? */
5423         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5424                 int now;
5425
5426                 now = -addr & ~PAGE_MASK;
5427                 rc = emulator_read_write_onepage(addr, val, now, exception,
5428                                                  vcpu, ops);
5429
5430                 if (rc != X86EMUL_CONTINUE)
5431                         return rc;
5432                 addr += now;
5433                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5434                         addr = (u32)addr;
5435                 val += now;
5436                 bytes -= now;
5437         }
5438
5439         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5440                                          vcpu, ops);
5441         if (rc != X86EMUL_CONTINUE)
5442                 return rc;
5443
5444         if (!vcpu->mmio_nr_fragments)
5445                 return rc;
5446
5447         gpa = vcpu->mmio_fragments[0].gpa;
5448
5449         vcpu->mmio_needed = 1;
5450         vcpu->mmio_cur_fragment = 0;
5451
5452         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5453         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5454         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5455         vcpu->run->mmio.phys_addr = gpa;
5456
5457         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5458 }
5459
5460 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5461                                   unsigned long addr,
5462                                   void *val,
5463                                   unsigned int bytes,
5464                                   struct x86_exception *exception)
5465 {
5466         return emulator_read_write(ctxt, addr, val, bytes,
5467                                    exception, &read_emultor);
5468 }
5469
5470 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5471                             unsigned long addr,
5472                             const void *val,
5473                             unsigned int bytes,
5474                             struct x86_exception *exception)
5475 {
5476         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5477                                    exception, &write_emultor);
5478 }
5479
5480 #define CMPXCHG_TYPE(t, ptr, old, new) \
5481         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5482
5483 #ifdef CONFIG_X86_64
5484 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5485 #else
5486 #  define CMPXCHG64(ptr, old, new) \
5487         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5488 #endif
5489
5490 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5491                                      unsigned long addr,
5492                                      const void *old,
5493                                      const void *new,
5494                                      unsigned int bytes,
5495                                      struct x86_exception *exception)
5496 {
5497         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5498         gpa_t gpa;
5499         struct page *page;
5500         char *kaddr;
5501         bool exchanged;
5502
5503         /* guests cmpxchg8b have to be emulated atomically */
5504         if (bytes > 8 || (bytes & (bytes - 1)))
5505                 goto emul_write;
5506
5507         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5508
5509         if (gpa == UNMAPPED_GVA ||
5510             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5511                 goto emul_write;
5512
5513         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5514                 goto emul_write;
5515
5516         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5517         if (is_error_page(page))
5518                 goto emul_write;
5519
5520         kaddr = kmap_atomic(page);
5521         kaddr += offset_in_page(gpa);
5522         switch (bytes) {
5523         case 1:
5524                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5525                 break;
5526         case 2:
5527                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5528                 break;
5529         case 4:
5530                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5531                 break;
5532         case 8:
5533                 exchanged = CMPXCHG64(kaddr, old, new);
5534                 break;
5535         default:
5536                 BUG();
5537         }
5538         kunmap_atomic(kaddr);
5539         kvm_release_page_dirty(page);
5540
5541         if (!exchanged)
5542                 return X86EMUL_CMPXCHG_FAILED;
5543
5544         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5545         kvm_page_track_write(vcpu, gpa, new, bytes);
5546
5547         return X86EMUL_CONTINUE;
5548
5549 emul_write:
5550         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5551
5552         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5553 }
5554
5555 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5556 {
5557         int r = 0, i;
5558
5559         for (i = 0; i < vcpu->arch.pio.count; i++) {
5560                 if (vcpu->arch.pio.in)
5561                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5562                                             vcpu->arch.pio.size, pd);
5563                 else
5564                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5565                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5566                                              pd);
5567                 if (r)
5568                         break;
5569                 pd += vcpu->arch.pio.size;
5570         }
5571         return r;
5572 }
5573
5574 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5575                                unsigned short port, void *val,
5576                                unsigned int count, bool in)
5577 {
5578         vcpu->arch.pio.port = port;
5579         vcpu->arch.pio.in = in;
5580         vcpu->arch.pio.count  = count;
5581         vcpu->arch.pio.size = size;
5582
5583         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5584                 vcpu->arch.pio.count = 0;
5585                 return 1;
5586         }
5587
5588         vcpu->run->exit_reason = KVM_EXIT_IO;
5589         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5590         vcpu->run->io.size = size;
5591         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5592         vcpu->run->io.count = count;
5593         vcpu->run->io.port = port;
5594
5595         return 0;
5596 }
5597
5598 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5599                                     int size, unsigned short port, void *val,
5600                                     unsigned int count)
5601 {
5602         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5603         int ret;
5604
5605         if (vcpu->arch.pio.count)
5606                 goto data_avail;
5607
5608         memset(vcpu->arch.pio_data, 0, size * count);
5609
5610         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5611         if (ret) {
5612 data_avail:
5613                 memcpy(val, vcpu->arch.pio_data, size * count);
5614                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5615                 vcpu->arch.pio.count = 0;
5616                 return 1;
5617         }
5618
5619         return 0;
5620 }
5621
5622 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5623                                      int size, unsigned short port,
5624                                      const void *val, unsigned int count)
5625 {
5626         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5627
5628         memcpy(vcpu->arch.pio_data, val, size * count);
5629         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5630         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5631 }
5632
5633 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5634 {
5635         return kvm_x86_ops->get_segment_base(vcpu, seg);
5636 }
5637
5638 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5639 {
5640         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5641 }
5642
5643 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5644 {
5645         if (!need_emulate_wbinvd(vcpu))
5646                 return X86EMUL_CONTINUE;
5647
5648         if (kvm_x86_ops->has_wbinvd_exit()) {
5649                 int cpu = get_cpu();
5650
5651                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5652                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5653                                 wbinvd_ipi, NULL, 1);
5654                 put_cpu();
5655                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5656         } else
5657                 wbinvd();
5658         return X86EMUL_CONTINUE;
5659 }
5660
5661 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5662 {
5663         kvm_emulate_wbinvd_noskip(vcpu);
5664         return kvm_skip_emulated_instruction(vcpu);
5665 }
5666 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5667
5668
5669
5670 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5671 {
5672         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5673 }
5674
5675 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5676                            unsigned long *dest)
5677 {
5678         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5679 }
5680
5681 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5682                            unsigned long value)
5683 {
5684
5685         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5686 }
5687
5688 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5689 {
5690         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5691 }
5692
5693 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5694 {
5695         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5696         unsigned long value;
5697
5698         switch (cr) {
5699         case 0:
5700                 value = kvm_read_cr0(vcpu);
5701                 break;
5702         case 2:
5703                 value = vcpu->arch.cr2;
5704                 break;
5705         case 3:
5706                 value = kvm_read_cr3(vcpu);
5707                 break;
5708         case 4:
5709                 value = kvm_read_cr4(vcpu);
5710                 break;
5711         case 8:
5712                 value = kvm_get_cr8(vcpu);
5713                 break;
5714         default:
5715                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5716                 return 0;
5717         }
5718
5719         return value;
5720 }
5721
5722 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5723 {
5724         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5725         int res = 0;
5726
5727         switch (cr) {
5728         case 0:
5729                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5730                 break;
5731         case 2:
5732                 vcpu->arch.cr2 = val;
5733                 break;
5734         case 3:
5735                 res = kvm_set_cr3(vcpu, val);
5736                 break;
5737         case 4:
5738                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5739                 break;
5740         case 8:
5741                 res = kvm_set_cr8(vcpu, val);
5742                 break;
5743         default:
5744                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5745                 res = -1;
5746         }
5747
5748         return res;
5749 }
5750
5751 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5752 {
5753         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5754 }
5755
5756 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5757 {
5758         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5759 }
5760
5761 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5762 {
5763         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5764 }
5765
5766 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5767 {
5768         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5769 }
5770
5771 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5772 {
5773         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5774 }
5775
5776 static unsigned long emulator_get_cached_segment_base(
5777         struct x86_emulate_ctxt *ctxt, int seg)
5778 {
5779         return get_segment_base(emul_to_vcpu(ctxt), seg);
5780 }
5781
5782 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5783                                  struct desc_struct *desc, u32 *base3,
5784                                  int seg)
5785 {
5786         struct kvm_segment var;
5787
5788         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5789         *selector = var.selector;
5790
5791         if (var.unusable) {
5792                 memset(desc, 0, sizeof(*desc));
5793                 if (base3)
5794                         *base3 = 0;
5795                 return false;
5796         }
5797
5798         if (var.g)
5799                 var.limit >>= 12;
5800         set_desc_limit(desc, var.limit);
5801         set_desc_base(desc, (unsigned long)var.base);
5802 #ifdef CONFIG_X86_64
5803         if (base3)
5804                 *base3 = var.base >> 32;
5805 #endif
5806         desc->type = var.type;
5807         desc->s = var.s;
5808         desc->dpl = var.dpl;
5809         desc->p = var.present;
5810         desc->avl = var.avl;
5811         desc->l = var.l;
5812         desc->d = var.db;
5813         desc->g = var.g;
5814
5815         return true;
5816 }
5817
5818 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5819                                  struct desc_struct *desc, u32 base3,
5820                                  int seg)
5821 {
5822         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5823         struct kvm_segment var;
5824
5825         var.selector = selector;
5826         var.base = get_desc_base(desc);
5827 #ifdef CONFIG_X86_64
5828         var.base |= ((u64)base3) << 32;
5829 #endif
5830         var.limit = get_desc_limit(desc);
5831         if (desc->g)
5832                 var.limit = (var.limit << 12) | 0xfff;
5833         var.type = desc->type;
5834         var.dpl = desc->dpl;
5835         var.db = desc->d;
5836         var.s = desc->s;
5837         var.l = desc->l;
5838         var.g = desc->g;
5839         var.avl = desc->avl;
5840         var.present = desc->p;
5841         var.unusable = !var.present;
5842         var.padding = 0;
5843
5844         kvm_set_segment(vcpu, &var, seg);
5845         return;
5846 }
5847
5848 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5849                             u32 msr_index, u64 *pdata)
5850 {
5851         struct msr_data msr;
5852         int r;
5853
5854         msr.index = msr_index;
5855         msr.host_initiated = false;
5856         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5857         if (r)
5858                 return r;
5859
5860         *pdata = msr.data;
5861         return 0;
5862 }
5863
5864 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5865                             u32 msr_index, u64 data)
5866 {
5867         struct msr_data msr;
5868
5869         msr.data = data;
5870         msr.index = msr_index;
5871         msr.host_initiated = false;
5872         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5873 }
5874
5875 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5876 {
5877         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5878
5879         return vcpu->arch.smbase;
5880 }
5881
5882 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5883 {
5884         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5885
5886         vcpu->arch.smbase = smbase;
5887 }
5888
5889 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5890                               u32 pmc)
5891 {
5892         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5893 }
5894
5895 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5896                              u32 pmc, u64 *pdata)
5897 {
5898         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5899 }
5900
5901 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5902 {
5903         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5904 }
5905
5906 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5907                               struct x86_instruction_info *info,
5908                               enum x86_intercept_stage stage)
5909 {
5910         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5911 }
5912
5913 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5914                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5915 {
5916         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5917 }
5918
5919 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5920 {
5921         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5922 }
5923
5924 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5925 {
5926         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5927 }
5928
5929 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5930 {
5931         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5932 }
5933
5934 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5935 {
5936         return emul_to_vcpu(ctxt)->arch.hflags;
5937 }
5938
5939 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5940 {
5941         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5942 }
5943
5944 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5945 {
5946         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5947 }
5948
5949 static const struct x86_emulate_ops emulate_ops = {
5950         .read_gpr            = emulator_read_gpr,
5951         .write_gpr           = emulator_write_gpr,
5952         .read_std            = emulator_read_std,
5953         .write_std           = emulator_write_std,
5954         .read_phys           = kvm_read_guest_phys_system,
5955         .fetch               = kvm_fetch_guest_virt,
5956         .read_emulated       = emulator_read_emulated,
5957         .write_emulated      = emulator_write_emulated,
5958         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5959         .invlpg              = emulator_invlpg,
5960         .pio_in_emulated     = emulator_pio_in_emulated,
5961         .pio_out_emulated    = emulator_pio_out_emulated,
5962         .get_segment         = emulator_get_segment,
5963         .set_segment         = emulator_set_segment,
5964         .get_cached_segment_base = emulator_get_cached_segment_base,
5965         .get_gdt             = emulator_get_gdt,
5966         .get_idt             = emulator_get_idt,
5967         .set_gdt             = emulator_set_gdt,
5968         .set_idt             = emulator_set_idt,
5969         .get_cr              = emulator_get_cr,
5970         .set_cr              = emulator_set_cr,
5971         .cpl                 = emulator_get_cpl,
5972         .get_dr              = emulator_get_dr,
5973         .set_dr              = emulator_set_dr,
5974         .get_smbase          = emulator_get_smbase,
5975         .set_smbase          = emulator_set_smbase,
5976         .set_msr             = emulator_set_msr,
5977         .get_msr             = emulator_get_msr,
5978         .check_pmc           = emulator_check_pmc,
5979         .read_pmc            = emulator_read_pmc,
5980         .halt                = emulator_halt,
5981         .wbinvd              = emulator_wbinvd,
5982         .fix_hypercall       = emulator_fix_hypercall,
5983         .intercept           = emulator_intercept,
5984         .get_cpuid           = emulator_get_cpuid,
5985         .set_nmi_mask        = emulator_set_nmi_mask,
5986         .get_hflags          = emulator_get_hflags,
5987         .set_hflags          = emulator_set_hflags,
5988         .pre_leave_smm       = emulator_pre_leave_smm,
5989 };
5990
5991 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5992 {
5993         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5994         /*
5995          * an sti; sti; sequence only disable interrupts for the first
5996          * instruction. So, if the last instruction, be it emulated or
5997          * not, left the system with the INT_STI flag enabled, it
5998          * means that the last instruction is an sti. We should not
5999          * leave the flag on in this case. The same goes for mov ss
6000          */
6001         if (int_shadow & mask)
6002                 mask = 0;
6003         if (unlikely(int_shadow || mask)) {
6004                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6005                 if (!mask)
6006                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6007         }
6008 }
6009
6010 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6011 {
6012         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6013         if (ctxt->exception.vector == PF_VECTOR)
6014                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6015
6016         if (ctxt->exception.error_code_valid)
6017                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6018                                       ctxt->exception.error_code);
6019         else
6020                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6021         return false;
6022 }
6023
6024 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6025 {
6026         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6027         int cs_db, cs_l;
6028
6029         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6030
6031         ctxt->eflags = kvm_get_rflags(vcpu);
6032         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6033
6034         ctxt->eip = kvm_rip_read(vcpu);
6035         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6036                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6037                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6038                      cs_db                              ? X86EMUL_MODE_PROT32 :
6039                                                           X86EMUL_MODE_PROT16;
6040         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6041         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6042         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6043
6044         init_decode_cache(ctxt);
6045         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6046 }
6047
6048 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6049 {
6050         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6051         int ret;
6052
6053         init_emulate_ctxt(vcpu);
6054
6055         ctxt->op_bytes = 2;
6056         ctxt->ad_bytes = 2;
6057         ctxt->_eip = ctxt->eip + inc_eip;
6058         ret = emulate_int_real(ctxt, irq);
6059
6060         if (ret != X86EMUL_CONTINUE)
6061                 return EMULATE_FAIL;
6062
6063         ctxt->eip = ctxt->_eip;
6064         kvm_rip_write(vcpu, ctxt->eip);
6065         kvm_set_rflags(vcpu, ctxt->eflags);
6066
6067         return EMULATE_DONE;
6068 }
6069 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6070
6071 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6072 {
6073         int r = EMULATE_DONE;
6074
6075         ++vcpu->stat.insn_emulation_fail;
6076         trace_kvm_emulate_insn_failed(vcpu);
6077
6078         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6079                 return EMULATE_FAIL;
6080
6081         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6082                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6083                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6084                 vcpu->run->internal.ndata = 0;
6085                 r = EMULATE_USER_EXIT;
6086         }
6087
6088         kvm_queue_exception(vcpu, UD_VECTOR);
6089
6090         return r;
6091 }
6092
6093 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6094                                   bool write_fault_to_shadow_pgtable,
6095                                   int emulation_type)
6096 {
6097         gpa_t gpa = cr2;
6098         kvm_pfn_t pfn;
6099
6100         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6101                 return false;
6102
6103         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6104                 return false;
6105
6106         if (!vcpu->arch.mmu->direct_map) {
6107                 /*
6108                  * Write permission should be allowed since only
6109                  * write access need to be emulated.
6110                  */
6111                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6112
6113                 /*
6114                  * If the mapping is invalid in guest, let cpu retry
6115                  * it to generate fault.
6116                  */
6117                 if (gpa == UNMAPPED_GVA)
6118                         return true;
6119         }
6120
6121         /*
6122          * Do not retry the unhandleable instruction if it faults on the
6123          * readonly host memory, otherwise it will goto a infinite loop:
6124          * retry instruction -> write #PF -> emulation fail -> retry
6125          * instruction -> ...
6126          */
6127         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6128
6129         /*
6130          * If the instruction failed on the error pfn, it can not be fixed,
6131          * report the error to userspace.
6132          */
6133         if (is_error_noslot_pfn(pfn))
6134                 return false;
6135
6136         kvm_release_pfn_clean(pfn);
6137
6138         /* The instructions are well-emulated on direct mmu. */
6139         if (vcpu->arch.mmu->direct_map) {
6140                 unsigned int indirect_shadow_pages;
6141
6142                 spin_lock(&vcpu->kvm->mmu_lock);
6143                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6144                 spin_unlock(&vcpu->kvm->mmu_lock);
6145
6146                 if (indirect_shadow_pages)
6147                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6148
6149                 return true;
6150         }
6151
6152         /*
6153          * if emulation was due to access to shadowed page table
6154          * and it failed try to unshadow page and re-enter the
6155          * guest to let CPU execute the instruction.
6156          */
6157         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6158
6159         /*
6160          * If the access faults on its page table, it can not
6161          * be fixed by unprotecting shadow page and it should
6162          * be reported to userspace.
6163          */
6164         return !write_fault_to_shadow_pgtable;
6165 }
6166
6167 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6168                               unsigned long cr2,  int emulation_type)
6169 {
6170         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6171         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6172
6173         last_retry_eip = vcpu->arch.last_retry_eip;
6174         last_retry_addr = vcpu->arch.last_retry_addr;
6175
6176         /*
6177          * If the emulation is caused by #PF and it is non-page_table
6178          * writing instruction, it means the VM-EXIT is caused by shadow
6179          * page protected, we can zap the shadow page and retry this
6180          * instruction directly.
6181          *
6182          * Note: if the guest uses a non-page-table modifying instruction
6183          * on the PDE that points to the instruction, then we will unmap
6184          * the instruction and go to an infinite loop. So, we cache the
6185          * last retried eip and the last fault address, if we meet the eip
6186          * and the address again, we can break out of the potential infinite
6187          * loop.
6188          */
6189         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6190
6191         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6192                 return false;
6193
6194         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6195                 return false;
6196
6197         if (x86_page_table_writing_insn(ctxt))
6198                 return false;
6199
6200         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6201                 return false;
6202
6203         vcpu->arch.last_retry_eip = ctxt->eip;
6204         vcpu->arch.last_retry_addr = cr2;
6205
6206         if (!vcpu->arch.mmu->direct_map)
6207                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6208
6209         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6210
6211         return true;
6212 }
6213
6214 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6215 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6216
6217 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6218 {
6219         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6220                 /* This is a good place to trace that we are exiting SMM.  */
6221                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6222
6223                 /* Process a latched INIT or SMI, if any.  */
6224                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6225         }
6226
6227         kvm_mmu_reset_context(vcpu);
6228 }
6229
6230 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
6231 {
6232         unsigned changed = vcpu->arch.hflags ^ emul_flags;
6233
6234         vcpu->arch.hflags = emul_flags;
6235
6236         if (changed & HF_SMM_MASK)
6237                 kvm_smm_changed(vcpu);
6238 }
6239
6240 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6241                                 unsigned long *db)
6242 {
6243         u32 dr6 = 0;
6244         int i;
6245         u32 enable, rwlen;
6246
6247         enable = dr7;
6248         rwlen = dr7 >> 16;
6249         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6250                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6251                         dr6 |= (1 << i);
6252         return dr6;
6253 }
6254
6255 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6256 {
6257         struct kvm_run *kvm_run = vcpu->run;
6258
6259         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6260                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6261                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6262                 kvm_run->debug.arch.exception = DB_VECTOR;
6263                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6264                 *r = EMULATE_USER_EXIT;
6265         } else {
6266                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6267         }
6268 }
6269
6270 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6271 {
6272         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6273         int r = EMULATE_DONE;
6274
6275         kvm_x86_ops->skip_emulated_instruction(vcpu);
6276
6277         /*
6278          * rflags is the old, "raw" value of the flags.  The new value has
6279          * not been saved yet.
6280          *
6281          * This is correct even for TF set by the guest, because "the
6282          * processor will not generate this exception after the instruction
6283          * that sets the TF flag".
6284          */
6285         if (unlikely(rflags & X86_EFLAGS_TF))
6286                 kvm_vcpu_do_singlestep(vcpu, &r);
6287         return r == EMULATE_DONE;
6288 }
6289 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6290
6291 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6292 {
6293         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6294             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6295                 struct kvm_run *kvm_run = vcpu->run;
6296                 unsigned long eip = kvm_get_linear_rip(vcpu);
6297                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6298                                            vcpu->arch.guest_debug_dr7,
6299                                            vcpu->arch.eff_db);
6300
6301                 if (dr6 != 0) {
6302                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6303                         kvm_run->debug.arch.pc = eip;
6304                         kvm_run->debug.arch.exception = DB_VECTOR;
6305                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6306                         *r = EMULATE_USER_EXIT;
6307                         return true;
6308                 }
6309         }
6310
6311         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6312             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6313                 unsigned long eip = kvm_get_linear_rip(vcpu);
6314                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6315                                            vcpu->arch.dr7,
6316                                            vcpu->arch.db);
6317
6318                 if (dr6 != 0) {
6319                         vcpu->arch.dr6 &= ~15;
6320                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6321                         kvm_queue_exception(vcpu, DB_VECTOR);
6322                         *r = EMULATE_DONE;
6323                         return true;
6324                 }
6325         }
6326
6327         return false;
6328 }
6329
6330 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6331 {
6332         switch (ctxt->opcode_len) {
6333         case 1:
6334                 switch (ctxt->b) {
6335                 case 0xe4:      /* IN */
6336                 case 0xe5:
6337                 case 0xec:
6338                 case 0xed:
6339                 case 0xe6:      /* OUT */
6340                 case 0xe7:
6341                 case 0xee:
6342                 case 0xef:
6343                 case 0x6c:      /* INS */
6344                 case 0x6d:
6345                 case 0x6e:      /* OUTS */
6346                 case 0x6f:
6347                         return true;
6348                 }
6349                 break;
6350         case 2:
6351                 switch (ctxt->b) {
6352                 case 0x33:      /* RDPMC */
6353                         return true;
6354                 }
6355                 break;
6356         }
6357
6358         return false;
6359 }
6360
6361 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6362                             unsigned long cr2,
6363                             int emulation_type,
6364                             void *insn,
6365                             int insn_len)
6366 {
6367         int r;
6368         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6369         bool writeback = true;
6370         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6371
6372         vcpu->arch.l1tf_flush_l1d = true;
6373
6374         /*
6375          * Clear write_fault_to_shadow_pgtable here to ensure it is
6376          * never reused.
6377          */
6378         vcpu->arch.write_fault_to_shadow_pgtable = false;
6379         kvm_clear_exception_queue(vcpu);
6380
6381         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6382                 init_emulate_ctxt(vcpu);
6383
6384                 /*
6385                  * We will reenter on the same instruction since
6386                  * we do not set complete_userspace_io.  This does not
6387                  * handle watchpoints yet, those would be handled in
6388                  * the emulate_ops.
6389                  */
6390                 if (!(emulation_type & EMULTYPE_SKIP) &&
6391                     kvm_vcpu_check_breakpoint(vcpu, &r))
6392                         return r;
6393
6394                 ctxt->interruptibility = 0;
6395                 ctxt->have_exception = false;
6396                 ctxt->exception.vector = -1;
6397                 ctxt->perm_ok = false;
6398
6399                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6400
6401                 r = x86_decode_insn(ctxt, insn, insn_len);
6402
6403                 trace_kvm_emulate_insn_start(vcpu);
6404                 ++vcpu->stat.insn_emulation;
6405                 if (r != EMULATION_OK)  {
6406                         if (emulation_type & EMULTYPE_TRAP_UD)
6407                                 return EMULATE_FAIL;
6408                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6409                                                 emulation_type))
6410                                 return EMULATE_DONE;
6411                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6412                                 return EMULATE_DONE;
6413                         if (emulation_type & EMULTYPE_SKIP)
6414                                 return EMULATE_FAIL;
6415                         return handle_emulation_failure(vcpu, emulation_type);
6416                 }
6417         }
6418
6419         if ((emulation_type & EMULTYPE_VMWARE) &&
6420             !is_vmware_backdoor_opcode(ctxt))
6421                 return EMULATE_FAIL;
6422
6423         if (emulation_type & EMULTYPE_SKIP) {
6424                 kvm_rip_write(vcpu, ctxt->_eip);
6425                 if (ctxt->eflags & X86_EFLAGS_RF)
6426                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6427                 return EMULATE_DONE;
6428         }
6429
6430         if (retry_instruction(ctxt, cr2, emulation_type))
6431                 return EMULATE_DONE;
6432
6433         /* this is needed for vmware backdoor interface to work since it
6434            changes registers values  during IO operation */
6435         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6436                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6437                 emulator_invalidate_register_cache(ctxt);
6438         }
6439
6440 restart:
6441         /* Save the faulting GPA (cr2) in the address field */
6442         ctxt->exception.address = cr2;
6443
6444         r = x86_emulate_insn(ctxt);
6445
6446         if (r == EMULATION_INTERCEPTED)
6447                 return EMULATE_DONE;
6448
6449         if (r == EMULATION_FAILED) {
6450                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6451                                         emulation_type))
6452                         return EMULATE_DONE;
6453
6454                 return handle_emulation_failure(vcpu, emulation_type);
6455         }
6456
6457         if (ctxt->have_exception) {
6458                 r = EMULATE_DONE;
6459                 if (inject_emulated_exception(vcpu))
6460                         return r;
6461         } else if (vcpu->arch.pio.count) {
6462                 if (!vcpu->arch.pio.in) {
6463                         /* FIXME: return into emulator if single-stepping.  */
6464                         vcpu->arch.pio.count = 0;
6465                 } else {
6466                         writeback = false;
6467                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6468                 }
6469                 r = EMULATE_USER_EXIT;
6470         } else if (vcpu->mmio_needed) {
6471                 if (!vcpu->mmio_is_write)
6472                         writeback = false;
6473                 r = EMULATE_USER_EXIT;
6474                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6475         } else if (r == EMULATION_RESTART)
6476                 goto restart;
6477         else
6478                 r = EMULATE_DONE;
6479
6480         if (writeback) {
6481                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6482                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6483                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6484                 kvm_rip_write(vcpu, ctxt->eip);
6485                 if (r == EMULATE_DONE && ctxt->tf)
6486                         kvm_vcpu_do_singlestep(vcpu, &r);
6487                 if (!ctxt->have_exception ||
6488                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6489                         __kvm_set_rflags(vcpu, ctxt->eflags);
6490
6491                 /*
6492                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6493                  * do nothing, and it will be requested again as soon as
6494                  * the shadow expires.  But we still need to check here,
6495                  * because POPF has no interrupt shadow.
6496                  */
6497                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6498                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6499         } else
6500                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6501
6502         return r;
6503 }
6504
6505 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6506 {
6507         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6508 }
6509 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6510
6511 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6512                                         void *insn, int insn_len)
6513 {
6514         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6515 }
6516 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6517
6518 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6519                             unsigned short port)
6520 {
6521         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6522         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6523                                             size, port, &val, 1);
6524         /* do not return to emulator after return from userspace */
6525         vcpu->arch.pio.count = 0;
6526         return ret;
6527 }
6528
6529 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6530 {
6531         unsigned long val;
6532
6533         /* We should only ever be called with arch.pio.count equal to 1 */
6534         BUG_ON(vcpu->arch.pio.count != 1);
6535
6536         /* For size less than 4 we merge, else we zero extend */
6537         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6538                                         : 0;
6539
6540         /*
6541          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6542          * the copy and tracing
6543          */
6544         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6545                                  vcpu->arch.pio.port, &val, 1);
6546         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6547
6548         return 1;
6549 }
6550
6551 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6552                            unsigned short port)
6553 {
6554         unsigned long val;
6555         int ret;
6556
6557         /* For size less than 4 we merge, else we zero extend */
6558         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6559
6560         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6561                                        &val, 1);
6562         if (ret) {
6563                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6564                 return ret;
6565         }
6566
6567         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6568
6569         return 0;
6570 }
6571
6572 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6573 {
6574         int ret = kvm_skip_emulated_instruction(vcpu);
6575
6576         /*
6577          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6578          * KVM_EXIT_DEBUG here.
6579          */
6580         if (in)
6581                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6582         else
6583                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6584 }
6585 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6586
6587 static int kvmclock_cpu_down_prep(unsigned int cpu)
6588 {
6589         __this_cpu_write(cpu_tsc_khz, 0);
6590         return 0;
6591 }
6592
6593 static void tsc_khz_changed(void *data)
6594 {
6595         struct cpufreq_freqs *freq = data;
6596         unsigned long khz = 0;
6597
6598         if (data)
6599                 khz = freq->new;
6600         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6601                 khz = cpufreq_quick_get(raw_smp_processor_id());
6602         if (!khz)
6603                 khz = tsc_khz;
6604         __this_cpu_write(cpu_tsc_khz, khz);
6605 }
6606
6607 #ifdef CONFIG_X86_64
6608 static void kvm_hyperv_tsc_notifier(void)
6609 {
6610         struct kvm *kvm;
6611         struct kvm_vcpu *vcpu;
6612         int cpu;
6613
6614         spin_lock(&kvm_lock);
6615         list_for_each_entry(kvm, &vm_list, vm_list)
6616                 kvm_make_mclock_inprogress_request(kvm);
6617
6618         hyperv_stop_tsc_emulation();
6619
6620         /* TSC frequency always matches when on Hyper-V */
6621         for_each_present_cpu(cpu)
6622                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6623         kvm_max_guest_tsc_khz = tsc_khz;
6624
6625         list_for_each_entry(kvm, &vm_list, vm_list) {
6626                 struct kvm_arch *ka = &kvm->arch;
6627
6628                 spin_lock(&ka->pvclock_gtod_sync_lock);
6629
6630                 pvclock_update_vm_gtod_copy(kvm);
6631
6632                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6633                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6634
6635                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6636                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6637
6638                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6639         }
6640         spin_unlock(&kvm_lock);
6641 }
6642 #endif
6643
6644 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6645                                      void *data)
6646 {
6647         struct cpufreq_freqs *freq = data;
6648         struct kvm *kvm;
6649         struct kvm_vcpu *vcpu;
6650         int i, send_ipi = 0;
6651
6652         /*
6653          * We allow guests to temporarily run on slowing clocks,
6654          * provided we notify them after, or to run on accelerating
6655          * clocks, provided we notify them before.  Thus time never
6656          * goes backwards.
6657          *
6658          * However, we have a problem.  We can't atomically update
6659          * the frequency of a given CPU from this function; it is
6660          * merely a notifier, which can be called from any CPU.
6661          * Changing the TSC frequency at arbitrary points in time
6662          * requires a recomputation of local variables related to
6663          * the TSC for each VCPU.  We must flag these local variables
6664          * to be updated and be sure the update takes place with the
6665          * new frequency before any guests proceed.
6666          *
6667          * Unfortunately, the combination of hotplug CPU and frequency
6668          * change creates an intractable locking scenario; the order
6669          * of when these callouts happen is undefined with respect to
6670          * CPU hotplug, and they can race with each other.  As such,
6671          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6672          * undefined; you can actually have a CPU frequency change take
6673          * place in between the computation of X and the setting of the
6674          * variable.  To protect against this problem, all updates of
6675          * the per_cpu tsc_khz variable are done in an interrupt
6676          * protected IPI, and all callers wishing to update the value
6677          * must wait for a synchronous IPI to complete (which is trivial
6678          * if the caller is on the CPU already).  This establishes the
6679          * necessary total order on variable updates.
6680          *
6681          * Note that because a guest time update may take place
6682          * anytime after the setting of the VCPU's request bit, the
6683          * correct TSC value must be set before the request.  However,
6684          * to ensure the update actually makes it to any guest which
6685          * starts running in hardware virtualization between the set
6686          * and the acquisition of the spinlock, we must also ping the
6687          * CPU after setting the request bit.
6688          *
6689          */
6690
6691         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6692                 return 0;
6693         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6694                 return 0;
6695
6696         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6697
6698         spin_lock(&kvm_lock);
6699         list_for_each_entry(kvm, &vm_list, vm_list) {
6700                 kvm_for_each_vcpu(i, vcpu, kvm) {
6701                         if (vcpu->cpu != freq->cpu)
6702                                 continue;
6703                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6704                         if (vcpu->cpu != smp_processor_id())
6705                                 send_ipi = 1;
6706                 }
6707         }
6708         spin_unlock(&kvm_lock);
6709
6710         if (freq->old < freq->new && send_ipi) {
6711                 /*
6712                  * We upscale the frequency.  Must make the guest
6713                  * doesn't see old kvmclock values while running with
6714                  * the new frequency, otherwise we risk the guest sees
6715                  * time go backwards.
6716                  *
6717                  * In case we update the frequency for another cpu
6718                  * (which might be in guest context) send an interrupt
6719                  * to kick the cpu out of guest context.  Next time
6720                  * guest context is entered kvmclock will be updated,
6721                  * so the guest will not see stale values.
6722                  */
6723                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6724         }
6725         return 0;
6726 }
6727
6728 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6729         .notifier_call  = kvmclock_cpufreq_notifier
6730 };
6731
6732 static int kvmclock_cpu_online(unsigned int cpu)
6733 {
6734         tsc_khz_changed(NULL);
6735         return 0;
6736 }
6737
6738 static void kvm_timer_init(void)
6739 {
6740         max_tsc_khz = tsc_khz;
6741
6742         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6743 #ifdef CONFIG_CPU_FREQ
6744                 struct cpufreq_policy policy;
6745                 int cpu;
6746
6747                 memset(&policy, 0, sizeof(policy));
6748                 cpu = get_cpu();
6749                 cpufreq_get_policy(&policy, cpu);
6750                 if (policy.cpuinfo.max_freq)
6751                         max_tsc_khz = policy.cpuinfo.max_freq;
6752                 put_cpu();
6753 #endif
6754                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6755                                           CPUFREQ_TRANSITION_NOTIFIER);
6756         }
6757         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6758
6759         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6760                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6761 }
6762
6763 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6764 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6765
6766 int kvm_is_in_guest(void)
6767 {
6768         return __this_cpu_read(current_vcpu) != NULL;
6769 }
6770
6771 static int kvm_is_user_mode(void)
6772 {
6773         int user_mode = 3;
6774
6775         if (__this_cpu_read(current_vcpu))
6776                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6777
6778         return user_mode != 0;
6779 }
6780
6781 static unsigned long kvm_get_guest_ip(void)
6782 {
6783         unsigned long ip = 0;
6784
6785         if (__this_cpu_read(current_vcpu))
6786                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6787
6788         return ip;
6789 }
6790
6791 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6792         .is_in_guest            = kvm_is_in_guest,
6793         .is_user_mode           = kvm_is_user_mode,
6794         .get_guest_ip           = kvm_get_guest_ip,
6795 };
6796
6797 static void kvm_set_mmio_spte_mask(void)
6798 {
6799         u64 mask;
6800         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6801
6802         /*
6803          * Set the reserved bits and the present bit of an paging-structure
6804          * entry to generate page fault with PFER.RSV = 1.
6805          */
6806
6807         /*
6808          * Mask the uppermost physical address bit, which would be reserved as
6809          * long as the supported physical address width is less than 52.
6810          */
6811         mask = 1ull << 51;
6812
6813         /* Set the present bit. */
6814         mask |= 1ull;
6815
6816         /*
6817          * If reserved bit is not supported, clear the present bit to disable
6818          * mmio page fault.
6819          */
6820         if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6821                 mask &= ~1ull;
6822
6823         kvm_mmu_set_mmio_spte_mask(mask, mask);
6824 }
6825
6826 #ifdef CONFIG_X86_64
6827 static void pvclock_gtod_update_fn(struct work_struct *work)
6828 {
6829         struct kvm *kvm;
6830
6831         struct kvm_vcpu *vcpu;
6832         int i;
6833
6834         spin_lock(&kvm_lock);
6835         list_for_each_entry(kvm, &vm_list, vm_list)
6836                 kvm_for_each_vcpu(i, vcpu, kvm)
6837                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6838         atomic_set(&kvm_guest_has_master_clock, 0);
6839         spin_unlock(&kvm_lock);
6840 }
6841
6842 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6843
6844 /*
6845  * Notification about pvclock gtod data update.
6846  */
6847 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6848                                void *priv)
6849 {
6850         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6851         struct timekeeper *tk = priv;
6852
6853         update_pvclock_gtod(tk);
6854
6855         /* disable master clock if host does not trust, or does not
6856          * use, TSC based clocksource.
6857          */
6858         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6859             atomic_read(&kvm_guest_has_master_clock) != 0)
6860                 queue_work(system_long_wq, &pvclock_gtod_work);
6861
6862         return 0;
6863 }
6864
6865 static struct notifier_block pvclock_gtod_notifier = {
6866         .notifier_call = pvclock_gtod_notify,
6867 };
6868 #endif
6869
6870 int kvm_arch_init(void *opaque)
6871 {
6872         int r;
6873         struct kvm_x86_ops *ops = opaque;
6874
6875         if (kvm_x86_ops) {
6876                 printk(KERN_ERR "kvm: already loaded the other module\n");
6877                 r = -EEXIST;
6878                 goto out;
6879         }
6880
6881         if (!ops->cpu_has_kvm_support()) {
6882                 printk(KERN_ERR "kvm: no hardware support\n");
6883                 r = -EOPNOTSUPP;
6884                 goto out;
6885         }
6886         if (ops->disabled_by_bios()) {
6887                 printk(KERN_ERR "kvm: disabled by bios\n");
6888                 r = -EOPNOTSUPP;
6889                 goto out;
6890         }
6891
6892         /*
6893          * KVM explicitly assumes that the guest has an FPU and
6894          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
6895          * vCPU's FPU state as a fxregs_state struct.
6896          */
6897         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
6898                 printk(KERN_ERR "kvm: inadequate fpu\n");
6899                 r = -EOPNOTSUPP;
6900                 goto out;
6901         }
6902
6903         r = -ENOMEM;
6904         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
6905                                           __alignof__(struct fpu), SLAB_ACCOUNT,
6906                                           NULL);
6907         if (!x86_fpu_cache) {
6908                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
6909                 goto out;
6910         }
6911
6912         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6913         if (!shared_msrs) {
6914                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6915                 goto out_free_x86_fpu_cache;
6916         }
6917
6918         r = kvm_mmu_module_init();
6919         if (r)
6920                 goto out_free_percpu;
6921
6922         kvm_set_mmio_spte_mask();
6923
6924         kvm_x86_ops = ops;
6925
6926         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6927                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6928                         PT_PRESENT_MASK, 0, sme_me_mask);
6929         kvm_timer_init();
6930
6931         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6932
6933         if (boot_cpu_has(X86_FEATURE_XSAVE))
6934                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6935
6936         kvm_lapic_init();
6937 #ifdef CONFIG_X86_64
6938         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6939
6940         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6941                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6942 #endif
6943
6944         return 0;
6945
6946 out_free_percpu:
6947         free_percpu(shared_msrs);
6948 out_free_x86_fpu_cache:
6949         kmem_cache_destroy(x86_fpu_cache);
6950 out:
6951         return r;
6952 }
6953
6954 void kvm_arch_exit(void)
6955 {
6956 #ifdef CONFIG_X86_64
6957         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6958                 clear_hv_tscchange_cb();
6959 #endif
6960         kvm_lapic_exit();
6961         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6962
6963         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6964                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6965                                             CPUFREQ_TRANSITION_NOTIFIER);
6966         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6967 #ifdef CONFIG_X86_64
6968         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6969 #endif
6970         kvm_x86_ops = NULL;
6971         kvm_mmu_module_exit();
6972         free_percpu(shared_msrs);
6973         kmem_cache_destroy(x86_fpu_cache);
6974 }
6975
6976 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6977 {
6978         ++vcpu->stat.halt_exits;
6979         if (lapic_in_kernel(vcpu)) {
6980                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6981                 return 1;
6982         } else {
6983                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6984                 return 0;
6985         }
6986 }
6987 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6988
6989 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6990 {
6991         int ret = kvm_skip_emulated_instruction(vcpu);
6992         /*
6993          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6994          * KVM_EXIT_DEBUG here.
6995          */
6996         return kvm_vcpu_halt(vcpu) && ret;
6997 }
6998 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6999
7000 #ifdef CONFIG_X86_64
7001 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7002                                 unsigned long clock_type)
7003 {
7004         struct kvm_clock_pairing clock_pairing;
7005         struct timespec64 ts;
7006         u64 cycle;
7007         int ret;
7008
7009         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7010                 return -KVM_EOPNOTSUPP;
7011
7012         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7013                 return -KVM_EOPNOTSUPP;
7014
7015         clock_pairing.sec = ts.tv_sec;
7016         clock_pairing.nsec = ts.tv_nsec;
7017         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7018         clock_pairing.flags = 0;
7019         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7020
7021         ret = 0;
7022         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7023                             sizeof(struct kvm_clock_pairing)))
7024                 ret = -KVM_EFAULT;
7025
7026         return ret;
7027 }
7028 #endif
7029
7030 /*
7031  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7032  *
7033  * @apicid - apicid of vcpu to be kicked.
7034  */
7035 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7036 {
7037         struct kvm_lapic_irq lapic_irq;
7038
7039         lapic_irq.shorthand = 0;
7040         lapic_irq.dest_mode = 0;
7041         lapic_irq.level = 0;
7042         lapic_irq.dest_id = apicid;
7043         lapic_irq.msi_redir_hint = false;
7044
7045         lapic_irq.delivery_mode = APIC_DM_REMRD;
7046         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7047 }
7048
7049 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7050 {
7051         vcpu->arch.apicv_active = false;
7052         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7053 }
7054
7055 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7056 {
7057         unsigned long nr, a0, a1, a2, a3, ret;
7058         int op_64_bit;
7059
7060         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7061                 return kvm_hv_hypercall(vcpu);
7062
7063         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
7064         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
7065         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
7066         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
7067         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
7068
7069         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7070
7071         op_64_bit = is_64_bit_mode(vcpu);
7072         if (!op_64_bit) {
7073                 nr &= 0xFFFFFFFF;
7074                 a0 &= 0xFFFFFFFF;
7075                 a1 &= 0xFFFFFFFF;
7076                 a2 &= 0xFFFFFFFF;
7077                 a3 &= 0xFFFFFFFF;
7078         }
7079
7080         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7081                 ret = -KVM_EPERM;
7082                 goto out;
7083         }
7084
7085         switch (nr) {
7086         case KVM_HC_VAPIC_POLL_IRQ:
7087                 ret = 0;
7088                 break;
7089         case KVM_HC_KICK_CPU:
7090                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7091                 ret = 0;
7092                 break;
7093 #ifdef CONFIG_X86_64
7094         case KVM_HC_CLOCK_PAIRING:
7095                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7096                 break;
7097 #endif
7098         case KVM_HC_SEND_IPI:
7099                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7100                 break;
7101         default:
7102                 ret = -KVM_ENOSYS;
7103                 break;
7104         }
7105 out:
7106         if (!op_64_bit)
7107                 ret = (u32)ret;
7108         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
7109
7110         ++vcpu->stat.hypercalls;
7111         return kvm_skip_emulated_instruction(vcpu);
7112 }
7113 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7114
7115 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7116 {
7117         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7118         char instruction[3];
7119         unsigned long rip = kvm_rip_read(vcpu);
7120
7121         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7122
7123         return emulator_write_emulated(ctxt, rip, instruction, 3,
7124                 &ctxt->exception);
7125 }
7126
7127 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7128 {
7129         return vcpu->run->request_interrupt_window &&
7130                 likely(!pic_in_kernel(vcpu->kvm));
7131 }
7132
7133 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7134 {
7135         struct kvm_run *kvm_run = vcpu->run;
7136
7137         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7138         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7139         kvm_run->cr8 = kvm_get_cr8(vcpu);
7140         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7141         kvm_run->ready_for_interrupt_injection =
7142                 pic_in_kernel(vcpu->kvm) ||
7143                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7144 }
7145
7146 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7147 {
7148         int max_irr, tpr;
7149
7150         if (!kvm_x86_ops->update_cr8_intercept)
7151                 return;
7152
7153         if (!lapic_in_kernel(vcpu))
7154                 return;
7155
7156         if (vcpu->arch.apicv_active)
7157                 return;
7158
7159         if (!vcpu->arch.apic->vapic_addr)
7160                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7161         else
7162                 max_irr = -1;
7163
7164         if (max_irr != -1)
7165                 max_irr >>= 4;
7166
7167         tpr = kvm_lapic_get_cr8(vcpu);
7168
7169         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7170 }
7171
7172 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7173 {
7174         int r;
7175
7176         /* try to reinject previous events if any */
7177
7178         if (vcpu->arch.exception.injected)
7179                 kvm_x86_ops->queue_exception(vcpu);
7180         /*
7181          * Do not inject an NMI or interrupt if there is a pending
7182          * exception.  Exceptions and interrupts are recognized at
7183          * instruction boundaries, i.e. the start of an instruction.
7184          * Trap-like exceptions, e.g. #DB, have higher priority than
7185          * NMIs and interrupts, i.e. traps are recognized before an
7186          * NMI/interrupt that's pending on the same instruction.
7187          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7188          * priority, but are only generated (pended) during instruction
7189          * execution, i.e. a pending fault-like exception means the
7190          * fault occurred on the *previous* instruction and must be
7191          * serviced prior to recognizing any new events in order to
7192          * fully complete the previous instruction.
7193          */
7194         else if (!vcpu->arch.exception.pending) {
7195                 if (vcpu->arch.nmi_injected)
7196                         kvm_x86_ops->set_nmi(vcpu);
7197                 else if (vcpu->arch.interrupt.injected)
7198                         kvm_x86_ops->set_irq(vcpu);
7199         }
7200
7201         /*
7202          * Call check_nested_events() even if we reinjected a previous event
7203          * in order for caller to determine if it should require immediate-exit
7204          * from L2 to L1 due to pending L1 events which require exit
7205          * from L2 to L1.
7206          */
7207         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7208                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7209                 if (r != 0)
7210                         return r;
7211         }
7212
7213         /* try to inject new event if pending */
7214         if (vcpu->arch.exception.pending) {
7215                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7216                                         vcpu->arch.exception.has_error_code,
7217                                         vcpu->arch.exception.error_code);
7218
7219                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7220                 vcpu->arch.exception.pending = false;
7221                 vcpu->arch.exception.injected = true;
7222
7223                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7224                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7225                                              X86_EFLAGS_RF);
7226
7227                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7228                         /*
7229                          * This code assumes that nSVM doesn't use
7230                          * check_nested_events(). If it does, the
7231                          * DR6/DR7 changes should happen before L1
7232                          * gets a #VMEXIT for an intercepted #DB in
7233                          * L2.  (Under VMX, on the other hand, the
7234                          * DR6/DR7 changes should not happen in the
7235                          * event of a VM-exit to L1 for an intercepted
7236                          * #DB in L2.)
7237                          */
7238                         kvm_deliver_exception_payload(vcpu);
7239                         if (vcpu->arch.dr7 & DR7_GD) {
7240                                 vcpu->arch.dr7 &= ~DR7_GD;
7241                                 kvm_update_dr7(vcpu);
7242                         }
7243                 }
7244
7245                 kvm_x86_ops->queue_exception(vcpu);
7246         }
7247
7248         /* Don't consider new event if we re-injected an event */
7249         if (kvm_event_needs_reinjection(vcpu))
7250                 return 0;
7251
7252         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7253             kvm_x86_ops->smi_allowed(vcpu)) {
7254                 vcpu->arch.smi_pending = false;
7255                 ++vcpu->arch.smi_count;
7256                 enter_smm(vcpu);
7257         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7258                 --vcpu->arch.nmi_pending;
7259                 vcpu->arch.nmi_injected = true;
7260                 kvm_x86_ops->set_nmi(vcpu);
7261         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7262                 /*
7263                  * Because interrupts can be injected asynchronously, we are
7264                  * calling check_nested_events again here to avoid a race condition.
7265                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7266                  * proposal and current concerns.  Perhaps we should be setting
7267                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7268                  */
7269                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7270                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7271                         if (r != 0)
7272                                 return r;
7273                 }
7274                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7275                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7276                                             false);
7277                         kvm_x86_ops->set_irq(vcpu);
7278                 }
7279         }
7280
7281         return 0;
7282 }
7283
7284 static void process_nmi(struct kvm_vcpu *vcpu)
7285 {
7286         unsigned limit = 2;
7287
7288         /*
7289          * x86 is limited to one NMI running, and one NMI pending after it.
7290          * If an NMI is already in progress, limit further NMIs to just one.
7291          * Otherwise, allow two (and we'll inject the first one immediately).
7292          */
7293         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7294                 limit = 1;
7295
7296         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7297         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7298         kvm_make_request(KVM_REQ_EVENT, vcpu);
7299 }
7300
7301 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7302 {
7303         u32 flags = 0;
7304         flags |= seg->g       << 23;
7305         flags |= seg->db      << 22;
7306         flags |= seg->l       << 21;
7307         flags |= seg->avl     << 20;
7308         flags |= seg->present << 15;
7309         flags |= seg->dpl     << 13;
7310         flags |= seg->s       << 12;
7311         flags |= seg->type    << 8;
7312         return flags;
7313 }
7314
7315 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7316 {
7317         struct kvm_segment seg;
7318         int offset;
7319
7320         kvm_get_segment(vcpu, &seg, n);
7321         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7322
7323         if (n < 3)
7324                 offset = 0x7f84 + n * 12;
7325         else
7326                 offset = 0x7f2c + (n - 3) * 12;
7327
7328         put_smstate(u32, buf, offset + 8, seg.base);
7329         put_smstate(u32, buf, offset + 4, seg.limit);
7330         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7331 }
7332
7333 #ifdef CONFIG_X86_64
7334 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7335 {
7336         struct kvm_segment seg;
7337         int offset;
7338         u16 flags;
7339
7340         kvm_get_segment(vcpu, &seg, n);
7341         offset = 0x7e00 + n * 16;
7342
7343         flags = enter_smm_get_segment_flags(&seg) >> 8;
7344         put_smstate(u16, buf, offset, seg.selector);
7345         put_smstate(u16, buf, offset + 2, flags);
7346         put_smstate(u32, buf, offset + 4, seg.limit);
7347         put_smstate(u64, buf, offset + 8, seg.base);
7348 }
7349 #endif
7350
7351 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7352 {
7353         struct desc_ptr dt;
7354         struct kvm_segment seg;
7355         unsigned long val;
7356         int i;
7357
7358         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7359         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7360         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7361         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7362
7363         for (i = 0; i < 8; i++)
7364                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7365
7366         kvm_get_dr(vcpu, 6, &val);
7367         put_smstate(u32, buf, 0x7fcc, (u32)val);
7368         kvm_get_dr(vcpu, 7, &val);
7369         put_smstate(u32, buf, 0x7fc8, (u32)val);
7370
7371         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7372         put_smstate(u32, buf, 0x7fc4, seg.selector);
7373         put_smstate(u32, buf, 0x7f64, seg.base);
7374         put_smstate(u32, buf, 0x7f60, seg.limit);
7375         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7376
7377         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7378         put_smstate(u32, buf, 0x7fc0, seg.selector);
7379         put_smstate(u32, buf, 0x7f80, seg.base);
7380         put_smstate(u32, buf, 0x7f7c, seg.limit);
7381         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7382
7383         kvm_x86_ops->get_gdt(vcpu, &dt);
7384         put_smstate(u32, buf, 0x7f74, dt.address);
7385         put_smstate(u32, buf, 0x7f70, dt.size);
7386
7387         kvm_x86_ops->get_idt(vcpu, &dt);
7388         put_smstate(u32, buf, 0x7f58, dt.address);
7389         put_smstate(u32, buf, 0x7f54, dt.size);
7390
7391         for (i = 0; i < 6; i++)
7392                 enter_smm_save_seg_32(vcpu, buf, i);
7393
7394         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7395
7396         /* revision id */
7397         put_smstate(u32, buf, 0x7efc, 0x00020000);
7398         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7399 }
7400
7401 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7402 {
7403 #ifdef CONFIG_X86_64
7404         struct desc_ptr dt;
7405         struct kvm_segment seg;
7406         unsigned long val;
7407         int i;
7408
7409         for (i = 0; i < 16; i++)
7410                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7411
7412         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7413         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7414
7415         kvm_get_dr(vcpu, 6, &val);
7416         put_smstate(u64, buf, 0x7f68, val);
7417         kvm_get_dr(vcpu, 7, &val);
7418         put_smstate(u64, buf, 0x7f60, val);
7419
7420         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7421         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7422         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7423
7424         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7425
7426         /* revision id */
7427         put_smstate(u32, buf, 0x7efc, 0x00020064);
7428
7429         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7430
7431         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7432         put_smstate(u16, buf, 0x7e90, seg.selector);
7433         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7434         put_smstate(u32, buf, 0x7e94, seg.limit);
7435         put_smstate(u64, buf, 0x7e98, seg.base);
7436
7437         kvm_x86_ops->get_idt(vcpu, &dt);
7438         put_smstate(u32, buf, 0x7e84, dt.size);
7439         put_smstate(u64, buf, 0x7e88, dt.address);
7440
7441         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7442         put_smstate(u16, buf, 0x7e70, seg.selector);
7443         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7444         put_smstate(u32, buf, 0x7e74, seg.limit);
7445         put_smstate(u64, buf, 0x7e78, seg.base);
7446
7447         kvm_x86_ops->get_gdt(vcpu, &dt);
7448         put_smstate(u32, buf, 0x7e64, dt.size);
7449         put_smstate(u64, buf, 0x7e68, dt.address);
7450
7451         for (i = 0; i < 6; i++)
7452                 enter_smm_save_seg_64(vcpu, buf, i);
7453 #else
7454         WARN_ON_ONCE(1);
7455 #endif
7456 }
7457
7458 static void enter_smm(struct kvm_vcpu *vcpu)
7459 {
7460         struct kvm_segment cs, ds;
7461         struct desc_ptr dt;
7462         char buf[512];
7463         u32 cr0;
7464
7465         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7466         memset(buf, 0, 512);
7467         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7468                 enter_smm_save_state_64(vcpu, buf);
7469         else
7470                 enter_smm_save_state_32(vcpu, buf);
7471
7472         /*
7473          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7474          * vCPU state (e.g. leave guest mode) after we've saved the state into
7475          * the SMM state-save area.
7476          */
7477         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7478
7479         vcpu->arch.hflags |= HF_SMM_MASK;
7480         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7481
7482         if (kvm_x86_ops->get_nmi_mask(vcpu))
7483                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7484         else
7485                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7486
7487         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7488         kvm_rip_write(vcpu, 0x8000);
7489
7490         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7491         kvm_x86_ops->set_cr0(vcpu, cr0);
7492         vcpu->arch.cr0 = cr0;
7493
7494         kvm_x86_ops->set_cr4(vcpu, 0);
7495
7496         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7497         dt.address = dt.size = 0;
7498         kvm_x86_ops->set_idt(vcpu, &dt);
7499
7500         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7501
7502         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7503         cs.base = vcpu->arch.smbase;
7504
7505         ds.selector = 0;
7506         ds.base = 0;
7507
7508         cs.limit    = ds.limit = 0xffffffff;
7509         cs.type     = ds.type = 0x3;
7510         cs.dpl      = ds.dpl = 0;
7511         cs.db       = ds.db = 0;
7512         cs.s        = ds.s = 1;
7513         cs.l        = ds.l = 0;
7514         cs.g        = ds.g = 1;
7515         cs.avl      = ds.avl = 0;
7516         cs.present  = ds.present = 1;
7517         cs.unusable = ds.unusable = 0;
7518         cs.padding  = ds.padding = 0;
7519
7520         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7521         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7522         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7523         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7524         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7525         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7526
7527         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7528                 kvm_x86_ops->set_efer(vcpu, 0);
7529
7530         kvm_update_cpuid(vcpu);
7531         kvm_mmu_reset_context(vcpu);
7532 }
7533
7534 static void process_smi(struct kvm_vcpu *vcpu)
7535 {
7536         vcpu->arch.smi_pending = true;
7537         kvm_make_request(KVM_REQ_EVENT, vcpu);
7538 }
7539
7540 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7541 {
7542         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7543 }
7544
7545 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7546 {
7547         if (!kvm_apic_present(vcpu))
7548                 return;
7549
7550         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7551
7552         if (irqchip_split(vcpu->kvm))
7553                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7554         else {
7555                 if (vcpu->arch.apicv_active)
7556                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7557                 if (ioapic_in_kernel(vcpu->kvm))
7558                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7559         }
7560
7561         if (is_guest_mode(vcpu))
7562                 vcpu->arch.load_eoi_exitmap_pending = true;
7563         else
7564                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7565 }
7566
7567 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7568 {
7569         u64 eoi_exit_bitmap[4];
7570
7571         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7572                 return;
7573
7574         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7575                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7576         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7577 }
7578
7579 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7580                 unsigned long start, unsigned long end,
7581                 bool blockable)
7582 {
7583         unsigned long apic_address;
7584
7585         /*
7586          * The physical address of apic access page is stored in the VMCS.
7587          * Update it when it becomes invalid.
7588          */
7589         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7590         if (start <= apic_address && apic_address < end)
7591                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7592
7593         return 0;
7594 }
7595
7596 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7597 {
7598         struct page *page = NULL;
7599
7600         if (!lapic_in_kernel(vcpu))
7601                 return;
7602
7603         if (!kvm_x86_ops->set_apic_access_page_addr)
7604                 return;
7605
7606         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7607         if (is_error_page(page))
7608                 return;
7609         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7610
7611         /*
7612          * Do not pin apic access page in memory, the MMU notifier
7613          * will call us again if it is migrated or swapped out.
7614          */
7615         put_page(page);
7616 }
7617 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7618
7619 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7620 {
7621         smp_send_reschedule(vcpu->cpu);
7622 }
7623 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7624
7625 /*
7626  * Returns 1 to let vcpu_run() continue the guest execution loop without
7627  * exiting to the userspace.  Otherwise, the value will be returned to the
7628  * userspace.
7629  */
7630 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7631 {
7632         int r;
7633         bool req_int_win =
7634                 dm_request_for_irq_injection(vcpu) &&
7635                 kvm_cpu_accept_dm_intr(vcpu);
7636
7637         bool req_immediate_exit = false;
7638
7639         if (kvm_request_pending(vcpu)) {
7640                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7641                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7642                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7643                         kvm_mmu_unload(vcpu);
7644                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7645                         __kvm_migrate_timers(vcpu);
7646                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7647                         kvm_gen_update_masterclock(vcpu->kvm);
7648                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7649                         kvm_gen_kvmclock_update(vcpu);
7650                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7651                         r = kvm_guest_time_update(vcpu);
7652                         if (unlikely(r))
7653                                 goto out;
7654                 }
7655                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7656                         kvm_mmu_sync_roots(vcpu);
7657                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7658                         kvm_mmu_load_cr3(vcpu);
7659                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7660                         kvm_vcpu_flush_tlb(vcpu, true);
7661                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7662                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7663                         r = 0;
7664                         goto out;
7665                 }
7666                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7667                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7668                         vcpu->mmio_needed = 0;
7669                         r = 0;
7670                         goto out;
7671                 }
7672                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7673                         /* Page is swapped out. Do synthetic halt */
7674                         vcpu->arch.apf.halted = true;
7675                         r = 1;
7676                         goto out;
7677                 }
7678                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7679                         record_steal_time(vcpu);
7680                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7681                         process_smi(vcpu);
7682                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7683                         process_nmi(vcpu);
7684                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7685                         kvm_pmu_handle_event(vcpu);
7686                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7687                         kvm_pmu_deliver_pmi(vcpu);
7688                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7689                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7690                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7691                                      vcpu->arch.ioapic_handled_vectors)) {
7692                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7693                                 vcpu->run->eoi.vector =
7694                                                 vcpu->arch.pending_ioapic_eoi;
7695                                 r = 0;
7696                                 goto out;
7697                         }
7698                 }
7699                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7700                         vcpu_scan_ioapic(vcpu);
7701                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7702                         vcpu_load_eoi_exitmap(vcpu);
7703                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7704                         kvm_vcpu_reload_apic_access_page(vcpu);
7705                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7706                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7707                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7708                         r = 0;
7709                         goto out;
7710                 }
7711                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7712                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7713                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7714                         r = 0;
7715                         goto out;
7716                 }
7717                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7718                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7719                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7720                         r = 0;
7721                         goto out;
7722                 }
7723
7724                 /*
7725                  * KVM_REQ_HV_STIMER has to be processed after
7726                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7727                  * depend on the guest clock being up-to-date
7728                  */
7729                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7730                         kvm_hv_process_stimers(vcpu);
7731         }
7732
7733         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7734                 ++vcpu->stat.req_event;
7735                 kvm_apic_accept_events(vcpu);
7736                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7737                         r = 1;
7738                         goto out;
7739                 }
7740
7741                 if (inject_pending_event(vcpu, req_int_win) != 0)
7742                         req_immediate_exit = true;
7743                 else {
7744                         /* Enable SMI/NMI/IRQ window open exits if needed.
7745                          *
7746                          * SMIs have three cases:
7747                          * 1) They can be nested, and then there is nothing to
7748                          *    do here because RSM will cause a vmexit anyway.
7749                          * 2) There is an ISA-specific reason why SMI cannot be
7750                          *    injected, and the moment when this changes can be
7751                          *    intercepted.
7752                          * 3) Or the SMI can be pending because
7753                          *    inject_pending_event has completed the injection
7754                          *    of an IRQ or NMI from the previous vmexit, and
7755                          *    then we request an immediate exit to inject the
7756                          *    SMI.
7757                          */
7758                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7759                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7760                                         req_immediate_exit = true;
7761                         if (vcpu->arch.nmi_pending)
7762                                 kvm_x86_ops->enable_nmi_window(vcpu);
7763                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7764                                 kvm_x86_ops->enable_irq_window(vcpu);
7765                         WARN_ON(vcpu->arch.exception.pending);
7766                 }
7767
7768                 if (kvm_lapic_enabled(vcpu)) {
7769                         update_cr8_intercept(vcpu);
7770                         kvm_lapic_sync_to_vapic(vcpu);
7771                 }
7772         }
7773
7774         r = kvm_mmu_reload(vcpu);
7775         if (unlikely(r)) {
7776                 goto cancel_injection;
7777         }
7778
7779         preempt_disable();
7780
7781         kvm_x86_ops->prepare_guest_switch(vcpu);
7782
7783         /*
7784          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7785          * IPI are then delayed after guest entry, which ensures that they
7786          * result in virtual interrupt delivery.
7787          */
7788         local_irq_disable();
7789         vcpu->mode = IN_GUEST_MODE;
7790
7791         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7792
7793         /*
7794          * 1) We should set ->mode before checking ->requests.  Please see
7795          * the comment in kvm_vcpu_exiting_guest_mode().
7796          *
7797          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7798          * pairs with the memory barrier implicit in pi_test_and_set_on
7799          * (see vmx_deliver_posted_interrupt).
7800          *
7801          * 3) This also orders the write to mode from any reads to the page
7802          * tables done while the VCPU is running.  Please see the comment
7803          * in kvm_flush_remote_tlbs.
7804          */
7805         smp_mb__after_srcu_read_unlock();
7806
7807         /*
7808          * This handles the case where a posted interrupt was
7809          * notified with kvm_vcpu_kick.
7810          */
7811         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7812                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7813
7814         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7815             || need_resched() || signal_pending(current)) {
7816                 vcpu->mode = OUTSIDE_GUEST_MODE;
7817                 smp_wmb();
7818                 local_irq_enable();
7819                 preempt_enable();
7820                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7821                 r = 1;
7822                 goto cancel_injection;
7823         }
7824
7825         kvm_load_guest_xcr0(vcpu);
7826
7827         if (req_immediate_exit) {
7828                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7829                 kvm_x86_ops->request_immediate_exit(vcpu);
7830         }
7831
7832         trace_kvm_entry(vcpu->vcpu_id);
7833         if (lapic_timer_advance_ns)
7834                 wait_lapic_expire(vcpu);
7835         guest_enter_irqoff();
7836
7837         if (unlikely(vcpu->arch.switch_db_regs)) {
7838                 set_debugreg(0, 7);
7839                 set_debugreg(vcpu->arch.eff_db[0], 0);
7840                 set_debugreg(vcpu->arch.eff_db[1], 1);
7841                 set_debugreg(vcpu->arch.eff_db[2], 2);
7842                 set_debugreg(vcpu->arch.eff_db[3], 3);
7843                 set_debugreg(vcpu->arch.dr6, 6);
7844                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7845         }
7846
7847         kvm_x86_ops->run(vcpu);
7848
7849         /*
7850          * Do this here before restoring debug registers on the host.  And
7851          * since we do this before handling the vmexit, a DR access vmexit
7852          * can (a) read the correct value of the debug registers, (b) set
7853          * KVM_DEBUGREG_WONT_EXIT again.
7854          */
7855         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7856                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7857                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7858                 kvm_update_dr0123(vcpu);
7859                 kvm_update_dr6(vcpu);
7860                 kvm_update_dr7(vcpu);
7861                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7862         }
7863
7864         /*
7865          * If the guest has used debug registers, at least dr7
7866          * will be disabled while returning to the host.
7867          * If we don't have active breakpoints in the host, we don't
7868          * care about the messed up debug address registers. But if
7869          * we have some of them active, restore the old state.
7870          */
7871         if (hw_breakpoint_active())
7872                 hw_breakpoint_restore();
7873
7874         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7875
7876         vcpu->mode = OUTSIDE_GUEST_MODE;
7877         smp_wmb();
7878
7879         kvm_put_guest_xcr0(vcpu);
7880
7881         kvm_before_interrupt(vcpu);
7882         kvm_x86_ops->handle_external_intr(vcpu);
7883         kvm_after_interrupt(vcpu);
7884
7885         ++vcpu->stat.exits;
7886
7887         guest_exit_irqoff();
7888
7889         local_irq_enable();
7890         preempt_enable();
7891
7892         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7893
7894         /*
7895          * Profile KVM exit RIPs:
7896          */
7897         if (unlikely(prof_on == KVM_PROFILING)) {
7898                 unsigned long rip = kvm_rip_read(vcpu);
7899                 profile_hit(KVM_PROFILING, (void *)rip);
7900         }
7901
7902         if (unlikely(vcpu->arch.tsc_always_catchup))
7903                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7904
7905         if (vcpu->arch.apic_attention)
7906                 kvm_lapic_sync_from_vapic(vcpu);
7907
7908         vcpu->arch.gpa_available = false;
7909         r = kvm_x86_ops->handle_exit(vcpu);
7910         return r;
7911
7912 cancel_injection:
7913         kvm_x86_ops->cancel_injection(vcpu);
7914         if (unlikely(vcpu->arch.apic_attention))
7915                 kvm_lapic_sync_from_vapic(vcpu);
7916 out:
7917         return r;
7918 }
7919
7920 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7921 {
7922         if (!kvm_arch_vcpu_runnable(vcpu) &&
7923             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7924                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7925                 kvm_vcpu_block(vcpu);
7926                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7927
7928                 if (kvm_x86_ops->post_block)
7929                         kvm_x86_ops->post_block(vcpu);
7930
7931                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7932                         return 1;
7933         }
7934
7935         kvm_apic_accept_events(vcpu);
7936         switch(vcpu->arch.mp_state) {
7937         case KVM_MP_STATE_HALTED:
7938                 vcpu->arch.pv.pv_unhalted = false;
7939                 vcpu->arch.mp_state =
7940                         KVM_MP_STATE_RUNNABLE;
7941                 /* fall through */
7942         case KVM_MP_STATE_RUNNABLE:
7943                 vcpu->arch.apf.halted = false;
7944                 break;
7945         case KVM_MP_STATE_INIT_RECEIVED:
7946                 break;
7947         default:
7948                 return -EINTR;
7949                 break;
7950         }
7951         return 1;
7952 }
7953
7954 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7955 {
7956         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7957                 kvm_x86_ops->check_nested_events(vcpu, false);
7958
7959         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7960                 !vcpu->arch.apf.halted);
7961 }
7962
7963 static int vcpu_run(struct kvm_vcpu *vcpu)
7964 {
7965         int r;
7966         struct kvm *kvm = vcpu->kvm;
7967
7968         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7969         vcpu->arch.l1tf_flush_l1d = true;
7970
7971         for (;;) {
7972                 if (kvm_vcpu_running(vcpu)) {
7973                         r = vcpu_enter_guest(vcpu);
7974                 } else {
7975                         r = vcpu_block(kvm, vcpu);
7976                 }
7977
7978                 if (r <= 0)
7979                         break;
7980
7981                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7982                 if (kvm_cpu_has_pending_timer(vcpu))
7983                         kvm_inject_pending_timer_irqs(vcpu);
7984
7985                 if (dm_request_for_irq_injection(vcpu) &&
7986                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7987                         r = 0;
7988                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7989                         ++vcpu->stat.request_irq_exits;
7990                         break;
7991                 }
7992
7993                 kvm_check_async_pf_completion(vcpu);
7994
7995                 if (signal_pending(current)) {
7996                         r = -EINTR;
7997                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7998                         ++vcpu->stat.signal_exits;
7999                         break;
8000                 }
8001                 if (need_resched()) {
8002                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8003                         cond_resched();
8004                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8005                 }
8006         }
8007
8008         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8009
8010         return r;
8011 }
8012
8013 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8014 {
8015         int r;
8016         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8017         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8018         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8019         if (r != EMULATE_DONE)
8020                 return 0;
8021         return 1;
8022 }
8023
8024 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8025 {
8026         BUG_ON(!vcpu->arch.pio.count);
8027
8028         return complete_emulated_io(vcpu);
8029 }
8030
8031 /*
8032  * Implements the following, as a state machine:
8033  *
8034  * read:
8035  *   for each fragment
8036  *     for each mmio piece in the fragment
8037  *       write gpa, len
8038  *       exit
8039  *       copy data
8040  *   execute insn
8041  *
8042  * write:
8043  *   for each fragment
8044  *     for each mmio piece in the fragment
8045  *       write gpa, len
8046  *       copy data
8047  *       exit
8048  */
8049 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8050 {
8051         struct kvm_run *run = vcpu->run;
8052         struct kvm_mmio_fragment *frag;
8053         unsigned len;
8054
8055         BUG_ON(!vcpu->mmio_needed);
8056
8057         /* Complete previous fragment */
8058         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8059         len = min(8u, frag->len);
8060         if (!vcpu->mmio_is_write)
8061                 memcpy(frag->data, run->mmio.data, len);
8062
8063         if (frag->len <= 8) {
8064                 /* Switch to the next fragment. */
8065                 frag++;
8066                 vcpu->mmio_cur_fragment++;
8067         } else {
8068                 /* Go forward to the next mmio piece. */
8069                 frag->data += len;
8070                 frag->gpa += len;
8071                 frag->len -= len;
8072         }
8073
8074         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8075                 vcpu->mmio_needed = 0;
8076
8077                 /* FIXME: return into emulator if single-stepping.  */
8078                 if (vcpu->mmio_is_write)
8079                         return 1;
8080                 vcpu->mmio_read_completed = 1;
8081                 return complete_emulated_io(vcpu);
8082         }
8083
8084         run->exit_reason = KVM_EXIT_MMIO;
8085         run->mmio.phys_addr = frag->gpa;
8086         if (vcpu->mmio_is_write)
8087                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8088         run->mmio.len = min(8u, frag->len);
8089         run->mmio.is_write = vcpu->mmio_is_write;
8090         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8091         return 0;
8092 }
8093
8094 /* Swap (qemu) user FPU context for the guest FPU context. */
8095 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8096 {
8097         preempt_disable();
8098         copy_fpregs_to_fpstate(&current->thread.fpu);
8099         /* PKRU is separately restored in kvm_x86_ops->run.  */
8100         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8101                                 ~XFEATURE_MASK_PKRU);
8102         preempt_enable();
8103         trace_kvm_fpu(1);
8104 }
8105
8106 /* When vcpu_run ends, restore user space FPU context. */
8107 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8108 {
8109         preempt_disable();
8110         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8111         copy_kernel_to_fpregs(&current->thread.fpu.state);
8112         preempt_enable();
8113         ++vcpu->stat.fpu_reload;
8114         trace_kvm_fpu(0);
8115 }
8116
8117 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8118 {
8119         int r;
8120
8121         vcpu_load(vcpu);
8122         kvm_sigset_activate(vcpu);
8123         kvm_load_guest_fpu(vcpu);
8124
8125         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8126                 if (kvm_run->immediate_exit) {
8127                         r = -EINTR;
8128                         goto out;
8129                 }
8130                 kvm_vcpu_block(vcpu);
8131                 kvm_apic_accept_events(vcpu);
8132                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8133                 r = -EAGAIN;
8134                 if (signal_pending(current)) {
8135                         r = -EINTR;
8136                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8137                         ++vcpu->stat.signal_exits;
8138                 }
8139                 goto out;
8140         }
8141
8142         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8143                 r = -EINVAL;
8144                 goto out;
8145         }
8146
8147         if (vcpu->run->kvm_dirty_regs) {
8148                 r = sync_regs(vcpu);
8149                 if (r != 0)
8150                         goto out;
8151         }
8152
8153         /* re-sync apic's tpr */
8154         if (!lapic_in_kernel(vcpu)) {
8155                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8156                         r = -EINVAL;
8157                         goto out;
8158                 }
8159         }
8160
8161         if (unlikely(vcpu->arch.complete_userspace_io)) {
8162                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8163                 vcpu->arch.complete_userspace_io = NULL;
8164                 r = cui(vcpu);
8165                 if (r <= 0)
8166                         goto out;
8167         } else
8168                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8169
8170         if (kvm_run->immediate_exit)
8171                 r = -EINTR;
8172         else
8173                 r = vcpu_run(vcpu);
8174
8175 out:
8176         kvm_put_guest_fpu(vcpu);
8177         if (vcpu->run->kvm_valid_regs)
8178                 store_regs(vcpu);
8179         post_kvm_run_save(vcpu);
8180         kvm_sigset_deactivate(vcpu);
8181
8182         vcpu_put(vcpu);
8183         return r;
8184 }
8185
8186 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8187 {
8188         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8189                 /*
8190                  * We are here if userspace calls get_regs() in the middle of
8191                  * instruction emulation. Registers state needs to be copied
8192                  * back from emulation context to vcpu. Userspace shouldn't do
8193                  * that usually, but some bad designed PV devices (vmware
8194                  * backdoor interface) need this to work
8195                  */
8196                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8197                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8198         }
8199         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
8200         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
8201         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
8202         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
8203         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
8204         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
8205         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
8206         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
8207 #ifdef CONFIG_X86_64
8208         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
8209         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
8210         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
8211         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
8212         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
8213         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
8214         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
8215         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
8216 #endif
8217
8218         regs->rip = kvm_rip_read(vcpu);
8219         regs->rflags = kvm_get_rflags(vcpu);
8220 }
8221
8222 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8223 {
8224         vcpu_load(vcpu);
8225         __get_regs(vcpu, regs);
8226         vcpu_put(vcpu);
8227         return 0;
8228 }
8229
8230 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8231 {
8232         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8233         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8234
8235         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
8236         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
8237         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
8238         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
8239         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
8240         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
8241         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
8242         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
8243 #ifdef CONFIG_X86_64
8244         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
8245         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
8246         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
8247         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
8248         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
8249         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
8250         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
8251         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
8252 #endif
8253
8254         kvm_rip_write(vcpu, regs->rip);
8255         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8256
8257         vcpu->arch.exception.pending = false;
8258
8259         kvm_make_request(KVM_REQ_EVENT, vcpu);
8260 }
8261
8262 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8263 {
8264         vcpu_load(vcpu);
8265         __set_regs(vcpu, regs);
8266         vcpu_put(vcpu);
8267         return 0;
8268 }
8269
8270 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8271 {
8272         struct kvm_segment cs;
8273
8274         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8275         *db = cs.db;
8276         *l = cs.l;
8277 }
8278 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8279
8280 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8281 {
8282         struct desc_ptr dt;
8283
8284         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8285         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8286         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8287         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8288         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8289         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8290
8291         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8292         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8293
8294         kvm_x86_ops->get_idt(vcpu, &dt);
8295         sregs->idt.limit = dt.size;
8296         sregs->idt.base = dt.address;
8297         kvm_x86_ops->get_gdt(vcpu, &dt);
8298         sregs->gdt.limit = dt.size;
8299         sregs->gdt.base = dt.address;
8300
8301         sregs->cr0 = kvm_read_cr0(vcpu);
8302         sregs->cr2 = vcpu->arch.cr2;
8303         sregs->cr3 = kvm_read_cr3(vcpu);
8304         sregs->cr4 = kvm_read_cr4(vcpu);
8305         sregs->cr8 = kvm_get_cr8(vcpu);
8306         sregs->efer = vcpu->arch.efer;
8307         sregs->apic_base = kvm_get_apic_base(vcpu);
8308
8309         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8310
8311         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8312                 set_bit(vcpu->arch.interrupt.nr,
8313                         (unsigned long *)sregs->interrupt_bitmap);
8314 }
8315
8316 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8317                                   struct kvm_sregs *sregs)
8318 {
8319         vcpu_load(vcpu);
8320         __get_sregs(vcpu, sregs);
8321         vcpu_put(vcpu);
8322         return 0;
8323 }
8324
8325 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8326                                     struct kvm_mp_state *mp_state)
8327 {
8328         vcpu_load(vcpu);
8329
8330         kvm_apic_accept_events(vcpu);
8331         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8332                                         vcpu->arch.pv.pv_unhalted)
8333                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8334         else
8335                 mp_state->mp_state = vcpu->arch.mp_state;
8336
8337         vcpu_put(vcpu);
8338         return 0;
8339 }
8340
8341 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8342                                     struct kvm_mp_state *mp_state)
8343 {
8344         int ret = -EINVAL;
8345
8346         vcpu_load(vcpu);
8347
8348         if (!lapic_in_kernel(vcpu) &&
8349             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8350                 goto out;
8351
8352         /* INITs are latched while in SMM */
8353         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8354             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8355              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8356                 goto out;
8357
8358         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8359                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8360                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8361         } else
8362                 vcpu->arch.mp_state = mp_state->mp_state;
8363         kvm_make_request(KVM_REQ_EVENT, vcpu);
8364
8365         ret = 0;
8366 out:
8367         vcpu_put(vcpu);
8368         return ret;
8369 }
8370
8371 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8372                     int reason, bool has_error_code, u32 error_code)
8373 {
8374         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8375         int ret;
8376
8377         init_emulate_ctxt(vcpu);
8378
8379         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8380                                    has_error_code, error_code);
8381
8382         if (ret)
8383                 return EMULATE_FAIL;
8384
8385         kvm_rip_write(vcpu, ctxt->eip);
8386         kvm_set_rflags(vcpu, ctxt->eflags);
8387         kvm_make_request(KVM_REQ_EVENT, vcpu);
8388         return EMULATE_DONE;
8389 }
8390 EXPORT_SYMBOL_GPL(kvm_task_switch);
8391
8392 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8393 {
8394         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8395                         (sregs->cr4 & X86_CR4_OSXSAVE))
8396                 return  -EINVAL;
8397
8398         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8399                 /*
8400                  * When EFER.LME and CR0.PG are set, the processor is in
8401                  * 64-bit mode (though maybe in a 32-bit code segment).
8402                  * CR4.PAE and EFER.LMA must be set.
8403                  */
8404                 if (!(sregs->cr4 & X86_CR4_PAE)
8405                     || !(sregs->efer & EFER_LMA))
8406                         return -EINVAL;
8407         } else {
8408                 /*
8409                  * Not in 64-bit mode: EFER.LMA is clear and the code
8410                  * segment cannot be 64-bit.
8411                  */
8412                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8413                         return -EINVAL;
8414         }
8415
8416         return 0;
8417 }
8418
8419 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8420 {
8421         struct msr_data apic_base_msr;
8422         int mmu_reset_needed = 0;
8423         int cpuid_update_needed = 0;
8424         int pending_vec, max_bits, idx;
8425         struct desc_ptr dt;
8426         int ret = -EINVAL;
8427
8428         if (kvm_valid_sregs(vcpu, sregs))
8429                 goto out;
8430
8431         apic_base_msr.data = sregs->apic_base;
8432         apic_base_msr.host_initiated = true;
8433         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8434                 goto out;
8435
8436         dt.size = sregs->idt.limit;
8437         dt.address = sregs->idt.base;
8438         kvm_x86_ops->set_idt(vcpu, &dt);
8439         dt.size = sregs->gdt.limit;
8440         dt.address = sregs->gdt.base;
8441         kvm_x86_ops->set_gdt(vcpu, &dt);
8442
8443         vcpu->arch.cr2 = sregs->cr2;
8444         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8445         vcpu->arch.cr3 = sregs->cr3;
8446         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8447
8448         kvm_set_cr8(vcpu, sregs->cr8);
8449
8450         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8451         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8452
8453         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8454         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8455         vcpu->arch.cr0 = sregs->cr0;
8456
8457         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8458         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8459                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8460         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8461         if (cpuid_update_needed)
8462                 kvm_update_cpuid(vcpu);
8463
8464         idx = srcu_read_lock(&vcpu->kvm->srcu);
8465         if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8466                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8467                 mmu_reset_needed = 1;
8468         }
8469         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8470
8471         if (mmu_reset_needed)
8472                 kvm_mmu_reset_context(vcpu);
8473
8474         max_bits = KVM_NR_INTERRUPTS;
8475         pending_vec = find_first_bit(
8476                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8477         if (pending_vec < max_bits) {
8478                 kvm_queue_interrupt(vcpu, pending_vec, false);
8479                 pr_debug("Set back pending irq %d\n", pending_vec);
8480         }
8481
8482         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8483         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8484         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8485         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8486         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8487         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8488
8489         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8490         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8491
8492         update_cr8_intercept(vcpu);
8493
8494         /* Older userspace won't unhalt the vcpu on reset. */
8495         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8496             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8497             !is_protmode(vcpu))
8498                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8499
8500         kvm_make_request(KVM_REQ_EVENT, vcpu);
8501
8502         ret = 0;
8503 out:
8504         return ret;
8505 }
8506
8507 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8508                                   struct kvm_sregs *sregs)
8509 {
8510         int ret;
8511
8512         vcpu_load(vcpu);
8513         ret = __set_sregs(vcpu, sregs);
8514         vcpu_put(vcpu);
8515         return ret;
8516 }
8517
8518 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8519                                         struct kvm_guest_debug *dbg)
8520 {
8521         unsigned long rflags;
8522         int i, r;
8523
8524         vcpu_load(vcpu);
8525
8526         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8527                 r = -EBUSY;
8528                 if (vcpu->arch.exception.pending)
8529                         goto out;
8530                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8531                         kvm_queue_exception(vcpu, DB_VECTOR);
8532                 else
8533                         kvm_queue_exception(vcpu, BP_VECTOR);
8534         }
8535
8536         /*
8537          * Read rflags as long as potentially injected trace flags are still
8538          * filtered out.
8539          */
8540         rflags = kvm_get_rflags(vcpu);
8541
8542         vcpu->guest_debug = dbg->control;
8543         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8544                 vcpu->guest_debug = 0;
8545
8546         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8547                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8548                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8549                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8550         } else {
8551                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8552                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8553         }
8554         kvm_update_dr7(vcpu);
8555
8556         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8557                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8558                         get_segment_base(vcpu, VCPU_SREG_CS);
8559
8560         /*
8561          * Trigger an rflags update that will inject or remove the trace
8562          * flags.
8563          */
8564         kvm_set_rflags(vcpu, rflags);
8565
8566         kvm_x86_ops->update_bp_intercept(vcpu);
8567
8568         r = 0;
8569
8570 out:
8571         vcpu_put(vcpu);
8572         return r;
8573 }
8574
8575 /*
8576  * Translate a guest virtual address to a guest physical address.
8577  */
8578 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8579                                     struct kvm_translation *tr)
8580 {
8581         unsigned long vaddr = tr->linear_address;
8582         gpa_t gpa;
8583         int idx;
8584
8585         vcpu_load(vcpu);
8586
8587         idx = srcu_read_lock(&vcpu->kvm->srcu);
8588         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8589         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8590         tr->physical_address = gpa;
8591         tr->valid = gpa != UNMAPPED_GVA;
8592         tr->writeable = 1;
8593         tr->usermode = 0;
8594
8595         vcpu_put(vcpu);
8596         return 0;
8597 }
8598
8599 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8600 {
8601         struct fxregs_state *fxsave;
8602
8603         vcpu_load(vcpu);
8604
8605         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8606         memcpy(fpu->fpr, fxsave->st_space, 128);
8607         fpu->fcw = fxsave->cwd;
8608         fpu->fsw = fxsave->swd;
8609         fpu->ftwx = fxsave->twd;
8610         fpu->last_opcode = fxsave->fop;
8611         fpu->last_ip = fxsave->rip;
8612         fpu->last_dp = fxsave->rdp;
8613         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8614
8615         vcpu_put(vcpu);
8616         return 0;
8617 }
8618
8619 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8620 {
8621         struct fxregs_state *fxsave;
8622
8623         vcpu_load(vcpu);
8624
8625         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8626
8627         memcpy(fxsave->st_space, fpu->fpr, 128);
8628         fxsave->cwd = fpu->fcw;
8629         fxsave->swd = fpu->fsw;
8630         fxsave->twd = fpu->ftwx;
8631         fxsave->fop = fpu->last_opcode;
8632         fxsave->rip = fpu->last_ip;
8633         fxsave->rdp = fpu->last_dp;
8634         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8635
8636         vcpu_put(vcpu);
8637         return 0;
8638 }
8639
8640 static void store_regs(struct kvm_vcpu *vcpu)
8641 {
8642         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8643
8644         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8645                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8646
8647         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8648                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8649
8650         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8651                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8652                                 vcpu, &vcpu->run->s.regs.events);
8653 }
8654
8655 static int sync_regs(struct kvm_vcpu *vcpu)
8656 {
8657         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8658                 return -EINVAL;
8659
8660         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8661                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8662                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8663         }
8664         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8665                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8666                         return -EINVAL;
8667                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8668         }
8669         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8670                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8671                                 vcpu, &vcpu->run->s.regs.events))
8672                         return -EINVAL;
8673                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8674         }
8675
8676         return 0;
8677 }
8678
8679 static void fx_init(struct kvm_vcpu *vcpu)
8680 {
8681         fpstate_init(&vcpu->arch.guest_fpu->state);
8682         if (boot_cpu_has(X86_FEATURE_XSAVES))
8683                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8684                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8685
8686         /*
8687          * Ensure guest xcr0 is valid for loading
8688          */
8689         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8690
8691         vcpu->arch.cr0 |= X86_CR0_ET;
8692 }
8693
8694 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8695 {
8696         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8697
8698         kvmclock_reset(vcpu);
8699
8700         kvm_x86_ops->vcpu_free(vcpu);
8701         free_cpumask_var(wbinvd_dirty_mask);
8702 }
8703
8704 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8705                                                 unsigned int id)
8706 {
8707         struct kvm_vcpu *vcpu;
8708
8709         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8710                 printk_once(KERN_WARNING
8711                 "kvm: SMP vm created on host with unstable TSC; "
8712                 "guest TSC will not be reliable\n");
8713
8714         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8715
8716         return vcpu;
8717 }
8718
8719 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8720 {
8721         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8722         kvm_vcpu_mtrr_init(vcpu);
8723         vcpu_load(vcpu);
8724         kvm_vcpu_reset(vcpu, false);
8725         kvm_init_mmu(vcpu, false);
8726         vcpu_put(vcpu);
8727         return 0;
8728 }
8729
8730 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8731 {
8732         struct msr_data msr;
8733         struct kvm *kvm = vcpu->kvm;
8734
8735         kvm_hv_vcpu_postcreate(vcpu);
8736
8737         if (mutex_lock_killable(&vcpu->mutex))
8738                 return;
8739         vcpu_load(vcpu);
8740         msr.data = 0x0;
8741         msr.index = MSR_IA32_TSC;
8742         msr.host_initiated = true;
8743         kvm_write_tsc(vcpu, &msr);
8744         vcpu_put(vcpu);
8745         mutex_unlock(&vcpu->mutex);
8746
8747         if (!kvmclock_periodic_sync)
8748                 return;
8749
8750         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8751                                         KVMCLOCK_SYNC_PERIOD);
8752 }
8753
8754 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8755 {
8756         vcpu->arch.apf.msr_val = 0;
8757
8758         vcpu_load(vcpu);
8759         kvm_mmu_unload(vcpu);
8760         vcpu_put(vcpu);
8761
8762         kvm_x86_ops->vcpu_free(vcpu);
8763 }
8764
8765 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8766 {
8767         kvm_lapic_reset(vcpu, init_event);
8768
8769         vcpu->arch.hflags = 0;
8770
8771         vcpu->arch.smi_pending = 0;
8772         vcpu->arch.smi_count = 0;
8773         atomic_set(&vcpu->arch.nmi_queued, 0);
8774         vcpu->arch.nmi_pending = 0;
8775         vcpu->arch.nmi_injected = false;
8776         kvm_clear_interrupt_queue(vcpu);
8777         kvm_clear_exception_queue(vcpu);
8778         vcpu->arch.exception.pending = false;
8779
8780         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8781         kvm_update_dr0123(vcpu);
8782         vcpu->arch.dr6 = DR6_INIT;
8783         kvm_update_dr6(vcpu);
8784         vcpu->arch.dr7 = DR7_FIXED_1;
8785         kvm_update_dr7(vcpu);
8786
8787         vcpu->arch.cr2 = 0;
8788
8789         kvm_make_request(KVM_REQ_EVENT, vcpu);
8790         vcpu->arch.apf.msr_val = 0;
8791         vcpu->arch.st.msr_val = 0;
8792
8793         kvmclock_reset(vcpu);
8794
8795         kvm_clear_async_pf_completion_queue(vcpu);
8796         kvm_async_pf_hash_reset(vcpu);
8797         vcpu->arch.apf.halted = false;
8798
8799         if (kvm_mpx_supported()) {
8800                 void *mpx_state_buffer;
8801
8802                 /*
8803                  * To avoid have the INIT path from kvm_apic_has_events() that be
8804                  * called with loaded FPU and does not let userspace fix the state.
8805                  */
8806                 if (init_event)
8807                         kvm_put_guest_fpu(vcpu);
8808                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8809                                         XFEATURE_MASK_BNDREGS);
8810                 if (mpx_state_buffer)
8811                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8812                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8813                                         XFEATURE_MASK_BNDCSR);
8814                 if (mpx_state_buffer)
8815                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8816                 if (init_event)
8817                         kvm_load_guest_fpu(vcpu);
8818         }
8819
8820         if (!init_event) {
8821                 kvm_pmu_reset(vcpu);
8822                 vcpu->arch.smbase = 0x30000;
8823
8824                 vcpu->arch.msr_misc_features_enables = 0;
8825
8826                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8827         }
8828
8829         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8830         vcpu->arch.regs_avail = ~0;
8831         vcpu->arch.regs_dirty = ~0;
8832
8833         vcpu->arch.ia32_xss = 0;
8834
8835         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8836 }
8837
8838 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8839 {
8840         struct kvm_segment cs;
8841
8842         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8843         cs.selector = vector << 8;
8844         cs.base = vector << 12;
8845         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8846         kvm_rip_write(vcpu, 0);
8847 }
8848
8849 int kvm_arch_hardware_enable(void)
8850 {
8851         struct kvm *kvm;
8852         struct kvm_vcpu *vcpu;
8853         int i;
8854         int ret;
8855         u64 local_tsc;
8856         u64 max_tsc = 0;
8857         bool stable, backwards_tsc = false;
8858
8859         kvm_shared_msr_cpu_online();
8860         ret = kvm_x86_ops->hardware_enable();
8861         if (ret != 0)
8862                 return ret;
8863
8864         local_tsc = rdtsc();
8865         stable = !kvm_check_tsc_unstable();
8866         list_for_each_entry(kvm, &vm_list, vm_list) {
8867                 kvm_for_each_vcpu(i, vcpu, kvm) {
8868                         if (!stable && vcpu->cpu == smp_processor_id())
8869                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8870                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8871                                 backwards_tsc = true;
8872                                 if (vcpu->arch.last_host_tsc > max_tsc)
8873                                         max_tsc = vcpu->arch.last_host_tsc;
8874                         }
8875                 }
8876         }
8877
8878         /*
8879          * Sometimes, even reliable TSCs go backwards.  This happens on
8880          * platforms that reset TSC during suspend or hibernate actions, but
8881          * maintain synchronization.  We must compensate.  Fortunately, we can
8882          * detect that condition here, which happens early in CPU bringup,
8883          * before any KVM threads can be running.  Unfortunately, we can't
8884          * bring the TSCs fully up to date with real time, as we aren't yet far
8885          * enough into CPU bringup that we know how much real time has actually
8886          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8887          * variables that haven't been updated yet.
8888          *
8889          * So we simply find the maximum observed TSC above, then record the
8890          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8891          * the adjustment will be applied.  Note that we accumulate
8892          * adjustments, in case multiple suspend cycles happen before some VCPU
8893          * gets a chance to run again.  In the event that no KVM threads get a
8894          * chance to run, we will miss the entire elapsed period, as we'll have
8895          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8896          * loose cycle time.  This isn't too big a deal, since the loss will be
8897          * uniform across all VCPUs (not to mention the scenario is extremely
8898          * unlikely). It is possible that a second hibernate recovery happens
8899          * much faster than a first, causing the observed TSC here to be
8900          * smaller; this would require additional padding adjustment, which is
8901          * why we set last_host_tsc to the local tsc observed here.
8902          *
8903          * N.B. - this code below runs only on platforms with reliable TSC,
8904          * as that is the only way backwards_tsc is set above.  Also note
8905          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8906          * have the same delta_cyc adjustment applied if backwards_tsc
8907          * is detected.  Note further, this adjustment is only done once,
8908          * as we reset last_host_tsc on all VCPUs to stop this from being
8909          * called multiple times (one for each physical CPU bringup).
8910          *
8911          * Platforms with unreliable TSCs don't have to deal with this, they
8912          * will be compensated by the logic in vcpu_load, which sets the TSC to
8913          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8914          * guarantee that they stay in perfect synchronization.
8915          */
8916         if (backwards_tsc) {
8917                 u64 delta_cyc = max_tsc - local_tsc;
8918                 list_for_each_entry(kvm, &vm_list, vm_list) {
8919                         kvm->arch.backwards_tsc_observed = true;
8920                         kvm_for_each_vcpu(i, vcpu, kvm) {
8921                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8922                                 vcpu->arch.last_host_tsc = local_tsc;
8923                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8924                         }
8925
8926                         /*
8927                          * We have to disable TSC offset matching.. if you were
8928                          * booting a VM while issuing an S4 host suspend....
8929                          * you may have some problem.  Solving this issue is
8930                          * left as an exercise to the reader.
8931                          */
8932                         kvm->arch.last_tsc_nsec = 0;
8933                         kvm->arch.last_tsc_write = 0;
8934                 }
8935
8936         }
8937         return 0;
8938 }
8939
8940 void kvm_arch_hardware_disable(void)
8941 {
8942         kvm_x86_ops->hardware_disable();
8943         drop_user_return_notifiers();
8944 }
8945
8946 int kvm_arch_hardware_setup(void)
8947 {
8948         int r;
8949
8950         r = kvm_x86_ops->hardware_setup();
8951         if (r != 0)
8952                 return r;
8953
8954         if (kvm_has_tsc_control) {
8955                 /*
8956                  * Make sure the user can only configure tsc_khz values that
8957                  * fit into a signed integer.
8958                  * A min value is not calculated because it will always
8959                  * be 1 on all machines.
8960                  */
8961                 u64 max = min(0x7fffffffULL,
8962                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8963                 kvm_max_guest_tsc_khz = max;
8964
8965                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8966         }
8967
8968         kvm_init_msr_list();
8969         return 0;
8970 }
8971
8972 void kvm_arch_hardware_unsetup(void)
8973 {
8974         kvm_x86_ops->hardware_unsetup();
8975 }
8976
8977 void kvm_arch_check_processor_compat(void *rtn)
8978 {
8979         kvm_x86_ops->check_processor_compatibility(rtn);
8980 }
8981
8982 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8983 {
8984         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8985 }
8986 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8987
8988 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8989 {
8990         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8991 }
8992
8993 struct static_key kvm_no_apic_vcpu __read_mostly;
8994 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8995
8996 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8997 {
8998         struct page *page;
8999         int r;
9000
9001         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9002         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9003         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9004                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9005         else
9006                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9007
9008         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9009         if (!page) {
9010                 r = -ENOMEM;
9011                 goto fail;
9012         }
9013         vcpu->arch.pio_data = page_address(page);
9014
9015         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9016
9017         r = kvm_mmu_create(vcpu);
9018         if (r < 0)
9019                 goto fail_free_pio_data;
9020
9021         if (irqchip_in_kernel(vcpu->kvm)) {
9022                 r = kvm_create_lapic(vcpu);
9023                 if (r < 0)
9024                         goto fail_mmu_destroy;
9025         } else
9026                 static_key_slow_inc(&kvm_no_apic_vcpu);
9027
9028         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9029                                        GFP_KERNEL);
9030         if (!vcpu->arch.mce_banks) {
9031                 r = -ENOMEM;
9032                 goto fail_free_lapic;
9033         }
9034         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9035
9036         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
9037                 r = -ENOMEM;
9038                 goto fail_free_mce_banks;
9039         }
9040
9041         fx_init(vcpu);
9042
9043         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9044
9045         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9046
9047         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9048
9049         kvm_async_pf_hash_reset(vcpu);
9050         kvm_pmu_init(vcpu);
9051
9052         vcpu->arch.pending_external_vector = -1;
9053         vcpu->arch.preempted_in_kernel = false;
9054
9055         kvm_hv_vcpu_init(vcpu);
9056
9057         return 0;
9058
9059 fail_free_mce_banks:
9060         kfree(vcpu->arch.mce_banks);
9061 fail_free_lapic:
9062         kvm_free_lapic(vcpu);
9063 fail_mmu_destroy:
9064         kvm_mmu_destroy(vcpu);
9065 fail_free_pio_data:
9066         free_page((unsigned long)vcpu->arch.pio_data);
9067 fail:
9068         return r;
9069 }
9070
9071 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9072 {
9073         int idx;
9074
9075         kvm_hv_vcpu_uninit(vcpu);
9076         kvm_pmu_destroy(vcpu);
9077         kfree(vcpu->arch.mce_banks);
9078         kvm_free_lapic(vcpu);
9079         idx = srcu_read_lock(&vcpu->kvm->srcu);
9080         kvm_mmu_destroy(vcpu);
9081         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9082         free_page((unsigned long)vcpu->arch.pio_data);
9083         if (!lapic_in_kernel(vcpu))
9084                 static_key_slow_dec(&kvm_no_apic_vcpu);
9085 }
9086
9087 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9088 {
9089         vcpu->arch.l1tf_flush_l1d = true;
9090         kvm_x86_ops->sched_in(vcpu, cpu);
9091 }
9092
9093 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9094 {
9095         if (type)
9096                 return -EINVAL;
9097
9098         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9099         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9100         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9101         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9102         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9103
9104         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9105         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9106         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9107         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9108                 &kvm->arch.irq_sources_bitmap);
9109
9110         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9111         mutex_init(&kvm->arch.apic_map_lock);
9112         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9113
9114         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9115         pvclock_update_vm_gtod_copy(kvm);
9116
9117         kvm->arch.guest_can_read_msr_platform_info = true;
9118
9119         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9120         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9121
9122         kvm_hv_init_vm(kvm);
9123         kvm_page_track_init(kvm);
9124         kvm_mmu_init_vm(kvm);
9125
9126         if (kvm_x86_ops->vm_init)
9127                 return kvm_x86_ops->vm_init(kvm);
9128
9129         return 0;
9130 }
9131
9132 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9133 {
9134         vcpu_load(vcpu);
9135         kvm_mmu_unload(vcpu);
9136         vcpu_put(vcpu);
9137 }
9138
9139 static void kvm_free_vcpus(struct kvm *kvm)
9140 {
9141         unsigned int i;
9142         struct kvm_vcpu *vcpu;
9143
9144         /*
9145          * Unpin any mmu pages first.
9146          */
9147         kvm_for_each_vcpu(i, vcpu, kvm) {
9148                 kvm_clear_async_pf_completion_queue(vcpu);
9149                 kvm_unload_vcpu_mmu(vcpu);
9150         }
9151         kvm_for_each_vcpu(i, vcpu, kvm)
9152                 kvm_arch_vcpu_free(vcpu);
9153
9154         mutex_lock(&kvm->lock);
9155         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9156                 kvm->vcpus[i] = NULL;
9157
9158         atomic_set(&kvm->online_vcpus, 0);
9159         mutex_unlock(&kvm->lock);
9160 }
9161
9162 void kvm_arch_sync_events(struct kvm *kvm)
9163 {
9164         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9165         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9166         kvm_free_pit(kvm);
9167 }
9168
9169 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9170 {
9171         int i, r;
9172         unsigned long hva;
9173         struct kvm_memslots *slots = kvm_memslots(kvm);
9174         struct kvm_memory_slot *slot, old;
9175
9176         /* Called with kvm->slots_lock held.  */
9177         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9178                 return -EINVAL;
9179
9180         slot = id_to_memslot(slots, id);
9181         if (size) {
9182                 if (slot->npages)
9183                         return -EEXIST;
9184
9185                 /*
9186                  * MAP_SHARED to prevent internal slot pages from being moved
9187                  * by fork()/COW.
9188                  */
9189                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9190                               MAP_SHARED | MAP_ANONYMOUS, 0);
9191                 if (IS_ERR((void *)hva))
9192                         return PTR_ERR((void *)hva);
9193         } else {
9194                 if (!slot->npages)
9195                         return 0;
9196
9197                 hva = 0;
9198         }
9199
9200         old = *slot;
9201         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9202                 struct kvm_userspace_memory_region m;
9203
9204                 m.slot = id | (i << 16);
9205                 m.flags = 0;
9206                 m.guest_phys_addr = gpa;
9207                 m.userspace_addr = hva;
9208                 m.memory_size = size;
9209                 r = __kvm_set_memory_region(kvm, &m);
9210                 if (r < 0)
9211                         return r;
9212         }
9213
9214         if (!size)
9215                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9216
9217         return 0;
9218 }
9219 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9220
9221 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9222 {
9223         int r;
9224
9225         mutex_lock(&kvm->slots_lock);
9226         r = __x86_set_memory_region(kvm, id, gpa, size);
9227         mutex_unlock(&kvm->slots_lock);
9228
9229         return r;
9230 }
9231 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9232
9233 void kvm_arch_destroy_vm(struct kvm *kvm)
9234 {
9235         if (current->mm == kvm->mm) {
9236                 /*
9237                  * Free memory regions allocated on behalf of userspace,
9238                  * unless the the memory map has changed due to process exit
9239                  * or fd copying.
9240                  */
9241                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9242                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9243                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9244         }
9245         if (kvm_x86_ops->vm_destroy)
9246                 kvm_x86_ops->vm_destroy(kvm);
9247         kvm_pic_destroy(kvm);
9248         kvm_ioapic_destroy(kvm);
9249         kvm_free_vcpus(kvm);
9250         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9251         kvm_mmu_uninit_vm(kvm);
9252         kvm_page_track_cleanup(kvm);
9253         kvm_hv_destroy_vm(kvm);
9254 }
9255
9256 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9257                            struct kvm_memory_slot *dont)
9258 {
9259         int i;
9260
9261         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9262                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9263                         kvfree(free->arch.rmap[i]);
9264                         free->arch.rmap[i] = NULL;
9265                 }
9266                 if (i == 0)
9267                         continue;
9268
9269                 if (!dont || free->arch.lpage_info[i - 1] !=
9270                              dont->arch.lpage_info[i - 1]) {
9271                         kvfree(free->arch.lpage_info[i - 1]);
9272                         free->arch.lpage_info[i - 1] = NULL;
9273                 }
9274         }
9275
9276         kvm_page_track_free_memslot(free, dont);
9277 }
9278
9279 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9280                             unsigned long npages)
9281 {
9282         int i;
9283
9284         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9285                 struct kvm_lpage_info *linfo;
9286                 unsigned long ugfn;
9287                 int lpages;
9288                 int level = i + 1;
9289
9290                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9291                                       slot->base_gfn, level) + 1;
9292
9293                 slot->arch.rmap[i] =
9294                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9295                                  GFP_KERNEL);
9296                 if (!slot->arch.rmap[i])
9297                         goto out_free;
9298                 if (i == 0)
9299                         continue;
9300
9301                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
9302                 if (!linfo)
9303                         goto out_free;
9304
9305                 slot->arch.lpage_info[i - 1] = linfo;
9306
9307                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9308                         linfo[0].disallow_lpage = 1;
9309                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9310                         linfo[lpages - 1].disallow_lpage = 1;
9311                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9312                 /*
9313                  * If the gfn and userspace address are not aligned wrt each
9314                  * other, or if explicitly asked to, disable large page
9315                  * support for this slot
9316                  */
9317                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9318                     !kvm_largepages_enabled()) {
9319                         unsigned long j;
9320
9321                         for (j = 0; j < lpages; ++j)
9322                                 linfo[j].disallow_lpage = 1;
9323                 }
9324         }
9325
9326         if (kvm_page_track_create_memslot(slot, npages))
9327                 goto out_free;
9328
9329         return 0;
9330
9331 out_free:
9332         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9333                 kvfree(slot->arch.rmap[i]);
9334                 slot->arch.rmap[i] = NULL;
9335                 if (i == 0)
9336                         continue;
9337
9338                 kvfree(slot->arch.lpage_info[i - 1]);
9339                 slot->arch.lpage_info[i - 1] = NULL;
9340         }
9341         return -ENOMEM;
9342 }
9343
9344 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9345 {
9346         /*
9347          * memslots->generation has been incremented.
9348          * mmio generation may have reached its maximum value.
9349          */
9350         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9351 }
9352
9353 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9354                                 struct kvm_memory_slot *memslot,
9355                                 const struct kvm_userspace_memory_region *mem,
9356                                 enum kvm_mr_change change)
9357 {
9358         return 0;
9359 }
9360
9361 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9362                                      struct kvm_memory_slot *new)
9363 {
9364         /* Still write protect RO slot */
9365         if (new->flags & KVM_MEM_READONLY) {
9366                 kvm_mmu_slot_remove_write_access(kvm, new);
9367                 return;
9368         }
9369
9370         /*
9371          * Call kvm_x86_ops dirty logging hooks when they are valid.
9372          *
9373          * kvm_x86_ops->slot_disable_log_dirty is called when:
9374          *
9375          *  - KVM_MR_CREATE with dirty logging is disabled
9376          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9377          *
9378          * The reason is, in case of PML, we need to set D-bit for any slots
9379          * with dirty logging disabled in order to eliminate unnecessary GPA
9380          * logging in PML buffer (and potential PML buffer full VMEXT). This
9381          * guarantees leaving PML enabled during guest's lifetime won't have
9382          * any additional overhead from PML when guest is running with dirty
9383          * logging disabled for memory slots.
9384          *
9385          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9386          * to dirty logging mode.
9387          *
9388          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9389          *
9390          * In case of write protect:
9391          *
9392          * Write protect all pages for dirty logging.
9393          *
9394          * All the sptes including the large sptes which point to this
9395          * slot are set to readonly. We can not create any new large
9396          * spte on this slot until the end of the logging.
9397          *
9398          * See the comments in fast_page_fault().
9399          */
9400         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9401                 if (kvm_x86_ops->slot_enable_log_dirty)
9402                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9403                 else
9404                         kvm_mmu_slot_remove_write_access(kvm, new);
9405         } else {
9406                 if (kvm_x86_ops->slot_disable_log_dirty)
9407                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9408         }
9409 }
9410
9411 void kvm_arch_commit_memory_region(struct kvm *kvm,
9412                                 const struct kvm_userspace_memory_region *mem,
9413                                 const struct kvm_memory_slot *old,
9414                                 const struct kvm_memory_slot *new,
9415                                 enum kvm_mr_change change)
9416 {
9417         int nr_mmu_pages = 0;
9418
9419         if (!kvm->arch.n_requested_mmu_pages)
9420                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9421
9422         if (nr_mmu_pages)
9423                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9424
9425         /*
9426          * Dirty logging tracks sptes in 4k granularity, meaning that large
9427          * sptes have to be split.  If live migration is successful, the guest
9428          * in the source machine will be destroyed and large sptes will be
9429          * created in the destination. However, if the guest continues to run
9430          * in the source machine (for example if live migration fails), small
9431          * sptes will remain around and cause bad performance.
9432          *
9433          * Scan sptes if dirty logging has been stopped, dropping those
9434          * which can be collapsed into a single large-page spte.  Later
9435          * page faults will create the large-page sptes.
9436          */
9437         if ((change != KVM_MR_DELETE) &&
9438                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9439                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9440                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9441
9442         /*
9443          * Set up write protection and/or dirty logging for the new slot.
9444          *
9445          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9446          * been zapped so no dirty logging staff is needed for old slot. For
9447          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9448          * new and it's also covered when dealing with the new slot.
9449          *
9450          * FIXME: const-ify all uses of struct kvm_memory_slot.
9451          */
9452         if (change != KVM_MR_DELETE)
9453                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9454 }
9455
9456 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9457 {
9458         kvm_mmu_invalidate_zap_all_pages(kvm);
9459 }
9460
9461 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9462                                    struct kvm_memory_slot *slot)
9463 {
9464         kvm_page_track_flush_slot(kvm, slot);
9465 }
9466
9467 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9468 {
9469         return (is_guest_mode(vcpu) &&
9470                         kvm_x86_ops->guest_apic_has_interrupt &&
9471                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9472 }
9473
9474 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9475 {
9476         if (!list_empty_careful(&vcpu->async_pf.done))
9477                 return true;
9478
9479         if (kvm_apic_has_events(vcpu))
9480                 return true;
9481
9482         if (vcpu->arch.pv.pv_unhalted)
9483                 return true;
9484
9485         if (vcpu->arch.exception.pending)
9486                 return true;
9487
9488         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9489             (vcpu->arch.nmi_pending &&
9490              kvm_x86_ops->nmi_allowed(vcpu)))
9491                 return true;
9492
9493         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9494             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9495                 return true;
9496
9497         if (kvm_arch_interrupt_allowed(vcpu) &&
9498             (kvm_cpu_has_interrupt(vcpu) ||
9499             kvm_guest_apic_has_interrupt(vcpu)))
9500                 return true;
9501
9502         if (kvm_hv_has_stimer_pending(vcpu))
9503                 return true;
9504
9505         return false;
9506 }
9507
9508 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9509 {
9510         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9511 }
9512
9513 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9514 {
9515         return vcpu->arch.preempted_in_kernel;
9516 }
9517
9518 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9519 {
9520         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9521 }
9522
9523 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9524 {
9525         return kvm_x86_ops->interrupt_allowed(vcpu);
9526 }
9527
9528 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9529 {
9530         if (is_64_bit_mode(vcpu))
9531                 return kvm_rip_read(vcpu);
9532         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9533                      kvm_rip_read(vcpu));
9534 }
9535 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9536
9537 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9538 {
9539         return kvm_get_linear_rip(vcpu) == linear_rip;
9540 }
9541 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9542
9543 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9544 {
9545         unsigned long rflags;
9546
9547         rflags = kvm_x86_ops->get_rflags(vcpu);
9548         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9549                 rflags &= ~X86_EFLAGS_TF;
9550         return rflags;
9551 }
9552 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9553
9554 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9555 {
9556         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9557             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9558                 rflags |= X86_EFLAGS_TF;
9559         kvm_x86_ops->set_rflags(vcpu, rflags);
9560 }
9561
9562 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9563 {
9564         __kvm_set_rflags(vcpu, rflags);
9565         kvm_make_request(KVM_REQ_EVENT, vcpu);
9566 }
9567 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9568
9569 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9570 {
9571         int r;
9572
9573         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9574               work->wakeup_all)
9575                 return;
9576
9577         r = kvm_mmu_reload(vcpu);
9578         if (unlikely(r))
9579                 return;
9580
9581         if (!vcpu->arch.mmu->direct_map &&
9582               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9583                 return;
9584
9585         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9586 }
9587
9588 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9589 {
9590         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9591 }
9592
9593 static inline u32 kvm_async_pf_next_probe(u32 key)
9594 {
9595         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9596 }
9597
9598 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9599 {
9600         u32 key = kvm_async_pf_hash_fn(gfn);
9601
9602         while (vcpu->arch.apf.gfns[key] != ~0)
9603                 key = kvm_async_pf_next_probe(key);
9604
9605         vcpu->arch.apf.gfns[key] = gfn;
9606 }
9607
9608 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9609 {
9610         int i;
9611         u32 key = kvm_async_pf_hash_fn(gfn);
9612
9613         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9614                      (vcpu->arch.apf.gfns[key] != gfn &&
9615                       vcpu->arch.apf.gfns[key] != ~0); i++)
9616                 key = kvm_async_pf_next_probe(key);
9617
9618         return key;
9619 }
9620
9621 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9622 {
9623         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9624 }
9625
9626 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9627 {
9628         u32 i, j, k;
9629
9630         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9631         while (true) {
9632                 vcpu->arch.apf.gfns[i] = ~0;
9633                 do {
9634                         j = kvm_async_pf_next_probe(j);
9635                         if (vcpu->arch.apf.gfns[j] == ~0)
9636                                 return;
9637                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9638                         /*
9639                          * k lies cyclically in ]i,j]
9640                          * |    i.k.j |
9641                          * |....j i.k.| or  |.k..j i...|
9642                          */
9643                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9644                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9645                 i = j;
9646         }
9647 }
9648
9649 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9650 {
9651
9652         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9653                                       sizeof(val));
9654 }
9655
9656 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9657 {
9658
9659         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9660                                       sizeof(u32));
9661 }
9662
9663 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9664                                      struct kvm_async_pf *work)
9665 {
9666         struct x86_exception fault;
9667
9668         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9669         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9670
9671         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9672             (vcpu->arch.apf.send_user_only &&
9673              kvm_x86_ops->get_cpl(vcpu) == 0))
9674                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9675         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9676                 fault.vector = PF_VECTOR;
9677                 fault.error_code_valid = true;
9678                 fault.error_code = 0;
9679                 fault.nested_page_fault = false;
9680                 fault.address = work->arch.token;
9681                 fault.async_page_fault = true;
9682                 kvm_inject_page_fault(vcpu, &fault);
9683         }
9684 }
9685
9686 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9687                                  struct kvm_async_pf *work)
9688 {
9689         struct x86_exception fault;
9690         u32 val;
9691
9692         if (work->wakeup_all)
9693                 work->arch.token = ~0; /* broadcast wakeup */
9694         else
9695                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9696         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9697
9698         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9699             !apf_get_user(vcpu, &val)) {
9700                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9701                     vcpu->arch.exception.pending &&
9702                     vcpu->arch.exception.nr == PF_VECTOR &&
9703                     !apf_put_user(vcpu, 0)) {
9704                         vcpu->arch.exception.injected = false;
9705                         vcpu->arch.exception.pending = false;
9706                         vcpu->arch.exception.nr = 0;
9707                         vcpu->arch.exception.has_error_code = false;
9708                         vcpu->arch.exception.error_code = 0;
9709                         vcpu->arch.exception.has_payload = false;
9710                         vcpu->arch.exception.payload = 0;
9711                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9712                         fault.vector = PF_VECTOR;
9713                         fault.error_code_valid = true;
9714                         fault.error_code = 0;
9715                         fault.nested_page_fault = false;
9716                         fault.address = work->arch.token;
9717                         fault.async_page_fault = true;
9718                         kvm_inject_page_fault(vcpu, &fault);
9719                 }
9720         }
9721         vcpu->arch.apf.halted = false;
9722         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9723 }
9724
9725 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9726 {
9727         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9728                 return true;
9729         else
9730                 return kvm_can_do_async_pf(vcpu);
9731 }
9732
9733 void kvm_arch_start_assignment(struct kvm *kvm)
9734 {
9735         atomic_inc(&kvm->arch.assigned_device_count);
9736 }
9737 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9738
9739 void kvm_arch_end_assignment(struct kvm *kvm)
9740 {
9741         atomic_dec(&kvm->arch.assigned_device_count);
9742 }
9743 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9744
9745 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9746 {
9747         return atomic_read(&kvm->arch.assigned_device_count);
9748 }
9749 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9750
9751 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9752 {
9753         atomic_inc(&kvm->arch.noncoherent_dma_count);
9754 }
9755 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9756
9757 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9758 {
9759         atomic_dec(&kvm->arch.noncoherent_dma_count);
9760 }
9761 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9762
9763 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9764 {
9765         return atomic_read(&kvm->arch.noncoherent_dma_count);
9766 }
9767 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9768
9769 bool kvm_arch_has_irq_bypass(void)
9770 {
9771         return kvm_x86_ops->update_pi_irte != NULL;
9772 }
9773
9774 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9775                                       struct irq_bypass_producer *prod)
9776 {
9777         struct kvm_kernel_irqfd *irqfd =
9778                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9779
9780         irqfd->producer = prod;
9781
9782         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9783                                            prod->irq, irqfd->gsi, 1);
9784 }
9785
9786 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9787                                       struct irq_bypass_producer *prod)
9788 {
9789         int ret;
9790         struct kvm_kernel_irqfd *irqfd =
9791                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9792
9793         WARN_ON(irqfd->producer != prod);
9794         irqfd->producer = NULL;
9795
9796         /*
9797          * When producer of consumer is unregistered, we change back to
9798          * remapped mode, so we can re-use the current implementation
9799          * when the irq is masked/disabled or the consumer side (KVM
9800          * int this case doesn't want to receive the interrupts.
9801         */
9802         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9803         if (ret)
9804                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9805                        " fails: %d\n", irqfd->consumer.token, ret);
9806 }
9807
9808 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9809                                    uint32_t guest_irq, bool set)
9810 {
9811         if (!kvm_x86_ops->update_pi_irte)
9812                 return -EINVAL;
9813
9814         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9815 }
9816
9817 bool kvm_vector_hashing_enabled(void)
9818 {
9819         return vector_hashing;
9820 }
9821 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9822
9823 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9824 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9825 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9826 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9827 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9828 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9829 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);