arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 unsigned int min_timer_period_us = 500;
 111 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly kvmclock_periodic_sync = true;
 114 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 115
 116 bool __read_mostly kvm_has_tsc_control;
 117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 118 u32  __read_mostly kvm_max_guest_tsc_khz;
 119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 120 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 122 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 124 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 126
 127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 128 static u32 __read_mostly tsc_tolerance_ppm = 250;
 129 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 130
 131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 132 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 133 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 134
 135 static bool __read_mostly vector_hashing = true;
 136 module_param(vector_hashing, bool, S_IRUGO);
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "req_event", VCPU_STAT(req_event) },
 184         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 185         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 186         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 187         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 188         { "mmu_flooded", VM_STAT(mmu_flooded) },
 189         { "mmu_recycled", VM_STAT(mmu_recycled) },
 190         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 191         { "mmu_unsync", VM_STAT(mmu_unsync) },
 192         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 193         { "largepages", VM_STAT(lpages) },
 194         { "max_mmu_page_hash_collisions",
 195                 VM_STAT(max_mmu_page_hash_collisions) },
 196         { NULL }
 197 };
 198
 199 u64 __read_mostly host_xcr0;
 200
 201 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 202
 203 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 204 {
 205         int i;
 206         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 207                 vcpu->arch.apf.gfns[i] = ~0;
 208 }
 209
 210 static void kvm_on_user_return(struct user_return_notifier *urn)
 211 {
 212         unsigned slot;
 213         struct kvm_shared_msrs *locals
 214                 = container_of(urn, struct kvm_shared_msrs, urn);
 215         struct kvm_shared_msr_values *values;
 216         unsigned long flags;
 217
 218         /*
 219          * Disabling irqs at this point since the following code could be
 220          * interrupted and executed through kvm_arch_hardware_disable()
 221          */
 222         local_irq_save(flags);
 223         if (locals->registered) {
 224                 locals->registered = false;
 225                 user_return_notifier_unregister(urn);
 226         }
 227         local_irq_restore(flags);
 228         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 229                 values = &locals->values[slot];
 230                 if (values->host != values->curr) {
 231                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 232                         values->curr = values->host;
 233                 }
 234         }
 235 }
 236
 237 static void shared_msr_update(unsigned slot, u32 msr)
 238 {
 239         u64 value;
 240         unsigned int cpu = smp_processor_id();
 241         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 242
 243         /* only read, and nobody should modify it at this time,
 244          * so don't need lock */
 245         if (slot >= shared_msrs_global.nr) {
 246                 printk(KERN_ERR "kvm: invalid MSR slot!");
 247                 return;
 248         }
 249         rdmsrl_safe(msr, &value);
 250         smsr->values[slot].host = value;
 251         smsr->values[slot].curr = value;
 252 }
 253
 254 void kvm_define_shared_msr(unsigned slot, u32 msr)
 255 {
 256         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 257         shared_msrs_global.msrs[slot] = msr;
 258         if (slot >= shared_msrs_global.nr)
 259                 shared_msrs_global.nr = slot + 1;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 262
 263 static void kvm_shared_msr_cpu_online(void)
 264 {
 265         unsigned i;
 266
 267         for (i = 0; i < shared_msrs_global.nr; ++i)
 268                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 269 }
 270
 271 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 272 {
 273         unsigned int cpu = smp_processor_id();
 274         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 275         int err;
 276
 277         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 278                 return 0;
 279         smsr->values[slot].curr = value;
 280         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 281         if (err)
 282                 return 1;
 283
 284         if (!smsr->registered) {
 285                 smsr->urn.on_user_return = kvm_on_user_return;
 286                 user_return_notifier_register(&smsr->urn);
 287                 smsr->registered = true;
 288         }
 289         return 0;
 290 }
 291 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 292
 293 static void drop_user_return_notifiers(void)
 294 {
 295         unsigned int cpu = smp_processor_id();
 296         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 297
 298         if (smsr->registered)
 299                 kvm_on_user_return(&smsr->urn);
 300 }
 301
 302 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 303 {
 304         return vcpu->arch.apic_base;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 307
 308 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 309 {
 310         u64 old_state = vcpu->arch.apic_base &
 311                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 312         u64 new_state = msr_info->data &
 313                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 314         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 315                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 316
 317         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 318                 return 1;
 319         if (!msr_info->host_initiated &&
 320             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 321               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 322              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 323               old_state == 0)))
 324                 return 1;
 325
 326         kvm_lapic_set_base(vcpu, msr_info->data);
 327         return 0;
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 330
 331 asmlinkage __visible void kvm_spurious_fault(void)
 332 {
 333         /* Fault while not rebooting.  We want the trace. */
 334         BUG();
 335 }
 336 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 337
 338 #define EXCPT_BENIGN            0
 339 #define EXCPT_CONTRIBUTORY      1
 340 #define EXCPT_PF                2
 341
 342 static int exception_class(int vector)
 343 {
 344         switch (vector) {
 345         case PF_VECTOR:
 346                 return EXCPT_PF;
 347         case DE_VECTOR:
 348         case TS_VECTOR:
 349         case NP_VECTOR:
 350         case SS_VECTOR:
 351         case GP_VECTOR:
 352                 return EXCPT_CONTRIBUTORY;
 353         default:
 354                 break;
 355         }
 356         return EXCPT_BENIGN;
 357 }
 358
 359 #define EXCPT_FAULT             0
 360 #define EXCPT_TRAP              1
 361 #define EXCPT_ABORT             2
 362 #define EXCPT_INTERRUPT         3
 363
 364 static int exception_type(int vector)
 365 {
 366         unsigned int mask;
 367
 368         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 369                 return EXCPT_INTERRUPT;
 370
 371         mask = 1 << vector;
 372
 373         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 374         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 375                 return EXCPT_TRAP;
 376
 377         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 378                 return EXCPT_ABORT;
 379
 380         /* Reserved exceptions will result in fault */
 381         return EXCPT_FAULT;
 382 }
 383
 384 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 385                 unsigned nr, bool has_error, u32 error_code,
 386                 bool reinject)
 387 {
 388         u32 prev_nr;
 389         int class1, class2;
 390
 391         kvm_make_request(KVM_REQ_EVENT, vcpu);
 392
 393         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 394         queue:
 395                 if (has_error && !is_protmode(vcpu))
 396                         has_error = false;
 397                 if (reinject) {
 398                         /*
 399                          * On vmentry, vcpu->arch.exception.pending is only
 400                          * true if an event injection was blocked by
 401                          * nested_run_pending.  In that case, however,
 402                          * vcpu_enter_guest requests an immediate exit,
 403                          * and the guest shouldn't proceed far enough to
 404                          * need reinjection.
 405                          */
 406                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 407                         vcpu->arch.exception.injected = true;
 408                 } else {
 409                         vcpu->arch.exception.pending = true;
 410                         vcpu->arch.exception.injected = false;
 411                 }
 412                 vcpu->arch.exception.has_error_code = has_error;
 413                 vcpu->arch.exception.nr = nr;
 414                 vcpu->arch.exception.error_code = error_code;
 415                 return;
 416         }
 417
 418         /* to check exception */
 419         prev_nr = vcpu->arch.exception.nr;
 420         if (prev_nr == DF_VECTOR) {
 421                 /* triple fault -> shutdown */
 422                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 423                 return;
 424         }
 425         class1 = exception_class(prev_nr);
 426         class2 = exception_class(nr);
 427         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 428                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 429                 /*
 430                  * Generate double fault per SDM Table 5-5.  Set
 431                  * exception.pending = true so that the double fault
 432                  * can trigger a nested vmexit.
 433                  */
 434                 vcpu->arch.exception.pending = true;
 435                 vcpu->arch.exception.injected = false;
 436                 vcpu->arch.exception.has_error_code = true;
 437                 vcpu->arch.exception.nr = DF_VECTOR;
 438                 vcpu->arch.exception.error_code = 0;
 439         } else
 440                 /* replace previous exception with a new one in a hope
 441                    that instruction re-execution will regenerate lost
 442                    exception */
 443                 goto queue;
 444 }
 445
 446 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 447 {
 448         kvm_multiple_exception(vcpu, nr, false, 0, false);
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 451
 452 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 453 {
 454         kvm_multiple_exception(vcpu, nr, false, 0, true);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 457
 458 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 459 {
 460         if (err)
 461                 kvm_inject_gp(vcpu, 0);
 462         else
 463                 return kvm_skip_emulated_instruction(vcpu);
 464
 465         return 1;
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 468
 469 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 470 {
 471         ++vcpu->stat.pf_guest;
 472         vcpu->arch.exception.nested_apf =
 473                 is_guest_mode(vcpu) && fault->async_page_fault;
 474         if (vcpu->arch.exception.nested_apf)
 475                 vcpu->arch.apf.nested_apf_token = fault->address;
 476         else
 477                 vcpu->arch.cr2 = fault->address;
 478         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 481
 482 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 483 {
 484         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 485                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 486         else
 487                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 488
 489         return fault->nested_page_fault;
 490 }
 491
 492 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 493 {
 494         atomic_inc(&vcpu->arch.nmi_queued);
 495         kvm_make_request(KVM_REQ_NMI, vcpu);
 496 }
 497 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 498
 499 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 500 {
 501         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 502 }
 503 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 504
 505 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 506 {
 507         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 508 }
 509 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 510
 511 /*
 512  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 513  * a #GP and return false.
 514  */
 515 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 516 {
 517         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 518                 return true;
 519         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 520         return false;
 521 }
 522 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 523
 524 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 525 {
 526         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 527                 return true;
 528
 529         kvm_queue_exception(vcpu, UD_VECTOR);
 530         return false;
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_require_dr);
 533
 534 /*
 535  * This function will be used to read from the physical memory of the currently
 536  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 537  * can read from guest physical or from the guest's guest physical memory.
 538  */
 539 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 540                             gfn_t ngfn, void *data, int offset, int len,
 541                             u32 access)
 542 {
 543         struct x86_exception exception;
 544         gfn_t real_gfn;
 545         gpa_t ngpa;
 546
 547         ngpa     = gfn_to_gpa(ngfn);
 548         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 549         if (real_gfn == UNMAPPED_GVA)
 550                 return -EFAULT;
 551
 552         real_gfn = gpa_to_gfn(real_gfn);
 553
 554         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 557
 558 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 559                                void *data, int offset, int len, u32 access)
 560 {
 561         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 562                                        data, offset, len, access);
 563 }
 564
 565 /*
 566  * Load the pae pdptrs.  Return true is they are all valid.
 567  */
 568 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 569 {
 570         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 571         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 572         int i;
 573         int ret;
 574         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 575
 576         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 577                                       offset * sizeof(u64), sizeof(pdpte),
 578                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 579         if (ret < 0) {
 580                 ret = 0;
 581                 goto out;
 582         }
 583         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 584                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 585                     (pdpte[i] &
 586                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 587                         ret = 0;
 588                         goto out;
 589                 }
 590         }
 591         ret = 1;
 592
 593         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 594         __set_bit(VCPU_EXREG_PDPTR,
 595                   (unsigned long *)&vcpu->arch.regs_avail);
 596         __set_bit(VCPU_EXREG_PDPTR,
 597                   (unsigned long *)&vcpu->arch.regs_dirty);
 598 out:
 599
 600         return ret;
 601 }
 602 EXPORT_SYMBOL_GPL(load_pdptrs);
 603
 604 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 605 {
 606         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 607         bool changed = true;
 608         int offset;
 609         gfn_t gfn;
 610         int r;
 611
 612         if (is_long_mode(vcpu) || !is_pae(vcpu))
 613                 return false;
 614
 615         if (!test_bit(VCPU_EXREG_PDPTR,
 616                       (unsigned long *)&vcpu->arch.regs_avail))
 617                 return true;
 618
 619         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 620         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 621         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 622                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 623         if (r < 0)
 624                 goto out;
 625         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 626 out:
 627
 628         return changed;
 629 }
 630 EXPORT_SYMBOL_GPL(pdptrs_changed);
 631
 632 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 633 {
 634         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 635         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 636
 637         cr0 |= X86_CR0_ET;
 638
 639 #ifdef CONFIG_X86_64
 640         if (cr0 & 0xffffffff00000000UL)
 641                 return 1;
 642 #endif
 643
 644         cr0 &= ~CR0_RESERVED_BITS;
 645
 646         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 647                 return 1;
 648
 649         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 650                 return 1;
 651
 652         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 653 #ifdef CONFIG_X86_64
 654                 if ((vcpu->arch.efer & EFER_LME)) {
 655                         int cs_db, cs_l;
 656
 657                         if (!is_pae(vcpu))
 658                                 return 1;
 659                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 660                         if (cs_l)
 661                                 return 1;
 662                 } else
 663 #endif
 664                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 665                                                  kvm_read_cr3(vcpu)))
 666                         return 1;
 667         }
 668
 669         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 670                 return 1;
 671
 672         kvm_x86_ops->set_cr0(vcpu, cr0);
 673
 674         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 675                 kvm_clear_async_pf_completion_queue(vcpu);
 676                 kvm_async_pf_hash_reset(vcpu);
 677         }
 678
 679         if ((cr0 ^ old_cr0) & update_bits)
 680                 kvm_mmu_reset_context(vcpu);
 681
 682         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 683             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 684             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 685                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 686
 687         return 0;
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 690
 691 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 692 {
 693         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_lmsw);
 696
 697 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 698 {
 699         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 700                         !vcpu->guest_xcr0_loaded) {
 701                 /* kvm_set_xcr() also depends on this */
 702                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 703                 vcpu->guest_xcr0_loaded = 1;
 704         }
 705 }
 706
 707 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 708 {
 709         if (vcpu->guest_xcr0_loaded) {
 710                 if (vcpu->arch.xcr0 != host_xcr0)
 711                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 712                 vcpu->guest_xcr0_loaded = 0;
 713         }
 714 }
 715
 716 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 717 {
 718         u64 xcr0 = xcr;
 719         u64 old_xcr0 = vcpu->arch.xcr0;
 720         u64 valid_bits;
 721
 722         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 723         if (index != XCR_XFEATURE_ENABLED_MASK)
 724                 return 1;
 725         if (!(xcr0 & XFEATURE_MASK_FP))
 726                 return 1;
 727         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 728                 return 1;
 729
 730         /*
 731          * Do not allow the guest to set bits that we do not support
 732          * saving.  However, xcr0 bit 0 is always set, even if the
 733          * emulated CPU does not support XSAVE (see fx_init).
 734          */
 735         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 736         if (xcr0 & ~valid_bits)
 737                 return 1;
 738
 739         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 740             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 741                 return 1;
 742
 743         if (xcr0 & XFEATURE_MASK_AVX512) {
 744                 if (!(xcr0 & XFEATURE_MASK_YMM))
 745                         return 1;
 746                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 747                         return 1;
 748         }
 749         vcpu->arch.xcr0 = xcr0;
 750
 751         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 752                 kvm_update_cpuid(vcpu);
 753         return 0;
 754 }
 755
 756 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 757 {
 758         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 759             __kvm_set_xcr(vcpu, index, xcr)) {
 760                 kvm_inject_gp(vcpu, 0);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 766
 767 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 768 {
 769         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 770         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 771                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 772
 773         if (cr4 & CR4_RESERVED_BITS)
 774                 return 1;
 775
 776         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 777                 return 1;
 778
 779         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 780                 return 1;
 781
 782         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 783                 return 1;
 784
 785         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 786                 return 1;
 787
 788         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 789                 return 1;
 790
 791         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 792                 return 1;
 793
 794         if (is_long_mode(vcpu)) {
 795                 if (!(cr4 & X86_CR4_PAE))
 796                         return 1;
 797         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 798                    && ((cr4 ^ old_cr4) & pdptr_bits)
 799                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 800                                    kvm_read_cr3(vcpu)))
 801                 return 1;
 802
 803         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 804                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 805                         return 1;
 806
 807                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 808                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 809                         return 1;
 810         }
 811
 812         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 813                 return 1;
 814
 815         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 816             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 817                 kvm_mmu_reset_context(vcpu);
 818
 819         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 820                 kvm_update_cpuid(vcpu);
 821
 822         return 0;
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 825
 826 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 827 {
 828 #ifdef CONFIG_X86_64
 829         cr3 &= ~CR3_PCID_INVD;
 830 #endif
 831
 832         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 833                 kvm_mmu_sync_roots(vcpu);
 834                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 835                 return 0;
 836         }
 837
 838         if (is_long_mode(vcpu) &&
 839             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 840                 return 1;
 841         else if (is_pae(vcpu) && is_paging(vcpu) &&
 842                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 843                 return 1;
 844
 845         vcpu->arch.cr3 = cr3;
 846         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 847         kvm_mmu_new_cr3(vcpu);
 848         return 0;
 849 }
 850 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 851
 852 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 853 {
 854         if (cr8 & CR8_RESERVED_BITS)
 855                 return 1;
 856         if (lapic_in_kernel(vcpu))
 857                 kvm_lapic_set_tpr(vcpu, cr8);
 858         else
 859                 vcpu->arch.cr8 = cr8;
 860         return 0;
 861 }
 862 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 863
 864 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 865 {
 866         if (lapic_in_kernel(vcpu))
 867                 return kvm_lapic_get_cr8(vcpu);
 868         else
 869                 return vcpu->arch.cr8;
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 872
 873 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 874 {
 875         int i;
 876
 877         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 878                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 879                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 880                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 881         }
 882 }
 883
 884 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 885 {
 886         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 887                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 888 }
 889
 890 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 891 {
 892         unsigned long dr7;
 893
 894         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 895                 dr7 = vcpu->arch.guest_debug_dr7;
 896         else
 897                 dr7 = vcpu->arch.dr7;
 898         kvm_x86_ops->set_dr7(vcpu, dr7);
 899         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 900         if (dr7 & DR7_BP_EN_MASK)
 901                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 902 }
 903
 904 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 905 {
 906         u64 fixed = DR6_FIXED_1;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 909                 fixed |= DR6_RTM;
 910         return fixed;
 911 }
 912
 913 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 914 {
 915         switch (dr) {
 916         case 0 ... 3:
 917                 vcpu->arch.db[dr] = val;
 918                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 919                         vcpu->arch.eff_db[dr] = val;
 920                 break;
 921         case 4:
 922                 /* fall through */
 923         case 6:
 924                 if (val & 0xffffffff00000000ULL)
 925                         return -1; /* #GP */
 926                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 927                 kvm_update_dr6(vcpu);
 928                 break;
 929         case 5:
 930                 /* fall through */
 931         default: /* 7 */
 932                 if (val & 0xffffffff00000000ULL)
 933                         return -1; /* #GP */
 934                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 935                 kvm_update_dr7(vcpu);
 936                 break;
 937         }
 938
 939         return 0;
 940 }
 941
 942 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 943 {
 944         if (__kvm_set_dr(vcpu, dr, val)) {
 945                 kvm_inject_gp(vcpu, 0);
 946                 return 1;
 947         }
 948         return 0;
 949 }
 950 EXPORT_SYMBOL_GPL(kvm_set_dr);
 951
 952 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 953 {
 954         switch (dr) {
 955         case 0 ... 3:
 956                 *val = vcpu->arch.db[dr];
 957                 break;
 958         case 4:
 959                 /* fall through */
 960         case 6:
 961                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 962                         *val = vcpu->arch.dr6;
 963                 else
 964                         *val = kvm_x86_ops->get_dr6(vcpu);
 965                 break;
 966         case 5:
 967                 /* fall through */
 968         default: /* 7 */
 969                 *val = vcpu->arch.dr7;
 970                 break;
 971         }
 972         return 0;
 973 }
 974 EXPORT_SYMBOL_GPL(kvm_get_dr);
 975
 976 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 977 {
 978         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 979         u64 data;
 980         int err;
 981
 982         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 983         if (err)
 984                 return err;
 985         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 986         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 987         return err;
 988 }
 989 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 990
 991 /*
 992  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 993  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 994  *
 995  * This list is modified at module load time to reflect the
 996  * capabilities of the host cpu. This capabilities test skips MSRs that are
 997  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 998  * may depend on host virtualization features rather than host cpu features.
 999  */
1000
1001 static u32 msrs_to_save[] = {
1002         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1003         MSR_STAR,
1004 #ifdef CONFIG_X86_64
1005         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1006 #endif
1007         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1008         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1009 };
1010
1011 static unsigned num_msrs_to_save;
1012
1013 static u32 emulated_msrs[] = {
1014         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1015         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1016         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1017         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1018         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1019         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1020         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1021         HV_X64_MSR_RESET,
1022         HV_X64_MSR_VP_INDEX,
1023         HV_X64_MSR_VP_RUNTIME,
1024         HV_X64_MSR_SCONTROL,
1025         HV_X64_MSR_STIMER0_CONFIG,
1026         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1027         MSR_KVM_PV_EOI_EN,
1028
1029         MSR_IA32_TSC_ADJUST,
1030         MSR_IA32_TSCDEADLINE,
1031         MSR_IA32_MISC_ENABLE,
1032         MSR_IA32_MCG_STATUS,
1033         MSR_IA32_MCG_CTL,
1034         MSR_IA32_MCG_EXT_CTL,
1035         MSR_IA32_SMBASE,
1036         MSR_PLATFORM_INFO,
1037         MSR_MISC_FEATURES_ENABLES,
1038 };
1039
1040 static unsigned num_emulated_msrs;
1041
1042 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1043 {
1044         if (efer & efer_reserved_bits)
1045                 return false;
1046
1047         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1048                         return false;
1049
1050         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1051                         return false;
1052
1053         return true;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1056
1057 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1058 {
1059         u64 old_efer = vcpu->arch.efer;
1060
1061         if (!kvm_valid_efer(vcpu, efer))
1062                 return 1;
1063
1064         if (is_paging(vcpu)
1065             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1066                 return 1;
1067
1068         efer &= ~EFER_LMA;
1069         efer |= vcpu->arch.efer & EFER_LMA;
1070
1071         kvm_x86_ops->set_efer(vcpu, efer);
1072
1073         /* Update reserved bits */
1074         if ((efer ^ old_efer) & EFER_NX)
1075                 kvm_mmu_reset_context(vcpu);
1076
1077         return 0;
1078 }
1079
1080 void kvm_enable_efer_bits(u64 mask)
1081 {
1082        efer_reserved_bits &= ~mask;
1083 }
1084 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1085
1086 /*
1087  * Writes msr value into into the appropriate "register".
1088  * Returns 0 on success, non-0 otherwise.
1089  * Assumes vcpu_load() was already called.
1090  */
1091 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1092 {
1093         switch (msr->index) {
1094         case MSR_FS_BASE:
1095         case MSR_GS_BASE:
1096         case MSR_KERNEL_GS_BASE:
1097         case MSR_CSTAR:
1098         case MSR_LSTAR:
1099                 if (is_noncanonical_address(msr->data, vcpu))
1100                         return 1;
1101                 break;
1102         case MSR_IA32_SYSENTER_EIP:
1103         case MSR_IA32_SYSENTER_ESP:
1104                 /*
1105                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1106                  * non-canonical address is written on Intel but not on
1107                  * AMD (which ignores the top 32-bits, because it does
1108                  * not implement 64-bit SYSENTER).
1109                  *
1110                  * 64-bit code should hence be able to write a non-canonical
1111                  * value on AMD.  Making the address canonical ensures that
1112                  * vmentry does not fail on Intel after writing a non-canonical
1113                  * value, and that something deterministic happens if the guest
1114                  * invokes 64-bit SYSENTER.
1115                  */
1116                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1117         }
1118         return kvm_x86_ops->set_msr(vcpu, msr);
1119 }
1120 EXPORT_SYMBOL_GPL(kvm_set_msr);
1121
1122 /*
1123  * Adapt set_msr() to msr_io()'s calling convention
1124  */
1125 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1126 {
1127         struct msr_data msr;
1128         int r;
1129
1130         msr.index = index;
1131         msr.host_initiated = true;
1132         r = kvm_get_msr(vcpu, &msr);
1133         if (r)
1134                 return r;
1135
1136         *data = msr.data;
1137         return 0;
1138 }
1139
1140 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1141 {
1142         struct msr_data msr;
1143
1144         msr.data = *data;
1145         msr.index = index;
1146         msr.host_initiated = true;
1147         return kvm_set_msr(vcpu, &msr);
1148 }
1149
1150 #ifdef CONFIG_X86_64
1151 struct pvclock_gtod_data {
1152         seqcount_t      seq;
1153
1154         struct { /* extract of a clocksource struct */
1155                 int vclock_mode;
1156                 u64     cycle_last;
1157                 u64     mask;
1158                 u32     mult;
1159                 u32     shift;
1160         } clock;
1161
1162         u64             boot_ns;
1163         u64             nsec_base;
1164         u64             wall_time_sec;
1165 };
1166
1167 static struct pvclock_gtod_data pvclock_gtod_data;
1168
1169 static void update_pvclock_gtod(struct timekeeper *tk)
1170 {
1171         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1172         u64 boot_ns;
1173
1174         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1175
1176         write_seqcount_begin(&vdata->seq);
1177
1178         /* copy pvclock gtod data */
1179         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1180         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1181         vdata->clock.mask               = tk->tkr_mono.mask;
1182         vdata->clock.mult               = tk->tkr_mono.mult;
1183         vdata->clock.shift              = tk->tkr_mono.shift;
1184
1185         vdata->boot_ns                  = boot_ns;
1186         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1187
1188         vdata->wall_time_sec            = tk->xtime_sec;
1189
1190         write_seqcount_end(&vdata->seq);
1191 }
1192 #endif
1193
1194 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1195 {
1196         /*
1197          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1198          * vcpu_enter_guest.  This function is only called from
1199          * the physical CPU that is running vcpu.
1200          */
1201         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1202 }
1203
1204 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1205 {
1206         int version;
1207         int r;
1208         struct pvclock_wall_clock wc;
1209         struct timespec64 boot;
1210
1211         if (!wall_clock)
1212                 return;
1213
1214         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1215         if (r)
1216                 return;
1217
1218         if (version & 1)
1219                 ++version;  /* first time write, random junk */
1220
1221         ++version;
1222
1223         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1224                 return;
1225
1226         /*
1227          * The guest calculates current wall clock time by adding
1228          * system time (updated by kvm_guest_time_update below) to the
1229          * wall clock specified here.  guest system time equals host
1230          * system time for us, thus we must fill in host boot time here.
1231          */
1232         getboottime64(&boot);
1233
1234         if (kvm->arch.kvmclock_offset) {
1235                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1236                 boot = timespec64_sub(boot, ts);
1237         }
1238         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1239         wc.nsec = boot.tv_nsec;
1240         wc.version = version;
1241
1242         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1243
1244         version++;
1245         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1246 }
1247
1248 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1249 {
1250         do_shl32_div32(dividend, divisor);
1251         return dividend;
1252 }
1253
1254 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1255                                s8 *pshift, u32 *pmultiplier)
1256 {
1257         uint64_t scaled64;
1258         int32_t  shift = 0;
1259         uint64_t tps64;
1260         uint32_t tps32;
1261
1262         tps64 = base_hz;
1263         scaled64 = scaled_hz;
1264         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1265                 tps64 >>= 1;
1266                 shift--;
1267         }
1268
1269         tps32 = (uint32_t)tps64;
1270         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1271                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1272                         scaled64 >>= 1;
1273                 else
1274                         tps32 <<= 1;
1275                 shift++;
1276         }
1277
1278         *pshift = shift;
1279         *pmultiplier = div_frac(scaled64, tps32);
1280
1281         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1282                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1283 }
1284
1285 #ifdef CONFIG_X86_64
1286 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1287 #endif
1288
1289 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1290 static unsigned long max_tsc_khz;
1291
1292 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1293 {
1294         u64 v = (u64)khz * (1000000 + ppm);
1295         do_div(v, 1000000);
1296         return v;
1297 }
1298
1299 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1300 {
1301         u64 ratio;
1302
1303         /* Guest TSC same frequency as host TSC? */
1304         if (!scale) {
1305                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1306                 return 0;
1307         }
1308
1309         /* TSC scaling supported? */
1310         if (!kvm_has_tsc_control) {
1311                 if (user_tsc_khz > tsc_khz) {
1312                         vcpu->arch.tsc_catchup = 1;
1313                         vcpu->arch.tsc_always_catchup = 1;
1314                         return 0;
1315                 } else {
1316                         WARN(1, "user requested TSC rate below hardware speed\n");
1317                         return -1;
1318                 }
1319         }
1320
1321         /* TSC scaling required  - calculate ratio */
1322         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1323                                 user_tsc_khz, tsc_khz);
1324
1325         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1326                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1327                           user_tsc_khz);
1328                 return -1;
1329         }
1330
1331         vcpu->arch.tsc_scaling_ratio = ratio;
1332         return 0;
1333 }
1334
1335 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1336 {
1337         u32 thresh_lo, thresh_hi;
1338         int use_scaling = 0;
1339
1340         /* tsc_khz can be zero if TSC calibration fails */
1341         if (user_tsc_khz == 0) {
1342                 /* set tsc_scaling_ratio to a safe value */
1343                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1344                 return -1;
1345         }
1346
1347         /* Compute a scale to convert nanoseconds in TSC cycles */
1348         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1349                            &vcpu->arch.virtual_tsc_shift,
1350                            &vcpu->arch.virtual_tsc_mult);
1351         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1352
1353         /*
1354          * Compute the variation in TSC rate which is acceptable
1355          * within the range of tolerance and decide if the
1356          * rate being applied is within that bounds of the hardware
1357          * rate.  If so, no scaling or compensation need be done.
1358          */
1359         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1360         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1361         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1362                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1363                 use_scaling = 1;
1364         }
1365         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1366 }
1367
1368 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1369 {
1370         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1371                                       vcpu->arch.virtual_tsc_mult,
1372                                       vcpu->arch.virtual_tsc_shift);
1373         tsc += vcpu->arch.this_tsc_write;
1374         return tsc;
1375 }
1376
1377 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1378 {
1379 #ifdef CONFIG_X86_64
1380         bool vcpus_matched;
1381         struct kvm_arch *ka = &vcpu->kvm->arch;
1382         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1383
1384         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1385                          atomic_read(&vcpu->kvm->online_vcpus));
1386
1387         /*
1388          * Once the masterclock is enabled, always perform request in
1389          * order to update it.
1390          *
1391          * In order to enable masterclock, the host clocksource must be TSC
1392          * and the vcpus need to have matched TSCs.  When that happens,
1393          * perform request to enable masterclock.
1394          */
1395         if (ka->use_master_clock ||
1396             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1397                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1398
1399         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1400                             atomic_read(&vcpu->kvm->online_vcpus),
1401                             ka->use_master_clock, gtod->clock.vclock_mode);
1402 #endif
1403 }
1404
1405 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1406 {
1407         u64 curr_offset = vcpu->arch.tsc_offset;
1408         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1409 }
1410
1411 /*
1412  * Multiply tsc by a fixed point number represented by ratio.
1413  *
1414  * The most significant 64-N bits (mult) of ratio represent the
1415  * integral part of the fixed point number; the remaining N bits
1416  * (frac) represent the fractional part, ie. ratio represents a fixed
1417  * point number (mult + frac * 2^(-N)).
1418  *
1419  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1420  */
1421 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1422 {
1423         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1424 }
1425
1426 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1427 {
1428         u64 _tsc = tsc;
1429         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1430
1431         if (ratio != kvm_default_tsc_scaling_ratio)
1432                 _tsc = __scale_tsc(ratio, tsc);
1433
1434         return _tsc;
1435 }
1436 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1437
1438 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1439 {
1440         u64 tsc;
1441
1442         tsc = kvm_scale_tsc(vcpu, rdtsc());
1443
1444         return target_tsc - tsc;
1445 }
1446
1447 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1448 {
1449         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1450 }
1451 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1452
1453 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1454 {
1455         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1456         vcpu->arch.tsc_offset = offset;
1457 }
1458
1459 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1460 {
1461         struct kvm *kvm = vcpu->kvm;
1462         u64 offset, ns, elapsed;
1463         unsigned long flags;
1464         bool matched;
1465         bool already_matched;
1466         u64 data = msr->data;
1467         bool synchronizing = false;
1468
1469         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1470         offset = kvm_compute_tsc_offset(vcpu, data);
1471         ns = ktime_get_boot_ns();
1472         elapsed = ns - kvm->arch.last_tsc_nsec;
1473
1474         if (vcpu->arch.virtual_tsc_khz) {
1475                 if (data == 0 && msr->host_initiated) {
1476                         /*
1477                          * detection of vcpu initialization -- need to sync
1478                          * with other vCPUs. This particularly helps to keep
1479                          * kvm_clock stable after CPU hotplug
1480                          */
1481                         synchronizing = true;
1482                 } else {
1483                         u64 tsc_exp = kvm->arch.last_tsc_write +
1484                                                 nsec_to_cycles(vcpu, elapsed);
1485                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1486                         /*
1487                          * Special case: TSC write with a small delta (1 second)
1488                          * of virtual cycle time against real time is
1489                          * interpreted as an attempt to synchronize the CPU.
1490                          */
1491                         synchronizing = data < tsc_exp + tsc_hz &&
1492                                         data + tsc_hz > tsc_exp;
1493                 }
1494         }
1495
1496         /*
1497          * For a reliable TSC, we can match TSC offsets, and for an unstable
1498          * TSC, we add elapsed time in this computation.  We could let the
1499          * compensation code attempt to catch up if we fall behind, but
1500          * it's better to try to match offsets from the beginning.
1501          */
1502         if (synchronizing &&
1503             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1504                 if (!check_tsc_unstable()) {
1505                         offset = kvm->arch.cur_tsc_offset;
1506                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1507                 } else {
1508                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1509                         data += delta;
1510                         offset = kvm_compute_tsc_offset(vcpu, data);
1511                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1512                 }
1513                 matched = true;
1514                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1515         } else {
1516                 /*
1517                  * We split periods of matched TSC writes into generations.
1518                  * For each generation, we track the original measured
1519                  * nanosecond time, offset, and write, so if TSCs are in
1520                  * sync, we can match exact offset, and if not, we can match
1521                  * exact software computation in compute_guest_tsc()
1522                  *
1523                  * These values are tracked in kvm->arch.cur_xxx variables.
1524                  */
1525                 kvm->arch.cur_tsc_generation++;
1526                 kvm->arch.cur_tsc_nsec = ns;
1527                 kvm->arch.cur_tsc_write = data;
1528                 kvm->arch.cur_tsc_offset = offset;
1529                 matched = false;
1530                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1531                          kvm->arch.cur_tsc_generation, data);
1532         }
1533
1534         /*
1535          * We also track th most recent recorded KHZ, write and time to
1536          * allow the matching interval to be extended at each write.
1537          */
1538         kvm->arch.last_tsc_nsec = ns;
1539         kvm->arch.last_tsc_write = data;
1540         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1541
1542         vcpu->arch.last_guest_tsc = data;
1543
1544         /* Keep track of which generation this VCPU has synchronized to */
1545         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1546         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1547         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1548
1549         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1550                 update_ia32_tsc_adjust_msr(vcpu, offset);
1551
1552         kvm_vcpu_write_tsc_offset(vcpu, offset);
1553         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1554
1555         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1556         if (!matched) {
1557                 kvm->arch.nr_vcpus_matched_tsc = 0;
1558         } else if (!already_matched) {
1559                 kvm->arch.nr_vcpus_matched_tsc++;
1560         }
1561
1562         kvm_track_tsc_matching(vcpu);
1563         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1564 }
1565
1566 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1567
1568 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1569                                            s64 adjustment)
1570 {
1571         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1572 }
1573
1574 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1575 {
1576         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1577                 WARN_ON(adjustment < 0);
1578         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1579         adjust_tsc_offset_guest(vcpu, adjustment);
1580 }
1581
1582 #ifdef CONFIG_X86_64
1583
1584 static u64 read_tsc(void)
1585 {
1586         u64 ret = (u64)rdtsc_ordered();
1587         u64 last = pvclock_gtod_data.clock.cycle_last;
1588
1589         if (likely(ret >= last))
1590                 return ret;
1591
1592         /*
1593          * GCC likes to generate cmov here, but this branch is extremely
1594          * predictable (it's just a function of time and the likely is
1595          * very likely) and there's a data dependence, so force GCC
1596          * to generate a branch instead.  I don't barrier() because
1597          * we don't actually need a barrier, and if this function
1598          * ever gets inlined it will generate worse code.
1599          */
1600         asm volatile ("");
1601         return last;
1602 }
1603
1604 static inline u64 vgettsc(u64 *cycle_now)
1605 {
1606         long v;
1607         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1608
1609         *cycle_now = read_tsc();
1610
1611         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1612         return v * gtod->clock.mult;
1613 }
1614
1615 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1616 {
1617         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1618         unsigned long seq;
1619         int mode;
1620         u64 ns;
1621
1622         do {
1623                 seq = read_seqcount_begin(&gtod->seq);
1624                 mode = gtod->clock.vclock_mode;
1625                 ns = gtod->nsec_base;
1626                 ns += vgettsc(cycle_now);
1627                 ns >>= gtod->clock.shift;
1628                 ns += gtod->boot_ns;
1629         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1630         *t = ns;
1631
1632         return mode;
1633 }
1634
1635 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1636 {
1637         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1638         unsigned long seq;
1639         int mode;
1640         u64 ns;
1641
1642         do {
1643                 seq = read_seqcount_begin(&gtod->seq);
1644                 mode = gtod->clock.vclock_mode;
1645                 ts->tv_sec = gtod->wall_time_sec;
1646                 ns = gtod->nsec_base;
1647                 ns += vgettsc(cycle_now);
1648                 ns >>= gtod->clock.shift;
1649         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1650
1651         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1652         ts->tv_nsec = ns;
1653
1654         return mode;
1655 }
1656
1657 /* returns true if host is using tsc clocksource */
1658 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1659 {
1660         /* checked again under seqlock below */
1661         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1662                 return false;
1663
1664         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1665 }
1666
1667 /* returns true if host is using tsc clocksource */
1668 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1669                                            u64 *cycle_now)
1670 {
1671         /* checked again under seqlock below */
1672         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1673                 return false;
1674
1675         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1676 }
1677 #endif
1678
1679 /*
1680  *
1681  * Assuming a stable TSC across physical CPUS, and a stable TSC
1682  * across virtual CPUs, the following condition is possible.
1683  * Each numbered line represents an event visible to both
1684  * CPUs at the next numbered event.
1685  *
1686  * "timespecX" represents host monotonic time. "tscX" represents
1687  * RDTSC value.
1688  *
1689  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1690  *
1691  * 1.  read timespec0,tsc0
1692  * 2.                                   | timespec1 = timespec0 + N
1693  *                                      | tsc1 = tsc0 + M
1694  * 3. transition to guest               | transition to guest
1695  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1696  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1697  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1698  *
1699  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1700  *
1701  *      - ret0 < ret1
1702  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1703  *              ...
1704  *      - 0 < N - M => M < N
1705  *
1706  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1707  * always the case (the difference between two distinct xtime instances
1708  * might be smaller then the difference between corresponding TSC reads,
1709  * when updating guest vcpus pvclock areas).
1710  *
1711  * To avoid that problem, do not allow visibility of distinct
1712  * system_timestamp/tsc_timestamp values simultaneously: use a master
1713  * copy of host monotonic time values. Update that master copy
1714  * in lockstep.
1715  *
1716  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1717  *
1718  */
1719
1720 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1721 {
1722 #ifdef CONFIG_X86_64
1723         struct kvm_arch *ka = &kvm->arch;
1724         int vclock_mode;
1725         bool host_tsc_clocksource, vcpus_matched;
1726
1727         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1728                         atomic_read(&kvm->online_vcpus));
1729
1730         /*
1731          * If the host uses TSC clock, then passthrough TSC as stable
1732          * to the guest.
1733          */
1734         host_tsc_clocksource = kvm_get_time_and_clockread(
1735                                         &ka->master_kernel_ns,
1736                                         &ka->master_cycle_now);
1737
1738         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1739                                 && !ka->backwards_tsc_observed
1740                                 && !ka->boot_vcpu_runs_old_kvmclock;
1741
1742         if (ka->use_master_clock)
1743                 atomic_set(&kvm_guest_has_master_clock, 1);
1744
1745         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1746         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1747                                         vcpus_matched);
1748 #endif
1749 }
1750
1751 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1752 {
1753         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1754 }
1755
1756 static void kvm_gen_update_masterclock(struct kvm *kvm)
1757 {
1758 #ifdef CONFIG_X86_64
1759         int i;
1760         struct kvm_vcpu *vcpu;
1761         struct kvm_arch *ka = &kvm->arch;
1762
1763         spin_lock(&ka->pvclock_gtod_sync_lock);
1764         kvm_make_mclock_inprogress_request(kvm);
1765         /* no guest entries from this point */
1766         pvclock_update_vm_gtod_copy(kvm);
1767
1768         kvm_for_each_vcpu(i, vcpu, kvm)
1769                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1770
1771         /* guest entries allowed */
1772         kvm_for_each_vcpu(i, vcpu, kvm)
1773                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1774
1775         spin_unlock(&ka->pvclock_gtod_sync_lock);
1776 #endif
1777 }
1778
1779 u64 get_kvmclock_ns(struct kvm *kvm)
1780 {
1781         struct kvm_arch *ka = &kvm->arch;
1782         struct pvclock_vcpu_time_info hv_clock;
1783         u64 ret;
1784
1785         spin_lock(&ka->pvclock_gtod_sync_lock);
1786         if (!ka->use_master_clock) {
1787                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1788                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1789         }
1790
1791         hv_clock.tsc_timestamp = ka->master_cycle_now;
1792         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1793         spin_unlock(&ka->pvclock_gtod_sync_lock);
1794
1795         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1796         get_cpu();
1797
1798         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1799                            &hv_clock.tsc_shift,
1800                            &hv_clock.tsc_to_system_mul);
1801         ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1802
1803         put_cpu();
1804
1805         return ret;
1806 }
1807
1808 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1809 {
1810         struct kvm_vcpu_arch *vcpu = &v->arch;
1811         struct pvclock_vcpu_time_info guest_hv_clock;
1812
1813         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1814                 &guest_hv_clock, sizeof(guest_hv_clock))))
1815                 return;
1816
1817         /* This VCPU is paused, but it's legal for a guest to read another
1818          * VCPU's kvmclock, so we really have to follow the specification where
1819          * it says that version is odd if data is being modified, and even after
1820          * it is consistent.
1821          *
1822          * Version field updates must be kept separate.  This is because
1823          * kvm_write_guest_cached might use a "rep movs" instruction, and
1824          * writes within a string instruction are weakly ordered.  So there
1825          * are three writes overall.
1826          *
1827          * As a small optimization, only write the version field in the first
1828          * and third write.  The vcpu->pv_time cache is still valid, because the
1829          * version field is the first in the struct.
1830          */
1831         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1832
1833         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1834         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1835                                 &vcpu->hv_clock,
1836                                 sizeof(vcpu->hv_clock.version));
1837
1838         smp_wmb();
1839
1840         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1841         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1842
1843         if (vcpu->pvclock_set_guest_stopped_request) {
1844                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1845                 vcpu->pvclock_set_guest_stopped_request = false;
1846         }
1847
1848         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1849
1850         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1851                                 &vcpu->hv_clock,
1852                                 sizeof(vcpu->hv_clock));
1853
1854         smp_wmb();
1855
1856         vcpu->hv_clock.version++;
1857         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1858                                 &vcpu->hv_clock,
1859                                 sizeof(vcpu->hv_clock.version));
1860 }
1861
1862 static int kvm_guest_time_update(struct kvm_vcpu *v)
1863 {
1864         unsigned long flags, tgt_tsc_khz;
1865         struct kvm_vcpu_arch *vcpu = &v->arch;
1866         struct kvm_arch *ka = &v->kvm->arch;
1867         s64 kernel_ns;
1868         u64 tsc_timestamp, host_tsc;
1869         u8 pvclock_flags;
1870         bool use_master_clock;
1871
1872         kernel_ns = 0;
1873         host_tsc = 0;
1874
1875         /*
1876          * If the host uses TSC clock, then passthrough TSC as stable
1877          * to the guest.
1878          */
1879         spin_lock(&ka->pvclock_gtod_sync_lock);
1880         use_master_clock = ka->use_master_clock;
1881         if (use_master_clock) {
1882                 host_tsc = ka->master_cycle_now;
1883                 kernel_ns = ka->master_kernel_ns;
1884         }
1885         spin_unlock(&ka->pvclock_gtod_sync_lock);
1886
1887         /* Keep irq disabled to prevent changes to the clock */
1888         local_irq_save(flags);
1889         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1890         if (unlikely(tgt_tsc_khz == 0)) {
1891                 local_irq_restore(flags);
1892                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1893                 return 1;
1894         }
1895         if (!use_master_clock) {
1896                 host_tsc = rdtsc();
1897                 kernel_ns = ktime_get_boot_ns();
1898         }
1899
1900         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1901
1902         /*
1903          * We may have to catch up the TSC to match elapsed wall clock
1904          * time for two reasons, even if kvmclock is used.
1905          *   1) CPU could have been running below the maximum TSC rate
1906          *   2) Broken TSC compensation resets the base at each VCPU
1907          *      entry to avoid unknown leaps of TSC even when running
1908          *      again on the same CPU.  This may cause apparent elapsed
1909          *      time to disappear, and the guest to stand still or run
1910          *      very slowly.
1911          */
1912         if (vcpu->tsc_catchup) {
1913                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1914                 if (tsc > tsc_timestamp) {
1915                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1916                         tsc_timestamp = tsc;
1917                 }
1918         }
1919
1920         local_irq_restore(flags);
1921
1922         /* With all the info we got, fill in the values */
1923
1924         if (kvm_has_tsc_control)
1925                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1926
1927         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1928                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1929                                    &vcpu->hv_clock.tsc_shift,
1930                                    &vcpu->hv_clock.tsc_to_system_mul);
1931                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1932         }
1933
1934         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1935         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1936         vcpu->last_guest_tsc = tsc_timestamp;
1937
1938         /* If the host uses TSC clocksource, then it is stable */
1939         pvclock_flags = 0;
1940         if (use_master_clock)
1941                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1942
1943         vcpu->hv_clock.flags = pvclock_flags;
1944
1945         if (vcpu->pv_time_enabled)
1946                 kvm_setup_pvclock_page(v);
1947         if (v == kvm_get_vcpu(v->kvm, 0))
1948                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1949         return 0;
1950 }
1951
1952 /*
1953  * kvmclock updates which are isolated to a given vcpu, such as
1954  * vcpu->cpu migration, should not allow system_timestamp from
1955  * the rest of the vcpus to remain static. Otherwise ntp frequency
1956  * correction applies to one vcpu's system_timestamp but not
1957  * the others.
1958  *
1959  * So in those cases, request a kvmclock update for all vcpus.
1960  * We need to rate-limit these requests though, as they can
1961  * considerably slow guests that have a large number of vcpus.
1962  * The time for a remote vcpu to update its kvmclock is bound
1963  * by the delay we use to rate-limit the updates.
1964  */
1965
1966 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1967
1968 static void kvmclock_update_fn(struct work_struct *work)
1969 {
1970         int i;
1971         struct delayed_work *dwork = to_delayed_work(work);
1972         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1973                                            kvmclock_update_work);
1974         struct kvm *kvm = container_of(ka, struct kvm, arch);
1975         struct kvm_vcpu *vcpu;
1976
1977         kvm_for_each_vcpu(i, vcpu, kvm) {
1978                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1979                 kvm_vcpu_kick(vcpu);
1980         }
1981 }
1982
1983 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1984 {
1985         struct kvm *kvm = v->kvm;
1986
1987         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1988         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1989                                         KVMCLOCK_UPDATE_DELAY);
1990 }
1991
1992 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1993
1994 static void kvmclock_sync_fn(struct work_struct *work)
1995 {
1996         struct delayed_work *dwork = to_delayed_work(work);
1997         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1998                                            kvmclock_sync_work);
1999         struct kvm *kvm = container_of(ka, struct kvm, arch);
2000
2001         if (!kvmclock_periodic_sync)
2002                 return;
2003
2004         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2005         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2006                                         KVMCLOCK_SYNC_PERIOD);
2007 }
2008
2009 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2010 {
2011         u64 mcg_cap = vcpu->arch.mcg_cap;
2012         unsigned bank_num = mcg_cap & 0xff;
2013         u32 msr = msr_info->index;
2014         u64 data = msr_info->data;
2015
2016         switch (msr) {
2017         case MSR_IA32_MCG_STATUS:
2018                 vcpu->arch.mcg_status = data;
2019                 break;
2020         case MSR_IA32_MCG_CTL:
2021                 if (!(mcg_cap & MCG_CTL_P))
2022                         return 1;
2023                 if (data != 0 && data != ~(u64)0)
2024                         return -1;
2025                 vcpu->arch.mcg_ctl = data;
2026                 break;
2027         default:
2028                 if (msr >= MSR_IA32_MC0_CTL &&
2029                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2030                         u32 offset = msr - MSR_IA32_MC0_CTL;
2031                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2032                          * some Linux kernels though clear bit 10 in bank 4 to
2033                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2034                          * this to avoid an uncatched #GP in the guest
2035                          */
2036                         if ((offset & 0x3) == 0 &&
2037                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2038                                 return -1;
2039                         if (!msr_info->host_initiated &&
2040                                 (offset & 0x3) == 1 && data != 0)
2041                                 return -1;
2042                         vcpu->arch.mce_banks[offset] = data;
2043                         break;
2044                 }
2045                 return 1;
2046         }
2047         return 0;
2048 }
2049
2050 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2051 {
2052         struct kvm *kvm = vcpu->kvm;
2053         int lm = is_long_mode(vcpu);
2054         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2055                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2056         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2057                 : kvm->arch.xen_hvm_config.blob_size_32;
2058         u32 page_num = data & ~PAGE_MASK;
2059         u64 page_addr = data & PAGE_MASK;
2060         u8 *page;
2061         int r;
2062
2063         r = -E2BIG;
2064         if (page_num >= blob_size)
2065                 goto out;
2066         r = -ENOMEM;
2067         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2068         if (IS_ERR(page)) {
2069                 r = PTR_ERR(page);
2070                 goto out;
2071         }
2072         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2073                 goto out_free;
2074         r = 0;
2075 out_free:
2076         kfree(page);
2077 out:
2078         return r;
2079 }
2080
2081 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2082 {
2083         gpa_t gpa = data & ~0x3f;
2084
2085         /* Bits 3:5 are reserved, Should be zero */
2086         if (data & 0x38)
2087                 return 1;
2088
2089         vcpu->arch.apf.msr_val = data;
2090
2091         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2092                 kvm_clear_async_pf_completion_queue(vcpu);
2093                 kvm_async_pf_hash_reset(vcpu);
2094                 return 0;
2095         }
2096
2097         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2098                                         sizeof(u32)))
2099                 return 1;
2100
2101         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2102         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2103         kvm_async_pf_wakeup_all(vcpu);
2104         return 0;
2105 }
2106
2107 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2108 {
2109         vcpu->arch.pv_time_enabled = false;
2110 }
2111
2112 static void record_steal_time(struct kvm_vcpu *vcpu)
2113 {
2114         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2115                 return;
2116
2117         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2118                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2119                 return;
2120
2121         vcpu->arch.st.steal.preempted = 0;
2122
2123         if (vcpu->arch.st.steal.version & 1)
2124                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2125
2126         vcpu->arch.st.steal.version += 1;
2127
2128         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2129                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2130
2131         smp_wmb();
2132
2133         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2134                 vcpu->arch.st.last_steal;
2135         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2136
2137         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2138                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2139
2140         smp_wmb();
2141
2142         vcpu->arch.st.steal.version += 1;
2143
2144         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2145                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2146 }
2147
2148 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2149 {
2150         bool pr = false;
2151         u32 msr = msr_info->index;
2152         u64 data = msr_info->data;
2153
2154         switch (msr) {
2155         case MSR_AMD64_NB_CFG:
2156         case MSR_IA32_UCODE_REV:
2157         case MSR_IA32_UCODE_WRITE:
2158         case MSR_VM_HSAVE_PA:
2159         case MSR_AMD64_PATCH_LOADER:
2160         case MSR_AMD64_BU_CFG2:
2161         case MSR_AMD64_DC_CFG:
2162                 break;
2163
2164         case MSR_EFER:
2165                 return set_efer(vcpu, data);
2166         case MSR_K7_HWCR:
2167                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2168                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2169                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2170                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2171                 if (data != 0) {
2172                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2173                                     data);
2174                         return 1;
2175                 }
2176                 break;
2177         case MSR_FAM10H_MMIO_CONF_BASE:
2178                 if (data != 0) {
2179                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2180                                     "0x%llx\n", data);
2181                         return 1;
2182                 }
2183                 break;
2184         case MSR_IA32_DEBUGCTLMSR:
2185                 if (!data) {
2186                         /* We support the non-activated case already */
2187                         break;
2188                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2189                         /* Values other than LBR and BTF are vendor-specific,
2190                            thus reserved and should throw a #GP */
2191                         return 1;
2192                 }
2193                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2194                             __func__, data);
2195                 break;
2196         case 0x200 ... 0x2ff:
2197                 return kvm_mtrr_set_msr(vcpu, msr, data);
2198         case MSR_IA32_APICBASE:
2199                 return kvm_set_apic_base(vcpu, msr_info);
2200         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2201                 return kvm_x2apic_msr_write(vcpu, msr, data);
2202         case MSR_IA32_TSCDEADLINE:
2203                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2204                 break;
2205         case MSR_IA32_TSC_ADJUST:
2206                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2207                         if (!msr_info->host_initiated) {
2208                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2209                                 adjust_tsc_offset_guest(vcpu, adj);
2210                         }
2211                         vcpu->arch.ia32_tsc_adjust_msr = data;
2212                 }
2213                 break;
2214         case MSR_IA32_MISC_ENABLE:
2215                 vcpu->arch.ia32_misc_enable_msr = data;
2216                 break;
2217         case MSR_IA32_SMBASE:
2218                 if (!msr_info->host_initiated)
2219                         return 1;
2220                 vcpu->arch.smbase = data;
2221                 break;
2222         case MSR_KVM_WALL_CLOCK_NEW:
2223         case MSR_KVM_WALL_CLOCK:
2224                 vcpu->kvm->arch.wall_clock = data;
2225                 kvm_write_wall_clock(vcpu->kvm, data);
2226                 break;
2227         case MSR_KVM_SYSTEM_TIME_NEW:
2228         case MSR_KVM_SYSTEM_TIME: {
2229                 struct kvm_arch *ka = &vcpu->kvm->arch;
2230
2231                 kvmclock_reset(vcpu);
2232
2233                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2234                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2235
2236                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2237                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2238
2239                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2240                 }
2241
2242                 vcpu->arch.time = data;
2243                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2244
2245                 /* we verify if the enable bit is set... */
2246                 if (!(data & 1))
2247                         break;
2248
2249                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2250                      &vcpu->arch.pv_time, data & ~1ULL,
2251                      sizeof(struct pvclock_vcpu_time_info)))
2252                         vcpu->arch.pv_time_enabled = false;
2253                 else
2254                         vcpu->arch.pv_time_enabled = true;
2255
2256                 break;
2257         }
2258         case MSR_KVM_ASYNC_PF_EN:
2259                 if (kvm_pv_enable_async_pf(vcpu, data))
2260                         return 1;
2261                 break;
2262         case MSR_KVM_STEAL_TIME:
2263
2264                 if (unlikely(!sched_info_on()))
2265                         return 1;
2266
2267                 if (data & KVM_STEAL_RESERVED_MASK)
2268                         return 1;
2269
2270                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2271                                                 data & KVM_STEAL_VALID_BITS,
2272                                                 sizeof(struct kvm_steal_time)))
2273                         return 1;
2274
2275                 vcpu->arch.st.msr_val = data;
2276
2277                 if (!(data & KVM_MSR_ENABLED))
2278                         break;
2279
2280                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2281
2282                 break;
2283         case MSR_KVM_PV_EOI_EN:
2284                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2285                         return 1;
2286                 break;
2287
2288         case MSR_IA32_MCG_CTL:
2289         case MSR_IA32_MCG_STATUS:
2290         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2291                 return set_msr_mce(vcpu, msr_info);
2292
2293         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2294         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2295                 pr = true; /* fall through */
2296         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2297         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2298                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2299                         return kvm_pmu_set_msr(vcpu, msr_info);
2300
2301                 if (pr || data != 0)
2302                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2303                                     "0x%x data 0x%llx\n", msr, data);
2304                 break;
2305         case MSR_K7_CLK_CTL:
2306                 /*
2307                  * Ignore all writes to this no longer documented MSR.
2308                  * Writes are only relevant for old K7 processors,
2309                  * all pre-dating SVM, but a recommended workaround from
2310                  * AMD for these chips. It is possible to specify the
2311                  * affected processor models on the command line, hence
2312                  * the need to ignore the workaround.
2313                  */
2314                 break;
2315         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2316         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2317         case HV_X64_MSR_CRASH_CTL:
2318         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2319                 return kvm_hv_set_msr_common(vcpu, msr, data,
2320                                              msr_info->host_initiated);
2321         case MSR_IA32_BBL_CR_CTL3:
2322                 /* Drop writes to this legacy MSR -- see rdmsr
2323                  * counterpart for further detail.
2324                  */
2325                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2326                 break;
2327         case MSR_AMD64_OSVW_ID_LENGTH:
2328                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2329                         return 1;
2330                 vcpu->arch.osvw.length = data;
2331                 break;
2332         case MSR_AMD64_OSVW_STATUS:
2333                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2334                         return 1;
2335                 vcpu->arch.osvw.status = data;
2336                 break;
2337         case MSR_PLATFORM_INFO:
2338                 if (!msr_info->host_initiated ||
2339                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2340                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2341                      cpuid_fault_enabled(vcpu)))
2342                         return 1;
2343                 vcpu->arch.msr_platform_info = data;
2344                 break;
2345         case MSR_MISC_FEATURES_ENABLES:
2346                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2347                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2348                      !supports_cpuid_fault(vcpu)))
2349                         return 1;
2350                 vcpu->arch.msr_misc_features_enables = data;
2351                 break;
2352         default:
2353                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2354                         return xen_hvm_config(vcpu, data);
2355                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2356                         return kvm_pmu_set_msr(vcpu, msr_info);
2357                 if (!ignore_msrs) {
2358                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2359                                     msr, data);
2360                         return 1;
2361                 } else {
2362                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2363                                     msr, data);
2364                         break;
2365                 }
2366         }
2367         return 0;
2368 }
2369 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2370
2371
2372 /*
2373  * Reads an msr value (of 'msr_index') into 'pdata'.
2374  * Returns 0 on success, non-0 otherwise.
2375  * Assumes vcpu_load() was already called.
2376  */
2377 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2378 {
2379         return kvm_x86_ops->get_msr(vcpu, msr);
2380 }
2381 EXPORT_SYMBOL_GPL(kvm_get_msr);
2382
2383 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2384 {
2385         u64 data;
2386         u64 mcg_cap = vcpu->arch.mcg_cap;
2387         unsigned bank_num = mcg_cap & 0xff;
2388
2389         switch (msr) {
2390         case MSR_IA32_P5_MC_ADDR:
2391         case MSR_IA32_P5_MC_TYPE:
2392                 data = 0;
2393                 break;
2394         case MSR_IA32_MCG_CAP:
2395                 data = vcpu->arch.mcg_cap;
2396                 break;
2397         case MSR_IA32_MCG_CTL:
2398                 if (!(mcg_cap & MCG_CTL_P))
2399                         return 1;
2400                 data = vcpu->arch.mcg_ctl;
2401                 break;
2402         case MSR_IA32_MCG_STATUS:
2403                 data = vcpu->arch.mcg_status;
2404                 break;
2405         default:
2406                 if (msr >= MSR_IA32_MC0_CTL &&
2407                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2408                         u32 offset = msr - MSR_IA32_MC0_CTL;
2409                         data = vcpu->arch.mce_banks[offset];
2410                         break;
2411                 }
2412                 return 1;
2413         }
2414         *pdata = data;
2415         return 0;
2416 }
2417
2418 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2419 {
2420         switch (msr_info->index) {
2421         case MSR_IA32_PLATFORM_ID:
2422         case MSR_IA32_EBL_CR_POWERON:
2423         case MSR_IA32_DEBUGCTLMSR:
2424         case MSR_IA32_LASTBRANCHFROMIP:
2425         case MSR_IA32_LASTBRANCHTOIP:
2426         case MSR_IA32_LASTINTFROMIP:
2427         case MSR_IA32_LASTINTTOIP:
2428         case MSR_K8_SYSCFG:
2429         case MSR_K8_TSEG_ADDR:
2430         case MSR_K8_TSEG_MASK:
2431         case MSR_K7_HWCR:
2432         case MSR_VM_HSAVE_PA:
2433         case MSR_K8_INT_PENDING_MSG:
2434         case MSR_AMD64_NB_CFG:
2435         case MSR_FAM10H_MMIO_CONF_BASE:
2436         case MSR_AMD64_BU_CFG2:
2437         case MSR_IA32_PERF_CTL:
2438         case MSR_AMD64_DC_CFG:
2439                 msr_info->data = 0;
2440                 break;
2441         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2442         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2443         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2444         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2445                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2446                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2447                 msr_info->data = 0;
2448                 break;
2449         case MSR_IA32_UCODE_REV:
2450                 msr_info->data = 0x100000000ULL;
2451                 break;
2452         case MSR_MTRRcap:
2453         case 0x200 ... 0x2ff:
2454                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2455         case 0xcd: /* fsb frequency */
2456                 msr_info->data = 3;
2457                 break;
2458                 /*
2459                  * MSR_EBC_FREQUENCY_ID
2460                  * Conservative value valid for even the basic CPU models.
2461                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2462                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2463                  * and 266MHz for model 3, or 4. Set Core Clock
2464                  * Frequency to System Bus Frequency Ratio to 1 (bits
2465                  * 31:24) even though these are only valid for CPU
2466                  * models > 2, however guests may end up dividing or
2467                  * multiplying by zero otherwise.
2468                  */
2469         case MSR_EBC_FREQUENCY_ID:
2470                 msr_info->data = 1 << 24;
2471                 break;
2472         case MSR_IA32_APICBASE:
2473                 msr_info->data = kvm_get_apic_base(vcpu);
2474                 break;
2475         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2476                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2477                 break;
2478         case MSR_IA32_TSCDEADLINE:
2479                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2480                 break;
2481         case MSR_IA32_TSC_ADJUST:
2482                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2483                 break;
2484         case MSR_IA32_MISC_ENABLE:
2485                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2486                 break;
2487         case MSR_IA32_SMBASE:
2488                 if (!msr_info->host_initiated)
2489                         return 1;
2490                 msr_info->data = vcpu->arch.smbase;
2491                 break;
2492         case MSR_IA32_PERF_STATUS:
2493                 /* TSC increment by tick */
2494                 msr_info->data = 1000ULL;
2495                 /* CPU multiplier */
2496                 msr_info->data |= (((uint64_t)4ULL) << 40);
2497                 break;
2498         case MSR_EFER:
2499                 msr_info->data = vcpu->arch.efer;
2500                 break;
2501         case MSR_KVM_WALL_CLOCK:
2502         case MSR_KVM_WALL_CLOCK_NEW:
2503                 msr_info->data = vcpu->kvm->arch.wall_clock;
2504                 break;
2505         case MSR_KVM_SYSTEM_TIME:
2506         case MSR_KVM_SYSTEM_TIME_NEW:
2507                 msr_info->data = vcpu->arch.time;
2508                 break;
2509         case MSR_KVM_ASYNC_PF_EN:
2510                 msr_info->data = vcpu->arch.apf.msr_val;
2511                 break;
2512         case MSR_KVM_STEAL_TIME:
2513                 msr_info->data = vcpu->arch.st.msr_val;
2514                 break;
2515         case MSR_KVM_PV_EOI_EN:
2516                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2517                 break;
2518         case MSR_IA32_P5_MC_ADDR:
2519         case MSR_IA32_P5_MC_TYPE:
2520         case MSR_IA32_MCG_CAP:
2521         case MSR_IA32_MCG_CTL:
2522         case MSR_IA32_MCG_STATUS:
2523         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2524                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2525         case MSR_K7_CLK_CTL:
2526                 /*
2527                  * Provide expected ramp-up count for K7. All other
2528                  * are set to zero, indicating minimum divisors for
2529                  * every field.
2530                  *
2531                  * This prevents guest kernels on AMD host with CPU
2532                  * type 6, model 8 and higher from exploding due to
2533                  * the rdmsr failing.
2534                  */
2535                 msr_info->data = 0x20000000;
2536                 break;
2537         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2538         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2539         case HV_X64_MSR_CRASH_CTL:
2540         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2541                 return kvm_hv_get_msr_common(vcpu,
2542                                              msr_info->index, &msr_info->data);
2543                 break;
2544         case MSR_IA32_BBL_CR_CTL3:
2545                 /* This legacy MSR exists but isn't fully documented in current
2546                  * silicon.  It is however accessed by winxp in very narrow
2547                  * scenarios where it sets bit #19, itself documented as
2548                  * a "reserved" bit.  Best effort attempt to source coherent
2549                  * read data here should the balance of the register be
2550                  * interpreted by the guest:
2551                  *
2552                  * L2 cache control register 3: 64GB range, 256KB size,
2553                  * enabled, latency 0x1, configured
2554                  */
2555                 msr_info->data = 0xbe702111;
2556                 break;
2557         case MSR_AMD64_OSVW_ID_LENGTH:
2558                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2559                         return 1;
2560                 msr_info->data = vcpu->arch.osvw.length;
2561                 break;
2562         case MSR_AMD64_OSVW_STATUS:
2563                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2564                         return 1;
2565                 msr_info->data = vcpu->arch.osvw.status;
2566                 break;
2567         case MSR_PLATFORM_INFO:
2568                 msr_info->data = vcpu->arch.msr_platform_info;
2569                 break;
2570         case MSR_MISC_FEATURES_ENABLES:
2571                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2572                 break;
2573         default:
2574                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2575                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2576                 if (!ignore_msrs) {
2577                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2578                                                msr_info->index);
2579                         return 1;
2580                 } else {
2581                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2582                         msr_info->data = 0;
2583                 }
2584                 break;
2585         }
2586         return 0;
2587 }
2588 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2589
2590 /*
2591  * Read or write a bunch of msrs. All parameters are kernel addresses.
2592  *
2593  * @return number of msrs set successfully.
2594  */
2595 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2596                     struct kvm_msr_entry *entries,
2597                     int (*do_msr)(struct kvm_vcpu *vcpu,
2598                                   unsigned index, u64 *data))
2599 {
2600         int i, idx;
2601
2602         idx = srcu_read_lock(&vcpu->kvm->srcu);
2603         for (i = 0; i < msrs->nmsrs; ++i)
2604                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2605                         break;
2606         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2607
2608         return i;
2609 }
2610
2611 /*
2612  * Read or write a bunch of msrs. Parameters are user addresses.
2613  *
2614  * @return number of msrs set successfully.
2615  */
2616 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2617                   int (*do_msr)(struct kvm_vcpu *vcpu,
2618                                 unsigned index, u64 *data),
2619                   int writeback)
2620 {
2621         struct kvm_msrs msrs;
2622         struct kvm_msr_entry *entries;
2623         int r, n;
2624         unsigned size;
2625
2626         r = -EFAULT;
2627         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2628                 goto out;
2629
2630         r = -E2BIG;
2631         if (msrs.nmsrs >= MAX_IO_MSRS)
2632                 goto out;
2633
2634         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2635         entries = memdup_user(user_msrs->entries, size);
2636         if (IS_ERR(entries)) {
2637                 r = PTR_ERR(entries);
2638                 goto out;
2639         }
2640
2641         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2642         if (r < 0)
2643                 goto out_free;
2644
2645         r = -EFAULT;
2646         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2647                 goto out_free;
2648
2649         r = n;
2650
2651 out_free:
2652         kfree(entries);
2653 out:
2654         return r;
2655 }
2656
2657 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2658 {
2659         int r;
2660
2661         switch (ext) {
2662         case KVM_CAP_IRQCHIP:
2663         case KVM_CAP_HLT:
2664         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2665         case KVM_CAP_SET_TSS_ADDR:
2666         case KVM_CAP_EXT_CPUID:
2667         case KVM_CAP_EXT_EMUL_CPUID:
2668         case KVM_CAP_CLOCKSOURCE:
2669         case KVM_CAP_PIT:
2670         case KVM_CAP_NOP_IO_DELAY:
2671         case KVM_CAP_MP_STATE:
2672         case KVM_CAP_SYNC_MMU:
2673         case KVM_CAP_USER_NMI:
2674         case KVM_CAP_REINJECT_CONTROL:
2675         case KVM_CAP_IRQ_INJECT_STATUS:
2676         case KVM_CAP_IOEVENTFD:
2677         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2678         case KVM_CAP_PIT2:
2679         case KVM_CAP_PIT_STATE2:
2680         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2681         case KVM_CAP_XEN_HVM:
2682         case KVM_CAP_VCPU_EVENTS:
2683         case KVM_CAP_HYPERV:
2684         case KVM_CAP_HYPERV_VAPIC:
2685         case KVM_CAP_HYPERV_SPIN:
2686         case KVM_CAP_HYPERV_SYNIC:
2687         case KVM_CAP_HYPERV_SYNIC2:
2688         case KVM_CAP_HYPERV_VP_INDEX:
2689         case KVM_CAP_PCI_SEGMENT:
2690         case KVM_CAP_DEBUGREGS:
2691         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2692         case KVM_CAP_XSAVE:
2693         case KVM_CAP_ASYNC_PF:
2694         case KVM_CAP_GET_TSC_KHZ:
2695         case KVM_CAP_KVMCLOCK_CTRL:
2696         case KVM_CAP_READONLY_MEM:
2697         case KVM_CAP_HYPERV_TIME:
2698         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2699         case KVM_CAP_TSC_DEADLINE_TIMER:
2700         case KVM_CAP_ENABLE_CAP_VM:
2701         case KVM_CAP_DISABLE_QUIRKS:
2702         case KVM_CAP_SET_BOOT_CPU_ID:
2703         case KVM_CAP_SPLIT_IRQCHIP:
2704         case KVM_CAP_IMMEDIATE_EXIT:
2705                 r = 1;
2706                 break;
2707         case KVM_CAP_ADJUST_CLOCK:
2708                 r = KVM_CLOCK_TSC_STABLE;
2709                 break;
2710         case KVM_CAP_X86_GUEST_MWAIT:
2711                 r = kvm_mwait_in_guest();
2712                 break;
2713         case KVM_CAP_X86_SMM:
2714                 /* SMBASE is usually relocated above 1M on modern chipsets,
2715                  * and SMM handlers might indeed rely on 4G segment limits,
2716                  * so do not report SMM to be available if real mode is
2717                  * emulated via vm86 mode.  Still, do not go to great lengths
2718                  * to avoid userspace's usage of the feature, because it is a
2719                  * fringe case that is not enabled except via specific settings
2720                  * of the module parameters.
2721                  */
2722                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2723                 break;
2724         case KVM_CAP_VAPIC:
2725                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2726                 break;
2727         case KVM_CAP_NR_VCPUS:
2728                 r = KVM_SOFT_MAX_VCPUS;
2729                 break;
2730         case KVM_CAP_MAX_VCPUS:
2731                 r = KVM_MAX_VCPUS;
2732                 break;
2733         case KVM_CAP_NR_MEMSLOTS:
2734                 r = KVM_USER_MEM_SLOTS;
2735                 break;
2736         case KVM_CAP_PV_MMU:    /* obsolete */
2737                 r = 0;
2738                 break;
2739         case KVM_CAP_MCE:
2740                 r = KVM_MAX_MCE_BANKS;
2741                 break;
2742         case KVM_CAP_XCRS:
2743                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2744                 break;
2745         case KVM_CAP_TSC_CONTROL:
2746                 r = kvm_has_tsc_control;
2747                 break;
2748         case KVM_CAP_X2APIC_API:
2749                 r = KVM_X2APIC_API_VALID_FLAGS;
2750                 break;
2751         default:
2752                 r = 0;
2753                 break;
2754         }
2755         return r;
2756
2757 }
2758
2759 long kvm_arch_dev_ioctl(struct file *filp,
2760                         unsigned int ioctl, unsigned long arg)
2761 {
2762         void __user *argp = (void __user *)arg;
2763         long r;
2764
2765         switch (ioctl) {
2766         case KVM_GET_MSR_INDEX_LIST: {
2767                 struct kvm_msr_list __user *user_msr_list = argp;
2768                 struct kvm_msr_list msr_list;
2769                 unsigned n;
2770
2771                 r = -EFAULT;
2772                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2773                         goto out;
2774                 n = msr_list.nmsrs;
2775                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2776                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2777                         goto out;
2778                 r = -E2BIG;
2779                 if (n < msr_list.nmsrs)
2780                         goto out;
2781                 r = -EFAULT;
2782                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2783                                  num_msrs_to_save * sizeof(u32)))
2784                         goto out;
2785                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2786                                  &emulated_msrs,
2787                                  num_emulated_msrs * sizeof(u32)))
2788                         goto out;
2789                 r = 0;
2790                 break;
2791         }
2792         case KVM_GET_SUPPORTED_CPUID:
2793         case KVM_GET_EMULATED_CPUID: {
2794                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2795                 struct kvm_cpuid2 cpuid;
2796
2797                 r = -EFAULT;
2798                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2799                         goto out;
2800
2801                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2802                                             ioctl);
2803                 if (r)
2804                         goto out;
2805
2806                 r = -EFAULT;
2807                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2808                         goto out;
2809                 r = 0;
2810                 break;
2811         }
2812         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2813                 r = -EFAULT;
2814                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2815                                  sizeof(kvm_mce_cap_supported)))
2816                         goto out;
2817                 r = 0;
2818                 break;
2819         }
2820         default:
2821                 r = -EINVAL;
2822         }
2823 out:
2824         return r;
2825 }
2826
2827 static void wbinvd_ipi(void *garbage)
2828 {
2829         wbinvd();
2830 }
2831
2832 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2833 {
2834         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2835 }
2836
2837 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2838 {
2839         /* Address WBINVD may be executed by guest */
2840         if (need_emulate_wbinvd(vcpu)) {
2841                 if (kvm_x86_ops->has_wbinvd_exit())
2842                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2843                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2844                         smp_call_function_single(vcpu->cpu,
2845                                         wbinvd_ipi, NULL, 1);
2846         }
2847
2848         kvm_x86_ops->vcpu_load(vcpu, cpu);
2849
2850         /* Apply any externally detected TSC adjustments (due to suspend) */
2851         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2852                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2853                 vcpu->arch.tsc_offset_adjustment = 0;
2854                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2855         }
2856
2857         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2858                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2859                                 rdtsc() - vcpu->arch.last_host_tsc;
2860                 if (tsc_delta < 0)
2861                         mark_tsc_unstable("KVM discovered backwards TSC");
2862
2863                 if (check_tsc_unstable()) {
2864                         u64 offset = kvm_compute_tsc_offset(vcpu,
2865                                                 vcpu->arch.last_guest_tsc);
2866                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2867                         vcpu->arch.tsc_catchup = 1;
2868                 }
2869
2870                 if (kvm_lapic_hv_timer_in_use(vcpu))
2871                         kvm_lapic_restart_hv_timer(vcpu);
2872
2873                 /*
2874                  * On a host with synchronized TSC, there is no need to update
2875                  * kvmclock on vcpu->cpu migration
2876                  */
2877                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2878                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2879                 if (vcpu->cpu != cpu)
2880                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2881                 vcpu->cpu = cpu;
2882         }
2883
2884         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2885 }
2886
2887 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2888 {
2889         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2890                 return;
2891
2892         vcpu->arch.st.steal.preempted = 1;
2893
2894         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2895                         &vcpu->arch.st.steal.preempted,
2896                         offsetof(struct kvm_steal_time, preempted),
2897                         sizeof(vcpu->arch.st.steal.preempted));
2898 }
2899
2900 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2901 {
2902         int idx;
2903
2904         if (vcpu->preempted)
2905                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
2906
2907         /*
2908          * Disable page faults because we're in atomic context here.
2909          * kvm_write_guest_offset_cached() would call might_fault()
2910          * that relies on pagefault_disable() to tell if there's a
2911          * bug. NOTE: the write to guest memory may not go through if
2912          * during postcopy live migration or if there's heavy guest
2913          * paging.
2914          */
2915         pagefault_disable();
2916         /*
2917          * kvm_memslots() will be called by
2918          * kvm_write_guest_offset_cached() so take the srcu lock.
2919          */
2920         idx = srcu_read_lock(&vcpu->kvm->srcu);
2921         kvm_steal_time_set_preempted(vcpu);
2922         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2923         pagefault_enable();
2924         kvm_x86_ops->vcpu_put(vcpu);
2925         kvm_put_guest_fpu(vcpu);
2926         vcpu->arch.last_host_tsc = rdtsc();
2927 }
2928
2929 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2930                                     struct kvm_lapic_state *s)
2931 {
2932         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2933                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2934
2935         return kvm_apic_get_state(vcpu, s);
2936 }
2937
2938 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2939                                     struct kvm_lapic_state *s)
2940 {
2941         int r;
2942
2943         r = kvm_apic_set_state(vcpu, s);
2944         if (r)
2945                 return r;
2946         update_cr8_intercept(vcpu);
2947
2948         return 0;
2949 }
2950
2951 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2952 {
2953         return (!lapic_in_kernel(vcpu) ||
2954                 kvm_apic_accept_pic_intr(vcpu));
2955 }
2956
2957 /*
2958  * if userspace requested an interrupt window, check that the
2959  * interrupt window is open.
2960  *
2961  * No need to exit to userspace if we already have an interrupt queued.
2962  */
2963 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2964 {
2965         return kvm_arch_interrupt_allowed(vcpu) &&
2966                 !kvm_cpu_has_interrupt(vcpu) &&
2967                 !kvm_event_needs_reinjection(vcpu) &&
2968                 kvm_cpu_accept_dm_intr(vcpu);
2969 }
2970
2971 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2972                                     struct kvm_interrupt *irq)
2973 {
2974         if (irq->irq >= KVM_NR_INTERRUPTS)
2975                 return -EINVAL;
2976
2977         if (!irqchip_in_kernel(vcpu->kvm)) {
2978                 kvm_queue_interrupt(vcpu, irq->irq, false);
2979                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2980                 return 0;
2981         }
2982
2983         /*
2984          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2985          * fail for in-kernel 8259.
2986          */
2987         if (pic_in_kernel(vcpu->kvm))
2988                 return -ENXIO;
2989
2990         if (vcpu->arch.pending_external_vector != -1)
2991                 return -EEXIST;
2992
2993         vcpu->arch.pending_external_vector = irq->irq;
2994         kvm_make_request(KVM_REQ_EVENT, vcpu);
2995         return 0;
2996 }
2997
2998 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2999 {
3000         kvm_inject_nmi(vcpu);
3001
3002         return 0;
3003 }
3004
3005 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3006 {
3007         kvm_make_request(KVM_REQ_SMI, vcpu);
3008
3009         return 0;
3010 }
3011
3012 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3013                                            struct kvm_tpr_access_ctl *tac)
3014 {
3015         if (tac->flags)
3016                 return -EINVAL;
3017         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3018         return 0;
3019 }
3020
3021 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3022                                         u64 mcg_cap)
3023 {
3024         int r;
3025         unsigned bank_num = mcg_cap & 0xff, bank;
3026
3027         r = -EINVAL;
3028         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3029                 goto out;
3030         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3031                 goto out;
3032         r = 0;
3033         vcpu->arch.mcg_cap = mcg_cap;
3034         /* Init IA32_MCG_CTL to all 1s */
3035         if (mcg_cap & MCG_CTL_P)
3036                 vcpu->arch.mcg_ctl = ~(u64)0;
3037         /* Init IA32_MCi_CTL to all 1s */
3038         for (bank = 0; bank < bank_num; bank++)
3039                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3040
3041         if (kvm_x86_ops->setup_mce)
3042                 kvm_x86_ops->setup_mce(vcpu);
3043 out:
3044         return r;
3045 }
3046
3047 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3048                                       struct kvm_x86_mce *mce)
3049 {
3050         u64 mcg_cap = vcpu->arch.mcg_cap;
3051         unsigned bank_num = mcg_cap & 0xff;
3052         u64 *banks = vcpu->arch.mce_banks;
3053
3054         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3055                 return -EINVAL;
3056         /*
3057          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3058          * reporting is disabled
3059          */
3060         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3061             vcpu->arch.mcg_ctl != ~(u64)0)
3062                 return 0;
3063         banks += 4 * mce->bank;
3064         /*
3065          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3066          * reporting is disabled for the bank
3067          */
3068         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3069                 return 0;
3070         if (mce->status & MCI_STATUS_UC) {
3071                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3072                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3073                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3074                         return 0;
3075                 }
3076                 if (banks[1] & MCI_STATUS_VAL)
3077                         mce->status |= MCI_STATUS_OVER;
3078                 banks[2] = mce->addr;
3079                 banks[3] = mce->misc;
3080                 vcpu->arch.mcg_status = mce->mcg_status;
3081                 banks[1] = mce->status;
3082                 kvm_queue_exception(vcpu, MC_VECTOR);
3083         } else if (!(banks[1] & MCI_STATUS_VAL)
3084                    || !(banks[1] & MCI_STATUS_UC)) {
3085                 if (banks[1] & MCI_STATUS_VAL)
3086                         mce->status |= MCI_STATUS_OVER;
3087                 banks[2] = mce->addr;
3088                 banks[3] = mce->misc;
3089                 banks[1] = mce->status;
3090         } else
3091                 banks[1] |= MCI_STATUS_OVER;
3092         return 0;
3093 }
3094
3095 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3096                                                struct kvm_vcpu_events *events)
3097 {
3098         process_nmi(vcpu);
3099         /*
3100          * FIXME: pass injected and pending separately.  This is only
3101          * needed for nested virtualization, whose state cannot be
3102          * migrated yet.  For now we can combine them.
3103          */
3104         events->exception.injected =
3105                 (vcpu->arch.exception.pending ||
3106                  vcpu->arch.exception.injected) &&
3107                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3108         events->exception.nr = vcpu->arch.exception.nr;
3109         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3110         events->exception.pad = 0;
3111         events->exception.error_code = vcpu->arch.exception.error_code;
3112
3113         events->interrupt.injected =
3114                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3115         events->interrupt.nr = vcpu->arch.interrupt.nr;
3116         events->interrupt.soft = 0;
3117         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3118
3119         events->nmi.injected = vcpu->arch.nmi_injected;
3120         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3121         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3122         events->nmi.pad = 0;
3123
3124         events->sipi_vector = 0; /* never valid when reporting to user space */
3125
3126         events->smi.smm = is_smm(vcpu);
3127         events->smi.pending = vcpu->arch.smi_pending;
3128         events->smi.smm_inside_nmi =
3129                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3130         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3131
3132         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3133                          | KVM_VCPUEVENT_VALID_SHADOW
3134                          | KVM_VCPUEVENT_VALID_SMM);
3135         memset(&events->reserved, 0, sizeof(events->reserved));
3136 }
3137
3138 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3139
3140 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3141                                               struct kvm_vcpu_events *events)
3142 {
3143         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3144                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3145                               | KVM_VCPUEVENT_VALID_SHADOW
3146                               | KVM_VCPUEVENT_VALID_SMM))
3147                 return -EINVAL;
3148
3149         if (events->exception.injected &&
3150             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3151              is_guest_mode(vcpu)))
3152                 return -EINVAL;
3153
3154         /* INITs are latched while in SMM */
3155         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3156             (events->smi.smm || events->smi.pending) &&
3157             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3158                 return -EINVAL;
3159
3160         process_nmi(vcpu);
3161         vcpu->arch.exception.injected = false;
3162         vcpu->arch.exception.pending = events->exception.injected;
3163         vcpu->arch.exception.nr = events->exception.nr;
3164         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3165         vcpu->arch.exception.error_code = events->exception.error_code;
3166
3167         vcpu->arch.interrupt.pending = events->interrupt.injected;
3168         vcpu->arch.interrupt.nr = events->interrupt.nr;
3169         vcpu->arch.interrupt.soft = events->interrupt.soft;
3170         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3171                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3172                                                   events->interrupt.shadow);
3173
3174         vcpu->arch.nmi_injected = events->nmi.injected;
3175         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3176                 vcpu->arch.nmi_pending = events->nmi.pending;
3177         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3178
3179         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3180             lapic_in_kernel(vcpu))
3181                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3182
3183         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3184                 u32 hflags = vcpu->arch.hflags;
3185                 if (events->smi.smm)
3186                         hflags |= HF_SMM_MASK;
3187                 else
3188                         hflags &= ~HF_SMM_MASK;
3189                 kvm_set_hflags(vcpu, hflags);
3190
3191                 vcpu->arch.smi_pending = events->smi.pending;
3192
3193                 if (events->smi.smm) {
3194                         if (events->smi.smm_inside_nmi)
3195                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3196                         else
3197                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3198                         if (lapic_in_kernel(vcpu)) {
3199                                 if (events->smi.latched_init)
3200                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3201                                 else
3202                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3203                         }
3204                 }
3205         }
3206
3207         kvm_make_request(KVM_REQ_EVENT, vcpu);
3208
3209         return 0;
3210 }
3211
3212 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3213                                              struct kvm_debugregs *dbgregs)
3214 {
3215         unsigned long val;
3216
3217         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3218         kvm_get_dr(vcpu, 6, &val);
3219         dbgregs->dr6 = val;
3220         dbgregs->dr7 = vcpu->arch.dr7;
3221         dbgregs->flags = 0;
3222         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3223 }
3224
3225 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3226                                             struct kvm_debugregs *dbgregs)
3227 {
3228         if (dbgregs->flags)
3229                 return -EINVAL;
3230
3231         if (dbgregs->dr6 & ~0xffffffffull)
3232                 return -EINVAL;
3233         if (dbgregs->dr7 & ~0xffffffffull)
3234                 return -EINVAL;
3235
3236         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3237         kvm_update_dr0123(vcpu);
3238         vcpu->arch.dr6 = dbgregs->dr6;
3239         kvm_update_dr6(vcpu);
3240         vcpu->arch.dr7 = dbgregs->dr7;
3241         kvm_update_dr7(vcpu);
3242
3243         return 0;
3244 }
3245
3246 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3247
3248 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3249 {
3250         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3251         u64 xstate_bv = xsave->header.xfeatures;
3252         u64 valid;
3253
3254         /*
3255          * Copy legacy XSAVE area, to avoid complications with CPUID
3256          * leaves 0 and 1 in the loop below.
3257          */
3258         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3259
3260         /* Set XSTATE_BV */
3261         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3262         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3263
3264         /*
3265          * Copy each region from the possibly compacted offset to the
3266          * non-compacted offset.
3267          */
3268         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3269         while (valid) {
3270                 u64 feature = valid & -valid;
3271                 int index = fls64(feature) - 1;
3272                 void *src = get_xsave_addr(xsave, feature);
3273
3274                 if (src) {
3275                         u32 size, offset, ecx, edx;
3276                         cpuid_count(XSTATE_CPUID, index,
3277                                     &size, &offset, &ecx, &edx);
3278                         if (feature == XFEATURE_MASK_PKRU)
3279                                 memcpy(dest + offset, &vcpu->arch.pkru,
3280                                        sizeof(vcpu->arch.pkru));
3281                         else
3282                                 memcpy(dest + offset, src, size);
3283
3284                 }
3285
3286                 valid -= feature;
3287         }
3288 }
3289
3290 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3291 {
3292         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3293         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3294         u64 valid;
3295
3296         /*
3297          * Copy legacy XSAVE area, to avoid complications with CPUID
3298          * leaves 0 and 1 in the loop below.
3299          */
3300         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3301
3302         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3303         xsave->header.xfeatures = xstate_bv;
3304         if (boot_cpu_has(X86_FEATURE_XSAVES))
3305                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3306
3307         /*
3308          * Copy each region from the non-compacted offset to the
3309          * possibly compacted offset.
3310          */
3311         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3312         while (valid) {
3313                 u64 feature = valid & -valid;
3314                 int index = fls64(feature) - 1;
3315                 void *dest = get_xsave_addr(xsave, feature);
3316
3317                 if (dest) {
3318                         u32 size, offset, ecx, edx;
3319                         cpuid_count(XSTATE_CPUID, index,
3320                                     &size, &offset, &ecx, &edx);
3321                         if (feature == XFEATURE_MASK_PKRU)
3322                                 memcpy(&vcpu->arch.pkru, src + offset,
3323                                        sizeof(vcpu->arch.pkru));
3324                         else
3325                                 memcpy(dest, src + offset, size);
3326                 }
3327
3328                 valid -= feature;
3329         }
3330 }
3331
3332 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3333                                          struct kvm_xsave *guest_xsave)
3334 {
3335         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3336                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3337                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3338         } else {
3339                 memcpy(guest_xsave->region,
3340                         &vcpu->arch.guest_fpu.state.fxsave,
3341                         sizeof(struct fxregs_state));
3342                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3343                         XFEATURE_MASK_FPSSE;
3344         }
3345 }
3346
3347 #define XSAVE_MXCSR_OFFSET 24
3348
3349 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3350                                         struct kvm_xsave *guest_xsave)
3351 {
3352         u64 xstate_bv =
3353                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3354         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3355
3356         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3357                 /*
3358                  * Here we allow setting states that are not present in
3359                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3360                  * with old userspace.
3361                  */
3362                 if (xstate_bv & ~kvm_supported_xcr0() ||
3363                         mxcsr & ~mxcsr_feature_mask)
3364                         return -EINVAL;
3365                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3366         } else {
3367                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3368                         mxcsr & ~mxcsr_feature_mask)
3369                         return -EINVAL;
3370                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3371                         guest_xsave->region, sizeof(struct fxregs_state));
3372         }
3373         return 0;
3374 }
3375
3376 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3377                                         struct kvm_xcrs *guest_xcrs)
3378 {
3379         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3380                 guest_xcrs->nr_xcrs = 0;
3381                 return;
3382         }
3383
3384         guest_xcrs->nr_xcrs = 1;
3385         guest_xcrs->flags = 0;
3386         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3387         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3388 }
3389
3390 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3391                                        struct kvm_xcrs *guest_xcrs)
3392 {
3393         int i, r = 0;
3394
3395         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3396                 return -EINVAL;
3397
3398         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3399                 return -EINVAL;
3400
3401         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3402                 /* Only support XCR0 currently */
3403                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3404                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3405                                 guest_xcrs->xcrs[i].value);
3406                         break;
3407                 }
3408         if (r)
3409                 r = -EINVAL;
3410         return r;
3411 }
3412
3413 /*
3414  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3415  * stopped by the hypervisor.  This function will be called from the host only.
3416  * EINVAL is returned when the host attempts to set the flag for a guest that
3417  * does not support pv clocks.
3418  */
3419 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3420 {
3421         if (!vcpu->arch.pv_time_enabled)
3422                 return -EINVAL;
3423         vcpu->arch.pvclock_set_guest_stopped_request = true;
3424         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3425         return 0;
3426 }
3427
3428 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3429                                      struct kvm_enable_cap *cap)
3430 {
3431         if (cap->flags)
3432                 return -EINVAL;
3433
3434         switch (cap->cap) {
3435         case KVM_CAP_HYPERV_SYNIC2:
3436                 if (cap->args[0])
3437                         return -EINVAL;
3438         case KVM_CAP_HYPERV_SYNIC:
3439                 if (!irqchip_in_kernel(vcpu->kvm))
3440                         return -EINVAL;
3441                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3442                                              KVM_CAP_HYPERV_SYNIC2);
3443         default:
3444                 return -EINVAL;
3445         }
3446 }
3447
3448 long kvm_arch_vcpu_ioctl(struct file *filp,
3449                          unsigned int ioctl, unsigned long arg)
3450 {
3451         struct kvm_vcpu *vcpu = filp->private_data;
3452         void __user *argp = (void __user *)arg;
3453         int r;
3454         union {
3455                 struct kvm_lapic_state *lapic;
3456                 struct kvm_xsave *xsave;
3457                 struct kvm_xcrs *xcrs;
3458                 void *buffer;
3459         } u;
3460
3461         u.buffer = NULL;
3462         switch (ioctl) {
3463         case KVM_GET_LAPIC: {
3464                 r = -EINVAL;
3465                 if (!lapic_in_kernel(vcpu))
3466                         goto out;
3467                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3468
3469                 r = -ENOMEM;
3470                 if (!u.lapic)
3471                         goto out;
3472                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3473                 if (r)
3474                         goto out;
3475                 r = -EFAULT;
3476                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3477                         goto out;
3478                 r = 0;
3479                 break;
3480         }
3481         case KVM_SET_LAPIC: {
3482                 r = -EINVAL;
3483                 if (!lapic_in_kernel(vcpu))
3484                         goto out;
3485                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3486                 if (IS_ERR(u.lapic))
3487                         return PTR_ERR(u.lapic);
3488
3489                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3490                 break;
3491         }
3492         case KVM_INTERRUPT: {
3493                 struct kvm_interrupt irq;
3494
3495                 r = -EFAULT;
3496                 if (copy_from_user(&irq, argp, sizeof irq))
3497                         goto out;
3498                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3499                 break;
3500         }
3501         case KVM_NMI: {
3502                 r = kvm_vcpu_ioctl_nmi(vcpu);
3503                 break;
3504         }
3505         case KVM_SMI: {
3506                 r = kvm_vcpu_ioctl_smi(vcpu);
3507                 break;
3508         }
3509         case KVM_SET_CPUID: {
3510                 struct kvm_cpuid __user *cpuid_arg = argp;
3511                 struct kvm_cpuid cpuid;
3512
3513                 r = -EFAULT;
3514                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3515                         goto out;
3516                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3517                 break;
3518         }
3519         case KVM_SET_CPUID2: {
3520                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3521                 struct kvm_cpuid2 cpuid;
3522
3523                 r = -EFAULT;
3524                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3525                         goto out;
3526                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3527                                               cpuid_arg->entries);
3528                 break;
3529         }
3530         case KVM_GET_CPUID2: {
3531                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3532                 struct kvm_cpuid2 cpuid;
3533
3534                 r = -EFAULT;
3535                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3536                         goto out;
3537                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3538                                               cpuid_arg->entries);
3539                 if (r)
3540                         goto out;
3541                 r = -EFAULT;
3542                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3543                         goto out;
3544                 r = 0;
3545                 break;
3546         }
3547         case KVM_GET_MSRS:
3548                 r = msr_io(vcpu, argp, do_get_msr, 1);
3549                 break;
3550         case KVM_SET_MSRS:
3551                 r = msr_io(vcpu, argp, do_set_msr, 0);
3552                 break;
3553         case KVM_TPR_ACCESS_REPORTING: {
3554                 struct kvm_tpr_access_ctl tac;
3555
3556                 r = -EFAULT;
3557                 if (copy_from_user(&tac, argp, sizeof tac))
3558                         goto out;
3559                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3560                 if (r)
3561                         goto out;
3562                 r = -EFAULT;
3563                 if (copy_to_user(argp, &tac, sizeof tac))
3564                         goto out;
3565                 r = 0;
3566                 break;
3567         };
3568         case KVM_SET_VAPIC_ADDR: {
3569                 struct kvm_vapic_addr va;
3570                 int idx;
3571
3572                 r = -EINVAL;
3573                 if (!lapic_in_kernel(vcpu))
3574                         goto out;
3575                 r = -EFAULT;
3576                 if (copy_from_user(&va, argp, sizeof va))
3577                         goto out;
3578                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3579                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3580                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3581                 break;
3582         }
3583         case KVM_X86_SETUP_MCE: {
3584                 u64 mcg_cap;
3585
3586                 r = -EFAULT;
3587                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3588                         goto out;
3589                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3590                 break;
3591         }
3592         case KVM_X86_SET_MCE: {
3593                 struct kvm_x86_mce mce;
3594
3595                 r = -EFAULT;
3596                 if (copy_from_user(&mce, argp, sizeof mce))
3597                         goto out;
3598                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3599                 break;
3600         }
3601         case KVM_GET_VCPU_EVENTS: {
3602                 struct kvm_vcpu_events events;
3603
3604                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3605
3606                 r = -EFAULT;
3607                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3608                         break;
3609                 r = 0;
3610                 break;
3611         }
3612         case KVM_SET_VCPU_EVENTS: {
3613                 struct kvm_vcpu_events events;
3614
3615                 r = -EFAULT;
3616                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3617                         break;
3618
3619                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3620                 break;
3621         }
3622         case KVM_GET_DEBUGREGS: {
3623                 struct kvm_debugregs dbgregs;
3624
3625                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3626
3627                 r = -EFAULT;
3628                 if (copy_to_user(argp, &dbgregs,
3629                                  sizeof(struct kvm_debugregs)))
3630                         break;
3631                 r = 0;
3632                 break;
3633         }
3634         case KVM_SET_DEBUGREGS: {
3635                 struct kvm_debugregs dbgregs;
3636
3637                 r = -EFAULT;
3638                 if (copy_from_user(&dbgregs, argp,
3639                                    sizeof(struct kvm_debugregs)))
3640                         break;
3641
3642                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3643                 break;
3644         }
3645         case KVM_GET_XSAVE: {
3646                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3647                 r = -ENOMEM;
3648                 if (!u.xsave)
3649                         break;
3650
3651                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3652
3653                 r = -EFAULT;
3654                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3655                         break;
3656                 r = 0;
3657                 break;
3658         }
3659         case KVM_SET_XSAVE: {
3660                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3661                 if (IS_ERR(u.xsave))
3662                         return PTR_ERR(u.xsave);
3663
3664                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3665                 break;
3666         }
3667         case KVM_GET_XCRS: {
3668                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3669                 r = -ENOMEM;
3670                 if (!u.xcrs)
3671                         break;
3672
3673                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3674
3675                 r = -EFAULT;
3676                 if (copy_to_user(argp, u.xcrs,
3677                                  sizeof(struct kvm_xcrs)))
3678                         break;
3679                 r = 0;
3680                 break;
3681         }
3682         case KVM_SET_XCRS: {
3683                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3684                 if (IS_ERR(u.xcrs))
3685                         return PTR_ERR(u.xcrs);
3686
3687                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3688                 break;
3689         }
3690         case KVM_SET_TSC_KHZ: {
3691                 u32 user_tsc_khz;
3692
3693                 r = -EINVAL;
3694                 user_tsc_khz = (u32)arg;
3695
3696                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3697                         goto out;
3698
3699                 if (user_tsc_khz == 0)
3700                         user_tsc_khz = tsc_khz;
3701
3702                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3703                         r = 0;
3704
3705                 goto out;
3706         }
3707         case KVM_GET_TSC_KHZ: {
3708                 r = vcpu->arch.virtual_tsc_khz;
3709                 goto out;
3710         }
3711         case KVM_KVMCLOCK_CTRL: {
3712                 r = kvm_set_guest_paused(vcpu);
3713                 goto out;
3714         }
3715         case KVM_ENABLE_CAP: {
3716                 struct kvm_enable_cap cap;
3717
3718                 r = -EFAULT;
3719                 if (copy_from_user(&cap, argp, sizeof(cap)))
3720                         goto out;
3721                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3722                 break;
3723         }
3724         default:
3725                 r = -EINVAL;
3726         }
3727 out:
3728         kfree(u.buffer);
3729         return r;
3730 }
3731
3732 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3733 {
3734         return VM_FAULT_SIGBUS;
3735 }
3736
3737 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3738 {
3739         int ret;
3740
3741         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3742                 return -EINVAL;
3743         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3744         return ret;
3745 }
3746
3747 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3748                                               u64 ident_addr)
3749 {
3750         kvm->arch.ept_identity_map_addr = ident_addr;
3751         return 0;
3752 }
3753
3754 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3755                                           u32 kvm_nr_mmu_pages)
3756 {
3757         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3758                 return -EINVAL;
3759
3760         mutex_lock(&kvm->slots_lock);
3761
3762         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3763         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3764
3765         mutex_unlock(&kvm->slots_lock);
3766         return 0;
3767 }
3768
3769 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3770 {
3771         return kvm->arch.n_max_mmu_pages;
3772 }
3773
3774 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3775 {
3776         struct kvm_pic *pic = kvm->arch.vpic;
3777         int r;
3778
3779         r = 0;
3780         switch (chip->chip_id) {
3781         case KVM_IRQCHIP_PIC_MASTER:
3782                 memcpy(&chip->chip.pic, &pic->pics[0],
3783                         sizeof(struct kvm_pic_state));
3784                 break;
3785         case KVM_IRQCHIP_PIC_SLAVE:
3786                 memcpy(&chip->chip.pic, &pic->pics[1],
3787                         sizeof(struct kvm_pic_state));
3788                 break;
3789         case KVM_IRQCHIP_IOAPIC:
3790                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3791                 break;
3792         default:
3793                 r = -EINVAL;
3794                 break;
3795         }
3796         return r;
3797 }
3798
3799 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3800 {
3801         struct kvm_pic *pic = kvm->arch.vpic;
3802         int r;
3803
3804         r = 0;
3805         switch (chip->chip_id) {
3806         case KVM_IRQCHIP_PIC_MASTER:
3807                 spin_lock(&pic->lock);
3808                 memcpy(&pic->pics[0], &chip->chip.pic,
3809                         sizeof(struct kvm_pic_state));
3810                 spin_unlock(&pic->lock);
3811                 break;
3812         case KVM_IRQCHIP_PIC_SLAVE:
3813                 spin_lock(&pic->lock);
3814                 memcpy(&pic->pics[1], &chip->chip.pic,
3815                         sizeof(struct kvm_pic_state));
3816                 spin_unlock(&pic->lock);
3817                 break;
3818         case KVM_IRQCHIP_IOAPIC:
3819                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3820                 break;
3821         default:
3822                 r = -EINVAL;
3823                 break;
3824         }
3825         kvm_pic_update_irq(pic);
3826         return r;
3827 }
3828
3829 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3830 {
3831         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3832
3833         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3834
3835         mutex_lock(&kps->lock);
3836         memcpy(ps, &kps->channels, sizeof(*ps));
3837         mutex_unlock(&kps->lock);
3838         return 0;
3839 }
3840
3841 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3842 {
3843         int i;
3844         struct kvm_pit *pit = kvm->arch.vpit;
3845
3846         mutex_lock(&pit->pit_state.lock);
3847         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3848         for (i = 0; i < 3; i++)
3849                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3850         mutex_unlock(&pit->pit_state.lock);
3851         return 0;
3852 }
3853
3854 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3855 {
3856         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3857         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3858                 sizeof(ps->channels));
3859         ps->flags = kvm->arch.vpit->pit_state.flags;
3860         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3861         memset(&ps->reserved, 0, sizeof(ps->reserved));
3862         return 0;
3863 }
3864
3865 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3866 {
3867         int start = 0;
3868         int i;
3869         u32 prev_legacy, cur_legacy;
3870         struct kvm_pit *pit = kvm->arch.vpit;
3871
3872         mutex_lock(&pit->pit_state.lock);
3873         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3874         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3875         if (!prev_legacy && cur_legacy)
3876                 start = 1;
3877         memcpy(&pit->pit_state.channels, &ps->channels,
3878                sizeof(pit->pit_state.channels));
3879         pit->pit_state.flags = ps->flags;
3880         for (i = 0; i < 3; i++)
3881                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3882                                    start && i == 0);
3883         mutex_unlock(&pit->pit_state.lock);
3884         return 0;
3885 }
3886
3887 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3888                                  struct kvm_reinject_control *control)
3889 {
3890         struct kvm_pit *pit = kvm->arch.vpit;
3891
3892         if (!pit)
3893                 return -ENXIO;
3894
3895         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3896          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3897          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3898          */
3899         mutex_lock(&pit->pit_state.lock);
3900         kvm_pit_set_reinject(pit, control->pit_reinject);
3901         mutex_unlock(&pit->pit_state.lock);
3902
3903         return 0;
3904 }
3905
3906 /**
3907  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3908  * @kvm: kvm instance
3909  * @log: slot id and address to which we copy the log
3910  *
3911  * Steps 1-4 below provide general overview of dirty page logging. See
3912  * kvm_get_dirty_log_protect() function description for additional details.
3913  *
3914  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3915  * always flush the TLB (step 4) even if previous step failed  and the dirty
3916  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3917  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3918  * writes will be marked dirty for next log read.
3919  *
3920  *   1. Take a snapshot of the bit and clear it if needed.
3921  *   2. Write protect the corresponding page.
3922  *   3. Copy the snapshot to the userspace.
3923  *   4. Flush TLB's if needed.
3924  */
3925 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3926 {
3927         bool is_dirty = false;
3928         int r;
3929
3930         mutex_lock(&kvm->slots_lock);
3931
3932         /*
3933          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3934          */
3935         if (kvm_x86_ops->flush_log_dirty)
3936                 kvm_x86_ops->flush_log_dirty(kvm);
3937
3938         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3939
3940         /*
3941          * All the TLBs can be flushed out of mmu lock, see the comments in
3942          * kvm_mmu_slot_remove_write_access().
3943          */
3944         lockdep_assert_held(&kvm->slots_lock);
3945         if (is_dirty)
3946                 kvm_flush_remote_tlbs(kvm);
3947
3948         mutex_unlock(&kvm->slots_lock);
3949         return r;
3950 }
3951
3952 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3953                         bool line_status)
3954 {
3955         if (!irqchip_in_kernel(kvm))
3956                 return -ENXIO;
3957
3958         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3959                                         irq_event->irq, irq_event->level,
3960                                         line_status);
3961         return 0;
3962 }
3963
3964 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3965                                    struct kvm_enable_cap *cap)
3966 {
3967         int r;
3968
3969         if (cap->flags)
3970                 return -EINVAL;
3971
3972         switch (cap->cap) {
3973         case KVM_CAP_DISABLE_QUIRKS:
3974                 kvm->arch.disabled_quirks = cap->args[0];
3975                 r = 0;
3976                 break;
3977         case KVM_CAP_SPLIT_IRQCHIP: {
3978                 mutex_lock(&kvm->lock);
3979                 r = -EINVAL;
3980                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3981                         goto split_irqchip_unlock;
3982                 r = -EEXIST;
3983                 if (irqchip_in_kernel(kvm))
3984                         goto split_irqchip_unlock;
3985                 if (kvm->created_vcpus)
3986                         goto split_irqchip_unlock;
3987                 r = kvm_setup_empty_irq_routing(kvm);
3988                 if (r)
3989                         goto split_irqchip_unlock;
3990                 /* Pairs with irqchip_in_kernel. */
3991                 smp_wmb();
3992                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3993                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3994                 r = 0;
3995 split_irqchip_unlock:
3996                 mutex_unlock(&kvm->lock);
3997                 break;
3998         }
3999         case KVM_CAP_X2APIC_API:
4000                 r = -EINVAL;
4001                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4002                         break;
4003
4004                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4005                         kvm->arch.x2apic_format = true;
4006                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4007                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4008
4009                 r = 0;
4010                 break;
4011         default:
4012                 r = -EINVAL;
4013                 break;
4014         }
4015         return r;
4016 }
4017
4018 long kvm_arch_vm_ioctl(struct file *filp,
4019                        unsigned int ioctl, unsigned long arg)
4020 {
4021         struct kvm *kvm = filp->private_data;
4022         void __user *argp = (void __user *)arg;
4023         int r = -ENOTTY;
4024         /*
4025          * This union makes it completely explicit to gcc-3.x
4026          * that these two variables' stack usage should be
4027          * combined, not added together.
4028          */
4029         union {
4030                 struct kvm_pit_state ps;
4031                 struct kvm_pit_state2 ps2;
4032                 struct kvm_pit_config pit_config;
4033         } u;
4034
4035         switch (ioctl) {
4036         case KVM_SET_TSS_ADDR:
4037                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4038                 break;
4039         case KVM_SET_IDENTITY_MAP_ADDR: {
4040                 u64 ident_addr;
4041
4042                 mutex_lock(&kvm->lock);
4043                 r = -EINVAL;
4044                 if (kvm->created_vcpus)
4045                         goto set_identity_unlock;
4046                 r = -EFAULT;
4047                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4048                         goto set_identity_unlock;
4049                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4050 set_identity_unlock:
4051                 mutex_unlock(&kvm->lock);
4052                 break;
4053         }
4054         case KVM_SET_NR_MMU_PAGES:
4055                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4056                 break;
4057         case KVM_GET_NR_MMU_PAGES:
4058                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4059                 break;
4060         case KVM_CREATE_IRQCHIP: {
4061                 mutex_lock(&kvm->lock);
4062
4063                 r = -EEXIST;
4064                 if (irqchip_in_kernel(kvm))
4065                         goto create_irqchip_unlock;
4066
4067                 r = -EINVAL;
4068                 if (kvm->created_vcpus)
4069                         goto create_irqchip_unlock;
4070
4071                 r = kvm_pic_init(kvm);
4072                 if (r)
4073                         goto create_irqchip_unlock;
4074
4075                 r = kvm_ioapic_init(kvm);
4076                 if (r) {
4077                         kvm_pic_destroy(kvm);
4078                         goto create_irqchip_unlock;
4079                 }
4080
4081                 r = kvm_setup_default_irq_routing(kvm);
4082                 if (r) {
4083                         kvm_ioapic_destroy(kvm);
4084                         kvm_pic_destroy(kvm);
4085                         goto create_irqchip_unlock;
4086                 }
4087                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4088                 smp_wmb();
4089                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4090         create_irqchip_unlock:
4091                 mutex_unlock(&kvm->lock);
4092                 break;
4093         }
4094         case KVM_CREATE_PIT:
4095                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4096                 goto create_pit;
4097         case KVM_CREATE_PIT2:
4098                 r = -EFAULT;
4099                 if (copy_from_user(&u.pit_config, argp,
4100                                    sizeof(struct kvm_pit_config)))
4101                         goto out;
4102         create_pit:
4103                 mutex_lock(&kvm->lock);
4104                 r = -EEXIST;
4105                 if (kvm->arch.vpit)
4106                         goto create_pit_unlock;
4107                 r = -ENOMEM;
4108                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4109                 if (kvm->arch.vpit)
4110                         r = 0;
4111         create_pit_unlock:
4112                 mutex_unlock(&kvm->lock);
4113                 break;
4114         case KVM_GET_IRQCHIP: {
4115                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4116                 struct kvm_irqchip *chip;
4117
4118                 chip = memdup_user(argp, sizeof(*chip));
4119                 if (IS_ERR(chip)) {
4120                         r = PTR_ERR(chip);
4121                         goto out;
4122                 }
4123
4124                 r = -ENXIO;
4125                 if (!irqchip_kernel(kvm))
4126                         goto get_irqchip_out;
4127                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4128                 if (r)
4129                         goto get_irqchip_out;
4130                 r = -EFAULT;
4131                 if (copy_to_user(argp, chip, sizeof *chip))
4132                         goto get_irqchip_out;
4133                 r = 0;
4134         get_irqchip_out:
4135                 kfree(chip);
4136                 break;
4137         }
4138         case KVM_SET_IRQCHIP: {
4139                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4140                 struct kvm_irqchip *chip;
4141
4142                 chip = memdup_user(argp, sizeof(*chip));
4143                 if (IS_ERR(chip)) {
4144                         r = PTR_ERR(chip);
4145                         goto out;
4146                 }
4147
4148                 r = -ENXIO;
4149                 if (!irqchip_kernel(kvm))
4150                         goto set_irqchip_out;
4151                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4152                 if (r)
4153                         goto set_irqchip_out;
4154                 r = 0;
4155         set_irqchip_out:
4156                 kfree(chip);
4157                 break;
4158         }
4159         case KVM_GET_PIT: {
4160                 r = -EFAULT;
4161                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4162                         goto out;
4163                 r = -ENXIO;
4164                 if (!kvm->arch.vpit)
4165                         goto out;
4166                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4167                 if (r)
4168                         goto out;
4169                 r = -EFAULT;
4170                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4171                         goto out;
4172                 r = 0;
4173                 break;
4174         }
4175         case KVM_SET_PIT: {
4176                 r = -EFAULT;
4177                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4178                         goto out;
4179                 r = -ENXIO;
4180                 if (!kvm->arch.vpit)
4181                         goto out;
4182                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4183                 break;
4184         }
4185         case KVM_GET_PIT2: {
4186                 r = -ENXIO;
4187                 if (!kvm->arch.vpit)
4188                         goto out;
4189                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4190                 if (r)
4191                         goto out;
4192                 r = -EFAULT;
4193                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4194                         goto out;
4195                 r = 0;
4196                 break;
4197         }
4198         case KVM_SET_PIT2: {
4199                 r = -EFAULT;
4200                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4201                         goto out;
4202                 r = -ENXIO;
4203                 if (!kvm->arch.vpit)
4204                         goto out;
4205                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4206                 break;
4207         }
4208         case KVM_REINJECT_CONTROL: {
4209                 struct kvm_reinject_control control;
4210                 r =  -EFAULT;
4211                 if (copy_from_user(&control, argp, sizeof(control)))
4212                         goto out;
4213                 r = kvm_vm_ioctl_reinject(kvm, &control);
4214                 break;
4215         }
4216         case KVM_SET_BOOT_CPU_ID:
4217                 r = 0;
4218                 mutex_lock(&kvm->lock);
4219                 if (kvm->created_vcpus)
4220                         r = -EBUSY;
4221                 else
4222                         kvm->arch.bsp_vcpu_id = arg;
4223                 mutex_unlock(&kvm->lock);
4224                 break;
4225         case KVM_XEN_HVM_CONFIG: {
4226                 r = -EFAULT;
4227                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4228                                    sizeof(struct kvm_xen_hvm_config)))
4229                         goto out;
4230                 r = -EINVAL;
4231                 if (kvm->arch.xen_hvm_config.flags)
4232                         goto out;
4233                 r = 0;
4234                 break;
4235         }
4236         case KVM_SET_CLOCK: {
4237                 struct kvm_clock_data user_ns;
4238                 u64 now_ns;
4239
4240                 r = -EFAULT;
4241                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4242                         goto out;
4243
4244                 r = -EINVAL;
4245                 if (user_ns.flags)
4246                         goto out;
4247
4248                 r = 0;
4249                 /*
4250                  * TODO: userspace has to take care of races with VCPU_RUN, so
4251                  * kvm_gen_update_masterclock() can be cut down to locked
4252                  * pvclock_update_vm_gtod_copy().
4253                  */
4254                 kvm_gen_update_masterclock(kvm);
4255                 now_ns = get_kvmclock_ns(kvm);
4256                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4257                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4258                 break;
4259         }
4260         case KVM_GET_CLOCK: {
4261                 struct kvm_clock_data user_ns;
4262                 u64 now_ns;
4263
4264                 now_ns = get_kvmclock_ns(kvm);
4265                 user_ns.clock = now_ns;
4266                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4267                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4268
4269                 r = -EFAULT;
4270                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4271                         goto out;
4272                 r = 0;
4273                 break;
4274         }
4275         case KVM_ENABLE_CAP: {
4276                 struct kvm_enable_cap cap;
4277
4278                 r = -EFAULT;
4279                 if (copy_from_user(&cap, argp, sizeof(cap)))
4280                         goto out;
4281                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4282                 break;
4283         }
4284         default:
4285                 r = -ENOTTY;
4286         }
4287 out:
4288         return r;
4289 }
4290
4291 static void kvm_init_msr_list(void)
4292 {
4293         u32 dummy[2];
4294         unsigned i, j;
4295
4296         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4297                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4298                         continue;
4299
4300                 /*
4301                  * Even MSRs that are valid in the host may not be exposed
4302                  * to the guests in some cases.
4303                  */
4304                 switch (msrs_to_save[i]) {
4305                 case MSR_IA32_BNDCFGS:
4306                         if (!kvm_x86_ops->mpx_supported())
4307                                 continue;
4308                         break;
4309                 case MSR_TSC_AUX:
4310                         if (!kvm_x86_ops->rdtscp_supported())
4311                                 continue;
4312                         break;
4313                 default:
4314                         break;
4315                 }
4316
4317                 if (j < i)
4318                         msrs_to_save[j] = msrs_to_save[i];
4319                 j++;
4320         }
4321         num_msrs_to_save = j;
4322
4323         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4324                 switch (emulated_msrs[i]) {
4325                 case MSR_IA32_SMBASE:
4326                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4327                                 continue;
4328                         break;
4329                 default:
4330                         break;
4331                 }
4332
4333                 if (j < i)
4334                         emulated_msrs[j] = emulated_msrs[i];
4335                 j++;
4336         }
4337         num_emulated_msrs = j;
4338 }
4339
4340 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4341                            const void *v)
4342 {
4343         int handled = 0;
4344         int n;
4345
4346         do {
4347                 n = min(len, 8);
4348                 if (!(lapic_in_kernel(vcpu) &&
4349                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4350                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4351                         break;
4352                 handled += n;
4353                 addr += n;
4354                 len -= n;
4355                 v += n;
4356         } while (len);
4357
4358         return handled;
4359 }
4360
4361 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4362 {
4363         int handled = 0;
4364         int n;
4365
4366         do {
4367                 n = min(len, 8);
4368                 if (!(lapic_in_kernel(vcpu) &&
4369                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4370                                          addr, n, v))
4371                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4372                         break;
4373                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4374                 handled += n;
4375                 addr += n;
4376                 len -= n;
4377                 v += n;
4378         } while (len);
4379
4380         return handled;
4381 }
4382
4383 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4384                         struct kvm_segment *var, int seg)
4385 {
4386         kvm_x86_ops->set_segment(vcpu, var, seg);
4387 }
4388
4389 void kvm_get_segment(struct kvm_vcpu *vcpu,
4390                      struct kvm_segment *var, int seg)
4391 {
4392         kvm_x86_ops->get_segment(vcpu, var, seg);
4393 }
4394
4395 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4396                            struct x86_exception *exception)
4397 {
4398         gpa_t t_gpa;
4399
4400         BUG_ON(!mmu_is_nested(vcpu));
4401
4402         /* NPT walks are always user-walks */
4403         access |= PFERR_USER_MASK;
4404         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4405
4406         return t_gpa;
4407 }
4408
4409 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4410                               struct x86_exception *exception)
4411 {
4412         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4413         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4414 }
4415
4416  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4417                                 struct x86_exception *exception)
4418 {
4419         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4420         access |= PFERR_FETCH_MASK;
4421         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4422 }
4423
4424 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4425                                struct x86_exception *exception)
4426 {
4427         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4428         access |= PFERR_WRITE_MASK;
4429         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4430 }
4431
4432 /* uses this to access any guest's mapped memory without checking CPL */
4433 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4434                                 struct x86_exception *exception)
4435 {
4436         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4437 }
4438
4439 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4440                                       struct kvm_vcpu *vcpu, u32 access,
4441                                       struct x86_exception *exception)
4442 {
4443         void *data = val;
4444         int r = X86EMUL_CONTINUE;
4445
4446         while (bytes) {
4447                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4448                                                             exception);
4449                 unsigned offset = addr & (PAGE_SIZE-1);
4450                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4451                 int ret;
4452
4453                 if (gpa == UNMAPPED_GVA)
4454                         return X86EMUL_PROPAGATE_FAULT;
4455                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4456                                                offset, toread);
4457                 if (ret < 0) {
4458                         r = X86EMUL_IO_NEEDED;
4459                         goto out;
4460                 }
4461
4462                 bytes -= toread;
4463                 data += toread;
4464                 addr += toread;
4465         }
4466 out:
4467         return r;
4468 }
4469
4470 /* used for instruction fetching */
4471 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4472                                 gva_t addr, void *val, unsigned int bytes,
4473                                 struct x86_exception *exception)
4474 {
4475         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4476         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4477         unsigned offset;
4478         int ret;
4479
4480         /* Inline kvm_read_guest_virt_helper for speed.  */
4481         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4482                                                     exception);
4483         if (unlikely(gpa == UNMAPPED_GVA))
4484                 return X86EMUL_PROPAGATE_FAULT;
4485
4486         offset = addr & (PAGE_SIZE-1);
4487         if (WARN_ON(offset + bytes > PAGE_SIZE))
4488                 bytes = (unsigned)PAGE_SIZE - offset;
4489         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4490                                        offset, bytes);
4491         if (unlikely(ret < 0))
4492                 return X86EMUL_IO_NEEDED;
4493
4494         return X86EMUL_CONTINUE;
4495 }
4496
4497 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4498                                gva_t addr, void *val, unsigned int bytes,
4499                                struct x86_exception *exception)
4500 {
4501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4502         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4503
4504         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4505                                           exception);
4506 }
4507 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4508
4509 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4510                                       gva_t addr, void *val, unsigned int bytes,
4511                                       struct x86_exception *exception)
4512 {
4513         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4514         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4515 }
4516
4517 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4518                 unsigned long addr, void *val, unsigned int bytes)
4519 {
4520         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4521         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4522
4523         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4524 }
4525
4526 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4527                                        gva_t addr, void *val,
4528                                        unsigned int bytes,
4529                                        struct x86_exception *exception)
4530 {
4531         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4532         void *data = val;
4533         int r = X86EMUL_CONTINUE;
4534
4535         while (bytes) {
4536                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4537                                                              PFERR_WRITE_MASK,
4538                                                              exception);
4539                 unsigned offset = addr & (PAGE_SIZE-1);
4540                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4541                 int ret;
4542
4543                 if (gpa == UNMAPPED_GVA)
4544                         return X86EMUL_PROPAGATE_FAULT;
4545                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4546                 if (ret < 0) {
4547                         r = X86EMUL_IO_NEEDED;
4548                         goto out;
4549                 }
4550
4551                 bytes -= towrite;
4552                 data += towrite;
4553                 addr += towrite;
4554         }
4555 out:
4556         return r;
4557 }
4558 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4559
4560 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4561                             gpa_t gpa, bool write)
4562 {
4563         /* For APIC access vmexit */
4564         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4565                 return 1;
4566
4567         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4568                 trace_vcpu_match_mmio(gva, gpa, write, true);
4569                 return 1;
4570         }
4571
4572         return 0;
4573 }
4574
4575 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4576                                 gpa_t *gpa, struct x86_exception *exception,
4577                                 bool write)
4578 {
4579         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4580                 | (write ? PFERR_WRITE_MASK : 0);
4581
4582         /*
4583          * currently PKRU is only applied to ept enabled guest so
4584          * there is no pkey in EPT page table for L1 guest or EPT
4585          * shadow page table for L2 guest.
4586          */
4587         if (vcpu_match_mmio_gva(vcpu, gva)
4588             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4589                                  vcpu->arch.access, 0, access)) {
4590                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4591                                         (gva & (PAGE_SIZE - 1));
4592                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4593                 return 1;
4594         }
4595
4596         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4597
4598         if (*gpa == UNMAPPED_GVA)
4599                 return -1;
4600
4601         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4602 }
4603
4604 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4605                         const void *val, int bytes)
4606 {
4607         int ret;
4608
4609         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4610         if (ret < 0)
4611                 return 0;
4612         kvm_page_track_write(vcpu, gpa, val, bytes);
4613         return 1;
4614 }
4615
4616 struct read_write_emulator_ops {
4617         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4618                                   int bytes);
4619         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4620                                   void *val, int bytes);
4621         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4622                                int bytes, void *val);
4623         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4624                                     void *val, int bytes);
4625         bool write;
4626 };
4627
4628 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4629 {
4630         if (vcpu->mmio_read_completed) {
4631                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4632                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4633                 vcpu->mmio_read_completed = 0;
4634                 return 1;
4635         }
4636
4637         return 0;
4638 }
4639
4640 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4641                         void *val, int bytes)
4642 {
4643         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4644 }
4645
4646 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4647                          void *val, int bytes)
4648 {
4649         return emulator_write_phys(vcpu, gpa, val, bytes);
4650 }
4651
4652 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4653 {
4654         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4655         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4656 }
4657
4658 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4659                           void *val, int bytes)
4660 {
4661         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4662         return X86EMUL_IO_NEEDED;
4663 }
4664
4665 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4666                            void *val, int bytes)
4667 {
4668         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4669
4670         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4671         return X86EMUL_CONTINUE;
4672 }
4673
4674 static const struct read_write_emulator_ops read_emultor = {
4675         .read_write_prepare = read_prepare,
4676         .read_write_emulate = read_emulate,
4677         .read_write_mmio = vcpu_mmio_read,
4678         .read_write_exit_mmio = read_exit_mmio,
4679 };
4680
4681 static const struct read_write_emulator_ops write_emultor = {
4682         .read_write_emulate = write_emulate,
4683         .read_write_mmio = write_mmio,
4684         .read_write_exit_mmio = write_exit_mmio,
4685         .write = true,
4686 };
4687
4688 static int emulator_read_write_onepage(unsigned long addr, void *val,
4689                                        unsigned int bytes,
4690                                        struct x86_exception *exception,
4691                                        struct kvm_vcpu *vcpu,
4692                                        const struct read_write_emulator_ops *ops)
4693 {
4694         gpa_t gpa;
4695         int handled, ret;
4696         bool write = ops->write;
4697         struct kvm_mmio_fragment *frag;
4698         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4699
4700         /*
4701          * If the exit was due to a NPF we may already have a GPA.
4702          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4703          * Note, this cannot be used on string operations since string
4704          * operation using rep will only have the initial GPA from the NPF
4705          * occurred.
4706          */
4707         if (vcpu->arch.gpa_available &&
4708             emulator_can_use_gpa(ctxt) &&
4709             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4710                 gpa = vcpu->arch.gpa_val;
4711                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4712         } else {
4713                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4714                 if (ret < 0)
4715                         return X86EMUL_PROPAGATE_FAULT;
4716         }
4717
4718         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4719                 return X86EMUL_CONTINUE;
4720
4721         /*
4722          * Is this MMIO handled locally?
4723          */
4724         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4725         if (handled == bytes)
4726                 return X86EMUL_CONTINUE;
4727
4728         gpa += handled;
4729         bytes -= handled;
4730         val += handled;
4731
4732         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4733         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4734         frag->gpa = gpa;
4735         frag->data = val;
4736         frag->len = bytes;
4737         return X86EMUL_CONTINUE;
4738 }
4739
4740 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4741                         unsigned long addr,
4742                         void *val, unsigned int bytes,
4743                         struct x86_exception *exception,
4744                         const struct read_write_emulator_ops *ops)
4745 {
4746         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4747         gpa_t gpa;
4748         int rc;
4749
4750         if (ops->read_write_prepare &&
4751                   ops->read_write_prepare(vcpu, val, bytes))
4752                 return X86EMUL_CONTINUE;
4753
4754         vcpu->mmio_nr_fragments = 0;
4755
4756         /* Crossing a page boundary? */
4757         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4758                 int now;
4759
4760                 now = -addr & ~PAGE_MASK;
4761                 rc = emulator_read_write_onepage(addr, val, now, exception,
4762                                                  vcpu, ops);
4763
4764                 if (rc != X86EMUL_CONTINUE)
4765                         return rc;
4766                 addr += now;
4767                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4768                         addr = (u32)addr;
4769                 val += now;
4770                 bytes -= now;
4771         }
4772
4773         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4774                                          vcpu, ops);
4775         if (rc != X86EMUL_CONTINUE)
4776                 return rc;
4777
4778         if (!vcpu->mmio_nr_fragments)
4779                 return rc;
4780
4781         gpa = vcpu->mmio_fragments[0].gpa;
4782
4783         vcpu->mmio_needed = 1;
4784         vcpu->mmio_cur_fragment = 0;
4785
4786         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4787         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4788         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4789         vcpu->run->mmio.phys_addr = gpa;
4790
4791         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4792 }
4793
4794 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4795                                   unsigned long addr,
4796                                   void *val,
4797                                   unsigned int bytes,
4798                                   struct x86_exception *exception)
4799 {
4800         return emulator_read_write(ctxt, addr, val, bytes,
4801                                    exception, &read_emultor);
4802 }
4803
4804 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4805                             unsigned long addr,
4806                             const void *val,
4807                             unsigned int bytes,
4808                             struct x86_exception *exception)
4809 {
4810         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4811                                    exception, &write_emultor);
4812 }
4813
4814 #define CMPXCHG_TYPE(t, ptr, old, new) \
4815         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4816
4817 #ifdef CONFIG_X86_64
4818 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4819 #else
4820 #  define CMPXCHG64(ptr, old, new) \
4821         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4822 #endif
4823
4824 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4825                                      unsigned long addr,
4826                                      const void *old,
4827                                      const void *new,
4828                                      unsigned int bytes,
4829                                      struct x86_exception *exception)
4830 {
4831         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4832         gpa_t gpa;
4833         struct page *page;
4834         char *kaddr;
4835         bool exchanged;
4836
4837         /* guests cmpxchg8b have to be emulated atomically */
4838         if (bytes > 8 || (bytes & (bytes - 1)))
4839                 goto emul_write;
4840
4841         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4842
4843         if (gpa == UNMAPPED_GVA ||
4844             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4845                 goto emul_write;
4846
4847         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4848                 goto emul_write;
4849
4850         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4851         if (is_error_page(page))
4852                 goto emul_write;
4853
4854         kaddr = kmap_atomic(page);
4855         kaddr += offset_in_page(gpa);
4856         switch (bytes) {
4857         case 1:
4858                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4859                 break;
4860         case 2:
4861                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4862                 break;
4863         case 4:
4864                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4865                 break;
4866         case 8:
4867                 exchanged = CMPXCHG64(kaddr, old, new);
4868                 break;
4869         default:
4870                 BUG();
4871         }
4872         kunmap_atomic(kaddr);
4873         kvm_release_page_dirty(page);
4874
4875         if (!exchanged)
4876                 return X86EMUL_CMPXCHG_FAILED;
4877
4878         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4879         kvm_page_track_write(vcpu, gpa, new, bytes);
4880
4881         return X86EMUL_CONTINUE;
4882
4883 emul_write:
4884         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4885
4886         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4887 }
4888
4889 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4890 {
4891         int r = 0, i;
4892
4893         for (i = 0; i < vcpu->arch.pio.count; i++) {
4894                 if (vcpu->arch.pio.in)
4895                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4896                                             vcpu->arch.pio.size, pd);
4897                 else
4898                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4899                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4900                                              pd);
4901                 if (r)
4902                         break;
4903                 pd += vcpu->arch.pio.size;
4904         }
4905         return r;
4906 }
4907
4908 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4909                                unsigned short port, void *val,
4910                                unsigned int count, bool in)
4911 {
4912         vcpu->arch.pio.port = port;
4913         vcpu->arch.pio.in = in;
4914         vcpu->arch.pio.count  = count;
4915         vcpu->arch.pio.size = size;
4916
4917         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4918                 vcpu->arch.pio.count = 0;
4919                 return 1;
4920         }
4921
4922         vcpu->run->exit_reason = KVM_EXIT_IO;
4923         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4924         vcpu->run->io.size = size;
4925         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4926         vcpu->run->io.count = count;
4927         vcpu->run->io.port = port;
4928
4929         return 0;
4930 }
4931
4932 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4933                                     int size, unsigned short port, void *val,
4934                                     unsigned int count)
4935 {
4936         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4937         int ret;
4938
4939         if (vcpu->arch.pio.count)
4940                 goto data_avail;
4941
4942         memset(vcpu->arch.pio_data, 0, size * count);
4943
4944         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4945         if (ret) {
4946 data_avail:
4947                 memcpy(val, vcpu->arch.pio_data, size * count);
4948                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4949                 vcpu->arch.pio.count = 0;
4950                 return 1;
4951         }
4952
4953         return 0;
4954 }
4955
4956 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4957                                      int size, unsigned short port,
4958                                      const void *val, unsigned int count)
4959 {
4960         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4961
4962         memcpy(vcpu->arch.pio_data, val, size * count);
4963         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4964         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4965 }
4966
4967 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4968 {
4969         return kvm_x86_ops->get_segment_base(vcpu, seg);
4970 }
4971
4972 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4973 {
4974         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4975 }
4976
4977 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4978 {
4979         if (!need_emulate_wbinvd(vcpu))
4980                 return X86EMUL_CONTINUE;
4981
4982         if (kvm_x86_ops->has_wbinvd_exit()) {
4983                 int cpu = get_cpu();
4984
4985                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4986                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4987                                 wbinvd_ipi, NULL, 1);
4988                 put_cpu();
4989                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4990         } else
4991                 wbinvd();
4992         return X86EMUL_CONTINUE;
4993 }
4994
4995 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4996 {
4997         kvm_emulate_wbinvd_noskip(vcpu);
4998         return kvm_skip_emulated_instruction(vcpu);
4999 }
5000 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5001
5002
5003
5004 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5005 {
5006         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5007 }
5008
5009 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5010                            unsigned long *dest)
5011 {
5012         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5013 }
5014
5015 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5016                            unsigned long value)
5017 {
5018
5019         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5020 }
5021
5022 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5023 {
5024         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5025 }
5026
5027 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5028 {
5029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5030         unsigned long value;
5031
5032         switch (cr) {
5033         case 0:
5034                 value = kvm_read_cr0(vcpu);
5035                 break;
5036         case 2:
5037                 value = vcpu->arch.cr2;
5038                 break;
5039         case 3:
5040                 value = kvm_read_cr3(vcpu);
5041                 break;
5042         case 4:
5043                 value = kvm_read_cr4(vcpu);
5044                 break;
5045         case 8:
5046                 value = kvm_get_cr8(vcpu);
5047                 break;
5048         default:
5049                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5050                 return 0;
5051         }
5052
5053         return value;
5054 }
5055
5056 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5057 {
5058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5059         int res = 0;
5060
5061         switch (cr) {
5062         case 0:
5063                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5064                 break;
5065         case 2:
5066                 vcpu->arch.cr2 = val;
5067                 break;
5068         case 3:
5069                 res = kvm_set_cr3(vcpu, val);
5070                 break;
5071         case 4:
5072                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5073                 break;
5074         case 8:
5075                 res = kvm_set_cr8(vcpu, val);
5076                 break;
5077         default:
5078                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5079                 res = -1;
5080         }
5081
5082         return res;
5083 }
5084
5085 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5086 {
5087         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5088 }
5089
5090 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5091 {
5092         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5093 }
5094
5095 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5096 {
5097         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5098 }
5099
5100 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5101 {
5102         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5103 }
5104
5105 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5106 {
5107         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5108 }
5109
5110 static unsigned long emulator_get_cached_segment_base(
5111         struct x86_emulate_ctxt *ctxt, int seg)
5112 {
5113         return get_segment_base(emul_to_vcpu(ctxt), seg);
5114 }
5115
5116 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5117                                  struct desc_struct *desc, u32 *base3,
5118                                  int seg)
5119 {
5120         struct kvm_segment var;
5121
5122         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5123         *selector = var.selector;
5124
5125         if (var.unusable) {
5126                 memset(desc, 0, sizeof(*desc));
5127                 if (base3)
5128                         *base3 = 0;
5129                 return false;
5130         }
5131
5132         if (var.g)
5133                 var.limit >>= 12;
5134         set_desc_limit(desc, var.limit);
5135         set_desc_base(desc, (unsigned long)var.base);
5136 #ifdef CONFIG_X86_64
5137         if (base3)
5138                 *base3 = var.base >> 32;
5139 #endif
5140         desc->type = var.type;
5141         desc->s = var.s;
5142         desc->dpl = var.dpl;
5143         desc->p = var.present;
5144         desc->avl = var.avl;
5145         desc->l = var.l;
5146         desc->d = var.db;
5147         desc->g = var.g;
5148
5149         return true;
5150 }
5151
5152 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5153                                  struct desc_struct *desc, u32 base3,
5154                                  int seg)
5155 {
5156         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5157         struct kvm_segment var;
5158
5159         var.selector = selector;
5160         var.base = get_desc_base(desc);
5161 #ifdef CONFIG_X86_64
5162         var.base |= ((u64)base3) << 32;
5163 #endif
5164         var.limit = get_desc_limit(desc);
5165         if (desc->g)
5166                 var.limit = (var.limit << 12) | 0xfff;
5167         var.type = desc->type;
5168         var.dpl = desc->dpl;
5169         var.db = desc->d;
5170         var.s = desc->s;
5171         var.l = desc->l;
5172         var.g = desc->g;
5173         var.avl = desc->avl;
5174         var.present = desc->p;
5175         var.unusable = !var.present;
5176         var.padding = 0;
5177
5178         kvm_set_segment(vcpu, &var, seg);
5179         return;
5180 }
5181
5182 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5183                             u32 msr_index, u64 *pdata)
5184 {
5185         struct msr_data msr;
5186         int r;
5187
5188         msr.index = msr_index;
5189         msr.host_initiated = false;
5190         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5191         if (r)
5192                 return r;
5193
5194         *pdata = msr.data;
5195         return 0;
5196 }
5197
5198 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5199                             u32 msr_index, u64 data)
5200 {
5201         struct msr_data msr;
5202
5203         msr.data = data;
5204         msr.index = msr_index;
5205         msr.host_initiated = false;
5206         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5207 }
5208
5209 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5210 {
5211         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5212
5213         return vcpu->arch.smbase;
5214 }
5215
5216 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5217 {
5218         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5219
5220         vcpu->arch.smbase = smbase;
5221 }
5222
5223 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5224                               u32 pmc)
5225 {
5226         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5227 }
5228
5229 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5230                              u32 pmc, u64 *pdata)
5231 {
5232         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5233 }
5234
5235 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5236 {
5237         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5238 }
5239
5240 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5241 {
5242         preempt_disable();
5243         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5244 }
5245
5246 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5247 {
5248         preempt_enable();
5249 }
5250
5251 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5252                               struct x86_instruction_info *info,
5253                               enum x86_intercept_stage stage)
5254 {
5255         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5256 }
5257
5258 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5259                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5260 {
5261         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5262 }
5263
5264 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5265 {
5266         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5267 }
5268
5269 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5270 {
5271         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5272 }
5273
5274 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5275 {
5276         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5277 }
5278
5279 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5280 {
5281         return emul_to_vcpu(ctxt)->arch.hflags;
5282 }
5283
5284 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5285 {
5286         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5287 }
5288
5289 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5290 {
5291         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5292 }
5293
5294 static const struct x86_emulate_ops emulate_ops = {
5295         .read_gpr            = emulator_read_gpr,
5296         .write_gpr           = emulator_write_gpr,
5297         .read_std            = kvm_read_guest_virt_system,
5298         .write_std           = kvm_write_guest_virt_system,
5299         .read_phys           = kvm_read_guest_phys_system,
5300         .fetch               = kvm_fetch_guest_virt,
5301         .read_emulated       = emulator_read_emulated,
5302         .write_emulated      = emulator_write_emulated,
5303         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5304         .invlpg              = emulator_invlpg,
5305         .pio_in_emulated     = emulator_pio_in_emulated,
5306         .pio_out_emulated    = emulator_pio_out_emulated,
5307         .get_segment         = emulator_get_segment,
5308         .set_segment         = emulator_set_segment,
5309         .get_cached_segment_base = emulator_get_cached_segment_base,
5310         .get_gdt             = emulator_get_gdt,
5311         .get_idt             = emulator_get_idt,
5312         .set_gdt             = emulator_set_gdt,
5313         .set_idt             = emulator_set_idt,
5314         .get_cr              = emulator_get_cr,
5315         .set_cr              = emulator_set_cr,
5316         .cpl                 = emulator_get_cpl,
5317         .get_dr              = emulator_get_dr,
5318         .set_dr              = emulator_set_dr,
5319         .get_smbase          = emulator_get_smbase,
5320         .set_smbase          = emulator_set_smbase,
5321         .set_msr             = emulator_set_msr,
5322         .get_msr             = emulator_get_msr,
5323         .check_pmc           = emulator_check_pmc,
5324         .read_pmc            = emulator_read_pmc,
5325         .halt                = emulator_halt,
5326         .wbinvd              = emulator_wbinvd,
5327         .fix_hypercall       = emulator_fix_hypercall,
5328         .get_fpu             = emulator_get_fpu,
5329         .put_fpu             = emulator_put_fpu,
5330         .intercept           = emulator_intercept,
5331         .get_cpuid           = emulator_get_cpuid,
5332         .set_nmi_mask        = emulator_set_nmi_mask,
5333         .get_hflags          = emulator_get_hflags,
5334         .set_hflags          = emulator_set_hflags,
5335         .pre_leave_smm       = emulator_pre_leave_smm,
5336 };
5337
5338 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5339 {
5340         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5341         /*
5342          * an sti; sti; sequence only disable interrupts for the first
5343          * instruction. So, if the last instruction, be it emulated or
5344          * not, left the system with the INT_STI flag enabled, it
5345          * means that the last instruction is an sti. We should not
5346          * leave the flag on in this case. The same goes for mov ss
5347          */
5348         if (int_shadow & mask)
5349                 mask = 0;
5350         if (unlikely(int_shadow || mask)) {
5351                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5352                 if (!mask)
5353                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5354         }
5355 }
5356
5357 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5358 {
5359         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5360         if (ctxt->exception.vector == PF_VECTOR)
5361                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5362
5363         if (ctxt->exception.error_code_valid)
5364                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5365                                       ctxt->exception.error_code);
5366         else
5367                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5368         return false;
5369 }
5370
5371 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5372 {
5373         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5374         int cs_db, cs_l;
5375
5376         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5377
5378         ctxt->eflags = kvm_get_rflags(vcpu);
5379         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5380
5381         ctxt->eip = kvm_rip_read(vcpu);
5382         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5383                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5384                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5385                      cs_db                              ? X86EMUL_MODE_PROT32 :
5386                                                           X86EMUL_MODE_PROT16;
5387         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5388         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5389         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5390
5391         init_decode_cache(ctxt);
5392         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5393 }
5394
5395 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5396 {
5397         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5398         int ret;
5399
5400         init_emulate_ctxt(vcpu);
5401
5402         ctxt->op_bytes = 2;
5403         ctxt->ad_bytes = 2;
5404         ctxt->_eip = ctxt->eip + inc_eip;
5405         ret = emulate_int_real(ctxt, irq);
5406
5407         if (ret != X86EMUL_CONTINUE)
5408                 return EMULATE_FAIL;
5409
5410         ctxt->eip = ctxt->_eip;
5411         kvm_rip_write(vcpu, ctxt->eip);
5412         kvm_set_rflags(vcpu, ctxt->eflags);
5413
5414         if (irq == NMI_VECTOR)
5415                 vcpu->arch.nmi_pending = 0;
5416         else
5417                 vcpu->arch.interrupt.pending = false;
5418
5419         return EMULATE_DONE;
5420 }
5421 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5422
5423 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5424 {
5425         int r = EMULATE_DONE;
5426
5427         ++vcpu->stat.insn_emulation_fail;
5428         trace_kvm_emulate_insn_failed(vcpu);
5429         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5430                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5431                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5432                 vcpu->run->internal.ndata = 0;
5433                 r = EMULATE_FAIL;
5434         }
5435         kvm_queue_exception(vcpu, UD_VECTOR);
5436
5437         return r;
5438 }
5439
5440 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5441                                   bool write_fault_to_shadow_pgtable,
5442                                   int emulation_type)
5443 {
5444         gpa_t gpa = cr2;
5445         kvm_pfn_t pfn;
5446
5447         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5448                 return false;
5449
5450         if (!vcpu->arch.mmu.direct_map) {
5451                 /*
5452                  * Write permission should be allowed since only
5453                  * write access need to be emulated.
5454                  */
5455                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5456
5457                 /*
5458                  * If the mapping is invalid in guest, let cpu retry
5459                  * it to generate fault.
5460                  */
5461                 if (gpa == UNMAPPED_GVA)
5462                         return true;
5463         }
5464
5465         /*
5466          * Do not retry the unhandleable instruction if it faults on the
5467          * readonly host memory, otherwise it will goto a infinite loop:
5468          * retry instruction -> write #PF -> emulation fail -> retry
5469          * instruction -> ...
5470          */
5471         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5472
5473         /*
5474          * If the instruction failed on the error pfn, it can not be fixed,
5475          * report the error to userspace.
5476          */
5477         if (is_error_noslot_pfn(pfn))
5478                 return false;
5479
5480         kvm_release_pfn_clean(pfn);
5481
5482         /* The instructions are well-emulated on direct mmu. */
5483         if (vcpu->arch.mmu.direct_map) {
5484                 unsigned int indirect_shadow_pages;
5485
5486                 spin_lock(&vcpu->kvm->mmu_lock);
5487                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5488                 spin_unlock(&vcpu->kvm->mmu_lock);
5489
5490                 if (indirect_shadow_pages)
5491                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5492
5493                 return true;
5494         }
5495
5496         /*
5497          * if emulation was due to access to shadowed page table
5498          * and it failed try to unshadow page and re-enter the
5499          * guest to let CPU execute the instruction.
5500          */
5501         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5502
5503         /*
5504          * If the access faults on its page table, it can not
5505          * be fixed by unprotecting shadow page and it should
5506          * be reported to userspace.
5507          */
5508         return !write_fault_to_shadow_pgtable;
5509 }
5510
5511 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5512                               unsigned long cr2,  int emulation_type)
5513 {
5514         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5515         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5516
5517         last_retry_eip = vcpu->arch.last_retry_eip;
5518         last_retry_addr = vcpu->arch.last_retry_addr;
5519
5520         /*
5521          * If the emulation is caused by #PF and it is non-page_table
5522          * writing instruction, it means the VM-EXIT is caused by shadow
5523          * page protected, we can zap the shadow page and retry this
5524          * instruction directly.
5525          *
5526          * Note: if the guest uses a non-page-table modifying instruction
5527          * on the PDE that points to the instruction, then we will unmap
5528          * the instruction and go to an infinite loop. So, we cache the
5529          * last retried eip and the last fault address, if we meet the eip
5530          * and the address again, we can break out of the potential infinite
5531          * loop.
5532          */
5533         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5534
5535         if (!(emulation_type & EMULTYPE_RETRY))
5536                 return false;
5537
5538         if (x86_page_table_writing_insn(ctxt))
5539                 return false;
5540
5541         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5542                 return false;
5543
5544         vcpu->arch.last_retry_eip = ctxt->eip;
5545         vcpu->arch.last_retry_addr = cr2;
5546
5547         if (!vcpu->arch.mmu.direct_map)
5548                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5549
5550         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5551
5552         return true;
5553 }
5554
5555 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5556 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5557
5558 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5559 {
5560         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5561                 /* This is a good place to trace that we are exiting SMM.  */
5562                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5563
5564                 /* Process a latched INIT or SMI, if any.  */
5565                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5566         }
5567
5568         kvm_mmu_reset_context(vcpu);
5569 }
5570
5571 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5572 {
5573         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5574
5575         vcpu->arch.hflags = emul_flags;
5576
5577         if (changed & HF_SMM_MASK)
5578                 kvm_smm_changed(vcpu);
5579 }
5580
5581 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5582                                 unsigned long *db)
5583 {
5584         u32 dr6 = 0;
5585         int i;
5586         u32 enable, rwlen;
5587
5588         enable = dr7;
5589         rwlen = dr7 >> 16;
5590         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5591                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5592                         dr6 |= (1 << i);
5593         return dr6;
5594 }
5595
5596 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5597 {
5598         struct kvm_run *kvm_run = vcpu->run;
5599
5600         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5601                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5602                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5603                 kvm_run->debug.arch.exception = DB_VECTOR;
5604                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5605                 *r = EMULATE_USER_EXIT;
5606         } else {
5607                 /*
5608                  * "Certain debug exceptions may clear bit 0-3.  The
5609                  * remaining contents of the DR6 register are never
5610                  * cleared by the processor".
5611                  */
5612                 vcpu->arch.dr6 &= ~15;
5613                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5614                 kvm_queue_exception(vcpu, DB_VECTOR);
5615         }
5616 }
5617
5618 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5619 {
5620         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5621         int r = EMULATE_DONE;
5622
5623         kvm_x86_ops->skip_emulated_instruction(vcpu);
5624
5625         /*
5626          * rflags is the old, "raw" value of the flags.  The new value has
5627          * not been saved yet.
5628          *
5629          * This is correct even for TF set by the guest, because "the
5630          * processor will not generate this exception after the instruction
5631          * that sets the TF flag".
5632          */
5633         if (unlikely(rflags & X86_EFLAGS_TF))
5634                 kvm_vcpu_do_singlestep(vcpu, &r);
5635         return r == EMULATE_DONE;
5636 }
5637 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5638
5639 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5640 {
5641         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5642             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5643                 struct kvm_run *kvm_run = vcpu->run;
5644                 unsigned long eip = kvm_get_linear_rip(vcpu);
5645                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5646                                            vcpu->arch.guest_debug_dr7,
5647                                            vcpu->arch.eff_db);
5648
5649                 if (dr6 != 0) {
5650                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5651                         kvm_run->debug.arch.pc = eip;
5652                         kvm_run->debug.arch.exception = DB_VECTOR;
5653                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5654                         *r = EMULATE_USER_EXIT;
5655                         return true;
5656                 }
5657         }
5658
5659         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5660             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5661                 unsigned long eip = kvm_get_linear_rip(vcpu);
5662                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5663                                            vcpu->arch.dr7,
5664                                            vcpu->arch.db);
5665
5666                 if (dr6 != 0) {
5667                         vcpu->arch.dr6 &= ~15;
5668                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5669                         kvm_queue_exception(vcpu, DB_VECTOR);
5670                         *r = EMULATE_DONE;
5671                         return true;
5672                 }
5673         }
5674
5675         return false;
5676 }
5677
5678 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5679                             unsigned long cr2,
5680                             int emulation_type,
5681                             void *insn,
5682                             int insn_len)
5683 {
5684         int r;
5685         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5686         bool writeback = true;
5687         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5688
5689         /*
5690          * Clear write_fault_to_shadow_pgtable here to ensure it is
5691          * never reused.
5692          */
5693         vcpu->arch.write_fault_to_shadow_pgtable = false;
5694         kvm_clear_exception_queue(vcpu);
5695
5696         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5697                 init_emulate_ctxt(vcpu);
5698
5699                 /*
5700                  * We will reenter on the same instruction since
5701                  * we do not set complete_userspace_io.  This does not
5702                  * handle watchpoints yet, those would be handled in
5703                  * the emulate_ops.
5704                  */
5705                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5706                         return r;
5707
5708                 ctxt->interruptibility = 0;
5709                 ctxt->have_exception = false;
5710                 ctxt->exception.vector = -1;
5711                 ctxt->perm_ok = false;
5712
5713                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5714
5715                 r = x86_decode_insn(ctxt, insn, insn_len);
5716
5717                 trace_kvm_emulate_insn_start(vcpu);
5718                 ++vcpu->stat.insn_emulation;
5719                 if (r != EMULATION_OK)  {
5720                         if (emulation_type & EMULTYPE_TRAP_UD)
5721                                 return EMULATE_FAIL;
5722                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5723                                                 emulation_type))
5724                                 return EMULATE_DONE;
5725                         if (emulation_type & EMULTYPE_SKIP)
5726                                 return EMULATE_FAIL;
5727                         return handle_emulation_failure(vcpu);
5728                 }
5729         }
5730
5731         if (emulation_type & EMULTYPE_SKIP) {
5732                 kvm_rip_write(vcpu, ctxt->_eip);
5733                 if (ctxt->eflags & X86_EFLAGS_RF)
5734                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5735                 return EMULATE_DONE;
5736         }
5737
5738         if (retry_instruction(ctxt, cr2, emulation_type))
5739                 return EMULATE_DONE;
5740
5741         /* this is needed for vmware backdoor interface to work since it
5742            changes registers values  during IO operation */
5743         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5744                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5745                 emulator_invalidate_register_cache(ctxt);
5746         }
5747
5748 restart:
5749         /* Save the faulting GPA (cr2) in the address field */
5750         ctxt->exception.address = cr2;
5751
5752         r = x86_emulate_insn(ctxt);
5753
5754         if (r == EMULATION_INTERCEPTED)
5755                 return EMULATE_DONE;
5756
5757         if (r == EMULATION_FAILED) {
5758                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5759                                         emulation_type))
5760                         return EMULATE_DONE;
5761
5762                 return handle_emulation_failure(vcpu);
5763         }
5764
5765         if (ctxt->have_exception) {
5766                 r = EMULATE_DONE;
5767                 if (inject_emulated_exception(vcpu))
5768                         return r;
5769         } else if (vcpu->arch.pio.count) {
5770                 if (!vcpu->arch.pio.in) {
5771                         /* FIXME: return into emulator if single-stepping.  */
5772                         vcpu->arch.pio.count = 0;
5773                 } else {
5774                         writeback = false;
5775                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5776                 }
5777                 r = EMULATE_USER_EXIT;
5778         } else if (vcpu->mmio_needed) {
5779                 if (!vcpu->mmio_is_write)
5780                         writeback = false;
5781                 r = EMULATE_USER_EXIT;
5782                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5783         } else if (r == EMULATION_RESTART)
5784                 goto restart;
5785         else
5786                 r = EMULATE_DONE;
5787
5788         if (writeback) {
5789                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5790                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5791                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5792                 kvm_rip_write(vcpu, ctxt->eip);
5793                 if (r == EMULATE_DONE &&
5794                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5795                         kvm_vcpu_do_singlestep(vcpu, &r);
5796                 if (!ctxt->have_exception ||
5797                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5798                         __kvm_set_rflags(vcpu, ctxt->eflags);
5799
5800                 /*
5801                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5802                  * do nothing, and it will be requested again as soon as
5803                  * the shadow expires.  But we still need to check here,
5804                  * because POPF has no interrupt shadow.
5805                  */
5806                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5807                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5808         } else
5809                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5810
5811         return r;
5812 }
5813 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5814
5815 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5816 {
5817         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5818         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5819                                             size, port, &val, 1);
5820         /* do not return to emulator after return from userspace */
5821         vcpu->arch.pio.count = 0;
5822         return ret;
5823 }
5824 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5825
5826 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5827 {
5828         unsigned long val;
5829
5830         /* We should only ever be called with arch.pio.count equal to 1 */
5831         BUG_ON(vcpu->arch.pio.count != 1);
5832
5833         /* For size less than 4 we merge, else we zero extend */
5834         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5835                                         : 0;
5836
5837         /*
5838          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5839          * the copy and tracing
5840          */
5841         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5842                                  vcpu->arch.pio.port, &val, 1);
5843         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5844
5845         return 1;
5846 }
5847
5848 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5849 {
5850         unsigned long val;
5851         int ret;
5852
5853         /* For size less than 4 we merge, else we zero extend */
5854         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5855
5856         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5857                                        &val, 1);
5858         if (ret) {
5859                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5860                 return ret;
5861         }
5862
5863         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5864
5865         return 0;
5866 }
5867 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5868
5869 static int kvmclock_cpu_down_prep(unsigned int cpu)
5870 {
5871         __this_cpu_write(cpu_tsc_khz, 0);
5872         return 0;
5873 }
5874
5875 static void tsc_khz_changed(void *data)
5876 {
5877         struct cpufreq_freqs *freq = data;
5878         unsigned long khz = 0;
5879
5880         if (data)
5881                 khz = freq->new;
5882         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5883                 khz = cpufreq_quick_get(raw_smp_processor_id());
5884         if (!khz)
5885                 khz = tsc_khz;
5886         __this_cpu_write(cpu_tsc_khz, khz);
5887 }
5888
5889 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5890                                      void *data)
5891 {
5892         struct cpufreq_freqs *freq = data;
5893         struct kvm *kvm;
5894         struct kvm_vcpu *vcpu;
5895         int i, send_ipi = 0;
5896
5897         /*
5898          * We allow guests to temporarily run on slowing clocks,
5899          * provided we notify them after, or to run on accelerating
5900          * clocks, provided we notify them before.  Thus time never
5901          * goes backwards.
5902          *
5903          * However, we have a problem.  We can't atomically update
5904          * the frequency of a given CPU from this function; it is
5905          * merely a notifier, which can be called from any CPU.
5906          * Changing the TSC frequency at arbitrary points in time
5907          * requires a recomputation of local variables related to
5908          * the TSC for each VCPU.  We must flag these local variables
5909          * to be updated and be sure the update takes place with the
5910          * new frequency before any guests proceed.
5911          *
5912          * Unfortunately, the combination of hotplug CPU and frequency
5913          * change creates an intractable locking scenario; the order
5914          * of when these callouts happen is undefined with respect to
5915          * CPU hotplug, and they can race with each other.  As such,
5916          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5917          * undefined; you can actually have a CPU frequency change take
5918          * place in between the computation of X and the setting of the
5919          * variable.  To protect against this problem, all updates of
5920          * the per_cpu tsc_khz variable are done in an interrupt
5921          * protected IPI, and all callers wishing to update the value
5922          * must wait for a synchronous IPI to complete (which is trivial
5923          * if the caller is on the CPU already).  This establishes the
5924          * necessary total order on variable updates.
5925          *
5926          * Note that because a guest time update may take place
5927          * anytime after the setting of the VCPU's request bit, the
5928          * correct TSC value must be set before the request.  However,
5929          * to ensure the update actually makes it to any guest which
5930          * starts running in hardware virtualization between the set
5931          * and the acquisition of the spinlock, we must also ping the
5932          * CPU after setting the request bit.
5933          *
5934          */
5935
5936         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5937                 return 0;
5938         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5939                 return 0;
5940
5941         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5942
5943         spin_lock(&kvm_lock);
5944         list_for_each_entry(kvm, &vm_list, vm_list) {
5945                 kvm_for_each_vcpu(i, vcpu, kvm) {
5946                         if (vcpu->cpu != freq->cpu)
5947                                 continue;
5948                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5949                         if (vcpu->cpu != smp_processor_id())
5950                                 send_ipi = 1;
5951                 }
5952         }
5953         spin_unlock(&kvm_lock);
5954
5955         if (freq->old < freq->new && send_ipi) {
5956                 /*
5957                  * We upscale the frequency.  Must make the guest
5958                  * doesn't see old kvmclock values while running with
5959                  * the new frequency, otherwise we risk the guest sees
5960                  * time go backwards.
5961                  *
5962                  * In case we update the frequency for another cpu
5963                  * (which might be in guest context) send an interrupt
5964                  * to kick the cpu out of guest context.  Next time
5965                  * guest context is entered kvmclock will be updated,
5966                  * so the guest will not see stale values.
5967                  */
5968                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5969         }
5970         return 0;
5971 }
5972
5973 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5974         .notifier_call  = kvmclock_cpufreq_notifier
5975 };
5976
5977 static int kvmclock_cpu_online(unsigned int cpu)
5978 {
5979         tsc_khz_changed(NULL);
5980         return 0;
5981 }
5982
5983 static void kvm_timer_init(void)
5984 {
5985         max_tsc_khz = tsc_khz;
5986
5987         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5988 #ifdef CONFIG_CPU_FREQ
5989                 struct cpufreq_policy policy;
5990                 int cpu;
5991
5992                 memset(&policy, 0, sizeof(policy));
5993                 cpu = get_cpu();
5994                 cpufreq_get_policy(&policy, cpu);
5995                 if (policy.cpuinfo.max_freq)
5996                         max_tsc_khz = policy.cpuinfo.max_freq;
5997                 put_cpu();
5998 #endif
5999                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6000                                           CPUFREQ_TRANSITION_NOTIFIER);
6001         }
6002         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6003
6004         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6005                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6006 }
6007
6008 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6009
6010 int kvm_is_in_guest(void)
6011 {
6012         return __this_cpu_read(current_vcpu) != NULL;
6013 }
6014
6015 static int kvm_is_user_mode(void)
6016 {
6017         int user_mode = 3;
6018
6019         if (__this_cpu_read(current_vcpu))
6020                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6021
6022         return user_mode != 0;
6023 }
6024
6025 static unsigned long kvm_get_guest_ip(void)
6026 {
6027         unsigned long ip = 0;
6028
6029         if (__this_cpu_read(current_vcpu))
6030                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6031
6032         return ip;
6033 }
6034
6035 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6036         .is_in_guest            = kvm_is_in_guest,
6037         .is_user_mode           = kvm_is_user_mode,
6038         .get_guest_ip           = kvm_get_guest_ip,
6039 };
6040
6041 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6042 {
6043         __this_cpu_write(current_vcpu, vcpu);
6044 }
6045 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6046
6047 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6048 {
6049         __this_cpu_write(current_vcpu, NULL);
6050 }
6051 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6052
6053 static void kvm_set_mmio_spte_mask(void)
6054 {
6055         u64 mask;
6056         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6057
6058         /*
6059          * Set the reserved bits and the present bit of an paging-structure
6060          * entry to generate page fault with PFER.RSV = 1.
6061          */
6062          /* Mask the reserved physical address bits. */
6063         mask = rsvd_bits(maxphyaddr, 51);
6064
6065         /* Set the present bit. */
6066         mask |= 1ull;
6067
6068 #ifdef CONFIG_X86_64
6069         /*
6070          * If reserved bit is not supported, clear the present bit to disable
6071          * mmio page fault.
6072          */
6073         if (maxphyaddr == 52)
6074                 mask &= ~1ull;
6075 #endif
6076
6077         kvm_mmu_set_mmio_spte_mask(mask, mask);
6078 }
6079
6080 #ifdef CONFIG_X86_64
6081 static void pvclock_gtod_update_fn(struct work_struct *work)
6082 {
6083         struct kvm *kvm;
6084
6085         struct kvm_vcpu *vcpu;
6086         int i;
6087
6088         spin_lock(&kvm_lock);
6089         list_for_each_entry(kvm, &vm_list, vm_list)
6090                 kvm_for_each_vcpu(i, vcpu, kvm)
6091                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6092         atomic_set(&kvm_guest_has_master_clock, 0);
6093         spin_unlock(&kvm_lock);
6094 }
6095
6096 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6097
6098 /*
6099  * Notification about pvclock gtod data update.
6100  */
6101 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6102                                void *priv)
6103 {
6104         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6105         struct timekeeper *tk = priv;
6106
6107         update_pvclock_gtod(tk);
6108
6109         /* disable master clock if host does not trust, or does not
6110          * use, TSC clocksource
6111          */
6112         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6113             atomic_read(&kvm_guest_has_master_clock) != 0)
6114                 queue_work(system_long_wq, &pvclock_gtod_work);
6115
6116         return 0;
6117 }
6118
6119 static struct notifier_block pvclock_gtod_notifier = {
6120         .notifier_call = pvclock_gtod_notify,
6121 };
6122 #endif
6123
6124 int kvm_arch_init(void *opaque)
6125 {
6126         int r;
6127         struct kvm_x86_ops *ops = opaque;
6128
6129         if (kvm_x86_ops) {
6130                 printk(KERN_ERR "kvm: already loaded the other module\n");
6131                 r = -EEXIST;
6132                 goto out;
6133         }
6134
6135         if (!ops->cpu_has_kvm_support()) {
6136                 printk(KERN_ERR "kvm: no hardware support\n");
6137                 r = -EOPNOTSUPP;
6138                 goto out;
6139         }
6140         if (ops->disabled_by_bios()) {
6141                 printk(KERN_ERR "kvm: disabled by bios\n");
6142                 r = -EOPNOTSUPP;
6143                 goto out;
6144         }
6145
6146         r = -ENOMEM;
6147         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6148         if (!shared_msrs) {
6149                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6150                 goto out;
6151         }
6152
6153         r = kvm_mmu_module_init();
6154         if (r)
6155                 goto out_free_percpu;
6156
6157         kvm_set_mmio_spte_mask();
6158
6159         kvm_x86_ops = ops;
6160
6161         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6162                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6163                         PT_PRESENT_MASK, 0, sme_me_mask);
6164         kvm_timer_init();
6165
6166         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6167
6168         if (boot_cpu_has(X86_FEATURE_XSAVE))
6169                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6170
6171         kvm_lapic_init();
6172 #ifdef CONFIG_X86_64
6173         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6174 #endif
6175
6176         return 0;
6177
6178 out_free_percpu:
6179         free_percpu(shared_msrs);
6180 out:
6181         return r;
6182 }
6183
6184 void kvm_arch_exit(void)
6185 {
6186         kvm_lapic_exit();
6187         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6188
6189         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6190                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6191                                             CPUFREQ_TRANSITION_NOTIFIER);
6192         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6193 #ifdef CONFIG_X86_64
6194         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6195 #endif
6196         kvm_x86_ops = NULL;
6197         kvm_mmu_module_exit();
6198         free_percpu(shared_msrs);
6199 }
6200
6201 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6202 {
6203         ++vcpu->stat.halt_exits;
6204         if (lapic_in_kernel(vcpu)) {
6205                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6206                 return 1;
6207         } else {
6208                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6209                 return 0;
6210         }
6211 }
6212 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6213
6214 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6215 {
6216         int ret = kvm_skip_emulated_instruction(vcpu);
6217         /*
6218          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6219          * KVM_EXIT_DEBUG here.
6220          */
6221         return kvm_vcpu_halt(vcpu) && ret;
6222 }
6223 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6224
6225 #ifdef CONFIG_X86_64
6226 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6227                                 unsigned long clock_type)
6228 {
6229         struct kvm_clock_pairing clock_pairing;
6230         struct timespec ts;
6231         u64 cycle;
6232         int ret;
6233
6234         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6235                 return -KVM_EOPNOTSUPP;
6236
6237         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6238                 return -KVM_EOPNOTSUPP;
6239
6240         clock_pairing.sec = ts.tv_sec;
6241         clock_pairing.nsec = ts.tv_nsec;
6242         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6243         clock_pairing.flags = 0;
6244
6245         ret = 0;
6246         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6247                             sizeof(struct kvm_clock_pairing)))
6248                 ret = -KVM_EFAULT;
6249
6250         return ret;
6251 }
6252 #endif
6253
6254 /*
6255  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6256  *
6257  * @apicid - apicid of vcpu to be kicked.
6258  */
6259 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6260 {
6261         struct kvm_lapic_irq lapic_irq;
6262
6263         lapic_irq.shorthand = 0;
6264         lapic_irq.dest_mode = 0;
6265         lapic_irq.level = 0;
6266         lapic_irq.dest_id = apicid;
6267         lapic_irq.msi_redir_hint = false;
6268
6269         lapic_irq.delivery_mode = APIC_DM_REMRD;
6270         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6271 }
6272
6273 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6274 {
6275         vcpu->arch.apicv_active = false;
6276         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6277 }
6278
6279 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6280 {
6281         unsigned long nr, a0, a1, a2, a3, ret;
6282         int op_64_bit, r;
6283
6284         r = kvm_skip_emulated_instruction(vcpu);
6285
6286         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6287                 return kvm_hv_hypercall(vcpu);
6288
6289         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6290         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6291         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6292         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6293         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6294
6295         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6296
6297         op_64_bit = is_64_bit_mode(vcpu);
6298         if (!op_64_bit) {
6299                 nr &= 0xFFFFFFFF;
6300                 a0 &= 0xFFFFFFFF;
6301                 a1 &= 0xFFFFFFFF;
6302                 a2 &= 0xFFFFFFFF;
6303                 a3 &= 0xFFFFFFFF;
6304         }
6305
6306         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6307                 ret = -KVM_EPERM;
6308                 goto out;
6309         }
6310
6311         switch (nr) {
6312         case KVM_HC_VAPIC_POLL_IRQ:
6313                 ret = 0;
6314                 break;
6315         case KVM_HC_KICK_CPU:
6316                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6317                 ret = 0;
6318                 break;
6319 #ifdef CONFIG_X86_64
6320         case KVM_HC_CLOCK_PAIRING:
6321                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6322                 break;
6323 #endif
6324         default:
6325                 ret = -KVM_ENOSYS;
6326                 break;
6327         }
6328 out:
6329         if (!op_64_bit)
6330                 ret = (u32)ret;
6331         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6332         ++vcpu->stat.hypercalls;
6333         return r;
6334 }
6335 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6336
6337 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6338 {
6339         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6340         char instruction[3];
6341         unsigned long rip = kvm_rip_read(vcpu);
6342
6343         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6344
6345         return emulator_write_emulated(ctxt, rip, instruction, 3,
6346                 &ctxt->exception);
6347 }
6348
6349 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6350 {
6351         return vcpu->run->request_interrupt_window &&
6352                 likely(!pic_in_kernel(vcpu->kvm));
6353 }
6354
6355 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6356 {
6357         struct kvm_run *kvm_run = vcpu->run;
6358
6359         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6360         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6361         kvm_run->cr8 = kvm_get_cr8(vcpu);
6362         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6363         kvm_run->ready_for_interrupt_injection =
6364                 pic_in_kernel(vcpu->kvm) ||
6365                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6366 }
6367
6368 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6369 {
6370         int max_irr, tpr;
6371
6372         if (!kvm_x86_ops->update_cr8_intercept)
6373                 return;
6374
6375         if (!lapic_in_kernel(vcpu))
6376                 return;
6377
6378         if (vcpu->arch.apicv_active)
6379                 return;
6380
6381         if (!vcpu->arch.apic->vapic_addr)
6382                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6383         else
6384                 max_irr = -1;
6385
6386         if (max_irr != -1)
6387                 max_irr >>= 4;
6388
6389         tpr = kvm_lapic_get_cr8(vcpu);
6390
6391         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6392 }
6393
6394 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6395 {
6396         int r;
6397
6398         /* try to reinject previous events if any */
6399         if (vcpu->arch.exception.injected) {
6400                 kvm_x86_ops->queue_exception(vcpu);
6401                 return 0;
6402         }
6403
6404         /*
6405          * Exceptions must be injected immediately, or the exception
6406          * frame will have the address of the NMI or interrupt handler.
6407          */
6408         if (!vcpu->arch.exception.pending) {
6409                 if (vcpu->arch.nmi_injected) {
6410                         kvm_x86_ops->set_nmi(vcpu);
6411                         return 0;
6412                 }
6413
6414                 if (vcpu->arch.interrupt.pending) {
6415                         kvm_x86_ops->set_irq(vcpu);
6416                         return 0;
6417                 }
6418         }
6419
6420         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6421                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6422                 if (r != 0)
6423                         return r;
6424         }
6425
6426         /* try to inject new event if pending */
6427         if (vcpu->arch.exception.pending) {
6428                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6429                                         vcpu->arch.exception.has_error_code,
6430                                         vcpu->arch.exception.error_code);
6431
6432                 vcpu->arch.exception.pending = false;
6433                 vcpu->arch.exception.injected = true;
6434
6435                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6436                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6437                                              X86_EFLAGS_RF);
6438
6439                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6440                     (vcpu->arch.dr7 & DR7_GD)) {
6441                         vcpu->arch.dr7 &= ~DR7_GD;
6442                         kvm_update_dr7(vcpu);
6443                 }
6444
6445                 kvm_x86_ops->queue_exception(vcpu);
6446         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6447                 vcpu->arch.smi_pending = false;
6448                 enter_smm(vcpu);
6449         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6450                 --vcpu->arch.nmi_pending;
6451                 vcpu->arch.nmi_injected = true;
6452                 kvm_x86_ops->set_nmi(vcpu);
6453         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6454                 /*
6455                  * Because interrupts can be injected asynchronously, we are
6456                  * calling check_nested_events again here to avoid a race condition.
6457                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6458                  * proposal and current concerns.  Perhaps we should be setting
6459                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6460                  */
6461                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6462                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6463                         if (r != 0)
6464                                 return r;
6465                 }
6466                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6467                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6468                                             false);
6469                         kvm_x86_ops->set_irq(vcpu);
6470                 }
6471         }
6472
6473         return 0;
6474 }
6475
6476 static void process_nmi(struct kvm_vcpu *vcpu)
6477 {
6478         unsigned limit = 2;
6479
6480         /*
6481          * x86 is limited to one NMI running, and one NMI pending after it.
6482          * If an NMI is already in progress, limit further NMIs to just one.
6483          * Otherwise, allow two (and we'll inject the first one immediately).
6484          */
6485         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6486                 limit = 1;
6487
6488         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6489         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6490         kvm_make_request(KVM_REQ_EVENT, vcpu);
6491 }
6492
6493 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6494 {
6495         u32 flags = 0;
6496         flags |= seg->g       << 23;
6497         flags |= seg->db      << 22;
6498         flags |= seg->l       << 21;
6499         flags |= seg->avl     << 20;
6500         flags |= seg->present << 15;
6501         flags |= seg->dpl     << 13;
6502         flags |= seg->s       << 12;
6503         flags |= seg->type    << 8;
6504         return flags;
6505 }
6506
6507 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6508 {
6509         struct kvm_segment seg;
6510         int offset;
6511
6512         kvm_get_segment(vcpu, &seg, n);
6513         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6514
6515         if (n < 3)
6516                 offset = 0x7f84 + n * 12;
6517         else
6518                 offset = 0x7f2c + (n - 3) * 12;
6519
6520         put_smstate(u32, buf, offset + 8, seg.base);
6521         put_smstate(u32, buf, offset + 4, seg.limit);
6522         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6523 }
6524
6525 #ifdef CONFIG_X86_64
6526 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6527 {
6528         struct kvm_segment seg;
6529         int offset;
6530         u16 flags;
6531
6532         kvm_get_segment(vcpu, &seg, n);
6533         offset = 0x7e00 + n * 16;
6534
6535         flags = enter_smm_get_segment_flags(&seg) >> 8;
6536         put_smstate(u16, buf, offset, seg.selector);
6537         put_smstate(u16, buf, offset + 2, flags);
6538         put_smstate(u32, buf, offset + 4, seg.limit);
6539         put_smstate(u64, buf, offset + 8, seg.base);
6540 }
6541 #endif
6542
6543 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6544 {
6545         struct desc_ptr dt;
6546         struct kvm_segment seg;
6547         unsigned long val;
6548         int i;
6549
6550         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6551         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6552         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6553         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6554
6555         for (i = 0; i < 8; i++)
6556                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6557
6558         kvm_get_dr(vcpu, 6, &val);
6559         put_smstate(u32, buf, 0x7fcc, (u32)val);
6560         kvm_get_dr(vcpu, 7, &val);
6561         put_smstate(u32, buf, 0x7fc8, (u32)val);
6562
6563         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6564         put_smstate(u32, buf, 0x7fc4, seg.selector);
6565         put_smstate(u32, buf, 0x7f64, seg.base);
6566         put_smstate(u32, buf, 0x7f60, seg.limit);
6567         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6568
6569         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6570         put_smstate(u32, buf, 0x7fc0, seg.selector);
6571         put_smstate(u32, buf, 0x7f80, seg.base);
6572         put_smstate(u32, buf, 0x7f7c, seg.limit);
6573         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6574
6575         kvm_x86_ops->get_gdt(vcpu, &dt);
6576         put_smstate(u32, buf, 0x7f74, dt.address);
6577         put_smstate(u32, buf, 0x7f70, dt.size);
6578
6579         kvm_x86_ops->get_idt(vcpu, &dt);
6580         put_smstate(u32, buf, 0x7f58, dt.address);
6581         put_smstate(u32, buf, 0x7f54, dt.size);
6582
6583         for (i = 0; i < 6; i++)
6584                 enter_smm_save_seg_32(vcpu, buf, i);
6585
6586         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6587
6588         /* revision id */
6589         put_smstate(u32, buf, 0x7efc, 0x00020000);
6590         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6591 }
6592
6593 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6594 {
6595 #ifdef CONFIG_X86_64
6596         struct desc_ptr dt;
6597         struct kvm_segment seg;
6598         unsigned long val;
6599         int i;
6600
6601         for (i = 0; i < 16; i++)
6602                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6603
6604         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6605         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6606
6607         kvm_get_dr(vcpu, 6, &val);
6608         put_smstate(u64, buf, 0x7f68, val);
6609         kvm_get_dr(vcpu, 7, &val);
6610         put_smstate(u64, buf, 0x7f60, val);
6611
6612         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6613         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6614         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6615
6616         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6617
6618         /* revision id */
6619         put_smstate(u32, buf, 0x7efc, 0x00020064);
6620
6621         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6622
6623         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6624         put_smstate(u16, buf, 0x7e90, seg.selector);
6625         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6626         put_smstate(u32, buf, 0x7e94, seg.limit);
6627         put_smstate(u64, buf, 0x7e98, seg.base);
6628
6629         kvm_x86_ops->get_idt(vcpu, &dt);
6630         put_smstate(u32, buf, 0x7e84, dt.size);
6631         put_smstate(u64, buf, 0x7e88, dt.address);
6632
6633         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6634         put_smstate(u16, buf, 0x7e70, seg.selector);
6635         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6636         put_smstate(u32, buf, 0x7e74, seg.limit);
6637         put_smstate(u64, buf, 0x7e78, seg.base);
6638
6639         kvm_x86_ops->get_gdt(vcpu, &dt);
6640         put_smstate(u32, buf, 0x7e64, dt.size);
6641         put_smstate(u64, buf, 0x7e68, dt.address);
6642
6643         for (i = 0; i < 6; i++)
6644                 enter_smm_save_seg_64(vcpu, buf, i);
6645 #else
6646         WARN_ON_ONCE(1);
6647 #endif
6648 }
6649
6650 static void enter_smm(struct kvm_vcpu *vcpu)
6651 {
6652         struct kvm_segment cs, ds;
6653         struct desc_ptr dt;
6654         char buf[512];
6655         u32 cr0;
6656
6657         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6658         memset(buf, 0, 512);
6659         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6660                 enter_smm_save_state_64(vcpu, buf);
6661         else
6662                 enter_smm_save_state_32(vcpu, buf);
6663
6664         /*
6665          * Give pre_enter_smm() a chance to make ISA-specific changes to the
6666          * vCPU state (e.g. leave guest mode) after we've saved the state into
6667          * the SMM state-save area.
6668          */
6669         kvm_x86_ops->pre_enter_smm(vcpu, buf);
6670
6671         vcpu->arch.hflags |= HF_SMM_MASK;
6672         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6673
6674         if (kvm_x86_ops->get_nmi_mask(vcpu))
6675                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6676         else
6677                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6678
6679         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6680         kvm_rip_write(vcpu, 0x8000);
6681
6682         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6683         kvm_x86_ops->set_cr0(vcpu, cr0);
6684         vcpu->arch.cr0 = cr0;
6685
6686         kvm_x86_ops->set_cr4(vcpu, 0);
6687
6688         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6689         dt.address = dt.size = 0;
6690         kvm_x86_ops->set_idt(vcpu, &dt);
6691
6692         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6693
6694         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6695         cs.base = vcpu->arch.smbase;
6696
6697         ds.selector = 0;
6698         ds.base = 0;
6699
6700         cs.limit    = ds.limit = 0xffffffff;
6701         cs.type     = ds.type = 0x3;
6702         cs.dpl      = ds.dpl = 0;
6703         cs.db       = ds.db = 0;
6704         cs.s        = ds.s = 1;
6705         cs.l        = ds.l = 0;
6706         cs.g        = ds.g = 1;
6707         cs.avl      = ds.avl = 0;
6708         cs.present  = ds.present = 1;
6709         cs.unusable = ds.unusable = 0;
6710         cs.padding  = ds.padding = 0;
6711
6712         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6713         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6714         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6715         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6716         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6717         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6718
6719         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6720                 kvm_x86_ops->set_efer(vcpu, 0);
6721
6722         kvm_update_cpuid(vcpu);
6723         kvm_mmu_reset_context(vcpu);
6724 }
6725
6726 static void process_smi(struct kvm_vcpu *vcpu)
6727 {
6728         vcpu->arch.smi_pending = true;
6729         kvm_make_request(KVM_REQ_EVENT, vcpu);
6730 }
6731
6732 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6733 {
6734         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6735 }
6736
6737 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6738 {
6739         u64 eoi_exit_bitmap[4];
6740
6741         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6742                 return;
6743
6744         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6745
6746         if (irqchip_split(vcpu->kvm))
6747                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6748         else {
6749                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6750                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6751                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6752         }
6753         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6754                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6755         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6756 }
6757
6758 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6759 {
6760         ++vcpu->stat.tlb_flush;
6761         kvm_x86_ops->tlb_flush(vcpu);
6762 }
6763
6764 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6765 {
6766         struct page *page = NULL;
6767
6768         if (!lapic_in_kernel(vcpu))
6769                 return;
6770
6771         if (!kvm_x86_ops->set_apic_access_page_addr)
6772                 return;
6773
6774         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6775         if (is_error_page(page))
6776                 return;
6777         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6778
6779         /*
6780          * Do not pin apic access page in memory, the MMU notifier
6781          * will call us again if it is migrated or swapped out.
6782          */
6783         put_page(page);
6784 }
6785 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6786
6787 /*
6788  * Returns 1 to let vcpu_run() continue the guest execution loop without
6789  * exiting to the userspace.  Otherwise, the value will be returned to the
6790  * userspace.
6791  */
6792 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6793 {
6794         int r;
6795         bool req_int_win =
6796                 dm_request_for_irq_injection(vcpu) &&
6797                 kvm_cpu_accept_dm_intr(vcpu);
6798
6799         bool req_immediate_exit = false;
6800
6801         if (kvm_request_pending(vcpu)) {
6802                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6803                         kvm_mmu_unload(vcpu);
6804                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6805                         __kvm_migrate_timers(vcpu);
6806                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6807                         kvm_gen_update_masterclock(vcpu->kvm);
6808                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6809                         kvm_gen_kvmclock_update(vcpu);
6810                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6811                         r = kvm_guest_time_update(vcpu);
6812                         if (unlikely(r))
6813                                 goto out;
6814                 }
6815                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6816                         kvm_mmu_sync_roots(vcpu);
6817                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6818                         kvm_vcpu_flush_tlb(vcpu);
6819                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6820                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6821                         r = 0;
6822                         goto out;
6823                 }
6824                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6825                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6826                         vcpu->mmio_needed = 0;
6827                         r = 0;
6828                         goto out;
6829                 }
6830                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6831                         /* Page is swapped out. Do synthetic halt */
6832                         vcpu->arch.apf.halted = true;
6833                         r = 1;
6834                         goto out;
6835                 }
6836                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6837                         record_steal_time(vcpu);
6838                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6839                         process_smi(vcpu);
6840                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6841                         process_nmi(vcpu);
6842                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6843                         kvm_pmu_handle_event(vcpu);
6844                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6845                         kvm_pmu_deliver_pmi(vcpu);
6846                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6847                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6848                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6849                                      vcpu->arch.ioapic_handled_vectors)) {
6850                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6851                                 vcpu->run->eoi.vector =
6852                                                 vcpu->arch.pending_ioapic_eoi;
6853                                 r = 0;
6854                                 goto out;
6855                         }
6856                 }
6857                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6858                         vcpu_scan_ioapic(vcpu);
6859                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6860                         kvm_vcpu_reload_apic_access_page(vcpu);
6861                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6862                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6863                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6864                         r = 0;
6865                         goto out;
6866                 }
6867                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6868                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6869                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6870                         r = 0;
6871                         goto out;
6872                 }
6873                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6874                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6875                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6876                         r = 0;
6877                         goto out;
6878                 }
6879
6880                 /*
6881                  * KVM_REQ_HV_STIMER has to be processed after
6882                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6883                  * depend on the guest clock being up-to-date
6884                  */
6885                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6886                         kvm_hv_process_stimers(vcpu);
6887         }
6888
6889         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6890                 ++vcpu->stat.req_event;
6891                 kvm_apic_accept_events(vcpu);
6892                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6893                         r = 1;
6894                         goto out;
6895                 }
6896
6897                 if (inject_pending_event(vcpu, req_int_win) != 0)
6898                         req_immediate_exit = true;
6899                 else {
6900                         /* Enable SMI/NMI/IRQ window open exits if needed.
6901                          *
6902                          * SMIs have three cases:
6903                          * 1) They can be nested, and then there is nothing to
6904                          *    do here because RSM will cause a vmexit anyway.
6905                          * 2) There is an ISA-specific reason why SMI cannot be
6906                          *    injected, and the moment when this changes can be
6907                          *    intercepted.
6908                          * 3) Or the SMI can be pending because
6909                          *    inject_pending_event has completed the injection
6910                          *    of an IRQ or NMI from the previous vmexit, and
6911                          *    then we request an immediate exit to inject the
6912                          *    SMI.
6913                          */
6914                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6915                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
6916                                         req_immediate_exit = true;
6917                         if (vcpu->arch.nmi_pending)
6918                                 kvm_x86_ops->enable_nmi_window(vcpu);
6919                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6920                                 kvm_x86_ops->enable_irq_window(vcpu);
6921                         WARN_ON(vcpu->arch.exception.pending);
6922                 }
6923
6924                 if (kvm_lapic_enabled(vcpu)) {
6925                         update_cr8_intercept(vcpu);
6926                         kvm_lapic_sync_to_vapic(vcpu);
6927                 }
6928         }
6929
6930         r = kvm_mmu_reload(vcpu);
6931         if (unlikely(r)) {
6932                 goto cancel_injection;
6933         }
6934
6935         preempt_disable();
6936
6937         kvm_x86_ops->prepare_guest_switch(vcpu);
6938         kvm_load_guest_fpu(vcpu);
6939
6940         /*
6941          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6942          * IPI are then delayed after guest entry, which ensures that they
6943          * result in virtual interrupt delivery.
6944          */
6945         local_irq_disable();
6946         vcpu->mode = IN_GUEST_MODE;
6947
6948         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6949
6950         /*
6951          * 1) We should set ->mode before checking ->requests.  Please see
6952          * the comment in kvm_vcpu_exiting_guest_mode().
6953          *
6954          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6955          * pairs with the memory barrier implicit in pi_test_and_set_on
6956          * (see vmx_deliver_posted_interrupt).
6957          *
6958          * 3) This also orders the write to mode from any reads to the page
6959          * tables done while the VCPU is running.  Please see the comment
6960          * in kvm_flush_remote_tlbs.
6961          */
6962         smp_mb__after_srcu_read_unlock();
6963
6964         /*
6965          * This handles the case where a posted interrupt was
6966          * notified with kvm_vcpu_kick.
6967          */
6968         if (kvm_lapic_enabled(vcpu)) {
6969                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6970                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6971         }
6972
6973         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
6974             || need_resched() || signal_pending(current)) {
6975                 vcpu->mode = OUTSIDE_GUEST_MODE;
6976                 smp_wmb();
6977                 local_irq_enable();
6978                 preempt_enable();
6979                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6980                 r = 1;
6981                 goto cancel_injection;
6982         }
6983
6984         kvm_load_guest_xcr0(vcpu);
6985
6986         if (req_immediate_exit) {
6987                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6988                 smp_send_reschedule(vcpu->cpu);
6989         }
6990
6991         trace_kvm_entry(vcpu->vcpu_id);
6992         wait_lapic_expire(vcpu);
6993         guest_enter_irqoff();
6994
6995         if (unlikely(vcpu->arch.switch_db_regs)) {
6996                 set_debugreg(0, 7);
6997                 set_debugreg(vcpu->arch.eff_db[0], 0);
6998                 set_debugreg(vcpu->arch.eff_db[1], 1);
6999                 set_debugreg(vcpu->arch.eff_db[2], 2);
7000                 set_debugreg(vcpu->arch.eff_db[3], 3);
7001                 set_debugreg(vcpu->arch.dr6, 6);
7002                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7003         }
7004
7005         kvm_x86_ops->run(vcpu);
7006
7007         /*
7008          * Do this here before restoring debug registers on the host.  And
7009          * since we do this before handling the vmexit, a DR access vmexit
7010          * can (a) read the correct value of the debug registers, (b) set
7011          * KVM_DEBUGREG_WONT_EXIT again.
7012          */
7013         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7014                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7015                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7016                 kvm_update_dr0123(vcpu);
7017                 kvm_update_dr6(vcpu);
7018                 kvm_update_dr7(vcpu);
7019                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7020         }
7021
7022         /*
7023          * If the guest has used debug registers, at least dr7
7024          * will be disabled while returning to the host.
7025          * If we don't have active breakpoints in the host, we don't
7026          * care about the messed up debug address registers. But if
7027          * we have some of them active, restore the old state.
7028          */
7029         if (hw_breakpoint_active())
7030                 hw_breakpoint_restore();
7031
7032         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7033
7034         vcpu->mode = OUTSIDE_GUEST_MODE;
7035         smp_wmb();
7036
7037         kvm_put_guest_xcr0(vcpu);
7038
7039         kvm_x86_ops->handle_external_intr(vcpu);
7040
7041         ++vcpu->stat.exits;
7042
7043         guest_exit_irqoff();
7044
7045         local_irq_enable();
7046         preempt_enable();
7047
7048         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7049
7050         /*
7051          * Profile KVM exit RIPs:
7052          */
7053         if (unlikely(prof_on == KVM_PROFILING)) {
7054                 unsigned long rip = kvm_rip_read(vcpu);
7055                 profile_hit(KVM_PROFILING, (void *)rip);
7056         }
7057
7058         if (unlikely(vcpu->arch.tsc_always_catchup))
7059                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7060
7061         if (vcpu->arch.apic_attention)
7062                 kvm_lapic_sync_from_vapic(vcpu);
7063
7064         vcpu->arch.gpa_available = false;
7065         r = kvm_x86_ops->handle_exit(vcpu);
7066         return r;
7067
7068 cancel_injection:
7069         kvm_x86_ops->cancel_injection(vcpu);
7070         if (unlikely(vcpu->arch.apic_attention))
7071                 kvm_lapic_sync_from_vapic(vcpu);
7072 out:
7073         return r;
7074 }
7075
7076 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7077 {
7078         if (!kvm_arch_vcpu_runnable(vcpu) &&
7079             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7080                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7081                 kvm_vcpu_block(vcpu);
7082                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7083
7084                 if (kvm_x86_ops->post_block)
7085                         kvm_x86_ops->post_block(vcpu);
7086
7087                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7088                         return 1;
7089         }
7090
7091         kvm_apic_accept_events(vcpu);
7092         switch(vcpu->arch.mp_state) {
7093         case KVM_MP_STATE_HALTED:
7094                 vcpu->arch.pv.pv_unhalted = false;
7095                 vcpu->arch.mp_state =
7096                         KVM_MP_STATE_RUNNABLE;
7097         case KVM_MP_STATE_RUNNABLE:
7098                 vcpu->arch.apf.halted = false;
7099                 break;
7100         case KVM_MP_STATE_INIT_RECEIVED:
7101                 break;
7102         default:
7103                 return -EINTR;
7104                 break;
7105         }
7106         return 1;
7107 }
7108
7109 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7110 {
7111         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7112                 kvm_x86_ops->check_nested_events(vcpu, false);
7113
7114         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7115                 !vcpu->arch.apf.halted);
7116 }
7117
7118 static int vcpu_run(struct kvm_vcpu *vcpu)
7119 {
7120         int r;
7121         struct kvm *kvm = vcpu->kvm;
7122
7123         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7124
7125         for (;;) {
7126                 if (kvm_vcpu_running(vcpu)) {
7127                         r = vcpu_enter_guest(vcpu);
7128                 } else {
7129                         r = vcpu_block(kvm, vcpu);
7130                 }
7131
7132                 if (r <= 0)
7133                         break;
7134
7135                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7136                 if (kvm_cpu_has_pending_timer(vcpu))
7137                         kvm_inject_pending_timer_irqs(vcpu);
7138
7139                 if (dm_request_for_irq_injection(vcpu) &&
7140                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7141                         r = 0;
7142                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7143                         ++vcpu->stat.request_irq_exits;
7144                         break;
7145                 }
7146
7147                 kvm_check_async_pf_completion(vcpu);
7148
7149                 if (signal_pending(current)) {
7150                         r = -EINTR;
7151                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7152                         ++vcpu->stat.signal_exits;
7153                         break;
7154                 }
7155                 if (need_resched()) {
7156                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7157                         cond_resched();
7158                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7159                 }
7160         }
7161
7162         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7163
7164         return r;
7165 }
7166
7167 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7168 {
7169         int r;
7170         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7171         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7172         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7173         if (r != EMULATE_DONE)
7174                 return 0;
7175         return 1;
7176 }
7177
7178 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7179 {
7180         BUG_ON(!vcpu->arch.pio.count);
7181
7182         return complete_emulated_io(vcpu);
7183 }
7184
7185 /*
7186  * Implements the following, as a state machine:
7187  *
7188  * read:
7189  *   for each fragment
7190  *     for each mmio piece in the fragment
7191  *       write gpa, len
7192  *       exit
7193  *       copy data
7194  *   execute insn
7195  *
7196  * write:
7197  *   for each fragment
7198  *     for each mmio piece in the fragment
7199  *       write gpa, len
7200  *       copy data
7201  *       exit
7202  */
7203 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7204 {
7205         struct kvm_run *run = vcpu->run;
7206         struct kvm_mmio_fragment *frag;
7207         unsigned len;
7208
7209         BUG_ON(!vcpu->mmio_needed);
7210
7211         /* Complete previous fragment */
7212         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7213         len = min(8u, frag->len);
7214         if (!vcpu->mmio_is_write)
7215                 memcpy(frag->data, run->mmio.data, len);
7216
7217         if (frag->len <= 8) {
7218                 /* Switch to the next fragment. */
7219                 frag++;
7220                 vcpu->mmio_cur_fragment++;
7221         } else {
7222                 /* Go forward to the next mmio piece. */
7223                 frag->data += len;
7224                 frag->gpa += len;
7225                 frag->len -= len;
7226         }
7227
7228         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7229                 vcpu->mmio_needed = 0;
7230
7231                 /* FIXME: return into emulator if single-stepping.  */
7232                 if (vcpu->mmio_is_write)
7233                         return 1;
7234                 vcpu->mmio_read_completed = 1;
7235                 return complete_emulated_io(vcpu);
7236         }
7237
7238         run->exit_reason = KVM_EXIT_MMIO;
7239         run->mmio.phys_addr = frag->gpa;
7240         if (vcpu->mmio_is_write)
7241                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7242         run->mmio.len = min(8u, frag->len);
7243         run->mmio.is_write = vcpu->mmio_is_write;
7244         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7245         return 0;
7246 }
7247
7248
7249 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7250 {
7251         struct fpu *fpu = &current->thread.fpu;
7252         int r;
7253         sigset_t sigsaved;
7254
7255         fpu__initialize(fpu);
7256
7257         if (vcpu->sigset_active)
7258                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7259
7260         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7261                 if (kvm_run->immediate_exit) {
7262                         r = -EINTR;
7263                         goto out;
7264                 }
7265                 kvm_vcpu_block(vcpu);
7266                 kvm_apic_accept_events(vcpu);
7267                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7268                 r = -EAGAIN;
7269                 if (signal_pending(current)) {
7270                         r = -EINTR;
7271                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7272                         ++vcpu->stat.signal_exits;
7273                 }
7274                 goto out;
7275         }
7276
7277         /* re-sync apic's tpr */
7278         if (!lapic_in_kernel(vcpu)) {
7279                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7280                         r = -EINVAL;
7281                         goto out;
7282                 }
7283         }
7284
7285         if (unlikely(vcpu->arch.complete_userspace_io)) {
7286                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7287                 vcpu->arch.complete_userspace_io = NULL;
7288                 r = cui(vcpu);
7289                 if (r <= 0)
7290                         goto out;
7291         } else
7292                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7293
7294         if (kvm_run->immediate_exit)
7295                 r = -EINTR;
7296         else
7297                 r = vcpu_run(vcpu);
7298
7299 out:
7300         post_kvm_run_save(vcpu);
7301         if (vcpu->sigset_active)
7302                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7303
7304         return r;
7305 }
7306
7307 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7308 {
7309         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7310                 /*
7311                  * We are here if userspace calls get_regs() in the middle of
7312                  * instruction emulation. Registers state needs to be copied
7313                  * back from emulation context to vcpu. Userspace shouldn't do
7314                  * that usually, but some bad designed PV devices (vmware
7315                  * backdoor interface) need this to work
7316                  */
7317                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7318                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7319         }
7320         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7321         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7322         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7323         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7324         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7325         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7326         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7327         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7328 #ifdef CONFIG_X86_64
7329         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7330         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7331         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7332         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7333         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7334         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7335         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7336         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7337 #endif
7338
7339         regs->rip = kvm_rip_read(vcpu);
7340         regs->rflags = kvm_get_rflags(vcpu);
7341
7342         return 0;
7343 }
7344
7345 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7346 {
7347         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7348         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7349
7350         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7351         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7352         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7353         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7354         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7355         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7356         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7357         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7358 #ifdef CONFIG_X86_64
7359         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7360         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7361         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7362         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7363         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7364         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7365         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7366         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7367 #endif
7368
7369         kvm_rip_write(vcpu, regs->rip);
7370         kvm_set_rflags(vcpu, regs->rflags);
7371
7372         vcpu->arch.exception.pending = false;
7373
7374         kvm_make_request(KVM_REQ_EVENT, vcpu);
7375
7376         return 0;
7377 }
7378
7379 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7380 {
7381         struct kvm_segment cs;
7382
7383         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7384         *db = cs.db;
7385         *l = cs.l;
7386 }
7387 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7388
7389 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7390                                   struct kvm_sregs *sregs)
7391 {
7392         struct desc_ptr dt;
7393
7394         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7395         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7396         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7397         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7398         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7399         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7400
7401         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7402         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7403
7404         kvm_x86_ops->get_idt(vcpu, &dt);
7405         sregs->idt.limit = dt.size;
7406         sregs->idt.base = dt.address;
7407         kvm_x86_ops->get_gdt(vcpu, &dt);
7408         sregs->gdt.limit = dt.size;
7409         sregs->gdt.base = dt.address;
7410
7411         sregs->cr0 = kvm_read_cr0(vcpu);
7412         sregs->cr2 = vcpu->arch.cr2;
7413         sregs->cr3 = kvm_read_cr3(vcpu);
7414         sregs->cr4 = kvm_read_cr4(vcpu);
7415         sregs->cr8 = kvm_get_cr8(vcpu);
7416         sregs->efer = vcpu->arch.efer;
7417         sregs->apic_base = kvm_get_apic_base(vcpu);
7418
7419         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7420
7421         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7422                 set_bit(vcpu->arch.interrupt.nr,
7423                         (unsigned long *)sregs->interrupt_bitmap);
7424
7425         return 0;
7426 }
7427
7428 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7429                                     struct kvm_mp_state *mp_state)
7430 {
7431         kvm_apic_accept_events(vcpu);
7432         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7433                                         vcpu->arch.pv.pv_unhalted)
7434                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7435         else
7436                 mp_state->mp_state = vcpu->arch.mp_state;
7437
7438         return 0;
7439 }
7440
7441 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7442                                     struct kvm_mp_state *mp_state)
7443 {
7444         if (!lapic_in_kernel(vcpu) &&
7445             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7446                 return -EINVAL;
7447
7448         /* INITs are latched while in SMM */
7449         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7450             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7451              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7452                 return -EINVAL;
7453
7454         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7455                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7456                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7457         } else
7458                 vcpu->arch.mp_state = mp_state->mp_state;
7459         kvm_make_request(KVM_REQ_EVENT, vcpu);
7460         return 0;
7461 }
7462
7463 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7464                     int reason, bool has_error_code, u32 error_code)
7465 {
7466         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7467         int ret;
7468
7469         init_emulate_ctxt(vcpu);
7470
7471         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7472                                    has_error_code, error_code);
7473
7474         if (ret)
7475                 return EMULATE_FAIL;
7476
7477         kvm_rip_write(vcpu, ctxt->eip);
7478         kvm_set_rflags(vcpu, ctxt->eflags);
7479         kvm_make_request(KVM_REQ_EVENT, vcpu);
7480         return EMULATE_DONE;
7481 }
7482 EXPORT_SYMBOL_GPL(kvm_task_switch);
7483
7484 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7485                                   struct kvm_sregs *sregs)
7486 {
7487         struct msr_data apic_base_msr;
7488         int mmu_reset_needed = 0;
7489         int pending_vec, max_bits, idx;
7490         struct desc_ptr dt;
7491
7492         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7493                         (sregs->cr4 & X86_CR4_OSXSAVE))
7494                 return -EINVAL;
7495
7496         apic_base_msr.data = sregs->apic_base;
7497         apic_base_msr.host_initiated = true;
7498         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7499                 return -EINVAL;
7500
7501         dt.size = sregs->idt.limit;
7502         dt.address = sregs->idt.base;
7503         kvm_x86_ops->set_idt(vcpu, &dt);
7504         dt.size = sregs->gdt.limit;
7505         dt.address = sregs->gdt.base;
7506         kvm_x86_ops->set_gdt(vcpu, &dt);
7507
7508         vcpu->arch.cr2 = sregs->cr2;
7509         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7510         vcpu->arch.cr3 = sregs->cr3;
7511         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7512
7513         kvm_set_cr8(vcpu, sregs->cr8);
7514
7515         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7516         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7517
7518         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7519         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7520         vcpu->arch.cr0 = sregs->cr0;
7521
7522         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7523         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7524         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7525                 kvm_update_cpuid(vcpu);
7526
7527         idx = srcu_read_lock(&vcpu->kvm->srcu);
7528         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7529                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7530                 mmu_reset_needed = 1;
7531         }
7532         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7533
7534         if (mmu_reset_needed)
7535                 kvm_mmu_reset_context(vcpu);
7536
7537         max_bits = KVM_NR_INTERRUPTS;
7538         pending_vec = find_first_bit(
7539                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7540         if (pending_vec < max_bits) {
7541                 kvm_queue_interrupt(vcpu, pending_vec, false);
7542                 pr_debug("Set back pending irq %d\n", pending_vec);
7543         }
7544
7545         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7546         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7547         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7548         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7549         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7550         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7551
7552         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7553         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7554
7555         update_cr8_intercept(vcpu);
7556
7557         /* Older userspace won't unhalt the vcpu on reset. */
7558         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7559             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7560             !is_protmode(vcpu))
7561                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7562
7563         kvm_make_request(KVM_REQ_EVENT, vcpu);
7564
7565         return 0;
7566 }
7567
7568 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7569                                         struct kvm_guest_debug *dbg)
7570 {
7571         unsigned long rflags;
7572         int i, r;
7573
7574         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7575                 r = -EBUSY;
7576                 if (vcpu->arch.exception.pending)
7577                         goto out;
7578                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7579                         kvm_queue_exception(vcpu, DB_VECTOR);
7580                 else
7581                         kvm_queue_exception(vcpu, BP_VECTOR);
7582         }
7583
7584         /*
7585          * Read rflags as long as potentially injected trace flags are still
7586          * filtered out.
7587          */
7588         rflags = kvm_get_rflags(vcpu);
7589
7590         vcpu->guest_debug = dbg->control;
7591         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7592                 vcpu->guest_debug = 0;
7593
7594         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7595                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7596                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7597                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7598         } else {
7599                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7600                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7601         }
7602         kvm_update_dr7(vcpu);
7603
7604         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7605                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7606                         get_segment_base(vcpu, VCPU_SREG_CS);
7607
7608         /*
7609          * Trigger an rflags update that will inject or remove the trace
7610          * flags.
7611          */
7612         kvm_set_rflags(vcpu, rflags);
7613
7614         kvm_x86_ops->update_bp_intercept(vcpu);
7615
7616         r = 0;
7617
7618 out:
7619
7620         return r;
7621 }
7622
7623 /*
7624  * Translate a guest virtual address to a guest physical address.
7625  */
7626 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7627                                     struct kvm_translation *tr)
7628 {
7629         unsigned long vaddr = tr->linear_address;
7630         gpa_t gpa;
7631         int idx;
7632
7633         idx = srcu_read_lock(&vcpu->kvm->srcu);
7634         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7635         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7636         tr->physical_address = gpa;
7637         tr->valid = gpa != UNMAPPED_GVA;
7638         tr->writeable = 1;
7639         tr->usermode = 0;
7640
7641         return 0;
7642 }
7643
7644 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7645 {
7646         struct fxregs_state *fxsave =
7647                         &vcpu->arch.guest_fpu.state.fxsave;
7648
7649         memcpy(fpu->fpr, fxsave->st_space, 128);
7650         fpu->fcw = fxsave->cwd;
7651         fpu->fsw = fxsave->swd;
7652         fpu->ftwx = fxsave->twd;
7653         fpu->last_opcode = fxsave->fop;
7654         fpu->last_ip = fxsave->rip;
7655         fpu->last_dp = fxsave->rdp;
7656         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7657
7658         return 0;
7659 }
7660
7661 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7662 {
7663         struct fxregs_state *fxsave =
7664                         &vcpu->arch.guest_fpu.state.fxsave;
7665
7666         memcpy(fxsave->st_space, fpu->fpr, 128);
7667         fxsave->cwd = fpu->fcw;
7668         fxsave->swd = fpu->fsw;
7669         fxsave->twd = fpu->ftwx;
7670         fxsave->fop = fpu->last_opcode;
7671         fxsave->rip = fpu->last_ip;
7672         fxsave->rdp = fpu->last_dp;
7673         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7674
7675         return 0;
7676 }
7677
7678 static void fx_init(struct kvm_vcpu *vcpu)
7679 {
7680         fpstate_init(&vcpu->arch.guest_fpu.state);
7681         if (boot_cpu_has(X86_FEATURE_XSAVES))
7682                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7683                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7684
7685         /*
7686          * Ensure guest xcr0 is valid for loading
7687          */
7688         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7689
7690         vcpu->arch.cr0 |= X86_CR0_ET;
7691 }
7692
7693 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7694 {
7695         if (vcpu->guest_fpu_loaded)
7696                 return;
7697
7698         /*
7699          * Restore all possible states in the guest,
7700          * and assume host would use all available bits.
7701          * Guest xcr0 would be loaded later.
7702          */
7703         vcpu->guest_fpu_loaded = 1;
7704         __kernel_fpu_begin();
7705         /* PKRU is separately restored in kvm_x86_ops->run.  */
7706         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7707                                 ~XFEATURE_MASK_PKRU);
7708         trace_kvm_fpu(1);
7709 }
7710
7711 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7712 {
7713         if (!vcpu->guest_fpu_loaded)
7714                 return;
7715
7716         vcpu->guest_fpu_loaded = 0;
7717         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7718         __kernel_fpu_end();
7719         ++vcpu->stat.fpu_reload;
7720         trace_kvm_fpu(0);
7721 }
7722
7723 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7724 {
7725         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7726
7727         kvmclock_reset(vcpu);
7728
7729         kvm_x86_ops->vcpu_free(vcpu);
7730         free_cpumask_var(wbinvd_dirty_mask);
7731 }
7732
7733 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7734                                                 unsigned int id)
7735 {
7736         struct kvm_vcpu *vcpu;
7737
7738         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7739                 printk_once(KERN_WARNING
7740                 "kvm: SMP vm created on host with unstable TSC; "
7741                 "guest TSC will not be reliable\n");
7742
7743         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7744
7745         return vcpu;
7746 }
7747
7748 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7749 {
7750         int r;
7751
7752         kvm_vcpu_mtrr_init(vcpu);
7753         r = vcpu_load(vcpu);
7754         if (r)
7755                 return r;
7756         kvm_vcpu_reset(vcpu, false);
7757         kvm_mmu_setup(vcpu);
7758         vcpu_put(vcpu);
7759         return r;
7760 }
7761
7762 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7763 {
7764         struct msr_data msr;
7765         struct kvm *kvm = vcpu->kvm;
7766
7767         kvm_hv_vcpu_postcreate(vcpu);
7768
7769         if (vcpu_load(vcpu))
7770                 return;
7771         msr.data = 0x0;
7772         msr.index = MSR_IA32_TSC;
7773         msr.host_initiated = true;
7774         kvm_write_tsc(vcpu, &msr);
7775         vcpu_put(vcpu);
7776
7777         if (!kvmclock_periodic_sync)
7778                 return;
7779
7780         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7781                                         KVMCLOCK_SYNC_PERIOD);
7782 }
7783
7784 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7785 {
7786         int r;
7787         vcpu->arch.apf.msr_val = 0;
7788
7789         r = vcpu_load(vcpu);
7790         BUG_ON(r);
7791         kvm_mmu_unload(vcpu);
7792         vcpu_put(vcpu);
7793
7794         kvm_x86_ops->vcpu_free(vcpu);
7795 }
7796
7797 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7798 {
7799         vcpu->arch.hflags = 0;
7800
7801         vcpu->arch.smi_pending = 0;
7802         atomic_set(&vcpu->arch.nmi_queued, 0);
7803         vcpu->arch.nmi_pending = 0;
7804         vcpu->arch.nmi_injected = false;
7805         kvm_clear_interrupt_queue(vcpu);
7806         kvm_clear_exception_queue(vcpu);
7807         vcpu->arch.exception.pending = false;
7808
7809         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7810         kvm_update_dr0123(vcpu);
7811         vcpu->arch.dr6 = DR6_INIT;
7812         kvm_update_dr6(vcpu);
7813         vcpu->arch.dr7 = DR7_FIXED_1;
7814         kvm_update_dr7(vcpu);
7815
7816         vcpu->arch.cr2 = 0;
7817
7818         kvm_make_request(KVM_REQ_EVENT, vcpu);
7819         vcpu->arch.apf.msr_val = 0;
7820         vcpu->arch.st.msr_val = 0;
7821
7822         kvmclock_reset(vcpu);
7823
7824         kvm_clear_async_pf_completion_queue(vcpu);
7825         kvm_async_pf_hash_reset(vcpu);
7826         vcpu->arch.apf.halted = false;
7827
7828         if (kvm_mpx_supported()) {
7829                 void *mpx_state_buffer;
7830
7831                 /*
7832                  * To avoid have the INIT path from kvm_apic_has_events() that be
7833                  * called with loaded FPU and does not let userspace fix the state.
7834                  */
7835                 kvm_put_guest_fpu(vcpu);
7836                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7837                                         XFEATURE_MASK_BNDREGS);
7838                 if (mpx_state_buffer)
7839                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
7840                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7841                                         XFEATURE_MASK_BNDCSR);
7842                 if (mpx_state_buffer)
7843                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
7844         }
7845
7846         if (!init_event) {
7847                 kvm_pmu_reset(vcpu);
7848                 vcpu->arch.smbase = 0x30000;
7849
7850                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7851                 vcpu->arch.msr_misc_features_enables = 0;
7852
7853                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7854         }
7855
7856         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7857         vcpu->arch.regs_avail = ~0;
7858         vcpu->arch.regs_dirty = ~0;
7859
7860         vcpu->arch.ia32_xss = 0;
7861
7862         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7863 }
7864
7865 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7866 {
7867         struct kvm_segment cs;
7868
7869         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7870         cs.selector = vector << 8;
7871         cs.base = vector << 12;
7872         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7873         kvm_rip_write(vcpu, 0);
7874 }
7875
7876 int kvm_arch_hardware_enable(void)
7877 {
7878         struct kvm *kvm;
7879         struct kvm_vcpu *vcpu;
7880         int i;
7881         int ret;
7882         u64 local_tsc;
7883         u64 max_tsc = 0;
7884         bool stable, backwards_tsc = false;
7885
7886         kvm_shared_msr_cpu_online();
7887         ret = kvm_x86_ops->hardware_enable();
7888         if (ret != 0)
7889                 return ret;
7890
7891         local_tsc = rdtsc();
7892         stable = !check_tsc_unstable();
7893         list_for_each_entry(kvm, &vm_list, vm_list) {
7894                 kvm_for_each_vcpu(i, vcpu, kvm) {
7895                         if (!stable && vcpu->cpu == smp_processor_id())
7896                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7897                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7898                                 backwards_tsc = true;
7899                                 if (vcpu->arch.last_host_tsc > max_tsc)
7900                                         max_tsc = vcpu->arch.last_host_tsc;
7901                         }
7902                 }
7903         }
7904
7905         /*
7906          * Sometimes, even reliable TSCs go backwards.  This happens on
7907          * platforms that reset TSC during suspend or hibernate actions, but
7908          * maintain synchronization.  We must compensate.  Fortunately, we can
7909          * detect that condition here, which happens early in CPU bringup,
7910          * before any KVM threads can be running.  Unfortunately, we can't
7911          * bring the TSCs fully up to date with real time, as we aren't yet far
7912          * enough into CPU bringup that we know how much real time has actually
7913          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7914          * variables that haven't been updated yet.
7915          *
7916          * So we simply find the maximum observed TSC above, then record the
7917          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7918          * the adjustment will be applied.  Note that we accumulate
7919          * adjustments, in case multiple suspend cycles happen before some VCPU
7920          * gets a chance to run again.  In the event that no KVM threads get a
7921          * chance to run, we will miss the entire elapsed period, as we'll have
7922          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7923          * loose cycle time.  This isn't too big a deal, since the loss will be
7924          * uniform across all VCPUs (not to mention the scenario is extremely
7925          * unlikely). It is possible that a second hibernate recovery happens
7926          * much faster than a first, causing the observed TSC here to be
7927          * smaller; this would require additional padding adjustment, which is
7928          * why we set last_host_tsc to the local tsc observed here.
7929          *
7930          * N.B. - this code below runs only on platforms with reliable TSC,
7931          * as that is the only way backwards_tsc is set above.  Also note
7932          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7933          * have the same delta_cyc adjustment applied if backwards_tsc
7934          * is detected.  Note further, this adjustment is only done once,
7935          * as we reset last_host_tsc on all VCPUs to stop this from being
7936          * called multiple times (one for each physical CPU bringup).
7937          *
7938          * Platforms with unreliable TSCs don't have to deal with this, they
7939          * will be compensated by the logic in vcpu_load, which sets the TSC to
7940          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7941          * guarantee that they stay in perfect synchronization.
7942          */
7943         if (backwards_tsc) {
7944                 u64 delta_cyc = max_tsc - local_tsc;
7945                 list_for_each_entry(kvm, &vm_list, vm_list) {
7946                         kvm->arch.backwards_tsc_observed = true;
7947                         kvm_for_each_vcpu(i, vcpu, kvm) {
7948                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7949                                 vcpu->arch.last_host_tsc = local_tsc;
7950                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7951                         }
7952
7953                         /*
7954                          * We have to disable TSC offset matching.. if you were
7955                          * booting a VM while issuing an S4 host suspend....
7956                          * you may have some problem.  Solving this issue is
7957                          * left as an exercise to the reader.
7958                          */
7959                         kvm->arch.last_tsc_nsec = 0;
7960                         kvm->arch.last_tsc_write = 0;
7961                 }
7962
7963         }
7964         return 0;
7965 }
7966
7967 void kvm_arch_hardware_disable(void)
7968 {
7969         kvm_x86_ops->hardware_disable();
7970         drop_user_return_notifiers();
7971 }
7972
7973 int kvm_arch_hardware_setup(void)
7974 {
7975         int r;
7976
7977         r = kvm_x86_ops->hardware_setup();
7978         if (r != 0)
7979                 return r;
7980
7981         if (kvm_has_tsc_control) {
7982                 /*
7983                  * Make sure the user can only configure tsc_khz values that
7984                  * fit into a signed integer.
7985                  * A min value is not calculated needed because it will always
7986                  * be 1 on all machines.
7987                  */
7988                 u64 max = min(0x7fffffffULL,
7989                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7990                 kvm_max_guest_tsc_khz = max;
7991
7992                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7993         }
7994
7995         kvm_init_msr_list();
7996         return 0;
7997 }
7998
7999 void kvm_arch_hardware_unsetup(void)
8000 {
8001         kvm_x86_ops->hardware_unsetup();
8002 }
8003
8004 void kvm_arch_check_processor_compat(void *rtn)
8005 {
8006         kvm_x86_ops->check_processor_compatibility(rtn);
8007 }
8008
8009 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8010 {
8011         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8012 }
8013 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8014
8015 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8016 {
8017         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8018 }
8019
8020 struct static_key kvm_no_apic_vcpu __read_mostly;
8021 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8022
8023 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8024 {
8025         struct page *page;
8026         int r;
8027
8028         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8029         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8030         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8031                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8032         else
8033                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8034
8035         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8036         if (!page) {
8037                 r = -ENOMEM;
8038                 goto fail;
8039         }
8040         vcpu->arch.pio_data = page_address(page);
8041
8042         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8043
8044         r = kvm_mmu_create(vcpu);
8045         if (r < 0)
8046                 goto fail_free_pio_data;
8047
8048         if (irqchip_in_kernel(vcpu->kvm)) {
8049                 r = kvm_create_lapic(vcpu);
8050                 if (r < 0)
8051                         goto fail_mmu_destroy;
8052         } else
8053                 static_key_slow_inc(&kvm_no_apic_vcpu);
8054
8055         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8056                                        GFP_KERNEL);
8057         if (!vcpu->arch.mce_banks) {
8058                 r = -ENOMEM;
8059                 goto fail_free_lapic;
8060         }
8061         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8062
8063         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8064                 r = -ENOMEM;
8065                 goto fail_free_mce_banks;
8066         }
8067
8068         fx_init(vcpu);
8069
8070         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8071
8072         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8073
8074         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8075
8076         kvm_async_pf_hash_reset(vcpu);
8077         kvm_pmu_init(vcpu);
8078
8079         vcpu->arch.pending_external_vector = -1;
8080         vcpu->arch.preempted_in_kernel = false;
8081
8082         kvm_hv_vcpu_init(vcpu);
8083
8084         return 0;
8085
8086 fail_free_mce_banks:
8087         kfree(vcpu->arch.mce_banks);
8088 fail_free_lapic:
8089         kvm_free_lapic(vcpu);
8090 fail_mmu_destroy:
8091         kvm_mmu_destroy(vcpu);
8092 fail_free_pio_data:
8093         free_page((unsigned long)vcpu->arch.pio_data);
8094 fail:
8095         return r;
8096 }
8097
8098 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8099 {
8100         int idx;
8101
8102         kvm_hv_vcpu_uninit(vcpu);
8103         kvm_pmu_destroy(vcpu);
8104         kfree(vcpu->arch.mce_banks);
8105         kvm_free_lapic(vcpu);
8106         idx = srcu_read_lock(&vcpu->kvm->srcu);
8107         kvm_mmu_destroy(vcpu);
8108         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8109         free_page((unsigned long)vcpu->arch.pio_data);
8110         if (!lapic_in_kernel(vcpu))
8111                 static_key_slow_dec(&kvm_no_apic_vcpu);
8112 }
8113
8114 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8115 {
8116         kvm_x86_ops->sched_in(vcpu, cpu);
8117 }
8118
8119 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8120 {
8121         if (type)
8122                 return -EINVAL;
8123
8124         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8125         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8126         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8127         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8128         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8129
8130         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8131         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8132         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8133         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8134                 &kvm->arch.irq_sources_bitmap);
8135
8136         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8137         mutex_init(&kvm->arch.apic_map_lock);
8138         mutex_init(&kvm->arch.hyperv.hv_lock);
8139         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8140
8141         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8142         pvclock_update_vm_gtod_copy(kvm);
8143
8144         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8145         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8146
8147         kvm_page_track_init(kvm);
8148         kvm_mmu_init_vm(kvm);
8149
8150         if (kvm_x86_ops->vm_init)
8151                 return kvm_x86_ops->vm_init(kvm);
8152
8153         return 0;
8154 }
8155
8156 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8157 {
8158         int r;
8159         r = vcpu_load(vcpu);
8160         BUG_ON(r);
8161         kvm_mmu_unload(vcpu);
8162         vcpu_put(vcpu);
8163 }
8164
8165 static void kvm_free_vcpus(struct kvm *kvm)
8166 {
8167         unsigned int i;
8168         struct kvm_vcpu *vcpu;
8169
8170         /*
8171          * Unpin any mmu pages first.
8172          */
8173         kvm_for_each_vcpu(i, vcpu, kvm) {
8174                 kvm_clear_async_pf_completion_queue(vcpu);
8175                 kvm_unload_vcpu_mmu(vcpu);
8176         }
8177         kvm_for_each_vcpu(i, vcpu, kvm)
8178                 kvm_arch_vcpu_free(vcpu);
8179
8180         mutex_lock(&kvm->lock);
8181         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8182                 kvm->vcpus[i] = NULL;
8183
8184         atomic_set(&kvm->online_vcpus, 0);
8185         mutex_unlock(&kvm->lock);
8186 }
8187
8188 void kvm_arch_sync_events(struct kvm *kvm)
8189 {
8190         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8191         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8192         kvm_free_pit(kvm);
8193 }
8194
8195 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8196 {
8197         int i, r;
8198         unsigned long hva;
8199         struct kvm_memslots *slots = kvm_memslots(kvm);
8200         struct kvm_memory_slot *slot, old;
8201
8202         /* Called with kvm->slots_lock held.  */
8203         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8204                 return -EINVAL;
8205
8206         slot = id_to_memslot(slots, id);
8207         if (size) {
8208                 if (slot->npages)
8209                         return -EEXIST;
8210
8211                 /*
8212                  * MAP_SHARED to prevent internal slot pages from being moved
8213                  * by fork()/COW.
8214                  */
8215                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8216                               MAP_SHARED | MAP_ANONYMOUS, 0);
8217                 if (IS_ERR((void *)hva))
8218                         return PTR_ERR((void *)hva);
8219         } else {
8220                 if (!slot->npages)
8221                         return 0;
8222
8223                 hva = 0;
8224         }
8225
8226         old = *slot;
8227         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8228                 struct kvm_userspace_memory_region m;
8229
8230                 m.slot = id | (i << 16);
8231                 m.flags = 0;
8232                 m.guest_phys_addr = gpa;
8233                 m.userspace_addr = hva;
8234                 m.memory_size = size;
8235                 r = __kvm_set_memory_region(kvm, &m);
8236                 if (r < 0)
8237                         return r;
8238         }
8239
8240         if (!size) {
8241                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8242                 WARN_ON(r < 0);
8243         }
8244
8245         return 0;
8246 }
8247 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8248
8249 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8250 {
8251         int r;
8252
8253         mutex_lock(&kvm->slots_lock);
8254         r = __x86_set_memory_region(kvm, id, gpa, size);
8255         mutex_unlock(&kvm->slots_lock);
8256
8257         return r;
8258 }
8259 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8260
8261 void kvm_arch_destroy_vm(struct kvm *kvm)
8262 {
8263         if (current->mm == kvm->mm) {
8264                 /*
8265                  * Free memory regions allocated on behalf of userspace,
8266                  * unless the the memory map has changed due to process exit
8267                  * or fd copying.
8268                  */
8269                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8270                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8271                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8272         }
8273         if (kvm_x86_ops->vm_destroy)
8274                 kvm_x86_ops->vm_destroy(kvm);
8275         kvm_pic_destroy(kvm);
8276         kvm_ioapic_destroy(kvm);
8277         kvm_free_vcpus(kvm);
8278         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8279         kvm_mmu_uninit_vm(kvm);
8280         kvm_page_track_cleanup(kvm);
8281 }
8282
8283 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8284                            struct kvm_memory_slot *dont)
8285 {
8286         int i;
8287
8288         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8289                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8290                         kvfree(free->arch.rmap[i]);
8291                         free->arch.rmap[i] = NULL;
8292                 }
8293                 if (i == 0)
8294                         continue;
8295
8296                 if (!dont || free->arch.lpage_info[i - 1] !=
8297                              dont->arch.lpage_info[i - 1]) {
8298                         kvfree(free->arch.lpage_info[i - 1]);
8299                         free->arch.lpage_info[i - 1] = NULL;
8300                 }
8301         }
8302
8303         kvm_page_track_free_memslot(free, dont);
8304 }
8305
8306 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8307                             unsigned long npages)
8308 {
8309         int i;
8310
8311         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8312                 struct kvm_lpage_info *linfo;
8313                 unsigned long ugfn;
8314                 int lpages;
8315                 int level = i + 1;
8316
8317                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8318                                       slot->base_gfn, level) + 1;
8319
8320                 slot->arch.rmap[i] =
8321                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8322                 if (!slot->arch.rmap[i])
8323                         goto out_free;
8324                 if (i == 0)
8325                         continue;
8326
8327                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8328                 if (!linfo)
8329                         goto out_free;
8330
8331                 slot->arch.lpage_info[i - 1] = linfo;
8332
8333                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8334                         linfo[0].disallow_lpage = 1;
8335                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8336                         linfo[lpages - 1].disallow_lpage = 1;
8337                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8338                 /*
8339                  * If the gfn and userspace address are not aligned wrt each
8340                  * other, or if explicitly asked to, disable large page
8341                  * support for this slot
8342                  */
8343                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8344                     !kvm_largepages_enabled()) {
8345                         unsigned long j;
8346
8347                         for (j = 0; j < lpages; ++j)
8348                                 linfo[j].disallow_lpage = 1;
8349                 }
8350         }
8351
8352         if (kvm_page_track_create_memslot(slot, npages))
8353                 goto out_free;
8354
8355         return 0;
8356
8357 out_free:
8358         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8359                 kvfree(slot->arch.rmap[i]);
8360                 slot->arch.rmap[i] = NULL;
8361                 if (i == 0)
8362                         continue;
8363
8364                 kvfree(slot->arch.lpage_info[i - 1]);
8365                 slot->arch.lpage_info[i - 1] = NULL;
8366         }
8367         return -ENOMEM;
8368 }
8369
8370 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8371 {
8372         /*
8373          * memslots->generation has been incremented.
8374          * mmio generation may have reached its maximum value.
8375          */
8376         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8377 }
8378
8379 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8380                                 struct kvm_memory_slot *memslot,
8381                                 const struct kvm_userspace_memory_region *mem,
8382                                 enum kvm_mr_change change)
8383 {
8384         return 0;
8385 }
8386
8387 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8388                                      struct kvm_memory_slot *new)
8389 {
8390         /* Still write protect RO slot */
8391         if (new->flags & KVM_MEM_READONLY) {
8392                 kvm_mmu_slot_remove_write_access(kvm, new);
8393                 return;
8394         }
8395
8396         /*
8397          * Call kvm_x86_ops dirty logging hooks when they are valid.
8398          *
8399          * kvm_x86_ops->slot_disable_log_dirty is called when:
8400          *
8401          *  - KVM_MR_CREATE with dirty logging is disabled
8402          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8403          *
8404          * The reason is, in case of PML, we need to set D-bit for any slots
8405          * with dirty logging disabled in order to eliminate unnecessary GPA
8406          * logging in PML buffer (and potential PML buffer full VMEXT). This
8407          * guarantees leaving PML enabled during guest's lifetime won't have
8408          * any additonal overhead from PML when guest is running with dirty
8409          * logging disabled for memory slots.
8410          *
8411          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8412          * to dirty logging mode.
8413          *
8414          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8415          *
8416          * In case of write protect:
8417          *
8418          * Write protect all pages for dirty logging.
8419          *
8420          * All the sptes including the large sptes which point to this
8421          * slot are set to readonly. We can not create any new large
8422          * spte on this slot until the end of the logging.
8423          *
8424          * See the comments in fast_page_fault().
8425          */
8426         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8427                 if (kvm_x86_ops->slot_enable_log_dirty)
8428                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8429                 else
8430                         kvm_mmu_slot_remove_write_access(kvm, new);
8431         } else {
8432                 if (kvm_x86_ops->slot_disable_log_dirty)
8433                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8434         }
8435 }
8436
8437 void kvm_arch_commit_memory_region(struct kvm *kvm,
8438                                 const struct kvm_userspace_memory_region *mem,
8439                                 const struct kvm_memory_slot *old,
8440                                 const struct kvm_memory_slot *new,
8441                                 enum kvm_mr_change change)
8442 {
8443         int nr_mmu_pages = 0;
8444
8445         if (!kvm->arch.n_requested_mmu_pages)
8446                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8447
8448         if (nr_mmu_pages)
8449                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8450
8451         /*
8452          * Dirty logging tracks sptes in 4k granularity, meaning that large
8453          * sptes have to be split.  If live migration is successful, the guest
8454          * in the source machine will be destroyed and large sptes will be
8455          * created in the destination. However, if the guest continues to run
8456          * in the source machine (for example if live migration fails), small
8457          * sptes will remain around and cause bad performance.
8458          *
8459          * Scan sptes if dirty logging has been stopped, dropping those
8460          * which can be collapsed into a single large-page spte.  Later
8461          * page faults will create the large-page sptes.
8462          */
8463         if ((change != KVM_MR_DELETE) &&
8464                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8465                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8466                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8467
8468         /*
8469          * Set up write protection and/or dirty logging for the new slot.
8470          *
8471          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8472          * been zapped so no dirty logging staff is needed for old slot. For
8473          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8474          * new and it's also covered when dealing with the new slot.
8475          *
8476          * FIXME: const-ify all uses of struct kvm_memory_slot.
8477          */
8478         if (change != KVM_MR_DELETE)
8479                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8480 }
8481
8482 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8483 {
8484         kvm_mmu_invalidate_zap_all_pages(kvm);
8485 }
8486
8487 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8488                                    struct kvm_memory_slot *slot)
8489 {
8490         kvm_page_track_flush_slot(kvm, slot);
8491 }
8492
8493 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8494 {
8495         if (!list_empty_careful(&vcpu->async_pf.done))
8496                 return true;
8497
8498         if (kvm_apic_has_events(vcpu))
8499                 return true;
8500
8501         if (vcpu->arch.pv.pv_unhalted)
8502                 return true;
8503
8504         if (vcpu->arch.exception.pending)
8505                 return true;
8506
8507         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8508             (vcpu->arch.nmi_pending &&
8509              kvm_x86_ops->nmi_allowed(vcpu)))
8510                 return true;
8511
8512         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8513             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8514                 return true;
8515
8516         if (kvm_arch_interrupt_allowed(vcpu) &&
8517             kvm_cpu_has_interrupt(vcpu))
8518                 return true;
8519
8520         if (kvm_hv_has_stimer_pending(vcpu))
8521                 return true;
8522
8523         return false;
8524 }
8525
8526 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8527 {
8528         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8529 }
8530
8531 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8532 {
8533         return vcpu->arch.preempted_in_kernel;
8534 }
8535
8536 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8537 {
8538         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8539 }
8540
8541 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8542 {
8543         return kvm_x86_ops->interrupt_allowed(vcpu);
8544 }
8545
8546 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8547 {
8548         if (is_64_bit_mode(vcpu))
8549                 return kvm_rip_read(vcpu);
8550         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8551                      kvm_rip_read(vcpu));
8552 }
8553 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8554
8555 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8556 {
8557         return kvm_get_linear_rip(vcpu) == linear_rip;
8558 }
8559 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8560
8561 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8562 {
8563         unsigned long rflags;
8564
8565         rflags = kvm_x86_ops->get_rflags(vcpu);
8566         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8567                 rflags &= ~X86_EFLAGS_TF;
8568         return rflags;
8569 }
8570 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8571
8572 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8573 {
8574         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8575             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8576                 rflags |= X86_EFLAGS_TF;
8577         kvm_x86_ops->set_rflags(vcpu, rflags);
8578 }
8579
8580 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8581 {
8582         __kvm_set_rflags(vcpu, rflags);
8583         kvm_make_request(KVM_REQ_EVENT, vcpu);
8584 }
8585 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8586
8587 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8588 {
8589         int r;
8590
8591         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8592               work->wakeup_all)
8593                 return;
8594
8595         r = kvm_mmu_reload(vcpu);
8596         if (unlikely(r))
8597                 return;
8598
8599         if (!vcpu->arch.mmu.direct_map &&
8600               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8601                 return;
8602
8603         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8604 }
8605
8606 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8607 {
8608         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8609 }
8610
8611 static inline u32 kvm_async_pf_next_probe(u32 key)
8612 {
8613         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8614 }
8615
8616 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8617 {
8618         u32 key = kvm_async_pf_hash_fn(gfn);
8619
8620         while (vcpu->arch.apf.gfns[key] != ~0)
8621                 key = kvm_async_pf_next_probe(key);
8622
8623         vcpu->arch.apf.gfns[key] = gfn;
8624 }
8625
8626 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8627 {
8628         int i;
8629         u32 key = kvm_async_pf_hash_fn(gfn);
8630
8631         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8632                      (vcpu->arch.apf.gfns[key] != gfn &&
8633                       vcpu->arch.apf.gfns[key] != ~0); i++)
8634                 key = kvm_async_pf_next_probe(key);
8635
8636         return key;
8637 }
8638
8639 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8640 {
8641         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8642 }
8643
8644 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8645 {
8646         u32 i, j, k;
8647
8648         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8649         while (true) {
8650                 vcpu->arch.apf.gfns[i] = ~0;
8651                 do {
8652                         j = kvm_async_pf_next_probe(j);
8653                         if (vcpu->arch.apf.gfns[j] == ~0)
8654                                 return;
8655                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8656                         /*
8657                          * k lies cyclically in ]i,j]
8658                          * |    i.k.j |
8659                          * |....j i.k.| or  |.k..j i...|
8660                          */
8661                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8662                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8663                 i = j;
8664         }
8665 }
8666
8667 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8668 {
8669
8670         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8671                                       sizeof(val));
8672 }
8673
8674 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
8675 {
8676
8677         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
8678                                       sizeof(u32));
8679 }
8680
8681 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8682                                      struct kvm_async_pf *work)
8683 {
8684         struct x86_exception fault;
8685
8686         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8687         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8688
8689         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8690             (vcpu->arch.apf.send_user_only &&
8691              kvm_x86_ops->get_cpl(vcpu) == 0))
8692                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8693         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8694                 fault.vector = PF_VECTOR;
8695                 fault.error_code_valid = true;
8696                 fault.error_code = 0;
8697                 fault.nested_page_fault = false;
8698                 fault.address = work->arch.token;
8699                 fault.async_page_fault = true;
8700                 kvm_inject_page_fault(vcpu, &fault);
8701         }
8702 }
8703
8704 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8705                                  struct kvm_async_pf *work)
8706 {
8707         struct x86_exception fault;
8708         u32 val;
8709
8710         if (work->wakeup_all)
8711                 work->arch.token = ~0; /* broadcast wakeup */
8712         else
8713                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8714         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8715
8716         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
8717             !apf_get_user(vcpu, &val)) {
8718                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
8719                     vcpu->arch.exception.pending &&
8720                     vcpu->arch.exception.nr == PF_VECTOR &&
8721                     !apf_put_user(vcpu, 0)) {
8722                         vcpu->arch.exception.injected = false;
8723                         vcpu->arch.exception.pending = false;
8724                         vcpu->arch.exception.nr = 0;
8725                         vcpu->arch.exception.has_error_code = false;
8726                         vcpu->arch.exception.error_code = 0;
8727                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8728                         fault.vector = PF_VECTOR;
8729                         fault.error_code_valid = true;
8730                         fault.error_code = 0;
8731                         fault.nested_page_fault = false;
8732                         fault.address = work->arch.token;
8733                         fault.async_page_fault = true;
8734                         kvm_inject_page_fault(vcpu, &fault);
8735                 }
8736         }
8737         vcpu->arch.apf.halted = false;
8738         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8739 }
8740
8741 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8742 {
8743         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8744                 return true;
8745         else
8746                 return kvm_can_do_async_pf(vcpu);
8747 }
8748
8749 void kvm_arch_start_assignment(struct kvm *kvm)
8750 {
8751         atomic_inc(&kvm->arch.assigned_device_count);
8752 }
8753 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8754
8755 void kvm_arch_end_assignment(struct kvm *kvm)
8756 {
8757         atomic_dec(&kvm->arch.assigned_device_count);
8758 }
8759 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8760
8761 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8762 {
8763         return atomic_read(&kvm->arch.assigned_device_count);
8764 }
8765 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8766
8767 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8768 {
8769         atomic_inc(&kvm->arch.noncoherent_dma_count);
8770 }
8771 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8772
8773 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8774 {
8775         atomic_dec(&kvm->arch.noncoherent_dma_count);
8776 }
8777 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8778
8779 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8780 {
8781         return atomic_read(&kvm->arch.noncoherent_dma_count);
8782 }
8783 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8784
8785 bool kvm_arch_has_irq_bypass(void)
8786 {
8787         return kvm_x86_ops->update_pi_irte != NULL;
8788 }
8789
8790 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8791                                       struct irq_bypass_producer *prod)
8792 {
8793         struct kvm_kernel_irqfd *irqfd =
8794                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8795
8796         irqfd->producer = prod;
8797
8798         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8799                                            prod->irq, irqfd->gsi, 1);
8800 }
8801
8802 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8803                                       struct irq_bypass_producer *prod)
8804 {
8805         int ret;
8806         struct kvm_kernel_irqfd *irqfd =
8807                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8808
8809         WARN_ON(irqfd->producer != prod);
8810         irqfd->producer = NULL;
8811
8812         /*
8813          * When producer of consumer is unregistered, we change back to
8814          * remapped mode, so we can re-use the current implementation
8815          * when the irq is masked/disabled or the consumer side (KVM
8816          * int this case doesn't want to receive the interrupts.
8817         */
8818         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8819         if (ret)
8820                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8821                        " fails: %d\n", irqfd->consumer.token, ret);
8822 }
8823
8824 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8825                                    uint32_t guest_irq, bool set)
8826 {
8827         if (!kvm_x86_ops->update_pi_irte)
8828                 return -EINVAL;
8829
8830         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8831 }
8832
8833 bool kvm_vector_hashing_enabled(void)
8834 {
8835         return vector_hashing;
8836 }
8837 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8838
8839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);