1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ld script for the x86 kernel
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
19 #define LOAD_OFFSET __PAGE_OFFSET
21 #define LOAD_OFFSET __START_KERNEL_map
24 #include <asm-generic/vmlinux.lds.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
27 #include <asm/page_types.h>
28 #include <asm/orc_lookup.h>
29 #include <asm/cache.h>
32 #undef i386 /* in case the preprocessor is a 32bit one */
34 OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
38 ENTRY(phys_startup_32)
41 OUTPUT_ARCH(i386:x86-64)
42 ENTRY(phys_startup_64)
46 #if defined(CONFIG_X86_64)
48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
49 * boundaries spanning kernel text, rodata and data sections.
51 * However, kernel identity mappings will have different RWX permissions
52 * to the pages mapping to text and to the pages padding (which are freed) the
53 * text section. Hence kernel identity mappings will be broken to smaller
54 * pages. For 64-bit, kernel text and kernel identity mappings are different,
55 * so we can enable protection checks as well as retain 2MB large page
56 * mappings for kernel text.
58 #define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
60 #define X86_ALIGN_RODATA_END \
61 . = ALIGN(HPAGE_SIZE); \
62 __end_rodata_hpage_align = .; \
63 __end_rodata_aligned = .;
65 #define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
66 #define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
70 #define X86_ALIGN_RODATA_BEGIN
71 #define X86_ALIGN_RODATA_END \
72 . = ALIGN(PAGE_SIZE); \
73 __end_rodata_aligned = .;
75 #define ALIGN_ENTRY_TEXT_BEGIN
76 #define ALIGN_ENTRY_TEXT_END
81 text PT_LOAD FLAGS(5); /* R_E */
82 data PT_LOAD FLAGS(6); /* RW_ */
85 percpu PT_LOAD FLAGS(6); /* RW_ */
87 init PT_LOAD FLAGS(7); /* RWE */
89 note PT_NOTE FLAGS(0); /* ___ */
95 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
96 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
99 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
102 /* Text and read-only data */
103 .text : AT(ADDR(.text) - LOAD_OFFSET) {
106 /* bootstrapping code */
113 ALIGN_ENTRY_TEXT_BEGIN
122 . = ALIGN(PAGE_SIZE);
123 __entry_trampoline_start = .;
124 _entry_trampoline = .;
126 . = ALIGN(PAGE_SIZE);
127 __entry_trampoline_end = .;
128 ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big");
131 #ifdef CONFIG_RETPOLINE
132 __indirect_thunk_start = .;
133 *(.text.__x86.indirect_thunk)
134 __indirect_thunk_end = .;
137 /* End of text section */
143 EXCEPTION_TABLE(16) :text = 0x9090
145 /* .text should occupy whole number of pages */
146 . = ALIGN(PAGE_SIZE);
147 X86_ALIGN_RODATA_BEGIN
152 .data : AT(ADDR(.data) - LOAD_OFFSET) {
153 /* Start of data section */
157 INIT_TASK_DATA(THREAD_SIZE)
160 /* 32 bit has nosave before _edata */
164 PAGE_ALIGNED_DATA(PAGE_SIZE)
166 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
171 /* rarely changed data like cpu maps */
172 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
174 /* End of data section */
182 . = ALIGN(PAGE_SIZE);
185 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
186 /* work around gold bug 13023 */
187 __vvar_beginning_hack = .;
189 /* Place all vvars at the offsets in asm/vvar.h. */
190 #define EMIT_VVAR(name, offset) \
191 . = __vvar_beginning_hack + offset; \
193 #define __VVAR_KERNEL_LDS
194 #include <asm/vvar.h>
195 #undef __VVAR_KERNEL_LDS
199 * Pad the rest of the page with zeros. Otherwise the loader
200 * can leave garbage here.
202 . = __vvar_beginning_hack + PAGE_SIZE;
205 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
207 /* Init code and data - will be freed after init */
208 . = ALIGN(PAGE_SIZE);
209 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
210 __init_begin = .; /* paired with __init_end */
213 #if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
215 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
216 * output PHDR, so the next output section - .init.text - should
217 * start another segment - init.
219 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
220 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
221 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
224 INIT_TEXT_SECTION(PAGE_SIZE)
230 * Section for code used exclusively before alternatives are run. All
231 * references to such code must be patched out by alternatives, normally
232 * by using X86_FEATURE_ALWAYS CPU feature bit.
234 * See static_cpu_has() for an example.
236 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
240 INIT_DATA_SECTION(16)
242 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
243 __x86_cpu_dev_start = .;
245 __x86_cpu_dev_end = .;
248 #ifdef CONFIG_X86_INTEL_MID
249 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
251 __x86_intel_mid_dev_start = .;
252 *(.x86_intel_mid_dev.init)
253 __x86_intel_mid_dev_end = .;
258 * start address and size of operations which during runtime
259 * can be patched with virtualization friendly instructions or
260 * baremetal native ones. Think page table operations.
261 * Details in paravirt_types.h
264 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
265 __parainstructions = .;
267 __parainstructions_end = .;
271 * struct alt_inst entries. From the header (alternative.h):
272 * "Alternative instructions for different CPU types or capabilities"
273 * Think locking instructions on spinlocks.
276 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
277 __alt_instructions = .;
279 __alt_instructions_end = .;
283 * And here are the replacement instructions. The linker sticks
284 * them as binary blobs. The .altinstructions has enough data to
285 * get the address and the length of them to patch the kernel safely.
287 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
288 *(.altinstr_replacement)
292 * struct iommu_table_entry entries are injected in this section.
293 * It is an array of IOMMUs which during run time gets sorted depending
294 * on its dependency order. After rootfs_initcall is complete
295 * this section can be safely removed.
297 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
300 __iommu_table_end = .;
304 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
307 __apicdrivers_end = .;
312 * .exit.text is discard at runtime, not link time, to deal with
313 * references from .altinstructions and .eh_frame
315 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
319 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
323 #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
324 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
327 . = ALIGN(PAGE_SIZE);
329 /* freed after init ends here */
330 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
335 * smp_locks might be freed after init
336 * start/end must be page aligned
338 . = ALIGN(PAGE_SIZE);
339 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
342 . = ALIGN(PAGE_SIZE);
347 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
353 . = ALIGN(PAGE_SIZE);
354 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
356 *(.bss..page_aligned)
358 . = ALIGN(PAGE_SIZE);
362 . = ALIGN(PAGE_SIZE);
363 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
365 . += 64 * 1024; /* 64k alignment slop space */
366 *(.brk_reservation) /* areas brk users have reserved */
370 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
376 /* Sections to be discarded */
386 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
388 . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
389 "kernel image bigger than KERNEL_IMAGE_SIZE");
392 * Per-cpu symbols which need to be offset from __per_cpu_load
393 * for the boot processor.
395 #define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load
396 INIT_PER_CPU(gdt_page);
397 INIT_PER_CPU(irq_stack_union);
400 * Build-time check on the image size:
402 . = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
403 "kernel image bigger than KERNEL_IMAGE_SIZE");
406 . = ASSERT((irq_stack_union == 0),
407 "irq_stack_union is not at start of per-cpu area");
410 #endif /* CONFIG_X86_32 */
412 #ifdef CONFIG_KEXEC_CORE
413 #include <asm/kexec.h>
415 . = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
416 "kexec control code size is too big");