Merge tag 'pnp-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[sfrench/cifs-2.6.git] / arch / x86 / kernel / cpu / scattered.c
1 /*
2  *      Routines to identify additional cpu features that are scattered in
3  *      cpuid space.
4  */
5 #include <linux/cpu.h>
6
7 #include <asm/pat.h>
8 #include <asm/processor.h>
9
10 #include <asm/apic.h>
11
12 struct cpuid_bit {
13         u16 feature;
14         u8 reg;
15         u8 bit;
16         u32 level;
17         u32 sub_leaf;
18 };
19
20 /* Please keep the leaf sorted by cpuid_bit.level for faster search. */
21 static const struct cpuid_bit cpuid_bits[] = {
22         { X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
23         { X86_FEATURE_EPB,              CPUID_ECX,  3, 0x00000006, 0 },
24         { X86_FEATURE_AVX512_4VNNIW,    CPUID_EDX,  2, 0x00000007, 0 },
25         { X86_FEATURE_AVX512_4FMAPS,    CPUID_EDX,  3, 0x00000007, 0 },
26         { X86_FEATURE_CAT_L3,           CPUID_EBX,  1, 0x00000010, 0 },
27         { X86_FEATURE_CAT_L2,           CPUID_EBX,  2, 0x00000010, 0 },
28         { X86_FEATURE_CDP_L3,           CPUID_ECX,  2, 0x00000010, 1 },
29         { X86_FEATURE_MBA,              CPUID_EBX,  3, 0x00000010, 0 },
30         { X86_FEATURE_HW_PSTATE,        CPUID_EDX,  7, 0x80000007, 0 },
31         { X86_FEATURE_CPB,              CPUID_EDX,  9, 0x80000007, 0 },
32         { X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
33         { X86_FEATURE_SME,              CPUID_EAX,  0, 0x8000001f, 0 },
34         { 0, 0, 0, 0, 0 }
35 };
36
37 void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
38 {
39         u32 max_level;
40         u32 regs[4];
41         const struct cpuid_bit *cb;
42
43         for (cb = cpuid_bits; cb->feature; cb++) {
44
45                 /* Verify that the level is valid */
46                 max_level = cpuid_eax(cb->level & 0xffff0000);
47                 if (max_level < cb->level ||
48                     max_level > (cb->level | 0xffff))
49                         continue;
50
51                 cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
52                             &regs[CPUID_EBX], &regs[CPUID_ECX],
53                             &regs[CPUID_EDX]);
54
55                 if (regs[cb->reg] & (1 << cb->bit))
56                         set_cpu_cap(c, cb->feature);
57         }
58 }
59
60 u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf,
61                              enum cpuid_regs_idx reg)
62 {
63         const struct cpuid_bit *cb;
64         u32 cpuid_val = 0;
65
66         for (cb = cpuid_bits; cb->feature; cb++) {
67
68                 if (level > cb->level)
69                         continue;
70
71                 if (level < cb->level)
72                         break;
73
74                 if (reg == cb->reg && sub_leaf == cb->sub_leaf) {
75                         if (cpu_has(&boot_cpu_data, cb->feature))
76                                 cpuid_val |= BIT(cb->bit);
77                 }
78         }
79
80         return cpuid_val;
81 }
82 EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf);