Merge tag 'mips_fixes_5.2_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips...
[sfrench/cifs-2.6.git] / arch / x86 / kernel / cpu / mshyperv.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * HyperV  Detection code.
4  *
5  * Copyright (C) 2010, Novell, Inc.
6  * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
7  */
8
9 #include <linux/types.h>
10 #include <linux/time.h>
11 #include <linux/clocksource.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/hardirq.h>
15 #include <linux/efi.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kexec.h>
19 #include <linux/i8253.h>
20 #include <asm/processor.h>
21 #include <asm/hypervisor.h>
22 #include <asm/hyperv-tlfs.h>
23 #include <asm/mshyperv.h>
24 #include <asm/desc.h>
25 #include <asm/irq_regs.h>
26 #include <asm/i8259.h>
27 #include <asm/apic.h>
28 #include <asm/timer.h>
29 #include <asm/reboot.h>
30 #include <asm/nmi.h>
31
32 struct ms_hyperv_info ms_hyperv;
33 EXPORT_SYMBOL_GPL(ms_hyperv);
34
35 #if IS_ENABLED(CONFIG_HYPERV)
36 static void (*vmbus_handler)(void);
37 static void (*hv_stimer0_handler)(void);
38 static void (*hv_kexec_handler)(void);
39 static void (*hv_crash_handler)(struct pt_regs *regs);
40
41 __visible void __irq_entry hyperv_vector_handler(struct pt_regs *regs)
42 {
43         struct pt_regs *old_regs = set_irq_regs(regs);
44
45         entering_irq();
46         inc_irq_stat(irq_hv_callback_count);
47         if (vmbus_handler)
48                 vmbus_handler();
49
50         if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
51                 ack_APIC_irq();
52
53         exiting_irq();
54         set_irq_regs(old_regs);
55 }
56
57 void hv_setup_vmbus_irq(void (*handler)(void))
58 {
59         vmbus_handler = handler;
60 }
61
62 void hv_remove_vmbus_irq(void)
63 {
64         /* We have no way to deallocate the interrupt gate */
65         vmbus_handler = NULL;
66 }
67 EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq);
68 EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq);
69
70 /*
71  * Routines to do per-architecture handling of stimer0
72  * interrupts when in Direct Mode
73  */
74
75 __visible void __irq_entry hv_stimer0_vector_handler(struct pt_regs *regs)
76 {
77         struct pt_regs *old_regs = set_irq_regs(regs);
78
79         entering_irq();
80         inc_irq_stat(hyperv_stimer0_count);
81         if (hv_stimer0_handler)
82                 hv_stimer0_handler();
83         ack_APIC_irq();
84
85         exiting_irq();
86         set_irq_regs(old_regs);
87 }
88
89 int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void))
90 {
91         *vector = HYPERV_STIMER0_VECTOR;
92         *irq = 0;   /* Unused on x86/x64 */
93         hv_stimer0_handler = handler;
94         return 0;
95 }
96 EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq);
97
98 void hv_remove_stimer0_irq(int irq)
99 {
100         /* We have no way to deallocate the interrupt gate */
101         hv_stimer0_handler = NULL;
102 }
103 EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq);
104
105 void hv_setup_kexec_handler(void (*handler)(void))
106 {
107         hv_kexec_handler = handler;
108 }
109 EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
110
111 void hv_remove_kexec_handler(void)
112 {
113         hv_kexec_handler = NULL;
114 }
115 EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
116
117 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
118 {
119         hv_crash_handler = handler;
120 }
121 EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
122
123 void hv_remove_crash_handler(void)
124 {
125         hv_crash_handler = NULL;
126 }
127 EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
128
129 #ifdef CONFIG_KEXEC_CORE
130 static void hv_machine_shutdown(void)
131 {
132         if (kexec_in_progress && hv_kexec_handler)
133                 hv_kexec_handler();
134         native_machine_shutdown();
135 }
136
137 static void hv_machine_crash_shutdown(struct pt_regs *regs)
138 {
139         if (hv_crash_handler)
140                 hv_crash_handler(regs);
141         native_machine_crash_shutdown(regs);
142 }
143 #endif /* CONFIG_KEXEC_CORE */
144 #endif /* CONFIG_HYPERV */
145
146 static uint32_t  __init ms_hyperv_platform(void)
147 {
148         u32 eax;
149         u32 hyp_signature[3];
150
151         if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
152                 return 0;
153
154         cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
155               &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
156
157         if (eax >= HYPERV_CPUID_MIN &&
158             eax <= HYPERV_CPUID_MAX &&
159             !memcmp("Microsoft Hv", hyp_signature, 12))
160                 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
161
162         return 0;
163 }
164
165 static unsigned char hv_get_nmi_reason(void)
166 {
167         return 0;
168 }
169
170 #ifdef CONFIG_X86_LOCAL_APIC
171 /*
172  * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
173  * it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle
174  * unknown NMI on the first CPU which gets it.
175  */
176 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
177 {
178         static atomic_t nmi_cpu = ATOMIC_INIT(-1);
179
180         if (!unknown_nmi_panic)
181                 return NMI_DONE;
182
183         if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
184                 return NMI_HANDLED;
185
186         return NMI_DONE;
187 }
188 #endif
189
190 static unsigned long hv_get_tsc_khz(void)
191 {
192         unsigned long freq;
193
194         rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
195
196         return freq / 1000;
197 }
198
199 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
200 static void __init hv_smp_prepare_boot_cpu(void)
201 {
202         native_smp_prepare_boot_cpu();
203 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
204         hv_init_spinlocks();
205 #endif
206 }
207 #endif
208
209 static void __init ms_hyperv_init_platform(void)
210 {
211         int hv_host_info_eax;
212         int hv_host_info_ebx;
213         int hv_host_info_ecx;
214         int hv_host_info_edx;
215
216         /*
217          * Extract the features and hints
218          */
219         ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
220         ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
221         ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
222
223         pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
224                 ms_hyperv.features, ms_hyperv.hints);
225
226         ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
227         ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
228
229         pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
230                  ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
231
232         /*
233          * Extract host information.
234          */
235         if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >=
236             HYPERV_CPUID_VERSION) {
237                 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
238                 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
239                 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
240                 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
241
242                 pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n",
243                         hv_host_info_eax, hv_host_info_ebx >> 16,
244                         hv_host_info_ebx & 0xFFFF, hv_host_info_ecx,
245                         hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
246         }
247
248         if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
249             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
250                 x86_platform.calibrate_tsc = hv_get_tsc_khz;
251                 x86_platform.calibrate_cpu = hv_get_tsc_khz;
252         }
253
254         if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) {
255                 ms_hyperv.nested_features =
256                         cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
257         }
258
259 #ifdef CONFIG_X86_LOCAL_APIC
260         if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
261             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
262                 /*
263                  * Get the APIC frequency.
264                  */
265                 u64     hv_lapic_frequency;
266
267                 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
268                 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
269                 lapic_timer_frequency = hv_lapic_frequency;
270                 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
271                         lapic_timer_frequency);
272         }
273
274         register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
275                              "hv_nmi_unknown");
276 #endif
277
278 #ifdef CONFIG_X86_IO_APIC
279         no_timer_check = 1;
280 #endif
281
282 #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
283         machine_ops.shutdown = hv_machine_shutdown;
284         machine_ops.crash_shutdown = hv_machine_crash_shutdown;
285 #endif
286         mark_tsc_unstable("running on Hyper-V");
287
288         /*
289          * Generation 2 instances don't support reading the NMI status from
290          * 0x61 port.
291          */
292         if (efi_enabled(EFI_BOOT))
293                 x86_platform.get_nmi_reason = hv_get_nmi_reason;
294
295         /*
296          * Hyper-V VMs have a PIT emulation quirk such that zeroing the
297          * counter register during PIT shutdown restarts the PIT. So it
298          * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
299          * to false tells pit_shutdown() not to zero the counter so that
300          * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
301          * and setting this value has no effect.
302          */
303         i8253_clear_counter_on_shutdown = false;
304
305 #if IS_ENABLED(CONFIG_HYPERV)
306         /*
307          * Setup the hook to get control post apic initialization.
308          */
309         x86_platform.apic_post_init = hyperv_init;
310         hyperv_setup_mmu_ops();
311         /* Setup the IDT for hypervisor callback */
312         alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
313
314         /* Setup the IDT for reenlightenment notifications */
315         if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT)
316                 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
317                                 hyperv_reenlightenment_vector);
318
319         /* Setup the IDT for stimer0 */
320         if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
321                 alloc_intr_gate(HYPERV_STIMER0_VECTOR,
322                                 hv_stimer0_callback_vector);
323
324 # ifdef CONFIG_SMP
325         smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
326 # endif
327
328         /*
329          * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
330          * set x2apic destination mode to physcial mode when x2apic is available
331          * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
332          * have 8-bit APIC id.
333          */
334 # ifdef CONFIG_X86_X2APIC
335         if (x2apic_supported())
336                 x2apic_phys = 1;
337 # endif
338
339 #endif
340 }
341
342 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
343         .name                   = "Microsoft Hyper-V",
344         .detect                 = ms_hyperv_platform,
345         .type                   = X86_HYPER_MS_HYPERV,
346         .init.init_platform     = ms_hyperv_init_platform,
347 };