1 #ifndef _ASM_X86_PGTABLE_DEFS_H
2 #define _ASM_X86_PGTABLE_DEFS_H
4 #include <linux/const.h>
5 #include <asm/page_types.h>
7 #define FIRST_USER_ADDRESS 0UL
9 #define _PAGE_BIT_PRESENT 0 /* is present */
10 #define _PAGE_BIT_RW 1 /* writeable */
11 #define _PAGE_BIT_USER 2 /* userspace addressable */
12 #define _PAGE_BIT_PWT 3 /* page write through */
13 #define _PAGE_BIT_PCD 4 /* page cache disabled */
14 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17 #define _PAGE_BIT_PAT 7 /* on 4KB pages */
18 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */
20 #define _PAGE_BIT_SOFTW2 10 /* " */
21 #define _PAGE_BIT_SOFTW3 11 /* " */
22 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
24 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
25 #define _PAGE_BIT_SPLITTING _PAGE_BIT_SOFTW2 /* only valid on a PSE pmd */
26 #define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */
27 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
28 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
31 * Swap offsets on configurations that allow automatic NUMA balancing use the
32 * bits after _PAGE_BIT_GLOBAL. To uniquely distinguish NUMA hinting PTEs from
33 * swap entries, we use the first bit after _PAGE_BIT_GLOBAL and shrink the
34 * maximum possible swap space from 16TB to 8TB.
36 #define _PAGE_BIT_NUMA (_PAGE_BIT_GLOBAL+1)
38 /* If _PAGE_BIT_PRESENT is clear, we use these: */
39 /* - if the user mapped it with PROT_NONE; pte_present gives true */
40 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
42 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
43 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
44 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
45 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
46 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
47 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
48 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
49 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
50 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
51 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
52 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
53 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
54 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
55 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
56 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
57 #define _PAGE_SPLITTING (_AT(pteval_t, 1) << _PAGE_BIT_SPLITTING)
58 #define __HAVE_ARCH_PTE_SPECIAL
60 #ifdef CONFIG_KMEMCHECK
61 #define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)
63 #define _PAGE_HIDDEN (_AT(pteval_t, 0))
67 * The same hidden bit is used by kmemcheck, but since kmemcheck
68 * works on kernel pages while soft-dirty engine on user space,
69 * they do not conflict with each other.
72 #ifdef CONFIG_MEM_SOFT_DIRTY
73 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
75 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
79 * _PAGE_NUMA distinguishes between a numa hinting minor fault and a page
80 * that is not present. The hinting fault gathers numa placement statistics
81 * (see pte_numa()). The bit is always zero when the PTE is not present.
83 * The bit picked must be always zero when the pmd is present and not
84 * present, so that we don't lose information when we set it while
85 * atomically clearing the present bit.
87 #ifdef CONFIG_NUMA_BALANCING
88 #define _PAGE_NUMA (_AT(pteval_t, 1) << _PAGE_BIT_NUMA)
90 #define _PAGE_NUMA (_AT(pteval_t, 0))
94 * Tracking soft dirty bit when a page goes to a swap is tricky.
95 * We need a bit which can be stored in pte _and_ not conflict
96 * with swap entry format. On x86 bits 6 and 7 are *not* involved
97 * into swap entry computation, but bit 6 is used for nonlinear
98 * file mapping, so we borrow bit 7 for soft dirty tracking.
100 * Please note that this bit must be treated as swap dirty page
101 * mark if and only if the PTE has present bit clear!
103 #ifdef CONFIG_MEM_SOFT_DIRTY
104 #define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE
106 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
109 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
110 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
112 #define _PAGE_NX (_AT(pteval_t, 0))
115 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
117 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
118 _PAGE_ACCESSED | _PAGE_DIRTY)
119 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
122 /* Set of bits not changed in pte_modify */
123 #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
124 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
125 _PAGE_SOFT_DIRTY | _PAGE_NUMA)
126 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_NUMA)
129 * The cache modes defined here are used to translate between pure SW usage
130 * and the HW defined cache mode bits and/or PAT entries.
132 * The resulting bits for PWT, PCD and PAT should be chosen in a way
133 * to have the WB mode at index 0 (all bits clear). This is the default
134 * right now and likely would break too much if changed.
137 enum page_cache_mode {
138 _PAGE_CACHE_MODE_WB = 0,
139 _PAGE_CACHE_MODE_WC = 1,
140 _PAGE_CACHE_MODE_UC_MINUS = 2,
141 _PAGE_CACHE_MODE_UC = 3,
142 _PAGE_CACHE_MODE_WT = 4,
143 _PAGE_CACHE_MODE_WP = 5,
144 _PAGE_CACHE_MODE_NUM = 8
148 #define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
149 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
151 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
152 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
153 _PAGE_ACCESSED | _PAGE_NX)
155 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
156 _PAGE_USER | _PAGE_ACCESSED)
157 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
158 _PAGE_ACCESSED | _PAGE_NX)
159 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
161 #define PAGE_COPY PAGE_COPY_NOEXEC
162 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
163 _PAGE_ACCESSED | _PAGE_NX)
164 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
167 #define __PAGE_KERNEL_EXEC \
168 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
169 #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
171 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
172 #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
173 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_NOCACHE)
174 #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
175 #define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO | _PAGE_USER)
176 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
177 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
179 #define __PAGE_KERNEL_IO (__PAGE_KERNEL)
180 #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE)
182 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
183 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
184 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
185 #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
186 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
187 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
188 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
189 #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
190 #define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR)
192 #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
193 #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
196 #define __P000 PAGE_NONE
197 #define __P001 PAGE_READONLY
198 #define __P010 PAGE_COPY
199 #define __P011 PAGE_COPY
200 #define __P100 PAGE_READONLY_EXEC
201 #define __P101 PAGE_READONLY_EXEC
202 #define __P110 PAGE_COPY_EXEC
203 #define __P111 PAGE_COPY_EXEC
205 #define __S000 PAGE_NONE
206 #define __S001 PAGE_READONLY
207 #define __S010 PAGE_SHARED
208 #define __S011 PAGE_SHARED
209 #define __S100 PAGE_READONLY_EXEC
210 #define __S101 PAGE_READONLY_EXEC
211 #define __S110 PAGE_SHARED_EXEC
212 #define __S111 PAGE_SHARED_EXEC
215 * early identity mapping pte attrib macros.
218 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
220 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
221 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
222 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
226 # include <asm/pgtable_32_types.h>
228 # include <asm/pgtable_64_types.h>
233 #include <linux/types.h>
235 /* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
236 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
238 /* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
239 #define PTE_FLAGS_MASK (~PTE_PFN_MASK)
241 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
243 typedef struct { pgdval_t pgd; } pgd_t;
245 static inline pgd_t native_make_pgd(pgdval_t val)
247 return (pgd_t) { val };
250 static inline pgdval_t native_pgd_val(pgd_t pgd)
255 static inline pgdval_t pgd_flags(pgd_t pgd)
257 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
260 #if PAGETABLE_LEVELS > 3
261 typedef struct { pudval_t pud; } pud_t;
263 static inline pud_t native_make_pud(pmdval_t val)
265 return (pud_t) { val };
268 static inline pudval_t native_pud_val(pud_t pud)
273 #include <asm-generic/pgtable-nopud.h>
275 static inline pudval_t native_pud_val(pud_t pud)
277 return native_pgd_val(pud.pgd);
281 #if PAGETABLE_LEVELS > 2
282 typedef struct { pmdval_t pmd; } pmd_t;
284 static inline pmd_t native_make_pmd(pmdval_t val)
286 return (pmd_t) { val };
289 static inline pmdval_t native_pmd_val(pmd_t pmd)
294 #include <asm-generic/pgtable-nopmd.h>
296 static inline pmdval_t native_pmd_val(pmd_t pmd)
298 return native_pgd_val(pmd.pud.pgd);
302 static inline pudval_t pud_flags(pud_t pud)
304 return native_pud_val(pud) & PTE_FLAGS_MASK;
307 static inline pmdval_t pmd_flags(pmd_t pmd)
309 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
312 static inline pte_t native_make_pte(pteval_t val)
314 return (pte_t) { .pte = val };
317 static inline pteval_t native_pte_val(pte_t pte)
322 static inline pteval_t pte_flags(pte_t pte)
324 return native_pte_val(pte) & PTE_FLAGS_MASK;
327 #ifdef CONFIG_NUMA_BALANCING
328 /* Set of bits that distinguishes present, prot_none and numa ptes */
329 #define _PAGE_NUMA_MASK (_PAGE_NUMA|_PAGE_PROTNONE|_PAGE_PRESENT)
330 static inline pteval_t ptenuma_flags(pte_t pte)
332 return pte_flags(pte) & _PAGE_NUMA_MASK;
335 static inline pmdval_t pmdnuma_flags(pmd_t pmd)
337 return pmd_flags(pmd) & _PAGE_NUMA_MASK;
339 #endif /* CONFIG_NUMA_BALANCING */
341 #define pgprot_val(x) ((x).pgprot)
342 #define __pgprot(x) ((pgprot_t) { (x) } )
344 extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];
345 extern uint8_t __pte2cachemode_tbl[8];
347 #define __pte2cm_idx(cb) \
348 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
349 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
350 (((cb) >> _PAGE_BIT_PWT) & 1))
351 #define __cm_idx2pte(i) \
352 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
353 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
354 (((i) & 1) << _PAGE_BIT_PWT))
356 static inline unsigned long cachemode2protval(enum page_cache_mode pcm)
358 if (likely(pcm == 0))
360 return __cachemode2pte_tbl[pcm];
362 static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
364 return __pgprot(cachemode2protval(pcm));
366 static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
368 unsigned long masked;
370 masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
371 if (likely(masked == 0))
373 return __pte2cachemode_tbl[__pte2cm_idx(masked)];
375 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
380 val = pgprot_val(pgprot);
381 pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
382 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
385 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
390 val = pgprot_val(pgprot);
391 pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
392 ((val & _PAGE_PAT_LARGE) >>
393 (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
398 typedef struct page *pgtable_t;
400 extern pteval_t __supported_pte_mask;
401 extern void set_nx(void);
402 extern int nx_enabled;
404 #define pgprot_writecombine pgprot_writecombine
405 extern pgprot_t pgprot_writecombine(pgprot_t prot);
407 /* Indicate that x86 has its own track and untrack pfn vma functions */
408 #define __HAVE_PFNMAP_TRACKING
410 #define __HAVE_PHYS_MEM_ACCESS_PROT
412 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
413 unsigned long size, pgprot_t vma_prot);
414 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
415 unsigned long size, pgprot_t *vma_prot);
417 /* Install a pte for a particular vaddr in kernel space. */
418 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
421 extern void native_pagetable_init(void);
423 #define native_pagetable_init paging_init
427 extern void arch_report_meminfo(struct seq_file *m);
437 #ifdef CONFIG_PROC_FS
438 extern void update_page_count(int level, unsigned long pages);
440 static inline void update_page_count(int level, unsigned long pages) { }
444 * Helper function that returns the kernel pagetable entry controlling
445 * the virtual address 'address'. NULL means no pagetable entry present.
446 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
449 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
450 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
451 unsigned int *level);
452 extern pmd_t *lookup_pmd_address(unsigned long address);
453 extern phys_addr_t slow_virt_to_phys(void *__address);
454 extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
455 unsigned numpages, unsigned long page_flags);
456 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
458 #endif /* !__ASSEMBLY__ */
460 #endif /* _ASM_X86_PGTABLE_DEFS_H */