1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
16 #include <asm/frame.h>
18 static inline void load_sp0(struct tss_struct *tss,
19 struct thread_struct *thread)
21 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
24 /* The paravirtualized CPUID instruction. */
25 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
26 unsigned int *ecx, unsigned int *edx)
28 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
32 * These special macros can be used to get or set a debugging register
34 static inline unsigned long paravirt_get_debugreg(int reg)
36 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
38 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
39 static inline void set_debugreg(unsigned long val, int reg)
41 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
44 static inline unsigned long read_cr0(void)
46 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
49 static inline void write_cr0(unsigned long x)
51 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
54 static inline unsigned long read_cr2(void)
56 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
59 static inline void write_cr2(unsigned long x)
61 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
64 static inline unsigned long __read_cr3(void)
66 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
69 static inline void write_cr3(unsigned long x)
71 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
74 static inline unsigned long __read_cr4(void)
76 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
79 static inline void __write_cr4(unsigned long x)
81 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
85 static inline unsigned long read_cr8(void)
87 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
90 static inline void write_cr8(unsigned long x)
92 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
96 static inline void arch_safe_halt(void)
98 PVOP_VCALL0(pv_irq_ops.safe_halt);
101 static inline void halt(void)
103 PVOP_VCALL0(pv_irq_ops.halt);
106 static inline void wbinvd(void)
108 PVOP_VCALL0(pv_cpu_ops.wbinvd);
111 #define get_kernel_rpl() (pv_info.kernel_rpl)
113 static inline u64 paravirt_read_msr(unsigned msr)
115 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
118 static inline void paravirt_write_msr(unsigned msr,
119 unsigned low, unsigned high)
121 PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
124 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
126 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
129 static inline int paravirt_write_msr_safe(unsigned msr,
130 unsigned low, unsigned high)
132 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
135 #define rdmsr(msr, val1, val2) \
137 u64 _l = paravirt_read_msr(msr); \
142 #define wrmsr(msr, val1, val2) \
144 paravirt_write_msr(msr, val1, val2); \
147 #define rdmsrl(msr, val) \
149 val = paravirt_read_msr(msr); \
152 static inline void wrmsrl(unsigned msr, u64 val)
154 wrmsr(msr, (u32)val, (u32)(val>>32));
157 #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
159 /* rdmsr with exception handling */
160 #define rdmsr_safe(msr, a, b) \
163 u64 _l = paravirt_read_msr_safe(msr, &_err); \
169 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
173 *p = paravirt_read_msr_safe(msr, &err);
177 static inline unsigned long long paravirt_sched_clock(void)
179 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
183 extern struct static_key paravirt_steal_enabled;
184 extern struct static_key paravirt_steal_rq_enabled;
186 static inline u64 paravirt_steal_clock(int cpu)
188 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
191 static inline unsigned long long paravirt_read_pmc(int counter)
193 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
196 #define rdpmc(counter, low, high) \
198 u64 _l = paravirt_read_pmc(counter); \
203 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
205 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
207 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
210 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
212 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
215 static inline void load_TR_desc(void)
217 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
219 static inline void load_gdt(const struct desc_ptr *dtr)
221 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
223 static inline void load_idt(const struct desc_ptr *dtr)
225 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
227 static inline void set_ldt(const void *addr, unsigned entries)
229 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
231 static inline void store_idt(struct desc_ptr *dtr)
233 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
235 static inline unsigned long paravirt_store_tr(void)
237 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
239 #define store_tr(tr) ((tr) = paravirt_store_tr())
240 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
242 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
246 static inline void load_gs_index(unsigned int gs)
248 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
252 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
255 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
258 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
259 void *desc, int type)
261 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
264 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
266 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
268 static inline void set_iopl_mask(unsigned mask)
270 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
273 /* The paravirtualized I/O functions */
274 static inline void slow_down_io(void)
276 pv_cpu_ops.io_delay();
277 #ifdef REALLY_SLOW_IO
278 pv_cpu_ops.io_delay();
279 pv_cpu_ops.io_delay();
280 pv_cpu_ops.io_delay();
284 static inline void paravirt_activate_mm(struct mm_struct *prev,
285 struct mm_struct *next)
287 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
290 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
291 struct mm_struct *mm)
293 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
296 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
298 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
301 static inline void __flush_tlb(void)
303 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
305 static inline void __flush_tlb_global(void)
307 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
309 static inline void __flush_tlb_single(unsigned long addr)
311 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
314 static inline void flush_tlb_others(const struct cpumask *cpumask,
315 const struct flush_tlb_info *info)
317 PVOP_VCALL2(pv_mmu_ops.flush_tlb_others, cpumask, info);
320 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
322 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
325 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
327 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
330 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
332 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
334 static inline void paravirt_release_pte(unsigned long pfn)
336 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
339 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
341 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
344 static inline void paravirt_release_pmd(unsigned long pfn)
346 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
349 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
351 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
353 static inline void paravirt_release_pud(unsigned long pfn)
355 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
358 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
360 PVOP_VCALL2(pv_mmu_ops.alloc_p4d, mm, pfn);
363 static inline void paravirt_release_p4d(unsigned long pfn)
365 PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);
368 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
371 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
374 static inline pte_t __pte(pteval_t val)
378 if (sizeof(pteval_t) > sizeof(long))
379 ret = PVOP_CALLEE2(pteval_t,
381 val, (u64)val >> 32);
383 ret = PVOP_CALLEE1(pteval_t,
387 return (pte_t) { .pte = ret };
390 static inline pteval_t pte_val(pte_t pte)
394 if (sizeof(pteval_t) > sizeof(long))
395 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
396 pte.pte, (u64)pte.pte >> 32);
398 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
404 static inline pgd_t __pgd(pgdval_t val)
408 if (sizeof(pgdval_t) > sizeof(long))
409 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
410 val, (u64)val >> 32);
412 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
415 return (pgd_t) { ret };
418 static inline pgdval_t pgd_val(pgd_t pgd)
422 if (sizeof(pgdval_t) > sizeof(long))
423 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
424 pgd.pgd, (u64)pgd.pgd >> 32);
426 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
432 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
433 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
438 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
441 return (pte_t) { .pte = ret };
444 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
445 pte_t *ptep, pte_t pte)
447 if (sizeof(pteval_t) > sizeof(long))
449 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
451 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
452 mm, addr, ptep, pte.pte);
455 static inline void set_pte(pte_t *ptep, pte_t pte)
457 if (sizeof(pteval_t) > sizeof(long))
458 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
459 pte.pte, (u64)pte.pte >> 32);
461 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
465 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
466 pte_t *ptep, pte_t pte)
468 if (sizeof(pteval_t) > sizeof(long))
470 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
472 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
475 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
476 pmd_t *pmdp, pmd_t pmd)
478 if (sizeof(pmdval_t) > sizeof(long))
480 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
482 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
483 native_pmd_val(pmd));
486 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
487 pud_t *pudp, pud_t pud)
489 if (sizeof(pudval_t) > sizeof(long))
491 pv_mmu_ops.set_pud_at(mm, addr, pudp, pud);
493 PVOP_VCALL4(pv_mmu_ops.set_pud_at, mm, addr, pudp,
494 native_pud_val(pud));
497 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
499 pmdval_t val = native_pmd_val(pmd);
501 if (sizeof(pmdval_t) > sizeof(long))
502 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
504 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
507 #if CONFIG_PGTABLE_LEVELS >= 3
508 static inline pmd_t __pmd(pmdval_t val)
512 if (sizeof(pmdval_t) > sizeof(long))
513 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
514 val, (u64)val >> 32);
516 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
519 return (pmd_t) { ret };
522 static inline pmdval_t pmd_val(pmd_t pmd)
526 if (sizeof(pmdval_t) > sizeof(long))
527 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
528 pmd.pmd, (u64)pmd.pmd >> 32);
530 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
536 static inline void set_pud(pud_t *pudp, pud_t pud)
538 pudval_t val = native_pud_val(pud);
540 if (sizeof(pudval_t) > sizeof(long))
541 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
542 val, (u64)val >> 32);
544 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
547 #if CONFIG_PGTABLE_LEVELS >= 4
548 static inline pud_t __pud(pudval_t val)
552 if (sizeof(pudval_t) > sizeof(long))
553 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
554 val, (u64)val >> 32);
556 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
559 return (pud_t) { ret };
562 static inline pudval_t pud_val(pud_t pud)
566 if (sizeof(pudval_t) > sizeof(long))
567 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
568 pud.pud, (u64)pud.pud >> 32);
570 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
576 static inline void pud_clear(pud_t *pudp)
578 set_pud(pudp, __pud(0));
581 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
583 p4dval_t val = native_p4d_val(p4d);
585 if (sizeof(p4dval_t) > sizeof(long))
586 PVOP_VCALL3(pv_mmu_ops.set_p4d, p4dp,
587 val, (u64)val >> 32);
589 PVOP_VCALL2(pv_mmu_ops.set_p4d, p4dp,
593 #if CONFIG_PGTABLE_LEVELS >= 5
595 static inline p4d_t __p4d(p4dval_t val)
597 p4dval_t ret = PVOP_CALLEE1(p4dval_t, pv_mmu_ops.make_p4d, val);
599 return (p4d_t) { ret };
602 static inline p4dval_t p4d_val(p4d_t p4d)
604 return PVOP_CALLEE1(p4dval_t, pv_mmu_ops.p4d_val, p4d.p4d);
607 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
609 pgdval_t val = native_pgd_val(pgd);
611 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp, val);
614 static inline void pgd_clear(pgd_t *pgdp)
616 set_pgd(pgdp, __pgd(0));
619 #endif /* CONFIG_PGTABLE_LEVELS == 5 */
621 static inline void p4d_clear(p4d_t *p4dp)
623 set_p4d(p4dp, __p4d(0));
626 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
628 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
630 #ifdef CONFIG_X86_PAE
631 /* Special-case pte-setting operations for PAE, which can't update a
632 64-bit pte atomically */
633 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
635 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
636 pte.pte, pte.pte >> 32);
639 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
642 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
645 static inline void pmd_clear(pmd_t *pmdp)
647 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
649 #else /* !CONFIG_X86_PAE */
650 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
655 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
658 set_pte_at(mm, addr, ptep, __pte(0));
661 static inline void pmd_clear(pmd_t *pmdp)
663 set_pmd(pmdp, __pmd(0));
665 #endif /* CONFIG_X86_PAE */
667 #define __HAVE_ARCH_START_CONTEXT_SWITCH
668 static inline void arch_start_context_switch(struct task_struct *prev)
670 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
673 static inline void arch_end_context_switch(struct task_struct *next)
675 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
678 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
679 static inline void arch_enter_lazy_mmu_mode(void)
681 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
684 static inline void arch_leave_lazy_mmu_mode(void)
686 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
689 static inline void arch_flush_lazy_mmu_mode(void)
691 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
694 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
695 phys_addr_t phys, pgprot_t flags)
697 pv_mmu_ops.set_fixmap(idx, phys, flags);
700 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
702 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
705 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
708 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
710 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
713 static __always_inline void pv_wait(u8 *ptr, u8 val)
715 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
718 static __always_inline void pv_kick(int cpu)
720 PVOP_VCALL1(pv_lock_ops.kick, cpu);
723 static __always_inline bool pv_vcpu_is_preempted(long cpu)
725 return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
728 #endif /* SMP && PARAVIRT_SPINLOCKS */
731 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
732 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
734 /* save and restore all caller-save registers, except return value */
735 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
736 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
738 #define PV_FLAGS_ARG "0"
739 #define PV_EXTRA_CLOBBERS
740 #define PV_VEXTRA_CLOBBERS
742 /* save and restore all caller-save registers, except return value */
743 #define PV_SAVE_ALL_CALLER_REGS \
752 #define PV_RESTORE_ALL_CALLER_REGS \
762 /* We save some registers, but all of them, that's too much. We clobber all
763 * caller saved registers but the argument parameter */
764 #define PV_SAVE_REGS "pushq %%rdi;"
765 #define PV_RESTORE_REGS "popq %%rdi;"
766 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
767 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
768 #define PV_FLAGS_ARG "D"
772 * Generate a thunk around a function which saves all caller-save
773 * registers except for the return value. This allows C functions to
774 * be called from assembler code where fewer than normal registers are
775 * available. It may also help code generation around calls from C
776 * code if the common case doesn't use many registers.
778 * When a callee is wrapped in a thunk, the caller can assume that all
779 * arg regs and all scratch registers are preserved across the
780 * call. The return value in rax/eax will not be saved, even for void
783 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
784 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
785 extern typeof(func) __raw_callee_save_##func; \
787 asm(".pushsection .text;" \
788 ".globl " PV_THUNK_NAME(func) ";" \
789 ".type " PV_THUNK_NAME(func) ", @function;" \
790 PV_THUNK_NAME(func) ":" \
792 PV_SAVE_ALL_CALLER_REGS \
794 PV_RESTORE_ALL_CALLER_REGS \
799 /* Get a reference to a callee-save function */
800 #define PV_CALLEE_SAVE(func) \
801 ((struct paravirt_callee_save) { __raw_callee_save_##func })
803 /* Promise that "func" already uses the right calling convention */
804 #define __PV_IS_CALLEE_SAVE(func) \
805 ((struct paravirt_callee_save) { func })
807 static inline notrace unsigned long arch_local_save_flags(void)
809 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
812 static inline notrace void arch_local_irq_restore(unsigned long f)
814 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
817 static inline notrace void arch_local_irq_disable(void)
819 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
822 static inline notrace void arch_local_irq_enable(void)
824 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
827 static inline notrace unsigned long arch_local_irq_save(void)
831 f = arch_local_save_flags();
832 arch_local_irq_disable();
837 /* Make sure as little as possible of this mess escapes. */
852 extern void default_banner(void);
854 #else /* __ASSEMBLY__ */
856 #define _PVSITE(ptype, clobbers, ops, word, algn) \
860 .pushsection .parainstructions,"a"; \
869 #define COND_PUSH(set, mask, reg) \
870 .if ((~(set)) & mask); push %reg; .endif
871 #define COND_POP(set, mask, reg) \
872 .if ((~(set)) & mask); pop %reg; .endif
876 #define PV_SAVE_REGS(set) \
877 COND_PUSH(set, CLBR_RAX, rax); \
878 COND_PUSH(set, CLBR_RCX, rcx); \
879 COND_PUSH(set, CLBR_RDX, rdx); \
880 COND_PUSH(set, CLBR_RSI, rsi); \
881 COND_PUSH(set, CLBR_RDI, rdi); \
882 COND_PUSH(set, CLBR_R8, r8); \
883 COND_PUSH(set, CLBR_R9, r9); \
884 COND_PUSH(set, CLBR_R10, r10); \
885 COND_PUSH(set, CLBR_R11, r11)
886 #define PV_RESTORE_REGS(set) \
887 COND_POP(set, CLBR_R11, r11); \
888 COND_POP(set, CLBR_R10, r10); \
889 COND_POP(set, CLBR_R9, r9); \
890 COND_POP(set, CLBR_R8, r8); \
891 COND_POP(set, CLBR_RDI, rdi); \
892 COND_POP(set, CLBR_RSI, rsi); \
893 COND_POP(set, CLBR_RDX, rdx); \
894 COND_POP(set, CLBR_RCX, rcx); \
895 COND_POP(set, CLBR_RAX, rax)
897 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
898 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
899 #define PARA_INDIRECT(addr) *addr(%rip)
901 #define PV_SAVE_REGS(set) \
902 COND_PUSH(set, CLBR_EAX, eax); \
903 COND_PUSH(set, CLBR_EDI, edi); \
904 COND_PUSH(set, CLBR_ECX, ecx); \
905 COND_PUSH(set, CLBR_EDX, edx)
906 #define PV_RESTORE_REGS(set) \
907 COND_POP(set, CLBR_EDX, edx); \
908 COND_POP(set, CLBR_ECX, ecx); \
909 COND_POP(set, CLBR_EDI, edi); \
910 COND_POP(set, CLBR_EAX, eax)
912 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
913 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
914 #define PARA_INDIRECT(addr) *%cs:addr
917 #define INTERRUPT_RETURN \
918 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
919 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
921 #define DISABLE_INTERRUPTS(clobbers) \
922 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
923 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
924 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
925 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
927 #define ENABLE_INTERRUPTS(clobbers) \
928 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
929 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
930 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
931 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
934 #define GET_CR0_INTO_EAX \
935 push %ecx; push %edx; \
936 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
938 #else /* !CONFIG_X86_32 */
941 * If swapgs is used while the userspace stack is still current,
942 * there's no way to call a pvop. The PV replacement *must* be
943 * inlined, or the swapgs instruction must be trapped and emulated.
945 #define SWAPGS_UNSAFE_STACK \
946 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
950 * Note: swapgs is very special, and in practise is either going to be
951 * implemented with a single "swapgs" instruction or something very
952 * special. Either way, we don't need to save any registers for
956 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
957 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
960 #define GET_CR2_INTO_RAX \
961 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
963 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
964 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
966 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
968 #define USERGS_SYSRET64 \
969 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
971 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
972 #endif /* CONFIG_X86_32 */
974 #endif /* __ASSEMBLY__ */
975 #else /* CONFIG_PARAVIRT */
976 # define default_banner x86_init_noop
978 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
979 struct mm_struct *mm)
983 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
986 #endif /* __ASSEMBLY__ */
987 #endif /* !CONFIG_PARAVIRT */
988 #endif /* _ASM_X86_PARAVIRT_H */