1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
30 #include <asm/pvclock-abi.h>
33 #include <asm/msr-index.h>
35 #include <asm/kvm_page_track.h>
36 #include <asm/kvm_vcpu_regs.h>
37 #include <asm/hyperv-tlfs.h>
39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
41 #define KVM_MAX_VCPUS 1024
44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
45 * might be larger than the actual number of VCPUs because the
46 * APIC ID encodes CPU topology information.
48 * In the worst case, we'll need less than one extra bit for the
49 * Core ID, and less than one extra bit for the Package (Die) ID,
50 * so ratio of 4 should be enough.
52 #define KVM_VCPU_ID_RATIO 4
53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
55 /* memory slots that are not exposed to userspace */
56 #define KVM_INTERNAL_MEM_SLOTS 3
58 #define KVM_HALT_POLL_NS_DEFAULT 200000
60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
63 KVM_DIRTY_LOG_INITIALLY_SET)
65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
66 KVM_BUS_LOCK_DETECTION_EXIT)
68 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
69 KVM_X86_NOTIFY_VMEXIT_USER)
71 /* x86-specific vcpu->requests bit members */
72 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
73 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
74 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
75 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
76 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
77 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
78 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
79 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
80 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
81 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
82 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
83 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
85 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
87 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
88 #define KVM_REQ_MCLOCK_INPROGRESS \
89 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
90 #define KVM_REQ_SCAN_IOAPIC \
91 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
92 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
93 #define KVM_REQ_APIC_PAGE_RELOAD \
94 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
95 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
96 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
97 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
98 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
99 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
100 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
101 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
102 #define KVM_REQ_APICV_UPDATE \
103 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
104 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
105 #define KVM_REQ_TLB_FLUSH_GUEST \
106 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
107 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
108 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
109 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
110 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
111 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
112 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
114 #define CR0_RESERVED_BITS \
115 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
116 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
117 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
119 #define CR4_RESERVED_BITS \
120 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
121 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
122 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
123 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
124 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
125 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
127 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
131 #define INVALID_PAGE (~(hpa_t)0)
132 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
134 #define INVALID_GPA (~(gpa_t)0)
136 /* KVM Hugepage definitions for x86 */
137 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
138 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
139 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
140 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
141 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
142 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
143 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
145 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
146 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
147 #define KVM_MMU_HASH_SHIFT 12
148 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
149 #define KVM_MIN_FREE_MMU_PAGES 5
150 #define KVM_REFILL_PAGES 25
151 #define KVM_MAX_CPUID_ENTRIES 256
152 #define KVM_NR_FIXED_MTRR_REGION 88
153 #define KVM_NR_VAR_MTRR 8
155 #define ASYNC_PF_PER_VCPU 64
158 VCPU_REGS_RAX = __VCPU_REGS_RAX,
159 VCPU_REGS_RCX = __VCPU_REGS_RCX,
160 VCPU_REGS_RDX = __VCPU_REGS_RDX,
161 VCPU_REGS_RBX = __VCPU_REGS_RBX,
162 VCPU_REGS_RSP = __VCPU_REGS_RSP,
163 VCPU_REGS_RBP = __VCPU_REGS_RBP,
164 VCPU_REGS_RSI = __VCPU_REGS_RSI,
165 VCPU_REGS_RDI = __VCPU_REGS_RDI,
167 VCPU_REGS_R8 = __VCPU_REGS_R8,
168 VCPU_REGS_R9 = __VCPU_REGS_R9,
169 VCPU_REGS_R10 = __VCPU_REGS_R10,
170 VCPU_REGS_R11 = __VCPU_REGS_R11,
171 VCPU_REGS_R12 = __VCPU_REGS_R12,
172 VCPU_REGS_R13 = __VCPU_REGS_R13,
173 VCPU_REGS_R14 = __VCPU_REGS_R14,
174 VCPU_REGS_R15 = __VCPU_REGS_R15,
179 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
185 VCPU_EXREG_EXIT_INFO_1,
186 VCPU_EXREG_EXIT_INFO_2,
200 enum exit_fastpath_completion {
202 EXIT_FASTPATH_REENTER_GUEST,
203 EXIT_FASTPATH_EXIT_HANDLED,
205 typedef enum exit_fastpath_completion fastpath_t;
207 struct x86_emulate_ctxt;
208 struct x86_exception;
210 enum x86_intercept_stage;
212 #define KVM_NR_DB_REGS 4
214 #define DR6_BUS_LOCK (1 << 11)
215 #define DR6_BD (1 << 13)
216 #define DR6_BS (1 << 14)
217 #define DR6_BT (1 << 15)
218 #define DR6_RTM (1 << 16)
220 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
221 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
222 * they will never be 0 for now, but when they are defined
223 * in the future it will require no code change.
225 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
227 #define DR6_ACTIVE_LOW 0xffff0ff0
228 #define DR6_VOLATILE 0x0001e80f
229 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
231 #define DR7_BP_EN_MASK 0x000000ff
232 #define DR7_GE (1 << 9)
233 #define DR7_GD (1 << 13)
234 #define DR7_FIXED_1 0x00000400
235 #define DR7_VOLATILE 0xffff2bff
237 #define KVM_GUESTDBG_VALID_MASK \
238 (KVM_GUESTDBG_ENABLE | \
239 KVM_GUESTDBG_SINGLESTEP | \
240 KVM_GUESTDBG_USE_HW_BP | \
241 KVM_GUESTDBG_USE_SW_BP | \
242 KVM_GUESTDBG_INJECT_BP | \
243 KVM_GUESTDBG_INJECT_DB | \
244 KVM_GUESTDBG_BLOCKIRQ)
247 #define PFERR_PRESENT_BIT 0
248 #define PFERR_WRITE_BIT 1
249 #define PFERR_USER_BIT 2
250 #define PFERR_RSVD_BIT 3
251 #define PFERR_FETCH_BIT 4
252 #define PFERR_PK_BIT 5
253 #define PFERR_SGX_BIT 15
254 #define PFERR_GUEST_FINAL_BIT 32
255 #define PFERR_GUEST_PAGE_BIT 33
256 #define PFERR_IMPLICIT_ACCESS_BIT 48
258 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
259 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
260 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
261 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
262 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
263 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
264 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
265 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
266 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
267 #define PFERR_IMPLICIT_ACCESS (1ULL << PFERR_IMPLICIT_ACCESS_BIT)
269 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
273 /* apic attention bits */
274 #define KVM_APIC_CHECK_VAPIC 0
276 * The following bit is set with PV-EOI, unset on EOI.
277 * We detect PV-EOI changes by guest by comparing
278 * this bit with PV-EOI in guest memory.
279 * See the implementation in apic_update_pv_eoi.
281 #define KVM_APIC_PV_EOI_PENDING 1
283 struct kvm_kernel_irq_routing_entry;
286 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
287 * also includes TDP pages) to determine whether or not a page can be used in
288 * the given MMU context. This is a subset of the overall kvm_cpu_role to
289 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating
290 * 2 bytes per gfn instead of 4 bytes per gfn.
292 * Upper-level shadow pages having gptes are tracked for write-protection via
293 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create
294 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise
295 * gfn_track will overflow and explosions will ensure.
297 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
298 * cannot be reused. The ability to reuse a SP is tracked by its role, which
299 * incorporates various mode bits and properties of the SP. Roughly speaking,
300 * the number of unique SPs that can theoretically be created is 2^n, where n
301 * is the number of bits that are used to compute the role.
303 * But, even though there are 19 bits in the mask below, not all combinations
304 * of modes and flags are possible:
306 * - invalid shadow pages are not accounted, so the bits are effectively 18
308 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
309 * execonly and ad_disabled are only used for nested EPT which has
310 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
312 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
313 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
314 * paging has exactly one upper level, making level completely redundant
315 * when has_4_byte_gpte=1.
317 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
318 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
320 * Therefore, the maximum number of possible upper-level shadow pages for a
321 * single gfn is a bit less than 2^13.
323 union kvm_mmu_page_role {
327 unsigned has_4_byte_gpte:1;
334 unsigned smep_andnot_wp:1;
335 unsigned smap_andnot_wp:1;
336 unsigned ad_disabled:1;
337 unsigned guest_mode:1;
338 unsigned passthrough:1;
342 * This is left at the top of the word so that
343 * kvm_memslots_for_spte_role can extract it with a
344 * simple shift. While there is room, give it a whole
345 * byte so it is also faster to load it from memory.
352 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
353 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
354 * including on nested transitions, if nothing in the full role changes then
355 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
356 * don't treat all-zero structure as valid data.
358 * The properties that are tracked in the extended role but not the page role
359 * are for things that either (a) do not affect the validity of the shadow page
360 * or (b) are indirectly reflected in the shadow page's role. For example,
361 * CR4.PKE only affects permission checks for software walks of the guest page
362 * tables (because KVM doesn't support Protection Keys with shadow paging), and
363 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
365 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
366 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
367 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
368 * SMAP aware regardless of CR0.WP.
370 union kvm_mmu_extended_role {
373 unsigned int valid:1;
374 unsigned int execonly:1;
375 unsigned int cr4_pse:1;
376 unsigned int cr4_pke:1;
377 unsigned int cr4_smap:1;
378 unsigned int cr4_smep:1;
379 unsigned int cr4_la57:1;
380 unsigned int efer_lma:1;
387 union kvm_mmu_page_role base;
388 union kvm_mmu_extended_role ext;
392 struct kvm_rmap_head {
396 struct kvm_pio_request {
397 unsigned long linear_rip;
404 #define PT64_ROOT_MAX_LEVEL 5
406 struct rsvd_bits_validate {
407 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
411 struct kvm_mmu_root_info {
416 #define KVM_MMU_ROOT_INFO_INVALID \
417 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
419 #define KVM_MMU_NUM_PREV_ROOTS 3
421 #define KVM_HAVE_MMU_RWLOCK
424 struct kvm_page_fault;
427 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
428 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
432 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
433 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
434 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
435 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
436 struct x86_exception *fault);
437 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
438 gpa_t gva_or_gpa, u64 access,
439 struct x86_exception *exception);
440 int (*sync_page)(struct kvm_vcpu *vcpu,
441 struct kvm_mmu_page *sp);
442 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
443 struct kvm_mmu_root_info root;
444 union kvm_cpu_role cpu_role;
445 union kvm_mmu_page_role root_role;
448 * The pkru_mask indicates if protection key checks are needed. It
449 * consists of 16 domains indexed by page fault error code bits [4:1],
450 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
451 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
455 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
458 * Bitmap; bit set = permission fault
459 * Byte index: page fault error code [4:1]
460 * Bit index: pte permissions in ACC_* format
469 * check zero bits on shadow page table entries, these
470 * bits include not only hardware reserved bits but also
471 * the bits spte never used.
473 struct rsvd_bits_validate shadow_zero_check;
475 struct rsvd_bits_validate guest_rsvd_check;
477 u64 pdptrs[4]; /* pae */
480 struct kvm_tlb_range {
495 struct perf_event *perf_event;
496 struct kvm_vcpu *vcpu;
498 * eventsel value for general purpose counters,
499 * ctrl value for fixed counters.
506 /* More counters may conflict with other existing Architectural MSRs */
507 #define KVM_INTEL_PMC_MAX_GENERIC 8
508 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
509 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
510 #define KVM_PMC_MAX_FIXED 3
511 #define KVM_AMD_PMC_MAX_GENERIC 6
513 unsigned nr_arch_gp_counters;
514 unsigned nr_arch_fixed_counters;
515 unsigned available_event_types;
517 u64 fixed_ctr_ctrl_mask;
520 u64 counter_bitmask[2];
521 u64 global_ctrl_mask;
522 u64 global_ovf_ctrl_mask;
526 struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
527 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
528 struct irq_work irq_work;
529 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
530 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
531 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
535 u64 pebs_enable_mask;
537 u64 pebs_data_cfg_mask;
540 * If a guest counter is cross-mapped to host counter with different
541 * index, its PEBS capability will be temporarily disabled.
543 * The user should make sure that this mask is updated
544 * after disabling interrupts and before perf_guest_get_msrs();
546 u64 host_cross_mapped_mask;
549 * The gate to release perf_events not marked in
550 * pmc_in_use only once in a vcpu time slice.
555 * The total number of programmed perf_events and it helps to avoid
556 * redundant check before cleanup if guest don't use vPMU at all.
564 KVM_DEBUGREG_BP_ENABLED = 1,
565 KVM_DEBUGREG_WONT_EXIT = 2,
568 struct kvm_mtrr_range {
571 struct list_head node;
575 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
576 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
579 struct list_head head;
582 /* Hyper-V SynIC timer */
583 struct kvm_vcpu_hv_stimer {
584 struct hrtimer timer;
586 union hv_stimer_config config;
589 struct hv_message msg;
593 /* Hyper-V synthetic interrupt controller (SynIC)*/
594 struct kvm_vcpu_hv_synic {
599 atomic64_t sint[HV_SYNIC_SINT_COUNT];
600 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
601 DECLARE_BITMAP(auto_eoi_bitmap, 256);
602 DECLARE_BITMAP(vec_bitmap, 256);
604 bool dont_zero_synic_pages;
607 /* Hyper-V per vcpu emulation context */
609 struct kvm_vcpu *vcpu;
613 struct kvm_vcpu_hv_synic synic;
614 struct kvm_hyperv_exit exit;
615 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
616 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
619 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
620 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
621 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
622 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
623 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
624 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
625 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
626 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
630 /* Xen HVM per vcpu emulation context */
631 struct kvm_vcpu_xen {
633 u32 current_runstate;
635 struct gfn_to_pfn_cache vcpu_info_cache;
636 struct gfn_to_pfn_cache vcpu_time_info_cache;
637 struct gfn_to_pfn_cache runstate_cache;
639 u64 runstate_entry_time;
640 u64 runstate_times[4];
641 unsigned long evtchn_pending_sel;
642 u32 vcpu_id; /* The Xen / ACPI vCPU ID */
644 u64 timer_expires; /* In guest epoch */
645 atomic_t timer_pending;
646 struct hrtimer timer;
648 struct timer_list poll_timer;
651 struct kvm_queued_exception {
657 unsigned long payload;
661 struct kvm_vcpu_arch {
663 * rip and regs accesses must go through
664 * kvm_{register,rip}_{read,write} functions.
666 unsigned long regs[NR_VCPU_REGS];
671 unsigned long cr0_guest_owned_bits;
675 unsigned long cr4_guest_owned_bits;
676 unsigned long cr4_guest_rsvd_bits;
683 struct kvm_lapic *apic; /* kernel irqchip context */
684 bool load_eoi_exitmap_pending;
685 DECLARE_BITMAP(ioapic_handled_vectors, 256);
686 unsigned long apic_attention;
687 int32_t apic_arb_prio;
689 u64 ia32_misc_enable_msr;
692 bool at_instruction_boundary;
693 bool tpr_access_reporting;
695 bool xfd_no_write_intercept;
697 u64 microcode_version;
698 u64 arch_capabilities;
699 u64 perf_capabilities;
702 * Paging state of the vcpu
704 * If the vcpu runs in guest mode with two level paging this still saves
705 * the paging mode of the l1 guest. This context is always used to
710 /* Non-nested MMU for L1 */
711 struct kvm_mmu root_mmu;
713 /* L1 MMU when running nested */
714 struct kvm_mmu guest_mmu;
717 * Paging state of an L2 guest (used for nested npt)
719 * This context will save all necessary information to walk page tables
720 * of an L2 guest. This context is only initialized for page table
721 * walking and not for faulting since we never handle l2 page faults on
724 struct kvm_mmu nested_mmu;
727 * Pointer to the mmu context currently used for
728 * gva_to_gpa translations.
730 struct kvm_mmu *walk_mmu;
732 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
733 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
734 struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
735 struct kvm_mmu_memory_cache mmu_page_header_cache;
738 * QEMU userspace and the guest each have their own FPU state.
739 * In vcpu_run, we switch between the user and guest FPU contexts.
740 * While running a VCPU, the VCPU thread will have the guest FPU
743 * Note that while the PKRU state lives inside the fpu registers,
744 * it is switched out separately at VMENTER and VMEXIT time. The
745 * "guest_fpstate" state here contains the guest FPU context, with the
748 struct fpu_guest guest_fpu;
751 u64 guest_supported_xcr0;
753 struct kvm_pio_request pio;
756 unsigned sev_pio_count;
758 u8 event_exit_inst_len;
760 bool exception_from_userspace;
762 /* Exceptions to be injected to the guest. */
763 struct kvm_queued_exception exception;
764 /* Exception VM-Exits to be synthesized to L1. */
765 struct kvm_queued_exception exception_vmexit;
767 struct kvm_queued_interrupt {
773 int halt_request; /* real mode on Intel only */
776 struct kvm_cpuid_entry2 *cpuid_entries;
779 u64 reserved_gpa_bits;
782 /* emulate context */
784 struct x86_emulate_ctxt *emulate_ctxt;
785 bool emulate_regs_need_sync_to_vcpu;
786 bool emulate_regs_need_sync_from_vcpu;
787 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
790 struct pvclock_vcpu_time_info hv_clock;
791 unsigned int hw_tsc_khz;
792 struct gfn_to_pfn_cache pv_time;
793 /* set guest stopped flag in pvclock flags field */
794 bool pvclock_set_guest_stopped_request;
800 struct gfn_to_hva_cache cache;
804 u64 tsc_offset; /* current tsc offset */
807 u64 tsc_offset_adjustment;
810 u64 this_tsc_generation;
812 bool tsc_always_catchup;
813 s8 virtual_tsc_shift;
814 u32 virtual_tsc_mult;
816 s64 ia32_tsc_adjust_msr;
817 u64 msr_ia32_power_ctl;
818 u64 l1_tsc_scaling_ratio;
819 u64 tsc_scaling_ratio; /* current scaling ratio */
821 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
822 unsigned nmi_pending; /* NMI queued after currently running handler */
823 bool nmi_injected; /* Trying to inject an NMI this entry */
824 bool smi_pending; /* SMI queued after currently running handler */
825 u8 handling_intr_from_guest;
827 struct kvm_mtrr mtrr_state;
830 unsigned switch_db_regs;
831 unsigned long db[KVM_NR_DB_REGS];
834 unsigned long eff_db[KVM_NR_DB_REGS];
835 unsigned long guest_debug_dr7;
836 u64 msr_platform_info;
837 u64 msr_misc_features_enables;
846 /* Cache MMIO info */
848 unsigned mmio_access;
854 /* used for guest single stepping over the given code position */
855 unsigned long singlestep_rip;
858 struct kvm_vcpu_hv *hyperv;
859 struct kvm_vcpu_xen xen;
861 cpumask_var_t wbinvd_dirty_mask;
863 unsigned long last_retry_eip;
864 unsigned long last_retry_addr;
868 gfn_t gfns[ASYNC_PF_PER_VCPU];
869 struct gfn_to_hva_cache data;
870 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
871 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
876 bool delivery_as_pf_vmexit;
877 bool pageready_pending;
880 /* OSVW MSRs (AMD only) */
888 struct gfn_to_hva_cache data;
891 u64 msr_kvm_poll_control;
894 * Indicates the guest is trying to write a gfn that contains one or
895 * more of the PTEs used to translate the write itself, i.e. the access
896 * is changing its own translation in the guest page tables. KVM exits
897 * to userspace if emulation of the faulting instruction fails and this
898 * flag is set, as KVM cannot make forward progress.
900 * If emulation fails for a write to guest page tables, KVM unprotects
901 * (zaps) the shadow page for the target gfn and resumes the guest to
902 * retry the non-emulatable instruction (on hardware). Unprotecting the
903 * gfn doesn't allow forward progress for a self-changing access because
904 * doing so also zaps the translation for the gfn, i.e. retrying the
905 * instruction will hit a !PRESENT fault, which results in a new shadow
906 * page and sends KVM back to square one.
908 bool write_fault_to_shadow_pgtable;
910 /* set at EPT violation at this point */
911 unsigned long exit_qualification;
913 /* pv related host specific info */
918 int pending_ioapic_eoi;
919 int pending_external_vector;
921 /* be preempted when it's in kernel-mode(cpl=0) */
922 bool preempted_in_kernel;
924 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
927 /* Host CPU on which VM-entry was most recently attempted */
928 int last_vmentry_cpu;
930 /* AMD MSRC001_0015 Hardware Configuration */
933 /* pv related cpuid info */
936 * value of the eax register in the KVM_CPUID_FEATURES CPUID
942 * indicates whether pv emulation should be disabled if features
943 * are not present in the guest's cpuid
948 /* Protected Guests */
949 bool guest_state_protected;
952 * Set when PDPTS were loaded directly by the userspace without
953 * reading the guest memory
955 bool pdptrs_from_userspace;
957 #if IS_ENABLED(CONFIG_HYPERV)
962 struct kvm_lpage_info {
966 struct kvm_arch_memory_slot {
967 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
968 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
969 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
973 * We use as the mode the number of bits allocated in the LDR for the
974 * logical processor ID. It happens that these are all powers of two.
975 * This makes it is very easy to detect cases where the APICs are
976 * configured for multiple modes; in that case, we cannot use the map and
977 * hence cannot use kvm_irq_delivery_to_apic_fast either.
979 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
980 #define KVM_APIC_MODE_XAPIC_FLAT 8
981 #define KVM_APIC_MODE_X2APIC 16
983 struct kvm_apic_map {
988 struct kvm_lapic *xapic_flat_map[8];
989 struct kvm_lapic *xapic_cluster_map[16][4];
991 struct kvm_lapic *phys_map[];
994 /* Hyper-V synthetic debugger (SynDbg)*/
995 struct kvm_hv_syndbg {
1006 /* Current state of Hyper-V TSC page clocksource */
1007 enum hv_tsc_page_status {
1008 /* TSC page was not set up or disabled */
1009 HV_TSC_PAGE_UNSET = 0,
1010 /* TSC page MSR was written by the guest, update pending */
1011 HV_TSC_PAGE_GUEST_CHANGED,
1012 /* TSC page update was triggered from the host side */
1013 HV_TSC_PAGE_HOST_CHANGED,
1014 /* TSC page was properly set up and is currently active */
1016 /* TSC page was set up with an inaccessible GPA */
1020 /* Hyper-V emulation context */
1022 struct mutex hv_lock;
1026 enum hv_tsc_page_status hv_tsc_page_status;
1028 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1029 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1032 struct ms_hyperv_tsc_page tsc_ref;
1034 struct idr conn_to_evt;
1036 u64 hv_reenlightenment_control;
1037 u64 hv_tsc_emulation_control;
1038 u64 hv_tsc_emulation_status;
1040 /* How many vCPUs have VP index != vCPU index */
1041 atomic_t num_mismatched_vp_indexes;
1044 * How many SynICs use 'AutoEOI' feature
1045 * (protected by arch.apicv_update_lock)
1047 unsigned int synic_auto_eoi_used;
1049 struct hv_partition_assist_pg *hv_pa_pg;
1050 struct kvm_hv_syndbg hv_syndbg;
1053 struct msr_bitmap_range {
1057 unsigned long *bitmap;
1060 /* Xen emulation context */
1065 struct gfn_to_pfn_cache shinfo_cache;
1066 struct idr evtchn_ports;
1067 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1070 enum kvm_irqchip_mode {
1072 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1073 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1076 struct kvm_x86_msr_filter {
1078 bool default_allow:1;
1079 struct msr_bitmap_range ranges[16];
1082 enum kvm_apicv_inhibit {
1084 /********************************************************************/
1085 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1086 /********************************************************************/
1089 * APIC acceleration is disabled by a module parameter
1090 * and/or not supported in hardware.
1092 APICV_INHIBIT_REASON_DISABLE,
1095 * APIC acceleration is inhibited because AutoEOI feature is
1096 * being used by a HyperV guest.
1098 APICV_INHIBIT_REASON_HYPERV,
1101 * APIC acceleration is inhibited because the userspace didn't yet
1102 * enable the kernel/split irqchip.
1104 APICV_INHIBIT_REASON_ABSENT,
1106 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1107 * (out of band, debug measure of blocking all interrupts on this vCPU)
1108 * was enabled, to avoid AVIC/APICv bypassing it.
1110 APICV_INHIBIT_REASON_BLOCKIRQ,
1113 * For simplicity, the APIC acceleration is inhibited
1114 * first time either APIC ID or APIC base are changed by the guest
1115 * from their reset values.
1117 APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1118 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1120 /******************************************************/
1121 /* INHIBITs that are relevant only to the AMD's AVIC. */
1122 /******************************************************/
1125 * AVIC is inhibited on a vCPU because it runs a nested guest.
1127 * This is needed because unlike APICv, the peers of this vCPU
1128 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1129 * a vCPU runs nested.
1131 APICV_INHIBIT_REASON_NESTED,
1134 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1135 * which cannot be injected when the AVIC is enabled, thus AVIC
1136 * is inhibited while KVM waits for IRQ window.
1138 APICV_INHIBIT_REASON_IRQWIN,
1141 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1142 * which AVIC doesn't support for edge triggered interrupts.
1144 APICV_INHIBIT_REASON_PIT_REINJ,
1147 * AVIC is disabled because SEV doesn't support it.
1149 APICV_INHIBIT_REASON_SEV,
1153 unsigned long n_used_mmu_pages;
1154 unsigned long n_requested_mmu_pages;
1155 unsigned long n_max_mmu_pages;
1156 unsigned int indirect_shadow_pages;
1158 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1159 struct list_head active_mmu_pages;
1160 struct list_head zapped_obsolete_pages;
1161 struct list_head lpage_disallowed_mmu_pages;
1162 struct kvm_page_track_notifier_node mmu_sp_tracker;
1163 struct kvm_page_track_notifier_head track_notifier_head;
1165 * Protects marking pages unsync during page faults, as TDP MMU page
1166 * faults only take mmu_lock for read. For simplicity, the unsync
1167 * pages lock is always taken when marking pages unsync regardless of
1168 * whether mmu_lock is held for read or write.
1170 spinlock_t mmu_unsync_pages_lock;
1172 struct list_head assigned_dev_head;
1173 struct iommu_domain *iommu_domain;
1174 bool iommu_noncoherent;
1175 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1176 atomic_t noncoherent_dma_count;
1177 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1178 atomic_t assigned_device_count;
1179 struct kvm_pic *vpic;
1180 struct kvm_ioapic *vioapic;
1181 struct kvm_pit *vpit;
1182 atomic_t vapics_in_nmi_mode;
1183 struct mutex apic_map_lock;
1184 struct kvm_apic_map __rcu *apic_map;
1185 atomic_t apic_map_dirty;
1187 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */
1188 struct rw_semaphore apicv_update_lock;
1190 bool apic_access_memslot_enabled;
1191 unsigned long apicv_inhibit_reasons;
1195 bool mwait_in_guest;
1197 bool pause_in_guest;
1198 bool cstate_in_guest;
1200 unsigned long irq_sources_bitmap;
1201 s64 kvmclock_offset;
1204 * This also protects nr_vcpus_matched_tsc which is read from a
1205 * preemption-disabled region, so it must be a raw spinlock.
1207 raw_spinlock_t tsc_write_lock;
1211 u64 last_tsc_offset;
1215 u64 cur_tsc_generation;
1216 int nr_vcpus_matched_tsc;
1218 u32 default_tsc_khz;
1220 seqcount_raw_spinlock_t pvclock_sc;
1221 bool use_master_clock;
1222 u64 master_kernel_ns;
1223 u64 master_cycle_now;
1224 struct delayed_work kvmclock_update_work;
1225 struct delayed_work kvmclock_sync_work;
1227 struct kvm_xen_hvm_config xen_hvm_config;
1229 /* reads protected by irq_srcu, writes by irq_lock */
1230 struct hlist_head mask_notifier_list;
1232 struct kvm_hv hyperv;
1235 bool backwards_tsc_observed;
1236 bool boot_vcpu_runs_old_kvmclock;
1239 u64 disabled_quirks;
1240 int cpu_dirty_logging_count;
1242 enum kvm_irqchip_mode irqchip_mode;
1243 u8 nr_reserved_ioapic_pins;
1245 bool disabled_lapic_found;
1248 bool x2apic_broadcast_quirk_disabled;
1250 bool guest_can_read_msr_platform_info;
1251 bool exception_payload_enabled;
1253 bool triple_fault_event;
1255 bool bus_lock_detection_enabled;
1259 u32 notify_vmexit_flags;
1261 * If exit_on_emulation_error is set, and the in-kernel instruction
1262 * emulator fails to emulate an instruction, allow userspace
1263 * the opportunity to look at it.
1265 bool exit_on_emulation_error;
1267 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1268 u32 user_space_msr_mask;
1269 struct kvm_x86_msr_filter __rcu *msr_filter;
1271 u32 hypercall_exit_enabled;
1273 /* Guest can access the SGX PROVISIONKEY. */
1274 bool sgx_provisioning_allowed;
1276 struct kvm_pmu_event_filter __rcu *pmu_event_filter;
1277 struct task_struct *nx_lpage_recovery_thread;
1279 #ifdef CONFIG_X86_64
1281 * Whether the TDP MMU is enabled for this VM. This contains a
1282 * snapshot of the TDP MMU module parameter from when the VM was
1283 * created and remains unchanged for the life of the VM. If this is
1284 * true, TDP MMU handler functions will run for various MMU
1287 bool tdp_mmu_enabled;
1290 * List of kvm_mmu_page structs being used as roots.
1291 * All kvm_mmu_page structs in the list should have
1294 * For reads, this list is protected by:
1295 * the MMU lock in read mode + RCU or
1296 * the MMU lock in write mode
1298 * For writes, this list is protected by:
1299 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1300 * the MMU lock in write mode
1302 * Roots will remain in the list until their tdp_mmu_root_count
1303 * drops to zero, at which point the thread that decremented the
1304 * count to zero should removed the root from the list and clean
1305 * it up, freeing the root after an RCU grace period.
1307 struct list_head tdp_mmu_roots;
1310 * List of kvm_mmu_page structs not being used as roots.
1311 * All kvm_mmu_page structs in the list should have
1312 * tdp_mmu_page set and a tdp_mmu_root_count of 0.
1314 struct list_head tdp_mmu_pages;
1317 * Protects accesses to the following fields when the MMU lock
1318 * is held in read mode:
1319 * - tdp_mmu_roots (above)
1320 * - tdp_mmu_pages (above)
1321 * - the link field of kvm_mmu_page structs used by the TDP MMU
1322 * - lpage_disallowed_mmu_pages
1323 * - the lpage_disallowed_link field of kvm_mmu_page structs used
1325 * It is acceptable, but not necessary, to acquire this lock when
1326 * the thread holds the MMU lock in write mode.
1328 spinlock_t tdp_mmu_pages_lock;
1329 struct workqueue_struct *tdp_mmu_zap_wq;
1330 #endif /* CONFIG_X86_64 */
1333 * If set, at least one shadow root has been allocated. This flag
1334 * is used as one input when determining whether certain memslot
1335 * related allocations are necessary.
1337 bool shadow_root_allocated;
1339 #if IS_ENABLED(CONFIG_HYPERV)
1341 spinlock_t hv_root_tdp_lock;
1344 * VM-scope maximum vCPU ID. Used to determine the size of structures
1345 * that increase along with the maximum vCPU ID, in which case, using
1346 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1350 bool disable_nx_huge_pages;
1353 * Memory caches used to allocate shadow pages when performing eager
1354 * page splitting. No need for a shadowed_info_cache since eager page
1355 * splitting only allocates direct shadow pages.
1357 * Protected by kvm->slots_lock.
1359 struct kvm_mmu_memory_cache split_shadow_page_cache;
1360 struct kvm_mmu_memory_cache split_page_header_cache;
1363 * Memory cache used to allocate pte_list_desc structs while splitting
1364 * huge pages. In the worst case, to split one huge page, 512
1365 * pte_list_desc structs are needed to add each lower level leaf sptep
1366 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1369 * Protected by kvm->slots_lock.
1371 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1372 struct kvm_mmu_memory_cache split_desc_cache;
1375 struct kvm_vm_stat {
1376 struct kvm_vm_stat_generic generic;
1377 u64 mmu_shadow_zapped;
1386 atomic64_t pages_4k;
1387 atomic64_t pages_2m;
1388 atomic64_t pages_1g;
1390 atomic64_t pages[KVM_NR_PAGE_SIZES];
1392 u64 nx_lpage_splits;
1393 u64 max_mmu_page_hash_collisions;
1394 u64 max_mmu_rmap_size;
1397 struct kvm_vcpu_stat {
1398 struct kvm_vcpu_stat_generic generic;
1404 u64 pf_mmio_spte_created;
1413 u64 irq_window_exits;
1414 u64 nmi_window_exits;
1417 u64 request_irq_exits;
1419 u64 host_state_reload;
1422 u64 insn_emulation_fail;
1428 u64 directed_yield_attempted;
1429 u64 directed_yield_successful;
1430 u64 preemption_reported;
1431 u64 preemption_other;
1433 u64 notify_window_exits;
1436 struct x86_instruction_info;
1439 bool host_initiated;
1444 struct kvm_lapic_irq {
1452 bool msi_redir_hint;
1455 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1457 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1460 struct kvm_x86_ops {
1463 int (*hardware_enable)(void);
1464 void (*hardware_disable)(void);
1465 void (*hardware_unsetup)(void);
1466 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1467 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1469 unsigned int vm_size;
1470 int (*vm_init)(struct kvm *kvm);
1471 void (*vm_destroy)(struct kvm *kvm);
1473 /* Create, but do not attach this VCPU */
1474 int (*vcpu_precreate)(struct kvm *kvm);
1475 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1476 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1477 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1479 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1480 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1481 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1483 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1484 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1485 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1486 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1487 void (*get_segment)(struct kvm_vcpu *vcpu,
1488 struct kvm_segment *var, int seg);
1489 int (*get_cpl)(struct kvm_vcpu *vcpu);
1490 void (*set_segment)(struct kvm_vcpu *vcpu,
1491 struct kvm_segment *var, int seg);
1492 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1493 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1494 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1495 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
1496 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1497 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1498 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1499 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1500 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1501 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1502 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1503 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1504 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1505 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1506 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1507 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1509 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1510 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1511 int (*tlb_remote_flush)(struct kvm *kvm);
1512 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1513 struct kvm_tlb_range *range);
1516 * Flush any TLB entries associated with the given GVA.
1517 * Does not need to flush GPA->HPA mappings.
1518 * Can potentially get non-canonical addresses through INVLPGs, which
1519 * the implementation may choose to ignore if appropriate.
1521 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1524 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1525 * does not need to flush GPA->HPA mappings.
1527 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1529 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1530 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu);
1531 int (*handle_exit)(struct kvm_vcpu *vcpu,
1532 enum exit_fastpath_completion exit_fastpath);
1533 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1534 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1535 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1536 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1537 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1538 unsigned char *hypercall_addr);
1539 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1540 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1541 void (*inject_exception)(struct kvm_vcpu *vcpu);
1542 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1543 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1544 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1545 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1546 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1547 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1548 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1549 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1550 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1551 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1552 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1553 void (*hwapic_isr_update)(int isr);
1554 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1555 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1556 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1557 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1558 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1559 int trig_mode, int vector);
1560 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1561 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1562 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1563 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1565 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1568 bool (*has_wbinvd_exit)(void);
1570 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1571 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1572 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1573 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);
1576 * Retrieve somewhat arbitrary exit information. Intended to
1577 * be used only from within tracepoints or error paths.
1579 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1580 u64 *info1, u64 *info2,
1581 u32 *exit_int_info, u32 *exit_int_info_err_code);
1583 int (*check_intercept)(struct kvm_vcpu *vcpu,
1584 struct x86_instruction_info *info,
1585 enum x86_intercept_stage stage,
1586 struct x86_exception *exception);
1587 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1589 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1591 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1594 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1595 * value indicates CPU dirty logging is unsupported or disabled.
1597 int cpu_dirty_log_size;
1598 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1600 const struct kvm_x86_nested_ops *nested_ops;
1602 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1603 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1605 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1606 uint32_t guest_irq, bool set);
1607 void (*pi_start_assignment)(struct kvm *kvm);
1608 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1609 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1611 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1613 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1615 void (*setup_mce)(struct kvm_vcpu *vcpu);
1617 #ifdef CONFIG_KVM_SMM
1618 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1619 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1620 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1621 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1624 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1625 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1626 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1627 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1628 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1629 void (*guest_memory_reclaimed)(struct kvm *kvm);
1631 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1633 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1634 void *insn, int insn_len);
1636 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1637 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1639 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1640 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1641 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1643 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1646 * Returns vCPU specific APICv inhibit reasons
1648 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1651 struct kvm_x86_nested_ops {
1652 void (*leave_nested)(struct kvm_vcpu *vcpu);
1653 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1655 int (*check_events)(struct kvm_vcpu *vcpu);
1656 bool (*has_events)(struct kvm_vcpu *vcpu);
1657 void (*triple_fault)(struct kvm_vcpu *vcpu);
1658 int (*get_state)(struct kvm_vcpu *vcpu,
1659 struct kvm_nested_state __user *user_kvm_nested_state,
1660 unsigned user_data_size);
1661 int (*set_state)(struct kvm_vcpu *vcpu,
1662 struct kvm_nested_state __user *user_kvm_nested_state,
1663 struct kvm_nested_state *kvm_state);
1664 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1665 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1667 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1668 uint16_t *vmcs_version);
1669 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1672 struct kvm_x86_init_ops {
1673 int (*cpu_has_kvm_support)(void);
1674 int (*disabled_by_bios)(void);
1675 int (*check_processor_compatibility)(void);
1676 int (*hardware_setup)(void);
1677 unsigned int (*handle_intel_pt_intr)(void);
1679 struct kvm_x86_ops *runtime_ops;
1680 struct kvm_pmu_ops *pmu_ops;
1683 struct kvm_arch_async_pf {
1690 extern u32 __read_mostly kvm_nr_uret_msrs;
1691 extern u64 __read_mostly host_efer;
1692 extern bool __read_mostly allow_smaller_maxphyaddr;
1693 extern bool __read_mostly enable_apicv;
1694 extern struct kvm_x86_ops kvm_x86_ops;
1696 #define KVM_X86_OP(func) \
1697 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1698 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1699 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1700 #include <asm/kvm-x86-ops.h>
1702 #define __KVM_HAVE_ARCH_VM_ALLOC
1703 static inline struct kvm *kvm_arch_alloc_vm(void)
1705 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1708 #define __KVM_HAVE_ARCH_VM_FREE
1709 void kvm_arch_free_vm(struct kvm *kvm);
1711 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1712 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1714 if (kvm_x86_ops.tlb_remote_flush &&
1715 !static_call(kvm_x86_tlb_remote_flush)(kvm))
1721 #define kvm_arch_pmi_in_guest(vcpu) \
1722 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1724 void __init kvm_mmu_x86_module_init(void);
1725 int kvm_mmu_vendor_module_init(void);
1726 void kvm_mmu_vendor_module_exit(void);
1728 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1729 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1730 int kvm_mmu_init_vm(struct kvm *kvm);
1731 void kvm_mmu_uninit_vm(struct kvm *kvm);
1733 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1734 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1735 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1736 const struct kvm_memory_slot *memslot,
1738 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1739 const struct kvm_memory_slot *memslot,
1741 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1742 const struct kvm_memory_slot *memslot,
1745 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1746 const struct kvm_memory_slot *memslot);
1747 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1748 const struct kvm_memory_slot *memslot);
1749 void kvm_mmu_zap_all(struct kvm *kvm);
1750 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1751 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1753 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1755 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1756 const void *val, int bytes);
1758 struct kvm_irq_mask_notifier {
1759 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1761 struct hlist_node link;
1764 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1765 struct kvm_irq_mask_notifier *kimn);
1766 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1767 struct kvm_irq_mask_notifier *kimn);
1768 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1771 extern bool tdp_enabled;
1773 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1776 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1777 * userspace I/O) to indicate that the emulation context
1778 * should be reused as is, i.e. skip initialization of
1779 * emulation context, instruction fetch and decode.
1781 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1782 * Indicates that only select instructions (tagged with
1783 * EmulateOnUD) should be emulated (to minimize the emulator
1784 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1786 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1787 * decode the instruction length. For use *only* by
1788 * kvm_x86_ops.skip_emulated_instruction() implementations if
1789 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1791 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1792 * retry native execution under certain conditions,
1793 * Can only be set in conjunction with EMULTYPE_PF.
1795 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1796 * triggered by KVM's magic "force emulation" prefix,
1797 * which is opt in via module param (off by default).
1798 * Bypasses EmulateOnUD restriction despite emulating
1799 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1800 * Used to test the full emulator from userspace.
1802 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1803 * backdoor emulation, which is opt in via module param.
1804 * VMware backdoor emulation handles select instructions
1805 * and reinjects the #GP for all other cases.
1807 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1808 * case the CR2/GPA value pass on the stack is valid.
1810 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1811 * state and inject single-step #DBs after skipping
1812 * an instruction (after completing userspace I/O).
1814 #define EMULTYPE_NO_DECODE (1 << 0)
1815 #define EMULTYPE_TRAP_UD (1 << 1)
1816 #define EMULTYPE_SKIP (1 << 2)
1817 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1818 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1819 #define EMULTYPE_VMWARE_GP (1 << 5)
1820 #define EMULTYPE_PF (1 << 6)
1821 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1823 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1824 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1825 void *insn, int insn_len);
1826 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1827 u64 *data, u8 ndata);
1828 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1830 void kvm_enable_efer_bits(u64);
1831 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1832 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1833 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1834 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1835 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1836 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1837 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1838 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1839 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1840 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1841 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1843 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1844 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1845 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1846 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
1847 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1848 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1850 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1851 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1852 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1853 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1855 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1856 int reason, bool has_error_code, u32 error_code);
1858 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1859 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1860 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1861 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1862 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1863 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1864 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1865 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1866 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1867 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1868 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
1870 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1871 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1873 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1874 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1875 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
1877 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1878 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1879 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1880 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1881 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1882 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1883 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1884 struct x86_exception *fault);
1885 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1886 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1888 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1889 int irq_source_id, int level)
1891 /* Logical OR for level trig interrupt */
1893 __set_bit(irq_source_id, irq_state);
1895 __clear_bit(irq_source_id, irq_state);
1897 return !!(*irq_state);
1900 #define KVM_MMU_ROOT_CURRENT BIT(0)
1901 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1902 #define KVM_MMU_ROOTS_ALL (~0UL)
1904 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1905 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1907 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1909 void kvm_update_dr7(struct kvm_vcpu *vcpu);
1911 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1912 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
1913 ulong roots_to_free);
1914 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
1915 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1916 struct x86_exception *exception);
1917 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1918 struct x86_exception *exception);
1919 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1920 struct x86_exception *exception);
1922 bool kvm_apicv_activated(struct kvm *kvm);
1923 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
1924 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1925 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
1926 enum kvm_apicv_inhibit reason, bool set);
1927 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
1928 enum kvm_apicv_inhibit reason, bool set);
1930 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
1931 enum kvm_apicv_inhibit reason)
1933 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
1936 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
1937 enum kvm_apicv_inhibit reason)
1939 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
1942 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1944 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1945 void *insn, int insn_len);
1946 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1947 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1948 gva_t gva, hpa_t root_hpa);
1949 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1950 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
1952 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
1953 int tdp_max_root_level, int tdp_huge_page_level);
1955 static inline u16 kvm_read_ldt(void)
1958 asm("sldt %0" : "=g"(ldt));
1962 static inline void kvm_load_ldt(u16 sel)
1964 asm("lldt %0" : : "rm"(sel));
1967 #ifdef CONFIG_X86_64
1968 static inline unsigned long read_msr(unsigned long msr)
1977 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1979 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1982 #define TSS_IOPB_BASE_OFFSET 0x66
1983 #define TSS_BASE_SIZE 0x68
1984 #define TSS_IOPB_SIZE (65536 / 8)
1985 #define TSS_REDIRECTION_SIZE (256 / 8)
1986 #define RMODE_TSS_SIZE \
1987 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1990 TASK_SWITCH_CALL = 0,
1991 TASK_SWITCH_IRET = 1,
1992 TASK_SWITCH_JMP = 2,
1993 TASK_SWITCH_GATE = 3,
1996 #define HF_GIF_MASK (1 << 0)
1997 #define HF_NMI_MASK (1 << 3)
1998 #define HF_IRET_MASK (1 << 4)
1999 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
2000 #define HF_SMM_MASK (1 << 6)
2001 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
2003 #ifdef CONFIG_KVM_SMM
2004 # define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
2005 # define KVM_ADDRESS_SPACE_NUM 2
2006 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2007 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2009 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2012 #define KVM_ARCH_WANT_MMU_NOTIFIER
2014 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2015 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2016 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2017 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2018 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2019 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2021 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2022 unsigned long ipi_bitmap_high, u32 min,
2023 unsigned long icr, int op_64_bit);
2025 int kvm_add_user_return_msr(u32 msr);
2026 int kvm_find_user_return_msr(u32 msr);
2027 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2029 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2031 return kvm_find_user_return_msr(msr) >= 0;
2034 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2035 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2036 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2037 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2039 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2040 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2042 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2043 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2044 unsigned long *vcpu_bitmap);
2046 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2047 struct kvm_async_pf *work);
2048 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2049 struct kvm_async_pf *work);
2050 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2051 struct kvm_async_pf *work);
2052 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2053 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2054 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2056 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2057 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2058 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
2060 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2062 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2063 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2065 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2066 struct kvm_vcpu **dest_vcpu);
2068 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2069 struct kvm_lapic_irq *irq);
2071 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2073 /* We can only post Fixed and LowPrio IRQs */
2074 return (irq->delivery_mode == APIC_DM_FIXED ||
2075 irq->delivery_mode == APIC_DM_LOWEST);
2078 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2080 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
2083 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2085 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
2088 static inline int kvm_cpu_get_apicid(int mps_cpu)
2090 #ifdef CONFIG_X86_LOCAL_APIC
2091 return default_cpu_present_to_apicid(mps_cpu);
2098 int kvm_cpu_dirty_log_size(void);
2100 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2102 #define KVM_CLOCK_VALID_FLAGS \
2103 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2105 #define KVM_X86_VALID_QUIRKS \
2106 (KVM_X86_QUIRK_LINT0_REENABLED | \
2107 KVM_X86_QUIRK_CD_NW_CLEARED | \
2108 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2109 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2110 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2111 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2112 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2114 #endif /* _ASM_X86_KVM_HOST_H */