Merge remote-tracking branch 'asoc/topic/pcm512x' into asoc-next
[sfrench/cifs-2.6.git] / arch / x86 / include / asm / intel-family.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_INTEL_FAMILY_H
3 #define _ASM_X86_INTEL_FAMILY_H
4
5 /*
6  * "Big Core" Processors (Branded as Core, Xeon, etc...)
7  *
8  * The "_X" parts are generally the EP and EX Xeons, or the
9  * "Extreme" ones, like Broadwell-E.
10  *
11  * Things ending in "2" are usually because we have no better
12  * name for them.  There's no processor called "SILVERMONT2".
13  */
14
15 #define INTEL_FAM6_CORE_YONAH           0x0E
16
17 #define INTEL_FAM6_CORE2_MEROM          0x0F
18 #define INTEL_FAM6_CORE2_MEROM_L        0x16
19 #define INTEL_FAM6_CORE2_PENRYN         0x17
20 #define INTEL_FAM6_CORE2_DUNNINGTON     0x1D
21
22 #define INTEL_FAM6_NEHALEM              0x1E
23 #define INTEL_FAM6_NEHALEM_G            0x1F /* Auburndale / Havendale */
24 #define INTEL_FAM6_NEHALEM_EP           0x1A
25 #define INTEL_FAM6_NEHALEM_EX           0x2E
26
27 #define INTEL_FAM6_WESTMERE             0x25
28 #define INTEL_FAM6_WESTMERE_EP          0x2C
29 #define INTEL_FAM6_WESTMERE_EX          0x2F
30
31 #define INTEL_FAM6_SANDYBRIDGE          0x2A
32 #define INTEL_FAM6_SANDYBRIDGE_X        0x2D
33 #define INTEL_FAM6_IVYBRIDGE            0x3A
34 #define INTEL_FAM6_IVYBRIDGE_X          0x3E
35
36 #define INTEL_FAM6_HASWELL_CORE         0x3C
37 #define INTEL_FAM6_HASWELL_X            0x3F
38 #define INTEL_FAM6_HASWELL_ULT          0x45
39 #define INTEL_FAM6_HASWELL_GT3E         0x46
40
41 #define INTEL_FAM6_BROADWELL_CORE       0x3D
42 #define INTEL_FAM6_BROADWELL_GT3E       0x47
43 #define INTEL_FAM6_BROADWELL_X          0x4F
44 #define INTEL_FAM6_BROADWELL_XEON_D     0x56
45
46 #define INTEL_FAM6_SKYLAKE_MOBILE       0x4E
47 #define INTEL_FAM6_SKYLAKE_DESKTOP      0x5E
48 #define INTEL_FAM6_SKYLAKE_X            0x55
49 #define INTEL_FAM6_KABYLAKE_MOBILE      0x8E
50 #define INTEL_FAM6_KABYLAKE_DESKTOP     0x9E
51
52 /* "Small Core" Processors (Atom) */
53
54 #define INTEL_FAM6_ATOM_PINEVIEW        0x1C
55 #define INTEL_FAM6_ATOM_LINCROFT        0x26
56 #define INTEL_FAM6_ATOM_PENWELL         0x27
57 #define INTEL_FAM6_ATOM_CLOVERVIEW      0x35
58 #define INTEL_FAM6_ATOM_CEDARVIEW       0x36
59 #define INTEL_FAM6_ATOM_SILVERMONT1     0x37 /* BayTrail/BYT / Valleyview */
60 #define INTEL_FAM6_ATOM_SILVERMONT2     0x4D /* Avaton/Rangely */
61 #define INTEL_FAM6_ATOM_AIRMONT         0x4C /* CherryTrail / Braswell */
62 #define INTEL_FAM6_ATOM_MERRIFIELD      0x4A /* Tangier */
63 #define INTEL_FAM6_ATOM_MOOREFIELD      0x5A /* Anniedale */
64 #define INTEL_FAM6_ATOM_GOLDMONT        0x5C
65 #define INTEL_FAM6_ATOM_DENVERTON       0x5F /* Goldmont Microserver */
66 #define INTEL_FAM6_ATOM_GEMINI_LAKE     0x7A
67
68 /* Xeon Phi */
69
70 #define INTEL_FAM6_XEON_PHI_KNL         0x57 /* Knights Landing */
71 #define INTEL_FAM6_XEON_PHI_KNM         0x85 /* Knights Mill */
72
73 #endif /* _ASM_X86_INTEL_FAMILY_H */