3 * (Compatible with Algo System ., LTD. - AP-320A)
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/mtd/sh_flctl.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/smsc911x.h>
22 #include <linux/gpio.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_gpio.h>
25 #include <media/soc_camera.h>
26 #include <media/soc_camera_platform.h>
27 #include <media/sh_mobile_ceu.h>
28 #include <video/sh_mobile_lcdc.h>
30 #include <asm/clock.h>
31 #include <cpu/sh7723.h>
33 static struct smsc911x_platform_config smsc911x_config = {
34 .phy_interface = PHY_INTERFACE_MODE_MII,
35 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
36 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
37 .flags = SMSC911X_USE_32BIT,
40 static struct resource smsc9118_resources[] = {
44 .flags = IORESOURCE_MEM,
49 .flags = IORESOURCE_IRQ,
53 static struct platform_device smsc9118_device = {
56 .num_resources = ARRAY_SIZE(smsc9118_resources),
57 .resource = smsc9118_resources,
59 .platform_data = &smsc911x_config,
64 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
65 * If this area erased, this board can not boot.
67 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
71 .size = (1 * 1024 * 1024),
72 .mask_flags = MTD_WRITEABLE, /* Read-only */
75 .offset = MTDPART_OFS_APPEND,
76 .size = (2 * 1024 * 1024),
79 .offset = MTDPART_OFS_APPEND,
80 .size = ((7 * 1024 * 1024) + (512 * 1024)),
83 .offset = MTDPART_OFS_APPEND,
84 .mask_flags = MTD_WRITEABLE, /* Read-only */
85 .size = (1024 * 128 * 2),
88 .offset = MTDPART_OFS_APPEND,
89 .size = MTDPART_SIZ_FULL,
93 static struct physmap_flash_data ap325rxa_nor_flash_data = {
95 .parts = ap325rxa_nor_flash_partitions,
96 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
99 static struct resource ap325rxa_nor_flash_resources[] = {
104 .flags = IORESOURCE_MEM,
108 static struct platform_device ap325rxa_nor_flash_device = {
109 .name = "physmap-flash",
110 .resource = ap325rxa_nor_flash_resources,
111 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
113 .platform_data = &ap325rxa_nor_flash_data,
117 static struct mtd_partition nand_partition_info[] = {
121 .size = MTDPART_SIZ_FULL,
125 static struct resource nand_flash_resources[] = {
129 .flags = IORESOURCE_MEM,
133 static struct sh_flctl_platform_data nand_flash_data = {
134 .parts = nand_partition_info,
135 .nr_parts = ARRAY_SIZE(nand_partition_info),
136 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
140 static struct platform_device nand_flash_device = {
142 .resource = nand_flash_resources,
143 .num_resources = ARRAY_SIZE(nand_flash_resources),
145 .platform_data = &nand_flash_data,
149 #define FPGA_LCDREG 0xB4100180
150 #define FPGA_BKLREG 0xB4100212
151 #define FPGA_LCDREG_VAL 0x0018
152 #define PORT_MSELCRB 0xA4050182
153 #define PORT_HIZCRC 0xA405015C
154 #define PORT_DRVCRA 0xA405018A
155 #define PORT_DRVCRB 0xA405018C
157 static void ap320_wvga_power_on(void *board_data)
161 /* ASD AP-320/325 LCD ON */
162 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
165 gpio_set_value(GPIO_PTS3, 0);
166 ctrl_outw(0x100, FPGA_BKLREG);
169 static void ap320_wvga_power_off(void *board_data)
172 ctrl_outw(0, FPGA_BKLREG);
173 gpio_set_value(GPIO_PTS3, 1);
175 /* ASD AP-320/325 LCD OFF */
176 ctrl_outw(0, FPGA_LCDREG);
179 static struct sh_mobile_lcdc_info lcdc_info = {
180 .clock_source = LCDC_CLK_EXTERNAL,
182 .chan = LCDC_CHAN_MAINLCD,
184 .interface_type = RGB18,
196 .sync = 0, /* hsync and vsync are active low */
198 .lcd_size_cfg = { /* 7.0 inch */
203 .display_on = ap320_wvga_power_on,
204 .display_off = ap320_wvga_power_off,
209 static struct resource lcdc_resources[] = {
212 .start = 0xfe940000, /* P4-only space */
214 .flags = IORESOURCE_MEM,
218 .flags = IORESOURCE_IRQ,
222 static struct platform_device lcdc_device = {
223 .name = "sh_mobile_lcdc_fb",
224 .num_resources = ARRAY_SIZE(lcdc_resources),
225 .resource = lcdc_resources,
227 .platform_data = &lcdc_info,
231 static void camera_power(int val)
233 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
238 static unsigned char camera_ncm03j_magic[] =
240 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
241 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
242 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
243 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
244 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
245 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
246 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
247 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
248 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
249 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
250 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
251 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
252 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
253 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
254 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
255 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
258 static int camera_set_capture(struct soc_camera_platform_info *info,
261 struct i2c_adapter *a = i2c_get_adapter(0);
268 return 0; /* no disable for now */
271 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
279 buf[0] = camera_ncm03j_magic[i];
280 buf[1] = camera_ncm03j_magic[i + 1];
282 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
288 static struct soc_camera_platform_info camera_info = {
290 .format_name = "UYVY",
293 .pixelformat = V4L2_PIX_FMT_UYVY,
294 .colorspace = V4L2_COLORSPACE_SMPTE170M,
298 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
299 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
300 .set_capture = camera_set_capture,
303 static struct platform_device camera_device = {
304 .name = "soc_camera_platform",
306 .platform_data = &camera_info,
309 #endif /* CONFIG_I2C */
311 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
312 .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
313 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH | SOCAM_MASTER |
317 static struct resource ceu_resources[] = {
322 .flags = IORESOURCE_MEM,
326 .flags = IORESOURCE_IRQ,
329 /* place holder for contiguous memory */
333 static struct platform_device ceu_device = {
334 .name = "sh_mobile_ceu",
335 .id = 0, /* "ceu0" clock */
336 .num_resources = ARRAY_SIZE(ceu_resources),
337 .resource = ceu_resources,
339 .platform_data = &sh_mobile_ceu_info,
343 struct spi_gpio_platform_data sdcard_cn3_platform_data = {
350 static struct platform_device sdcard_cn3_device = {
353 .platform_data = &sdcard_cn3_platform_data,
357 static struct platform_device *ap325rxa_devices[] __initdata = {
359 &ap325rxa_nor_flash_device,
369 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
371 I2C_BOARD_INFO("pcf8563", 0x51),
375 static struct spi_board_info ap325rxa_spi_devices[] = {
377 .modalias = "mmc_spi",
378 .max_speed_hz = 5000000,
380 .controller_data = (void *) GPIO_PTD5,
384 static int __init ap325rxa_devices_setup(void)
386 /* LD3 and LD4 LEDs */
387 gpio_request(GPIO_PTX5, NULL); /* RUN */
388 gpio_direction_output(GPIO_PTX5, 1);
389 gpio_export(GPIO_PTX5, 0);
391 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
392 gpio_direction_output(GPIO_PTX4, 0);
393 gpio_export(GPIO_PTX4, 0);
396 gpio_request(GPIO_PTF7, NULL); /* MODE */
397 gpio_direction_input(GPIO_PTF7);
398 gpio_export(GPIO_PTF7, 0);
401 gpio_request(GPIO_FN_LCDD15, NULL);
402 gpio_request(GPIO_FN_LCDD14, NULL);
403 gpio_request(GPIO_FN_LCDD13, NULL);
404 gpio_request(GPIO_FN_LCDD12, NULL);
405 gpio_request(GPIO_FN_LCDD11, NULL);
406 gpio_request(GPIO_FN_LCDD10, NULL);
407 gpio_request(GPIO_FN_LCDD9, NULL);
408 gpio_request(GPIO_FN_LCDD8, NULL);
409 gpio_request(GPIO_FN_LCDD7, NULL);
410 gpio_request(GPIO_FN_LCDD6, NULL);
411 gpio_request(GPIO_FN_LCDD5, NULL);
412 gpio_request(GPIO_FN_LCDD4, NULL);
413 gpio_request(GPIO_FN_LCDD3, NULL);
414 gpio_request(GPIO_FN_LCDD2, NULL);
415 gpio_request(GPIO_FN_LCDD1, NULL);
416 gpio_request(GPIO_FN_LCDD0, NULL);
417 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
418 gpio_request(GPIO_FN_LCDDCK, NULL);
419 gpio_request(GPIO_FN_LCDVEPWC, NULL);
420 gpio_request(GPIO_FN_LCDVCPWC, NULL);
421 gpio_request(GPIO_FN_LCDVSYN, NULL);
422 gpio_request(GPIO_FN_LCDHSYN, NULL);
423 gpio_request(GPIO_FN_LCDDISP, NULL);
424 gpio_request(GPIO_FN_LCDDON, NULL);
427 gpio_request(GPIO_PTS3, NULL);
428 gpio_direction_output(GPIO_PTS3, 1);
431 gpio_request(GPIO_FN_VIO_CLK2, NULL);
432 gpio_request(GPIO_FN_VIO_VD2, NULL);
433 gpio_request(GPIO_FN_VIO_HD2, NULL);
434 gpio_request(GPIO_FN_VIO_FLD, NULL);
435 gpio_request(GPIO_FN_VIO_CKO, NULL);
436 gpio_request(GPIO_FN_VIO_D15, NULL);
437 gpio_request(GPIO_FN_VIO_D14, NULL);
438 gpio_request(GPIO_FN_VIO_D13, NULL);
439 gpio_request(GPIO_FN_VIO_D12, NULL);
440 gpio_request(GPIO_FN_VIO_D11, NULL);
441 gpio_request(GPIO_FN_VIO_D10, NULL);
442 gpio_request(GPIO_FN_VIO_D9, NULL);
443 gpio_request(GPIO_FN_VIO_D8, NULL);
445 gpio_request(GPIO_PTZ7, NULL);
446 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
447 gpio_request(GPIO_PTZ6, NULL);
448 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
449 gpio_request(GPIO_PTZ5, NULL);
450 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
451 gpio_request(GPIO_PTZ4, NULL);
452 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
454 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
457 gpio_request(GPIO_FN_FCE, NULL);
458 gpio_request(GPIO_FN_NAF7, NULL);
459 gpio_request(GPIO_FN_NAF6, NULL);
460 gpio_request(GPIO_FN_NAF5, NULL);
461 gpio_request(GPIO_FN_NAF4, NULL);
462 gpio_request(GPIO_FN_NAF3, NULL);
463 gpio_request(GPIO_FN_NAF2, NULL);
464 gpio_request(GPIO_FN_NAF1, NULL);
465 gpio_request(GPIO_FN_NAF0, NULL);
466 gpio_request(GPIO_FN_FCDE, NULL);
467 gpio_request(GPIO_FN_FOE, NULL);
468 gpio_request(GPIO_FN_FSC, NULL);
469 gpio_request(GPIO_FN_FWE, NULL);
470 gpio_request(GPIO_FN_FRB, NULL);
472 ctrl_outw(0, PORT_HIZCRC);
473 ctrl_outw(0xFFFF, PORT_DRVCRA);
474 ctrl_outw(0xFFFF, PORT_DRVCRB);
476 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
478 i2c_register_board_info(0, ap325rxa_i2c_devices,
479 ARRAY_SIZE(ap325rxa_i2c_devices));
481 spi_register_board_info(ap325rxa_spi_devices,
482 ARRAY_SIZE(ap325rxa_spi_devices));
484 return platform_add_devices(ap325rxa_devices,
485 ARRAY_SIZE(ap325rxa_devices));
487 device_initcall(ap325rxa_devices_setup);
489 static struct sh_machine_vector mv_ap325rxa __initmv = {
490 .mv_name = "AP-325RXA",