1 // SPDX-License-Identifier: GPL-2.0
3 * handling privileged instructions
5 * Copyright IBM Corp. 2008, 2018
7 * Author(s): Carsten Otte <cotte@de.ibm.com>
8 * Christian Borntraeger <borntraeger@de.ibm.com>
11 #include <linux/kvm.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/compat.h>
15 #include <linux/mm_types.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/facility.h>
19 #include <asm/current.h>
20 #include <asm/debug.h>
21 #include <asm/ebcdic.h>
22 #include <asm/sysinfo.h>
23 #include <asm/pgtable.h>
24 #include <asm/page-states.h>
25 #include <asm/pgalloc.h>
28 #include <asm/ptrace.h>
34 static int handle_ri(struct kvm_vcpu *vcpu)
36 vcpu->stat.instruction_ri++;
38 if (test_kvm_facility(vcpu->kvm, 64)) {
39 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
40 vcpu->arch.sie_block->ecb3 |= ECB3_RI;
41 kvm_s390_retry_instr(vcpu);
44 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
47 int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
49 if ((vcpu->arch.sie_block->ipa & 0xf) <= 4)
50 return handle_ri(vcpu);
55 static int handle_gs(struct kvm_vcpu *vcpu)
57 vcpu->stat.instruction_gs++;
59 if (test_kvm_facility(vcpu->kvm, 133)) {
60 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
63 current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb;
64 restore_gs_cb(current->thread.gs_cb);
66 vcpu->arch.sie_block->ecb |= ECB_GS;
67 vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT;
68 vcpu->arch.gs_enabled = 1;
69 kvm_s390_retry_instr(vcpu);
72 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
75 int kvm_s390_handle_e3(struct kvm_vcpu *vcpu)
77 int code = vcpu->arch.sie_block->ipb & 0xff;
79 if (code == 0x49 || code == 0x4d)
80 return handle_gs(vcpu);
84 /* Handle SCK (SET CLOCK) interception */
85 static int handle_set_clock(struct kvm_vcpu *vcpu)
87 struct kvm_s390_vm_tod_clock gtod = { 0 };
92 vcpu->stat.instruction_sck++;
94 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
95 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
97 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
98 if (op2 & 7) /* Operand must be on a doubleword boundary */
99 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
100 rc = read_guest(vcpu, op2, ar, >od.tod, sizeof(gtod.tod));
102 return kvm_s390_inject_prog_cond(vcpu, rc);
104 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", gtod.tod);
105 kvm_s390_set_tod_clock(vcpu->kvm, >od);
107 kvm_s390_set_psw_cc(vcpu, 0);
111 static int handle_set_prefix(struct kvm_vcpu *vcpu)
118 vcpu->stat.instruction_spx++;
120 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
121 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
123 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
125 /* must be word boundary */
127 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
130 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
132 return kvm_s390_inject_prog_cond(vcpu, rc);
134 address &= 0x7fffe000u;
137 * Make sure the new value is valid memory. We only need to check the
138 * first page, since address is 8k aligned and memory pieces are always
139 * at least 1MB aligned and have at least a size of 1MB.
141 if (kvm_is_error_gpa(vcpu->kvm, address))
142 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
144 kvm_s390_set_prefix(vcpu, address);
145 trace_kvm_s390_handle_prefix(vcpu, 1, address);
149 static int handle_store_prefix(struct kvm_vcpu *vcpu)
156 vcpu->stat.instruction_stpx++;
158 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
159 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
161 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
163 /* must be word boundary */
165 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
167 address = kvm_s390_get_prefix(vcpu);
170 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
172 return kvm_s390_inject_prog_cond(vcpu, rc);
174 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
175 trace_kvm_s390_handle_prefix(vcpu, 0, address);
179 static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
181 u16 vcpu_id = vcpu->vcpu_id;
186 vcpu->stat.instruction_stap++;
188 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
189 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
191 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
194 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
196 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
198 return kvm_s390_inject_prog_cond(vcpu, rc);
200 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
201 trace_kvm_s390_handle_stap(vcpu, ga);
205 int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu)
208 struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
210 trace_kvm_s390_skey_related_inst(vcpu);
211 /* Already enabled? */
212 if (vcpu->kvm->arch.use_skf &&
213 !(sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)) &&
214 !kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS))
217 rc = s390_enable_skey();
218 VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc);
222 if (kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS))
223 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_KSS);
224 if (!vcpu->kvm->arch.use_skf)
225 sie_block->ictl |= ICTL_ISKE | ICTL_SSKE | ICTL_RRBE;
227 sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
231 static int try_handle_skey(struct kvm_vcpu *vcpu)
235 rc = kvm_s390_skey_check_enable(vcpu);
238 if (vcpu->kvm->arch.use_skf) {
239 /* with storage-key facility, SIE interprets it for us */
240 kvm_s390_retry_instr(vcpu);
241 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
247 static int handle_iske(struct kvm_vcpu *vcpu)
249 unsigned long gaddr, vmaddr;
255 vcpu->stat.instruction_iske++;
257 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
258 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
260 rc = try_handle_skey(vcpu);
262 return rc != -EAGAIN ? rc : 0;
264 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
266 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
267 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr);
268 gaddr = kvm_s390_real_to_abs(vcpu, gaddr);
269 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(gaddr));
270 if (kvm_is_error_hva(vmaddr))
271 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
274 down_read(¤t->mm->mmap_sem);
275 rc = get_guest_storage_key(current->mm, vmaddr, &key);
278 rc = fixup_user_fault(current, current->mm, vmaddr,
279 FAULT_FLAG_WRITE, &unlocked);
281 up_read(¤t->mm->mmap_sem);
286 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
287 up_read(¤t->mm->mmap_sem);
288 vcpu->run->s.regs.gprs[reg1] &= ~0xff;
289 vcpu->run->s.regs.gprs[reg1] |= key;
293 static int handle_rrbe(struct kvm_vcpu *vcpu)
295 unsigned long vmaddr, gaddr;
300 vcpu->stat.instruction_rrbe++;
302 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
303 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
305 rc = try_handle_skey(vcpu);
307 return rc != -EAGAIN ? rc : 0;
309 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
311 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
312 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr);
313 gaddr = kvm_s390_real_to_abs(vcpu, gaddr);
314 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(gaddr));
315 if (kvm_is_error_hva(vmaddr))
316 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
319 down_read(¤t->mm->mmap_sem);
320 rc = reset_guest_reference_bit(current->mm, vmaddr);
322 rc = fixup_user_fault(current, current->mm, vmaddr,
323 FAULT_FLAG_WRITE, &unlocked);
325 up_read(¤t->mm->mmap_sem);
330 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
331 up_read(¤t->mm->mmap_sem);
332 kvm_s390_set_psw_cc(vcpu, rc);
340 static int handle_sske(struct kvm_vcpu *vcpu)
342 unsigned char m3 = vcpu->arch.sie_block->ipb >> 28;
343 unsigned long start, end;
344 unsigned char key, oldkey;
349 vcpu->stat.instruction_sske++;
351 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
352 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
354 rc = try_handle_skey(vcpu);
356 return rc != -EAGAIN ? rc : 0;
358 if (!test_kvm_facility(vcpu->kvm, 8))
360 if (!test_kvm_facility(vcpu->kvm, 10))
361 m3 &= ~(SSKE_MC | SSKE_MR);
362 if (!test_kvm_facility(vcpu->kvm, 14))
365 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
367 key = vcpu->run->s.regs.gprs[reg1] & 0xfe;
368 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
369 start = kvm_s390_logical_to_effective(vcpu, start);
371 /* start already designates an absolute address */
372 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
374 start = kvm_s390_real_to_abs(vcpu, start);
375 end = start + PAGE_SIZE;
378 while (start != end) {
379 unsigned long vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
382 if (kvm_is_error_hva(vmaddr))
383 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
385 down_read(¤t->mm->mmap_sem);
386 rc = cond_set_guest_storage_key(current->mm, vmaddr, key, &oldkey,
387 m3 & SSKE_NQ, m3 & SSKE_MR,
391 rc = fixup_user_fault(current, current->mm, vmaddr,
392 FAULT_FLAG_WRITE, &unlocked);
393 rc = !rc ? -EAGAIN : rc;
396 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
398 up_read(¤t->mm->mmap_sem);
403 if (m3 & (SSKE_MC | SSKE_MR)) {
405 /* skey in reg1 is unpredictable */
406 kvm_s390_set_psw_cc(vcpu, 3);
408 kvm_s390_set_psw_cc(vcpu, rc);
409 vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL;
410 vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8;
414 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT)
415 vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK;
417 vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL;
418 end = kvm_s390_logical_to_effective(vcpu, end);
419 vcpu->run->s.regs.gprs[reg2] |= end;
424 static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
426 vcpu->stat.instruction_ipte_interlock++;
427 if (psw_bits(vcpu->arch.sie_block->gpsw).pstate)
428 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
429 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
430 kvm_s390_retry_instr(vcpu);
431 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
435 static int handle_test_block(struct kvm_vcpu *vcpu)
440 vcpu->stat.instruction_tb++;
442 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
443 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
445 kvm_s390_get_regs_rre(vcpu, NULL, ®2);
446 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
447 addr = kvm_s390_logical_to_effective(vcpu, addr);
448 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
449 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
450 addr = kvm_s390_real_to_abs(vcpu, addr);
452 if (kvm_is_error_gpa(vcpu->kvm, addr))
453 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
455 * We don't expect errors on modern systems, and do not care
456 * about storage keys (yet), so let's just clear the page.
458 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
460 kvm_s390_set_psw_cc(vcpu, 0);
461 vcpu->run->s.regs.gprs[0] = 0;
465 static int handle_tpi(struct kvm_vcpu *vcpu)
467 struct kvm_s390_interrupt_info *inti;
474 vcpu->stat.instruction_tpi++;
476 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
478 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
480 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
482 kvm_s390_set_psw_cc(vcpu, 0);
486 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
487 tpi_data[1] = inti->io.io_int_parm;
488 tpi_data[2] = inti->io.io_int_word;
491 * Store the two-word I/O interruption code into the
494 len = sizeof(tpi_data) - 4;
495 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
497 rc = kvm_s390_inject_prog_cond(vcpu, rc);
498 goto reinject_interrupt;
502 * Store the three-word I/O interruption code into
503 * the appropriate lowcore area.
505 len = sizeof(tpi_data);
506 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
507 /* failed writes to the low core are not recoverable */
509 goto reinject_interrupt;
513 /* irq was successfully handed to the guest */
515 kvm_s390_set_psw_cc(vcpu, 1);
519 * If we encounter a problem storing the interruption code, the
520 * instruction is suppressed from the guest's view: reinject the
523 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
527 /* don't set the cc, a pgm irq was injected or we drop to user space */
528 return rc ? -EFAULT : 0;
531 static int handle_tsch(struct kvm_vcpu *vcpu)
533 struct kvm_s390_interrupt_info *inti = NULL;
534 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
536 vcpu->stat.instruction_tsch++;
538 /* a valid schid has at least one bit set */
539 if (vcpu->run->s.regs.gprs[1])
540 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
541 vcpu->run->s.regs.gprs[1]);
544 * Prepare exit to userspace.
545 * We indicate whether we dequeued a pending I/O interrupt
546 * so that userspace can re-inject it if the instruction gets
547 * a program check. While this may re-order the pending I/O
548 * interrupts, this is no problem since the priority is kept
551 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
552 vcpu->run->s390_tsch.dequeued = !!inti;
554 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
555 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
556 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
557 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
559 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
564 static int handle_io_inst(struct kvm_vcpu *vcpu)
566 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
568 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
569 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
571 if (vcpu->kvm->arch.css_support) {
573 * Most I/O instructions will be handled by userspace.
574 * Exceptions are tpi and the interrupt portion of tsch.
576 if (vcpu->arch.sie_block->ipa == 0xb236)
577 return handle_tpi(vcpu);
578 if (vcpu->arch.sie_block->ipa == 0xb235)
579 return handle_tsch(vcpu);
580 /* Handle in userspace. */
581 vcpu->stat.instruction_io_other++;
585 * Set condition code 3 to stop the guest from issuing channel
588 kvm_s390_set_psw_cc(vcpu, 3);
593 static int handle_stfl(struct kvm_vcpu *vcpu)
598 vcpu->stat.instruction_stfl++;
600 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
601 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
604 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
605 * into a u32 memory representation. They will remain bits 0-31.
607 fac = *vcpu->kvm->arch.model.fac_list >> 32;
608 rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list),
612 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
613 trace_kvm_s390_handle_stfl(vcpu, fac);
617 #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
618 #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
619 #define PSW_ADDR_24 0x0000000000ffffffUL
620 #define PSW_ADDR_31 0x000000007fffffffUL
622 int is_valid_psw(psw_t *psw)
624 if (psw->mask & PSW_MASK_UNASSIGNED)
626 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
627 if (psw->addr & ~PSW_ADDR_31)
630 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
632 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
639 int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
641 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
642 psw_compat_t new_psw;
647 vcpu->stat.instruction_lpsw++;
649 if (gpsw->mask & PSW_MASK_PSTATE)
650 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
652 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
654 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
656 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
658 return kvm_s390_inject_prog_cond(vcpu, rc);
659 if (!(new_psw.mask & PSW32_MASK_BASE))
660 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
661 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
662 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
663 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
664 if (!is_valid_psw(gpsw))
665 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
669 static int handle_lpswe(struct kvm_vcpu *vcpu)
676 vcpu->stat.instruction_lpswe++;
678 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
679 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
681 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
683 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
684 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
686 return kvm_s390_inject_prog_cond(vcpu, rc);
687 vcpu->arch.sie_block->gpsw = new_psw;
688 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
689 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
693 static int handle_stidp(struct kvm_vcpu *vcpu)
695 u64 stidp_data = vcpu->kvm->arch.model.cpuid;
700 vcpu->stat.instruction_stidp++;
702 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
703 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
705 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
708 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
710 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
712 return kvm_s390_inject_prog_cond(vcpu, rc);
714 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
718 static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
723 cpus = atomic_read(&vcpu->kvm->online_vcpus);
725 /* deal with other level 3 hypervisors */
726 if (stsi(mem, 3, 2, 2))
730 for (n = mem->count - 1; n > 0 ; n--)
731 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
733 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
734 mem->vm[0].cpus_total = cpus;
735 mem->vm[0].cpus_configured = cpus;
736 mem->vm[0].cpus_standby = 0;
737 mem->vm[0].cpus_reserved = 0;
738 mem->vm[0].caf = 1000;
739 memcpy(mem->vm[0].name, "KVMguest", 8);
740 ASCEBC(mem->vm[0].name, 8);
741 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
742 ASCEBC(mem->vm[0].cpi, 16);
745 static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar,
746 u8 fc, u8 sel1, u16 sel2)
748 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
749 vcpu->run->s390_stsi.addr = addr;
750 vcpu->run->s390_stsi.ar = ar;
751 vcpu->run->s390_stsi.fc = fc;
752 vcpu->run->s390_stsi.sel1 = sel1;
753 vcpu->run->s390_stsi.sel2 = sel2;
756 static int handle_stsi(struct kvm_vcpu *vcpu)
758 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
759 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
760 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
761 unsigned long mem = 0;
766 vcpu->stat.instruction_stsi++;
767 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
769 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
770 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
773 kvm_s390_set_psw_cc(vcpu, 3);
777 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
778 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
779 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
782 vcpu->run->s.regs.gprs[0] = 3 << 28;
783 kvm_s390_set_psw_cc(vcpu, 0);
787 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
789 if (operand2 & 0xfff)
790 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
793 case 1: /* same handling for 1 and 2 */
795 mem = get_zeroed_page(GFP_KERNEL);
798 if (stsi((void *) mem, fc, sel1, sel2))
802 if (sel1 != 2 || sel2 != 2)
804 mem = get_zeroed_page(GFP_KERNEL);
807 handle_stsi_3_2_2(vcpu, (void *) mem);
811 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
813 rc = kvm_s390_inject_prog_cond(vcpu, rc);
816 if (vcpu->kvm->arch.user_stsi) {
817 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
820 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
822 kvm_s390_set_psw_cc(vcpu, 0);
823 vcpu->run->s.regs.gprs[0] = 0;
826 kvm_s390_set_psw_cc(vcpu, 3);
832 int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
834 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
836 return handle_stidp(vcpu);
838 return handle_set_clock(vcpu);
840 return handle_set_prefix(vcpu);
842 return handle_store_prefix(vcpu);
844 return handle_store_cpu_address(vcpu);
846 return kvm_s390_handle_vsie(vcpu);
849 return handle_ipte_interlock(vcpu);
851 return handle_iske(vcpu);
853 return handle_rrbe(vcpu);
855 return handle_sske(vcpu);
857 return handle_test_block(vcpu);
874 return handle_io_inst(vcpu);
876 return handle_sthyi(vcpu);
878 return handle_stsi(vcpu);
880 return handle_stfl(vcpu);
882 return handle_lpswe(vcpu);
888 static int handle_epsw(struct kvm_vcpu *vcpu)
892 vcpu->stat.instruction_epsw++;
894 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
896 /* This basically extracts the mask half of the psw. */
897 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
898 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
900 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
901 vcpu->run->s.regs.gprs[reg2] |=
902 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
907 #define PFMF_RESERVED 0xfffc0101UL
908 #define PFMF_SK 0x00020000UL
909 #define PFMF_CF 0x00010000UL
910 #define PFMF_UI 0x00008000UL
911 #define PFMF_FSC 0x00007000UL
912 #define PFMF_NQ 0x00000800UL
913 #define PFMF_MR 0x00000400UL
914 #define PFMF_MC 0x00000200UL
915 #define PFMF_KEY 0x000000feUL
917 static int handle_pfmf(struct kvm_vcpu *vcpu)
919 bool mr = false, mc = false, nq;
921 unsigned long start, end;
924 vcpu->stat.instruction_pfmf++;
926 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
928 if (!test_kvm_facility(vcpu->kvm, 8))
929 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
931 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
932 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
934 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
935 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
937 /* Only provide non-quiescing support if enabled for the guest */
938 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ &&
939 !test_kvm_facility(vcpu->kvm, 14))
940 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
942 /* Only provide conditional-SSKE support if enabled for the guest */
943 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK &&
944 test_kvm_facility(vcpu->kvm, 10)) {
945 mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR;
946 mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC;
949 nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ;
950 key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY;
951 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
952 start = kvm_s390_logical_to_effective(vcpu, start);
954 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
955 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
956 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
959 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
961 /* only 4k frames specify a real address */
962 start = kvm_s390_real_to_abs(vcpu, start);
963 end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
966 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
969 /* only support 2G frame size if EDAT2 is available and we are
970 not in 24-bit addressing mode */
971 if (!test_kvm_facility(vcpu->kvm, 78) ||
972 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT)
973 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
974 end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1);
977 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
980 while (start != end) {
981 unsigned long vmaddr;
982 bool unlocked = false;
984 /* Translate guest address to host address */
985 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
986 if (kvm_is_error_hva(vmaddr))
987 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
989 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
990 if (clear_user((void __user *)vmaddr, PAGE_SIZE))
991 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
994 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
995 int rc = kvm_s390_skey_check_enable(vcpu);
999 down_read(¤t->mm->mmap_sem);
1000 rc = cond_set_guest_storage_key(current->mm, vmaddr,
1001 key, NULL, nq, mr, mc);
1003 rc = fixup_user_fault(current, current->mm, vmaddr,
1004 FAULT_FLAG_WRITE, &unlocked);
1005 rc = !rc ? -EAGAIN : rc;
1008 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1010 up_read(¤t->mm->mmap_sem);
1015 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
1016 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {
1017 vcpu->run->s.regs.gprs[reg2] = end;
1019 vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
1020 end = kvm_s390_logical_to_effective(vcpu, end);
1021 vcpu->run->s.regs.gprs[reg2] |= end;
1027 static inline int do_essa(struct kvm_vcpu *vcpu, const int orc)
1029 struct kvm_s390_migration_state *ms = vcpu->kvm->arch.migration_state;
1030 int r1, r2, nappended, entries;
1031 unsigned long gfn, hva, res, pgstev, ptev;
1032 unsigned long *cbrlo;
1035 * We don't need to set SD.FPF.SK to 1 here, because if we have a
1036 * machine check here we either handle it or crash
1039 kvm_s390_get_regs_rre(vcpu, &r1, &r2);
1040 gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT;
1041 hva = gfn_to_hva(vcpu->kvm, gfn);
1042 entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
1044 if (kvm_is_error_hva(hva))
1045 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1047 nappended = pgste_perform_essa(vcpu->kvm->mm, hva, orc, &ptev, &pgstev);
1048 if (nappended < 0) {
1049 res = orc ? 0x10 : 0;
1050 vcpu->run->s.regs.gprs[r1] = res; /* Exception Indication */
1053 res = (pgstev & _PGSTE_GPS_USAGE_MASK) >> 22;
1055 * Set the block-content state part of the result. 0 means resident, so
1056 * nothing to do if the page is valid. 2 is for preserved pages
1057 * (non-present and non-zero), and 3 for zero pages (non-present and
1060 if (ptev & _PAGE_INVALID) {
1062 if (pgstev & _PGSTE_GPS_ZERO)
1065 if (pgstev & _PGSTE_GPS_NODAT)
1067 vcpu->run->s.regs.gprs[r1] = res;
1069 * It is possible that all the normal 511 slots were full, in which case
1070 * we will now write in the 512th slot, which is reserved for host use.
1071 * In both cases we let the normal essa handling code process all the
1072 * slots, including the reserved one, if needed.
1074 if (nappended > 0) {
1075 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK);
1076 cbrlo[entries] = gfn << PAGE_SHIFT;
1079 if (orc && gfn < ms->bitmap_size) {
1080 /* increment only if we are really flipping the bit to 1 */
1081 if (!test_and_set_bit(gfn, ms->pgste_bitmap))
1082 atomic64_inc(&ms->dirty_pages);
1088 static int handle_essa(struct kvm_vcpu *vcpu)
1090 /* entries expected to be 1FF */
1091 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
1092 unsigned long *cbrlo;
1096 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
1097 gmap = vcpu->arch.gmap;
1098 vcpu->stat.instruction_essa++;
1099 if (!vcpu->kvm->arch.use_cmma)
1100 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
1102 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1103 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1104 /* Check for invalid operation request code */
1105 orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
1106 /* ORCs 0-6 are always valid */
1107 if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT
1108 : ESSA_SET_STABLE_IF_RESIDENT))
1109 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1111 if (likely(!vcpu->kvm->arch.migration_state)) {
1113 * CMMA is enabled in the KVM settings, but is disabled in
1114 * the SIE block and in the mm_context, and we are not doing
1115 * a migration. Enable CMMA in the mm_context.
1116 * Since we need to take a write lock to write to the context
1117 * to avoid races with storage keys handling, we check if the
1118 * value really needs to be written to; if the value is
1119 * already correct, we do nothing and avoid the lock.
1121 if (vcpu->kvm->mm->context.uses_cmm == 0) {
1122 down_write(&vcpu->kvm->mm->mmap_sem);
1123 vcpu->kvm->mm->context.uses_cmm = 1;
1124 up_write(&vcpu->kvm->mm->mmap_sem);
1127 * If we are here, we are supposed to have CMMA enabled in
1128 * the SIE block. Enabling CMMA works on a per-CPU basis,
1129 * while the context use_cmma flag is per process.
1130 * It's possible that the context flag is enabled and the
1131 * SIE flag is not, so we set the flag always; if it was
1132 * already set, nothing changes, otherwise we enable it
1135 vcpu->arch.sie_block->ecb2 |= ECB2_CMMA;
1136 /* Retry the ESSA instruction */
1137 kvm_s390_retry_instr(vcpu);
1139 /* Account for the possible extra cbrl entry */
1140 i = do_essa(vcpu, orc);
1145 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
1146 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
1147 down_read(&gmap->mm->mmap_sem);
1148 for (i = 0; i < entries; ++i)
1149 __gmap_zap(gmap, cbrlo[i]);
1150 up_read(&gmap->mm->mmap_sem);
1154 int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
1156 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1160 return handle_ipte_interlock(vcpu);
1162 return handle_epsw(vcpu);
1164 return handle_essa(vcpu);
1166 return handle_pfmf(vcpu);
1172 int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
1174 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1175 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1176 int reg, rc, nr_regs;
1181 vcpu->stat.instruction_lctl++;
1183 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1184 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1186 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
1189 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1191 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1192 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
1194 nr_regs = ((reg3 - reg1) & 0xf) + 1;
1195 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
1197 return kvm_s390_inject_prog_cond(vcpu, rc);
1201 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
1202 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
1205 reg = (reg + 1) % 16;
1207 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1211 int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
1213 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1214 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1215 int reg, rc, nr_regs;
1220 vcpu->stat.instruction_stctl++;
1222 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1223 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1225 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
1228 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1230 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1231 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
1236 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
1239 reg = (reg + 1) % 16;
1241 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
1242 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
1245 static int handle_lctlg(struct kvm_vcpu *vcpu)
1247 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1248 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1249 int reg, rc, nr_regs;
1254 vcpu->stat.instruction_lctlg++;
1256 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1257 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1259 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
1262 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1264 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1265 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
1267 nr_regs = ((reg3 - reg1) & 0xf) + 1;
1268 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
1270 return kvm_s390_inject_prog_cond(vcpu, rc);
1274 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
1277 reg = (reg + 1) % 16;
1279 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1283 static int handle_stctg(struct kvm_vcpu *vcpu)
1285 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1286 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1287 int reg, rc, nr_regs;
1292 vcpu->stat.instruction_stctg++;
1294 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1295 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1297 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
1300 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1302 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1303 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
1308 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
1311 reg = (reg + 1) % 16;
1313 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
1314 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
1317 int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
1319 switch (vcpu->arch.sie_block->ipb & 0x000000ff) {
1321 return handle_stctg(vcpu);
1323 return handle_lctlg(vcpu);
1327 return handle_ri(vcpu);
1333 static int handle_tprot(struct kvm_vcpu *vcpu)
1335 u64 address1, address2;
1336 unsigned long hva, gpa;
1337 int ret = 0, cc = 0;
1341 vcpu->stat.instruction_tprot++;
1343 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1344 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1346 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
1348 /* we only handle the Linux memory detection case:
1350 * everything else goes to userspace. */
1351 if (address2 & 0xf0)
1353 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1355 ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE);
1356 if (ret == PGM_PROTECTION) {
1357 /* Write protected? Try again with read-only... */
1359 ret = guest_translate_address(vcpu, address1, ar, &gpa,
1363 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
1364 ret = kvm_s390_inject_program_int(vcpu, ret);
1365 } else if (ret > 0) {
1366 /* Translation not available */
1367 kvm_s390_set_psw_cc(vcpu, 3);
1373 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1374 if (kvm_is_error_hva(hva)) {
1375 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1378 cc = 1; /* Write not permitted ==> read-only */
1379 kvm_s390_set_psw_cc(vcpu, cc);
1380 /* Note: CC2 only occurs for storage keys (not supported yet) */
1383 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1388 int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1390 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1392 return handle_tprot(vcpu);
1398 static int handle_sckpf(struct kvm_vcpu *vcpu)
1402 vcpu->stat.instruction_sckpf++;
1404 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1405 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1407 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1408 return kvm_s390_inject_program_int(vcpu,
1411 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1412 vcpu->arch.sie_block->todpr = value;
1417 static int handle_ptff(struct kvm_vcpu *vcpu)
1419 vcpu->stat.instruction_ptff++;
1421 /* we don't emulate any control instructions yet */
1422 kvm_s390_set_psw_cc(vcpu, 3);
1426 int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1428 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1430 return handle_ptff(vcpu);
1432 return handle_sckpf(vcpu);