arch/s390/kernel/irq.c

   1 /*
   2  *    Copyright IBM Corp. 2004, 2011
   3  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
   4  *               Holger Smolinski <Holger.Smolinski@de.ibm.com>,
   5  *               Thomas Spatzier <tspat@de.ibm.com>,
   6  *
   7  * This file contains interrupt related functions.
   8  */
   9
  10 #include <linux/kernel_stat.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/proc_fs.h>
  14 #include <linux/profile.h>
  15 #include <linux/export.h>
  16 #include <linux/kernel.h>
  17 #include <linux/ftrace.h>
  18 #include <linux/errno.h>
  19 #include <linux/slab.h>
  20 #include <linux/init.h>
  21 #include <linux/cpu.h>
  22 #include <linux/irq.h>
  23 #include <asm/irq_regs.h>
  24 #include <asm/cputime.h>
  25 #include <asm/lowcore.h>
  26 #include <asm/irq.h>
  27 #include <asm/hw_irq.h>
  28 #include "entry.h"
  29
  30 DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
  31 EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
  32
  33 struct irq_class {
  34         int irq;
  35         char *name;
  36         char *desc;
  37 };
  38
  39 /*
  40  * The list of "main" irq classes on s390. This is the list of interrupts
  41  * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
  42  * Historically only external and I/O interrupts have been part of /proc/stat.
  43  * We can't add the split external and I/O sub classes since the first field
  44  * in the "intr" line in /proc/stat is supposed to be the sum of all other
  45  * fields.
  46  * Since the external and I/O interrupt fields are already sums we would end
  47  * up with having a sum which accounts each interrupt twice.
  48  */
  49 static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
  50         {.irq = EXT_INTERRUPT,  .name = "EXT"},
  51         {.irq = IO_INTERRUPT,   .name = "I/O"},
  52         {.irq = THIN_INTERRUPT, .name = "AIO"},
  53 };
  54
  55 /*
  56  * The list of split external and I/O interrupts that appear only in
  57  * /proc/interrupts.
  58  * In addition this list contains non external / I/O events like NMIs.
  59  */
  60 static const struct irq_class irqclass_sub_desc[] = {
  61         {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
  62         {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
  63         {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
  64         {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
  65         {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
  66         {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  67         {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
  68         {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
  69         {.irq = IRQEXT_SCP, .name = "SCP", .desc = "[EXT] Service Call"},
  70         {.irq = IRQEXT_IUC, .name = "IUC", .desc = "[EXT] IUCV"},
  71         {.irq = IRQEXT_CMS, .name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  72         {.irq = IRQEXT_CMC, .name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  73         {.irq = IRQEXT_FTP, .name = "FTP", .desc = "[EXT] HMC FTP Service"},
  74         {.irq = IRQIO_CIO,  .name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  75         {.irq = IRQIO_QAI,  .name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  76         {.irq = IRQIO_DAS,  .name = "DAS", .desc = "[I/O] DASD"},
  77         {.irq = IRQIO_C15,  .name = "C15", .desc = "[I/O] 3215"},
  78         {.irq = IRQIO_C70,  .name = "C70", .desc = "[I/O] 3270"},
  79         {.irq = IRQIO_TAP,  .name = "TAP", .desc = "[I/O] Tape"},
  80         {.irq = IRQIO_VMR,  .name = "VMR", .desc = "[I/O] Unit Record Devices"},
  81         {.irq = IRQIO_LCS,  .name = "LCS", .desc = "[I/O] LCS"},
  82         {.irq = IRQIO_CTC,  .name = "CTC", .desc = "[I/O] CTC"},
  83         {.irq = IRQIO_APB,  .name = "APB", .desc = "[I/O] AP Bus"},
  84         {.irq = IRQIO_ADM,  .name = "ADM", .desc = "[I/O] EADM Subchannel"},
  85         {.irq = IRQIO_CSC,  .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  86         {.irq = IRQIO_PCI,  .name = "PCI", .desc = "[I/O] PCI Interrupt" },
  87         {.irq = IRQIO_MSI,  .name = "MSI", .desc = "[I/O] MSI Interrupt" },
  88         {.irq = IRQIO_VIR,  .name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
  89         {.irq = IRQIO_VAI,  .name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
  90         {.irq = NMI_NMI,    .name = "NMI", .desc = "[NMI] Machine Check"},
  91         {.irq = CPU_RST,    .name = "RST", .desc = "[CPU] CPU Restart"},
  92 };
  93
  94 void __init init_IRQ(void)
  95 {
  96         BUILD_BUG_ON(ARRAY_SIZE(irqclass_sub_desc) != NR_ARCH_IRQS);
  97         init_cio_interrupts();
  98         init_airq_interrupts();
  99         init_ext_interrupts();
 100 }
 101
 102 void do_IRQ(struct pt_regs *regs, int irq)
 103 {
 104         struct pt_regs *old_regs;
 105
 106         old_regs = set_irq_regs(regs);
 107         irq_enter();
 108         if (tod_after_eq(S390_lowcore.int_clock,
 109                          S390_lowcore.clock_comparator))
 110                 /* Serve timer interrupts first. */
 111                 clock_comparator_work();
 112         generic_handle_irq(irq);
 113         irq_exit();
 114         set_irq_regs(old_regs);
 115 }
 116
 117 /*
 118  * show_interrupts is needed by /proc/interrupts.
 119  */
 120 int show_interrupts(struct seq_file *p, void *v)
 121 {
 122         int index = *(loff_t *) v;
 123         int cpu, irq;
 124
 125         get_online_cpus();
 126         if (index == 0) {
 127                 seq_puts(p, "           ");
 128                 for_each_online_cpu(cpu)
 129                         seq_printf(p, "CPU%d       ", cpu);
 130                 seq_putc(p, '\n');
 131         }
 132         if (index < NR_IRQS_BASE) {
 133                 seq_printf(p, "%s: ", irqclass_main_desc[index].name);
 134                 irq = irqclass_main_desc[index].irq;
 135                 for_each_online_cpu(cpu)
 136                         seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
 137                 seq_putc(p, '\n');
 138                 goto out;
 139         }
 140         if (index > NR_IRQS_BASE)
 141                 goto out;
 142
 143         for (index = 0; index < NR_ARCH_IRQS; index++) {
 144                 seq_printf(p, "%s: ", irqclass_sub_desc[index].name);
 145                 irq = irqclass_sub_desc[index].irq;
 146                 for_each_online_cpu(cpu)
 147                         seq_printf(p, "%10u ",
 148                                    per_cpu(irq_stat, cpu).irqs[irq]);
 149                 if (irqclass_sub_desc[index].desc)
 150                         seq_printf(p, "  %s", irqclass_sub_desc[index].desc);
 151                 seq_putc(p, '\n');
 152         }
 153 out:
 154         put_online_cpus();
 155         return 0;
 156 }
 157
 158 unsigned int arch_dynirq_lower_bound(unsigned int from)
 159 {
 160         return from < NR_IRQS_BASE ? NR_IRQS_BASE : from;
 161 }
 162
 163 /*
 164  * Switch to the asynchronous interrupt stack for softirq execution.
 165  */
 166 void do_softirq_own_stack(void)
 167 {
 168         unsigned long old, new;
 169
 170         old = current_stack_pointer();
 171         /* Check against async. stack address range. */
 172         new = S390_lowcore.async_stack;
 173         if (((new - old) >> (PAGE_SHIFT + THREAD_SIZE_ORDER)) != 0) {
 174                 /* Need to switch to the async. stack. */
 175                 new -= STACK_FRAME_OVERHEAD;
 176                 ((struct stack_frame *) new)->back_chain = old;
 177                 asm volatile("   la    15,0(%0)\n"
 178                              "   basr  14,%2\n"
 179                              "   la    15,0(%1)\n"
 180                              : : "a" (new), "a" (old),
 181                                  "a" (__do_softirq)
 182                              : "0", "1", "2", "3", "4", "5", "14",
 183                                "cc", "memory" );
 184         } else {
 185                 /* We are already on the async stack. */
 186                 __do_softirq();
 187         }
 188 }
 189
 190 /*
 191  * ext_int_hash[index] is the list head for all external interrupts that hash
 192  * to this index.
 193  */
 194 static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
 195
 196 struct ext_int_info {
 197         ext_int_handler_t handler;
 198         struct hlist_node entry;
 199         struct rcu_head rcu;
 200         u16 code;
 201 };
 202
 203 /* ext_int_hash_lock protects the handler lists for external interrupts */
 204 static DEFINE_SPINLOCK(ext_int_hash_lock);
 205
 206 static inline int ext_hash(u16 code)
 207 {
 208         BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
 209
 210         return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
 211 }
 212
 213 int register_external_irq(u16 code, ext_int_handler_t handler)
 214 {
 215         struct ext_int_info *p;
 216         unsigned long flags;
 217         int index;
 218
 219         p = kmalloc(sizeof(*p), GFP_ATOMIC);
 220         if (!p)
 221                 return -ENOMEM;
 222         p->code = code;
 223         p->handler = handler;
 224         index = ext_hash(code);
 225
 226         spin_lock_irqsave(&ext_int_hash_lock, flags);
 227         hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
 228         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 229         return 0;
 230 }
 231 EXPORT_SYMBOL(register_external_irq);
 232
 233 int unregister_external_irq(u16 code, ext_int_handler_t handler)
 234 {
 235         struct ext_int_info *p;
 236         unsigned long flags;
 237         int index = ext_hash(code);
 238
 239         spin_lock_irqsave(&ext_int_hash_lock, flags);
 240         hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 241                 if (p->code == code && p->handler == handler) {
 242                         hlist_del_rcu(&p->entry);
 243                         kfree_rcu(p, rcu);
 244                 }
 245         }
 246         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 247         return 0;
 248 }
 249 EXPORT_SYMBOL(unregister_external_irq);
 250
 251 static irqreturn_t do_ext_interrupt(int irq, void *dummy)
 252 {
 253         struct pt_regs *regs = get_irq_regs();
 254         struct ext_code ext_code;
 255         struct ext_int_info *p;
 256         int index;
 257
 258         ext_code = *(struct ext_code *) &regs->int_code;
 259         if (ext_code.code != EXT_IRQ_CLK_COMP)
 260                 set_cpu_flag(CIF_NOHZ_DELAY);
 261
 262         index = ext_hash(ext_code.code);
 263         rcu_read_lock();
 264         hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 265                 if (unlikely(p->code != ext_code.code))
 266                         continue;
 267                 p->handler(ext_code, regs->int_parm, regs->int_parm_long);
 268         }
 269         rcu_read_unlock();
 270         return IRQ_HANDLED;
 271 }
 272
 273 static struct irqaction external_interrupt = {
 274         .name    = "EXT",
 275         .handler = do_ext_interrupt,
 276 };
 277
 278 void __init init_ext_interrupts(void)
 279 {
 280         int idx;
 281
 282         for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
 283                 INIT_HLIST_HEAD(&ext_int_hash[idx]);
 284
 285         irq_set_chip_and_handler(EXT_INTERRUPT,
 286                                  &dummy_irq_chip, handle_percpu_irq);
 287         setup_irq(EXT_INTERRUPT, &external_interrupt);
 288 }
 289
 290 static DEFINE_SPINLOCK(irq_subclass_lock);
 291 static unsigned char irq_subclass_refcount[64];
 292
 293 void irq_subclass_register(enum irq_subclass subclass)
 294 {
 295         spin_lock(&irq_subclass_lock);
 296         if (!irq_subclass_refcount[subclass])
 297                 ctl_set_bit(0, subclass);
 298         irq_subclass_refcount[subclass]++;
 299         spin_unlock(&irq_subclass_lock);
 300 }
 301 EXPORT_SYMBOL(irq_subclass_register);
 302
 303 void irq_subclass_unregister(enum irq_subclass subclass)
 304 {
 305         spin_lock(&irq_subclass_lock);
 306         irq_subclass_refcount[subclass]--;
 307         if (!irq_subclass_refcount[subclass])
 308                 ctl_clear_bit(0, subclass);
 309         spin_unlock(&irq_subclass_lock);
 310 }
 311 EXPORT_SYMBOL(irq_subclass_unregister);