arch/ppc64/kernel/pSeries_setup.c

   1 /*
   2  *  linux/arch/ppc/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #undef DEBUG
  20
  21 #include <linux/config.h>
  22 #include <linux/errno.h>
  23 #include <linux/sched.h>
  24 #include <linux/kernel.h>
  25 #include <linux/mm.h>
  26 #include <linux/stddef.h>
  27 #include <linux/unistd.h>
  28 #include <linux/slab.h>
  29 #include <linux/user.h>
  30 #include <linux/a.out.h>
  31 #include <linux/tty.h>
  32 #include <linux/major.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/reboot.h>
  35 #include <linux/init.h>
  36 #include <linux/ioport.h>
  37 #include <linux/console.h>
  38 #include <linux/pci.h>
  39 #include <linux/version.h>
  40 #include <linux/adb.h>
  41 #include <linux/module.h>
  42 #include <linux/delay.h>
  43 #include <linux/irq.h>
  44 #include <linux/seq_file.h>
  45 #include <linux/root_dev.h>
  46
  47 #include <asm/mmu.h>
  48 #include <asm/processor.h>
  49 #include <asm/io.h>
  50 #include <asm/pgtable.h>
  51 #include <asm/prom.h>
  52 #include <asm/rtas.h>
  53 #include <asm/pci-bridge.h>
  54 #include <asm/iommu.h>
  55 #include <asm/dma.h>
  56 #include <asm/machdep.h>
  57 #include <asm/irq.h>
  58 #include <asm/time.h>
  59 #include <asm/nvram.h>
  60 #include <asm/plpar_wrappers.h>
  61 #include <asm/xics.h>
  62 #include <asm/cputable.h>
  63
  64 #include "i8259.h"
  65 #include "mpic.h"
  66 #include "pci.h"
  67
  68 #ifdef DEBUG
  69 #define DBG(fmt...) udbg_printf(fmt)
  70 #else
  71 #define DBG(fmt...)
  72 #endif
  73
  74 extern void find_udbg_vterm(void);
  75 extern void system_reset_fwnmi(void);   /* from head.S */
  76 extern void machine_check_fwnmi(void);  /* from head.S */
  77 extern void generic_find_legacy_serial_ports(u64 *physport,
  78                 unsigned int *default_speed);
  79
  80 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  81
  82 extern void pSeries_system_reset_exception(struct pt_regs *regs);
  83 extern int pSeries_machine_check_exception(struct pt_regs *regs);
  84
  85 static volatile void __iomem * chrp_int_ack_special;
  86 struct mpic *pSeries_mpic;
  87
  88 void pSeries_get_cpuinfo(struct seq_file *m)
  89 {
  90         struct device_node *root;
  91         const char *model = "";
  92
  93         root = of_find_node_by_path("/");
  94         if (root)
  95                 model = get_property(root, "model", NULL);
  96         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  97         of_node_put(root);
  98 }
  99
 100 /* Initialize firmware assisted non-maskable interrupts if
 101  * the firmware supports this feature.
 102  *
 103  */
 104 static void __init fwnmi_init(void)
 105 {
 106         int ret;
 107         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 108         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 109                 return;
 110         ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
 111                         __pa((unsigned long)system_reset_fwnmi),
 112                         __pa((unsigned long)machine_check_fwnmi));
 113         if (ret == 0)
 114                 fwnmi_active = 1;
 115 }
 116
 117 static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
 118 {
 119         if (chrp_int_ack_special)
 120                 return readb(chrp_int_ack_special);
 121         else
 122                 return i8259_irq(smp_processor_id());
 123 }
 124
 125 static void __init pSeries_init_mpic(void)
 126 {
 127         unsigned int *addrp;
 128         struct device_node *np;
 129         int i;
 130
 131         /* All ISUs are setup, complete initialization */
 132         mpic_init(pSeries_mpic);
 133
 134         /* Check what kind of cascade ACK we have */
 135         if (!(np = of_find_node_by_name(NULL, "pci"))
 136             || !(addrp = (unsigned int *)
 137                  get_property(np, "8259-interrupt-acknowledge", NULL)))
 138                 printk(KERN_ERR "Cannot find pci to get ack address\n");
 139         else
 140                 chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
 141         of_node_put(np);
 142
 143         /* Setup the legacy interrupts & controller */
 144         for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
 145                 irq_desc[i].handler = &i8259_pic;
 146         i8259_init(0);
 147
 148         /* Hook cascade to mpic */
 149         mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
 150 }
 151
 152 static void __init pSeries_setup_mpic(void)
 153 {
 154         unsigned int *opprop;
 155         unsigned long openpic_addr = 0;
 156         unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
 157         struct device_node *root;
 158         int irq_count;
 159
 160         /* Find the Open PIC if present */
 161         root = of_find_node_by_path("/");
 162         opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
 163         if (opprop != 0) {
 164                 int n = prom_n_addr_cells(root);
 165
 166                 for (openpic_addr = 0; n > 0; --n)
 167                         openpic_addr = (openpic_addr << 32) + *opprop++;
 168                 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
 169         }
 170         of_node_put(root);
 171
 172         BUG_ON(openpic_addr == 0);
 173
 174         /* Get the sense values from OF */
 175         prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
 176
 177         /* Setup the openpic driver */
 178         irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
 179         pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
 180                                   16, 16, irq_count, /* isu size, irq offset, irq count */
 181                                   NR_IRQS - 4, /* ipi offset */
 182                                   senses, irq_count, /* sense & sense size */
 183                                   " MPIC     ");
 184 }
 185
 186 static void __init pSeries_setup_arch(void)
 187 {
 188         /* Fixup ppc_md depending on the type of interrupt controller */
 189         if (ppc64_interrupt_controller == IC_OPEN_PIC) {
 190                 ppc_md.init_IRQ       = pSeries_init_mpic;
 191                 ppc_md.get_irq        = mpic_get_irq;
 192                 ppc_md.cpu_irq_down   = mpic_teardown_this_cpu;
 193                 /* Allocate the mpic now, so that find_and_init_phbs() can
 194                  * fill the ISUs */
 195                 pSeries_setup_mpic();
 196         } else {
 197                 ppc_md.init_IRQ       = xics_init_IRQ;
 198                 ppc_md.get_irq        = xics_get_irq;
 199                 ppc_md.cpu_irq_down   = xics_teardown_cpu;
 200         }
 201
 202 #ifdef CONFIG_SMP
 203         smp_init_pSeries();
 204 #endif
 205         /* openpic global configuration register (64-bit format). */
 206         /* openpic Interrupt Source Unit pointer (64-bit format). */
 207         /* python0 facility area (mmio) (64-bit format) REAL address. */
 208
 209         /* init to some ~sane value until calibrate_delay() runs */
 210         loops_per_jiffy = 50000000;
 211
 212         if (ROOT_DEV == 0) {
 213                 printk("No ramdisk, default root is /dev/sda2\n");
 214                 ROOT_DEV = Root_SDA2;
 215         }
 216
 217         fwnmi_init();
 218
 219         /* Find and initialize PCI host bridges */
 220         init_pci_config_tokens();
 221         eeh_init();
 222         find_and_init_phbs();
 223
 224 #ifdef CONFIG_DUMMY_CONSOLE
 225         conswitchp = &dummy_con;
 226 #endif
 227
 228         pSeries_nvram_init();
 229
 230         if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
 231                 vpa_init(boot_cpuid);
 232 }
 233
 234 static int __init pSeries_init_panel(void)
 235 {
 236         /* Manually leave the kernel version on the panel. */
 237         ppc_md.progress("Linux ppc64\n", 0);
 238         ppc_md.progress(UTS_RELEASE, 0);
 239
 240         return 0;
 241 }
 242 arch_initcall(pSeries_init_panel);
 243
 244
 245 /* Build up the firmware_features bitmask field
 246  * using contents of device-tree/ibm,hypertas-functions.
 247  * Ultimately this functionality may be moved into prom.c prom_init().
 248  */
 249 void __init fw_feature_init(void)
 250 {
 251         struct device_node * dn;
 252         char * hypertas;
 253         unsigned int len;
 254
 255         DBG(" -> fw_feature_init()\n");
 256
 257         cur_cpu_spec->firmware_features = 0;
 258         dn = of_find_node_by_path("/rtas");
 259         if (dn == NULL) {
 260                 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
 261                 goto no_rtas;
 262         }
 263
 264         hypertas = get_property(dn, "ibm,hypertas-functions", &len);
 265         if (hypertas) {
 266                 while (len > 0){
 267                         int i, hypertas_len;
 268                         /* check value against table of strings */
 269                         for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
 270                                 if ((firmware_features_table[i].name) &&
 271                                     (strcmp(firmware_features_table[i].name,hypertas))==0) {
 272                                         /* we have a match */
 273                                         cur_cpu_spec->firmware_features |=
 274                                                 (firmware_features_table[i].val);
 275                                         break;
 276                                 }
 277                         }
 278                         hypertas_len = strlen(hypertas);
 279                         len -= hypertas_len +1;
 280                         hypertas+= hypertas_len +1;
 281                 }
 282         }
 283
 284         of_node_put(dn);
 285  no_rtas:
 286         printk(KERN_INFO "firmware_features = 0x%lx\n",
 287                cur_cpu_spec->firmware_features);
 288
 289         DBG(" <- fw_feature_init()\n");
 290 }
 291
 292
 293 static  void __init pSeries_discover_pic(void)
 294 {
 295         struct device_node *np;
 296         char *typep;
 297
 298         /*
 299          * Setup interrupt mapping options that are needed for finish_device_tree
 300          * to properly parse the OF interrupt tree & do the virtual irq mapping
 301          */
 302         __irq_offset_value = NUM_ISA_INTERRUPTS;
 303         ppc64_interrupt_controller = IC_INVALID;
 304         for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
 305                 typep = (char *)get_property(np, "compatible", NULL);
 306                 if (strstr(typep, "open-pic"))
 307                         ppc64_interrupt_controller = IC_OPEN_PIC;
 308                 else if (strstr(typep, "ppc-xicp"))
 309                         ppc64_interrupt_controller = IC_PPC_XIC;
 310                 else
 311                         printk("pSeries_discover_pic: failed to recognize"
 312                                " interrupt-controller\n");
 313                 break;
 314         }
 315 }
 316
 317 static void pSeries_mach_cpu_die(void)
 318 {
 319         local_irq_disable();
 320         idle_task_exit();
 321         /* Some hardware requires clearing the CPPR, while other hardware does not
 322          * it is safe either way
 323          */
 324         pSeriesLP_cppr_info(0, 0);
 325         rtas_stop_self();
 326         /* Should never get here... */
 327         BUG();
 328         for(;;);
 329 }
 330
 331
 332 /*
 333  * Early initialization.  Relocation is on but do not reference unbolted pages
 334  */
 335 static void __init pSeries_init_early(void)
 336 {
 337         void *comport;
 338         int iommu_off = 0;
 339         unsigned int default_speed;
 340         u64 physport;
 341
 342         DBG(" -> pSeries_init_early()\n");
 343
 344         fw_feature_init();
 345
 346         if (systemcfg->platform & PLATFORM_LPAR)
 347                 hpte_init_lpar();
 348         else {
 349                 hpte_init_native();
 350                 iommu_off = (of_chosen &&
 351                              get_property(of_chosen, "linux,iommu-off", NULL));
 352         }
 353
 354         generic_find_legacy_serial_ports(&physport, &default_speed);
 355
 356         if (systemcfg->platform & PLATFORM_LPAR)
 357                 find_udbg_vterm();
 358         else if (physport) {
 359                 /* Map the uart for udbg. */
 360                 comport = (void *)ioremap(physport, 16);
 361                 udbg_init_uart(comport, default_speed);
 362
 363                 ppc_md.udbg_putc = udbg_putc;
 364                 ppc_md.udbg_getc = udbg_getc;
 365                 ppc_md.udbg_getc_poll = udbg_getc_poll;
 366                 DBG("Hello World !\n");
 367         }
 368
 369
 370         iommu_init_early_pSeries();
 371
 372         pSeries_discover_pic();
 373
 374         DBG(" <- pSeries_init_early()\n");
 375 }
 376
 377
 378 static int pSeries_check_legacy_ioport(unsigned int baseport)
 379 {
 380         struct device_node *np;
 381
 382 #define I8042_DATA_REG  0x60
 383 #define FDC_BASE        0x3f0
 384
 385
 386         switch(baseport) {
 387         case I8042_DATA_REG:
 388                 np = of_find_node_by_type(NULL, "8042");
 389                 if (np == NULL)
 390                         return -ENODEV;
 391                 of_node_put(np);
 392                 break;
 393         case FDC_BASE:
 394                 np = of_find_node_by_type(NULL, "fdc");
 395                 if (np == NULL)
 396                         return -ENODEV;
 397                 of_node_put(np);
 398                 break;
 399         }
 400         return 0;
 401 }
 402
 403 /*
 404  * Called very early, MMU is off, device-tree isn't unflattened
 405  */
 406 extern struct machdep_calls pSeries_md;
 407
 408 static int __init pSeries_probe(int platform)
 409 {
 410         if (platform != PLATFORM_PSERIES &&
 411             platform != PLATFORM_PSERIES_LPAR)
 412                 return 0;
 413
 414         /* if we have some ppc_md fixups for LPAR to do, do
 415          * it here ...
 416          */
 417
 418         return 1;
 419 }
 420
 421 struct machdep_calls __initdata pSeries_md = {
 422         .probe                  = pSeries_probe,
 423         .setup_arch             = pSeries_setup_arch,
 424         .init_early             = pSeries_init_early,
 425         .get_cpuinfo            = pSeries_get_cpuinfo,
 426         .log_error              = pSeries_log_error,
 427         .pcibios_fixup          = pSeries_final_fixup,
 428         .irq_bus_setup          = pSeries_irq_bus_setup,
 429         .restart                = rtas_restart,
 430         .power_off              = rtas_power_off,
 431         .halt                   = rtas_halt,
 432         .panic                  = rtas_os_term,
 433         .cpu_die                = pSeries_mach_cpu_die,
 434         .get_boot_time          = rtas_get_boot_time,
 435         .get_rtc_time           = rtas_get_rtc_time,
 436         .set_rtc_time           = rtas_set_rtc_time,
 437         .calibrate_decr         = generic_calibrate_decr,
 438         .progress               = rtas_progress,
 439         .check_legacy_ioport    = pSeries_check_legacy_ioport,
 440         .system_reset_exception = pSeries_system_reset_exception,
 441         .machine_check_exception = pSeries_machine_check_exception,
 442 };