arch/ppc/platforms/4xx/bamboo.h

   1 /*
   2  * arch/ppc/platforms/bamboo.h
   3  *
   4  * Bamboo board definitions
   5  *
   6  * Wade Farnsworth <wfarnsworth@mvista.com>
   7  *
   8  * Copyright 2004 MontaVista Software Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #ifdef __KERNEL__
  17 #ifndef __ASM_BAMBOO_H__
  18 #define __ASM_BAMBOO_H__
  19
  20 #include <linux/config.h>
  21 #include <platforms/4xx/ibm440ep.h>
  22
  23 /* F/W TLB mapping used in bootloader glue to reset EMAC */
  24 #define PPC44x_EMAC0_MR0                0x0EF600E00
  25
  26 /* Location of MAC addresses in PIBS image */
  27 #define PIBS_FLASH_BASE                 0xfff00000
  28 #define PIBS_MAC_BASE                   (PIBS_FLASH_BASE+0xc0400)
  29 #define PIBS_MAC_SIZE                   0x200
  30 #define PIBS_MAC_OFFSET                 0x100
  31
  32 /* Default clock rate */
  33 #define BAMBOO_TMRCLK                   25000000
  34
  35 /* RTC/NVRAM location */
  36 #define BAMBOO_RTC_ADDR                 0x080000000ULL
  37 #define BAMBOO_RTC_SIZE                 0x2000
  38
  39 /* FPGA Registers */
  40 #define BAMBOO_FPGA_ADDR                0x080002000ULL
  41
  42 #define BAMBOO_FPGA_CONFIG2_REG_ADDR    (BAMBOO_FPGA_ADDR + 0x1)
  43 #define BAMBOO_FULL_DUPLEX_EN(x)        (x & 0x08)
  44 #define BAMBOO_FORCE_100Mbps(x)         (x & 0x04)
  45 #define BAMBOO_AUTONEGOTIATE(x)         (x & 0x02)
  46
  47 #define BAMBOO_FPGA_SETTING_REG_ADDR    (BAMBOO_FPGA_ADDR + 0x3)
  48 #define BAMBOO_BOOT_SMALL_FLASH(x)      (!(x & 0x80))
  49 #define BAMBOO_LARGE_FLASH_EN(x)        (!(x & 0x40))
  50 #define BAMBOO_BOOT_NAND_FLASH(x)       (!(x & 0x20))
  51
  52 #define BAMBOO_FPGA_SELECTION1_REG_ADDR (BAMBOO_FPGA_ADDR + 0x4)
  53 #define BAMBOO_SEL_MII(x)               (x & 0x80)
  54 #define BAMBOO_SEL_RMII(x)              (x & 0x40)
  55 #define BAMBOO_SEL_SMII(x)              (x & 0x20)
  56
  57 /* Flash */
  58 #define BAMBOO_SMALL_FLASH_LOW          0x087f00000ULL
  59 #define BAMBOO_SMALL_FLASH_HIGH         0x0fff00000ULL
  60 #define BAMBOO_SMALL_FLASH_SIZE         0x100000
  61 #define BAMBOO_LARGE_FLASH_LOW          0x087800000ULL
  62 #define BAMBOO_LARGE_FLASH_HIGH1        0x0ff800000ULL
  63 #define BAMBOO_LARGE_FLASH_HIGH2        0x0ffc00000ULL
  64 #define BAMBOO_LARGE_FLASH_SIZE         0x400000
  65 #define BAMBOO_SRAM_LOW                 0x087f00000ULL
  66 #define BAMBOO_SRAM_HIGH1               0x0fff00000ULL
  67 #define BAMBOO_SRAM_HIGH2               0x0ff800000ULL
  68 #define BAMBOO_SRAM_SIZE                0x100000
  69 #define BAMBOO_NAND_FLASH_REG_ADDR      0x090000000ULL
  70 #define BAMBOO_NAND_FLASH_REG_SIZE      0x2000
  71
  72 /*
  73  * Serial port defines
  74  */
  75 #define RS_TABLE_SIZE                   4
  76
  77 #define UART0_IO_BASE                   0xEF600300
  78 #define UART1_IO_BASE                   0xEF600400
  79 #define UART2_IO_BASE                   0xEF600500
  80 #define UART3_IO_BASE                   0xEF600600
  81
  82 #define BASE_BAUD                       33177600/3/16
  83 #define UART0_INT                       0
  84 #define UART1_INT                       1
  85 #define UART2_INT                       3
  86 #define UART3_INT                       4
  87
  88 #define STD_UART_OP(num)                                        \
  89         { 0, BASE_BAUD, 0, UART##num##_INT,                     \
  90                 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),        \
  91                 iomem_base: (void*)UART##num##_IO_BASE,         \
  92                 io_type: SERIAL_IO_MEM},
  93
  94 #define SERIAL_PORT_DFNS        \
  95         STD_UART_OP(0)          \
  96         STD_UART_OP(1)          \
  97         STD_UART_OP(2)          \
  98         STD_UART_OP(3)
  99
 100 /* PCI support */
 101 #define BAMBOO_PCI_CFGA_PLB32           0xeec00000
 102 #define BAMBOO_PCI_CFGD_PLB32           0xeec00004
 103
 104 #define BAMBOO_PCI_IO_BASE              0x00000000e8000000ULL
 105 #define BAMBOO_PCI_IO_SIZE              0x00010000
 106 #define BAMBOO_PCI_MEM_OFFSET           0x00000000
 107 #define BAMBOO_PCI_PHY_MEM_BASE         0x00000000a0000000ULL
 108
 109 #define BAMBOO_PCI_LOWER_IO             0x00000000
 110 #define BAMBOO_PCI_UPPER_IO             0x0000ffff
 111 #define BAMBOO_PCI_LOWER_MEM            0xa0000000
 112 #define BAMBOO_PCI_UPPER_MEM            0xafffffff
 113 #define BAMBOO_PCI_MEM_BASE             0xa0000000
 114
 115 #define BAMBOO_PCIL0_BASE               0x00000000ef400000ULL
 116 #define BAMBOO_PCIL0_SIZE               0x40
 117
 118 #define BAMBOO_PCIL0_PMM0LA             0x000
 119 #define BAMBOO_PCIL0_PMM0MA             0x004
 120 #define BAMBOO_PCIL0_PMM0PCILA          0x008
 121 #define BAMBOO_PCIL0_PMM0PCIHA          0x00C
 122 #define BAMBOO_PCIL0_PMM1LA             0x010
 123 #define BAMBOO_PCIL0_PMM1MA             0x014
 124 #define BAMBOO_PCIL0_PMM1PCILA          0x018
 125 #define BAMBOO_PCIL0_PMM1PCIHA          0x01C
 126 #define BAMBOO_PCIL0_PMM2LA             0x020
 127 #define BAMBOO_PCIL0_PMM2MA             0x024
 128 #define BAMBOO_PCIL0_PMM2PCILA          0x028
 129 #define BAMBOO_PCIL0_PMM2PCIHA          0x02C
 130 #define BAMBOO_PCIL0_PTM1MS             0x030
 131 #define BAMBOO_PCIL0_PTM1LA             0x034
 132 #define BAMBOO_PCIL0_PTM2MS             0x038
 133 #define BAMBOO_PCIL0_PTM2LA             0x03C
 134
 135 #endif                          /* __ASM_BAMBOO_H__ */
 136 #endif                          /* __KERNEL__ */