ACPI: create /sys/firmware/acpi/interrupts
[sfrench/cifs-2.6.git] / arch / powerpc / platforms / powermac / cpufreq_32.c
1 /*
2  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * TODO: Need a big cleanup here. Basically, we need to have different
10  * cpufreq_driver structures for the different type of HW instead of the
11  * current mess. We also need to better deal with the detection of the
12  * type of machine.
13  *
14  */
15
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/slab.h>
25 #include <linux/cpufreq.h>
26 #include <linux/init.h>
27 #include <linux/sysdev.h>
28 #include <linux/hardirq.h>
29 #include <asm/prom.h>
30 #include <asm/machdep.h>
31 #include <asm/irq.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/mmu_context.h>
34 #include <asm/sections.h>
35 #include <asm/cputable.h>
36 #include <asm/time.h>
37 #include <asm/system.h>
38 #include <asm/mpic.h>
39 #include <asm/keylargo.h>
40
41 /* WARNING !!! This will cause calibrate_delay() to be called,
42  * but this is an __init function ! So you MUST go edit
43  * init/main.c to make it non-init before enabling DEBUG_FREQ
44  */
45 #undef DEBUG_FREQ
46
47 /*
48  * There is a problem with the core cpufreq code on SMP kernels,
49  * it won't recalculate the Bogomips properly
50  */
51 #ifdef CONFIG_SMP
52 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
53 #endif
54
55 extern void low_choose_7447a_dfs(int dfs);
56 extern void low_choose_750fx_pll(int pll);
57 extern void low_sleep_handler(void);
58
59 /*
60  * Currently, PowerMac cpufreq supports only high & low frequencies
61  * that are set by the firmware
62  */
63 static unsigned int low_freq;
64 static unsigned int hi_freq;
65 static unsigned int cur_freq;
66 static unsigned int sleep_freq;
67
68 /*
69  * Different models uses different mechanisms to switch the frequency
70  */
71 static int (*set_speed_proc)(int low_speed);
72 static unsigned int (*get_speed_proc)(void);
73
74 /*
75  * Some definitions used by the various speedprocs
76  */
77 static u32 voltage_gpio;
78 static u32 frequency_gpio;
79 static u32 slew_done_gpio;
80 static int no_schedule;
81 static int has_cpu_l2lve;
82 static int is_pmu_based;
83
84 /* There are only two frequency states for each processor. Values
85  * are in kHz for the time being.
86  */
87 #define CPUFREQ_HIGH                  0
88 #define CPUFREQ_LOW                   1
89
90 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
91         {CPUFREQ_HIGH,          0},
92         {CPUFREQ_LOW,           0},
93         {0,                     CPUFREQ_TABLE_END},
94 };
95
96 static struct freq_attr* pmac_cpu_freqs_attr[] = {
97         &cpufreq_freq_attr_scaling_available_freqs,
98         NULL,
99 };
100
101 static inline void local_delay(unsigned long ms)
102 {
103         if (no_schedule)
104                 mdelay(ms);
105         else
106                 msleep(ms);
107 }
108
109 #ifdef DEBUG_FREQ
110 static inline void debug_calc_bogomips(void)
111 {
112         /* This will cause a recalc of bogomips and display the
113          * result. We backup/restore the value to avoid affecting the
114          * core cpufreq framework's own calculation.
115          */
116         extern void calibrate_delay(void);
117
118         unsigned long save_lpj = loops_per_jiffy;
119         calibrate_delay();
120         loops_per_jiffy = save_lpj;
121 }
122 #endif /* DEBUG_FREQ */
123
124 /* Switch CPU speed under 750FX CPU control
125  */
126 static int cpu_750fx_cpu_speed(int low_speed)
127 {
128         u32 hid2;
129
130         if (low_speed == 0) {
131                 /* ramping up, set voltage first */
132                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
133                 /* Make sure we sleep for at least 1ms */
134                 local_delay(10);
135
136                 /* tweak L2 for high voltage */
137                 if (has_cpu_l2lve) {
138                         hid2 = mfspr(SPRN_HID2);
139                         hid2 &= ~0x2000;
140                         mtspr(SPRN_HID2, hid2);
141                 }
142         }
143 #ifdef CONFIG_6xx
144         low_choose_750fx_pll(low_speed);
145 #endif
146         if (low_speed == 1) {
147                 /* tweak L2 for low voltage */
148                 if (has_cpu_l2lve) {
149                         hid2 = mfspr(SPRN_HID2);
150                         hid2 |= 0x2000;
151                         mtspr(SPRN_HID2, hid2);
152                 }
153
154                 /* ramping down, set voltage last */
155                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
156                 local_delay(10);
157         }
158
159         return 0;
160 }
161
162 static unsigned int cpu_750fx_get_cpu_speed(void)
163 {
164         if (mfspr(SPRN_HID1) & HID1_PS)
165                 return low_freq;
166         else
167                 return hi_freq;
168 }
169
170 /* Switch CPU speed using DFS */
171 static int dfs_set_cpu_speed(int low_speed)
172 {
173         if (low_speed == 0) {
174                 /* ramping up, set voltage first */
175                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
176                 /* Make sure we sleep for at least 1ms */
177                 local_delay(1);
178         }
179
180         /* set frequency */
181 #ifdef CONFIG_6xx
182         low_choose_7447a_dfs(low_speed);
183 #endif
184         udelay(100);
185
186         if (low_speed == 1) {
187                 /* ramping down, set voltage last */
188                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
189                 local_delay(1);
190         }
191
192         return 0;
193 }
194
195 static unsigned int dfs_get_cpu_speed(void)
196 {
197         if (mfspr(SPRN_HID1) & HID1_DFS)
198                 return low_freq;
199         else
200                 return hi_freq;
201 }
202
203
204 /* Switch CPU speed using slewing GPIOs
205  */
206 static int gpios_set_cpu_speed(int low_speed)
207 {
208         int gpio, timeout = 0;
209
210         /* If ramping up, set voltage first */
211         if (low_speed == 0) {
212                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
213                 /* Delay is way too big but it's ok, we schedule */
214                 local_delay(10);
215         }
216
217         /* Set frequency */
218         gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
219         if (low_speed == ((gpio & 0x01) == 0))
220                 goto skip;
221
222         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
223                           low_speed ? 0x04 : 0x05);
224         udelay(200);
225         do {
226                 if (++timeout > 100)
227                         break;
228                 local_delay(1);
229                 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
230         } while((gpio & 0x02) == 0);
231  skip:
232         /* If ramping down, set voltage last */
233         if (low_speed == 1) {
234                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
235                 /* Delay is way too big but it's ok, we schedule */
236                 local_delay(10);
237         }
238
239 #ifdef DEBUG_FREQ
240         debug_calc_bogomips();
241 #endif
242
243         return 0;
244 }
245
246 /* Switch CPU speed under PMU control
247  */
248 static int pmu_set_cpu_speed(int low_speed)
249 {
250         struct adb_request req;
251         unsigned long save_l2cr;
252         unsigned long save_l3cr;
253         unsigned int pic_prio;
254         unsigned long flags;
255
256         preempt_disable();
257
258 #ifdef DEBUG_FREQ
259         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
260 #endif
261         pmu_suspend();
262
263         /* Disable all interrupt sources on openpic */
264         pic_prio = mpic_cpu_get_priority();
265         mpic_cpu_set_priority(0xf);
266
267         /* Make sure the decrementer won't interrupt us */
268         asm volatile("mtdec %0" : : "r" (0x7fffffff));
269         /* Make sure any pending DEC interrupt occurring while we did
270          * the above didn't re-enable the DEC */
271         mb();
272         asm volatile("mtdec %0" : : "r" (0x7fffffff));
273
274         /* We can now disable MSR_EE */
275         local_irq_save(flags);
276
277         /* Giveup the FPU & vec */
278         enable_kernel_fp();
279
280 #ifdef CONFIG_ALTIVEC
281         if (cpu_has_feature(CPU_FTR_ALTIVEC))
282                 enable_kernel_altivec();
283 #endif /* CONFIG_ALTIVEC */
284
285         /* Save & disable L2 and L3 caches */
286         save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
287         save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
288
289         /* Send the new speed command. My assumption is that this command
290          * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
291          */
292         pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
293         while (!req.complete)
294                 pmu_poll();
295
296         /* Prepare the northbridge for the speed transition */
297         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
298
299         /* Call low level code to backup CPU state and recover from
300          * hardware reset
301          */
302         low_sleep_handler();
303
304         /* Restore the northbridge */
305         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
306
307         /* Restore L2 cache */
308         if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
309                 _set_L2CR(save_l2cr);
310         /* Restore L3 cache */
311         if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
312                 _set_L3CR(save_l3cr);
313
314         /* Restore userland MMU context */
315         set_context(current->active_mm->context.id, current->active_mm->pgd);
316
317 #ifdef DEBUG_FREQ
318         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
319 #endif
320
321         /* Restore low level PMU operations */
322         pmu_unlock();
323
324         /* Restore decrementer */
325         wakeup_decrementer();
326
327         /* Restore interrupts */
328         mpic_cpu_set_priority(pic_prio);
329
330         /* Let interrupts flow again ... */
331         local_irq_restore(flags);
332
333 #ifdef DEBUG_FREQ
334         debug_calc_bogomips();
335 #endif
336
337         pmu_resume();
338
339         preempt_enable();
340
341         return 0;
342 }
343
344 static int do_set_cpu_speed(int speed_mode, int notify)
345 {
346         struct cpufreq_freqs freqs;
347         unsigned long l3cr;
348         static unsigned long prev_l3cr;
349
350         freqs.old = cur_freq;
351         freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
352         freqs.cpu = smp_processor_id();
353
354         if (freqs.old == freqs.new)
355                 return 0;
356
357         if (notify)
358                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
359         if (speed_mode == CPUFREQ_LOW &&
360             cpu_has_feature(CPU_FTR_L3CR)) {
361                 l3cr = _get_L3CR();
362                 if (l3cr & L3CR_L3E) {
363                         prev_l3cr = l3cr;
364                         _set_L3CR(0);
365                 }
366         }
367         set_speed_proc(speed_mode == CPUFREQ_LOW);
368         if (speed_mode == CPUFREQ_HIGH &&
369             cpu_has_feature(CPU_FTR_L3CR)) {
370                 l3cr = _get_L3CR();
371                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
372                         _set_L3CR(prev_l3cr);
373         }
374         if (notify)
375                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
376         cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
377
378         return 0;
379 }
380
381 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
382 {
383         return cur_freq;
384 }
385
386 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
387 {
388         return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
389 }
390
391 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
392                                         unsigned int target_freq,
393                                         unsigned int relation)
394 {
395         unsigned int    newstate = 0;
396         int             rc;
397
398         if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
399                         target_freq, relation, &newstate))
400                 return -EINVAL;
401
402         rc = do_set_cpu_speed(newstate, 1);
403
404         ppc_proc_freq = cur_freq * 1000ul;
405         return rc;
406 }
407
408 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
409 {
410         if (policy->cpu != 0)
411                 return -ENODEV;
412
413         policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
414         policy->cur = cur_freq;
415
416         cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
417         return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
418 }
419
420 static u32 read_gpio(struct device_node *np)
421 {
422         const u32 *reg = of_get_property(np, "reg", NULL);
423         u32 offset;
424
425         if (reg == NULL)
426                 return 0;
427         /* That works for all keylargos but shall be fixed properly
428          * some day... The problem is that it seems we can't rely
429          * on the "reg" property of the GPIO nodes, they are either
430          * relative to the base of KeyLargo or to the base of the
431          * GPIO space, and the device-tree doesn't help.
432          */
433         offset = *reg;
434         if (offset < KEYLARGO_GPIO_LEVELS0)
435                 offset += KEYLARGO_GPIO_LEVELS0;
436         return offset;
437 }
438
439 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
440 {
441         /* Ok, this could be made a bit smarter, but let's be robust for now. We
442          * always force a speed change to high speed before sleep, to make sure
443          * we have appropriate voltage and/or bus speed for the wakeup process,
444          * and to make sure our loops_per_jiffies are "good enough", that is will
445          * not cause too short delays if we sleep in low speed and wake in high
446          * speed..
447          */
448         no_schedule = 1;
449         sleep_freq = cur_freq;
450         if (cur_freq == low_freq && !is_pmu_based)
451                 do_set_cpu_speed(CPUFREQ_HIGH, 0);
452         return 0;
453 }
454
455 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
456 {
457         /* If we resume, first check if we have a get() function */
458         if (get_speed_proc)
459                 cur_freq = get_speed_proc();
460         else
461                 cur_freq = 0;
462
463         /* We don't, hrm... we don't really know our speed here, best
464          * is that we force a switch to whatever it was, which is
465          * probably high speed due to our suspend() routine
466          */
467         do_set_cpu_speed(sleep_freq == low_freq ?
468                          CPUFREQ_LOW : CPUFREQ_HIGH, 0);
469
470         ppc_proc_freq = cur_freq * 1000ul;
471
472         no_schedule = 0;
473         return 0;
474 }
475
476 static struct cpufreq_driver pmac_cpufreq_driver = {
477         .verify         = pmac_cpufreq_verify,
478         .target         = pmac_cpufreq_target,
479         .get            = pmac_cpufreq_get_speed,
480         .init           = pmac_cpufreq_cpu_init,
481         .suspend        = pmac_cpufreq_suspend,
482         .resume         = pmac_cpufreq_resume,
483         .flags          = CPUFREQ_PM_NO_WARN,
484         .attr           = pmac_cpu_freqs_attr,
485         .name           = "powermac",
486         .owner          = THIS_MODULE,
487 };
488
489
490 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
491 {
492         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
493                                                                 "voltage-gpio");
494         struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
495                                                                 "frequency-gpio");
496         struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
497                                                                      "slewing-done");
498         const u32 *value;
499
500         /*
501          * Check to see if it's GPIO driven or PMU only
502          *
503          * The way we extract the GPIO address is slightly hackish, but it
504          * works well enough for now. We need to abstract the whole GPIO
505          * stuff sooner or later anyway
506          */
507
508         if (volt_gpio_np)
509                 voltage_gpio = read_gpio(volt_gpio_np);
510         if (freq_gpio_np)
511                 frequency_gpio = read_gpio(freq_gpio_np);
512         if (slew_done_gpio_np)
513                 slew_done_gpio = read_gpio(slew_done_gpio_np);
514
515         /* If we use the frequency GPIOs, calculate the min/max speeds based
516          * on the bus frequencies
517          */
518         if (frequency_gpio && slew_done_gpio) {
519                 int lenp, rc;
520                 const u32 *freqs, *ratio;
521
522                 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
523                 lenp /= sizeof(u32);
524                 if (freqs == NULL || lenp != 2) {
525                         printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
526                         return 1;
527                 }
528                 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
529                                                 NULL);
530                 if (ratio == NULL) {
531                         printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
532                         return 1;
533                 }
534
535                 /* Get the min/max bus frequencies */
536                 low_freq = min(freqs[0], freqs[1]);
537                 hi_freq = max(freqs[0], freqs[1]);
538
539                 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
540                  * frequency, it claims it to be around 84Mhz on some models while
541                  * it appears to be approx. 101Mhz on all. Let's hack around here...
542                  * fortunately, we don't need to be too precise
543                  */
544                 if (low_freq < 98000000)
545                         low_freq = 101000000;
546
547                 /* Convert those to CPU core clocks */
548                 low_freq = (low_freq * (*ratio)) / 2000;
549                 hi_freq = (hi_freq * (*ratio)) / 2000;
550
551                 /* Now we get the frequencies, we read the GPIO to see what is out current
552                  * speed
553                  */
554                 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
555                 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
556
557                 set_speed_proc = gpios_set_cpu_speed;
558                 return 1;
559         }
560
561         /* If we use the PMU, look for the min & max frequencies in the
562          * device-tree
563          */
564         value = of_get_property(cpunode, "min-clock-frequency", NULL);
565         if (!value)
566                 return 1;
567         low_freq = (*value) / 1000;
568         /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
569          * here */
570         if (low_freq < 100000)
571                 low_freq *= 10;
572
573         value = of_get_property(cpunode, "max-clock-frequency", NULL);
574         if (!value)
575                 return 1;
576         hi_freq = (*value) / 1000;
577         set_speed_proc = pmu_set_cpu_speed;
578         is_pmu_based = 1;
579
580         return 0;
581 }
582
583 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
584 {
585         struct device_node *volt_gpio_np;
586
587         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
588                 return 1;
589
590         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
591         if (volt_gpio_np)
592                 voltage_gpio = read_gpio(volt_gpio_np);
593         if (!voltage_gpio){
594                 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
595                 return 1;
596         }
597
598         /* OF only reports the high frequency */
599         hi_freq = cur_freq;
600         low_freq = cur_freq/2;
601
602         /* Read actual frequency from CPU */
603         cur_freq = dfs_get_cpu_speed();
604         set_speed_proc = dfs_set_cpu_speed;
605         get_speed_proc = dfs_get_cpu_speed;
606
607         return 0;
608 }
609
610 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
611 {
612         struct device_node *volt_gpio_np;
613         u32 pvr;
614         const u32 *value;
615
616         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
617                 return 1;
618
619         hi_freq = cur_freq;
620         value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
621         if (!value)
622                 return 1;
623         low_freq = (*value) / 1000;
624
625         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
626         if (volt_gpio_np)
627                 voltage_gpio = read_gpio(volt_gpio_np);
628
629         pvr = mfspr(SPRN_PVR);
630         has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
631
632         set_speed_proc = cpu_750fx_cpu_speed;
633         get_speed_proc = cpu_750fx_get_cpu_speed;
634         cur_freq = cpu_750fx_get_cpu_speed();
635
636         return 0;
637 }
638
639 /* Currently, we support the following machines:
640  *
641  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
642  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
643  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
644  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
645  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
646  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
647  *  - Recent MacRISC3 laptops
648  *  - All new machines with 7447A CPUs
649  */
650 static int __init pmac_cpufreq_setup(void)
651 {
652         struct device_node      *cpunode;
653         const u32               *value;
654
655         if (strstr(cmd_line, "nocpufreq"))
656                 return 0;
657
658         /* Assume only one CPU */
659         cpunode = of_find_node_by_type(NULL, "cpu");
660         if (!cpunode)
661                 goto out;
662
663         /* Get current cpu clock freq */
664         value = of_get_property(cpunode, "clock-frequency", NULL);
665         if (!value)
666                 goto out;
667         cur_freq = (*value) / 1000;
668
669         /*  Check for 7447A based MacRISC3 */
670         if (machine_is_compatible("MacRISC3") &&
671             of_get_property(cpunode, "dynamic-power-step", NULL) &&
672             PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
673                 pmac_cpufreq_init_7447A(cpunode);
674         /* Check for other MacRISC3 machines */
675         } else if (machine_is_compatible("PowerBook3,4") ||
676                    machine_is_compatible("PowerBook3,5") ||
677                    machine_is_compatible("MacRISC3")) {
678                 pmac_cpufreq_init_MacRISC3(cpunode);
679         /* Else check for iBook2 500/600 */
680         } else if (machine_is_compatible("PowerBook4,1")) {
681                 hi_freq = cur_freq;
682                 low_freq = 400000;
683                 set_speed_proc = pmu_set_cpu_speed;
684                 is_pmu_based = 1;
685         }
686         /* Else check for TiPb 550 */
687         else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
688                 hi_freq = cur_freq;
689                 low_freq = 500000;
690                 set_speed_proc = pmu_set_cpu_speed;
691                 is_pmu_based = 1;
692         }
693         /* Else check for TiPb 400 & 500 */
694         else if (machine_is_compatible("PowerBook3,2")) {
695                 /* We only know about the 400 MHz and the 500Mhz model
696                  * they both have 300 MHz as low frequency
697                  */
698                 if (cur_freq < 350000 || cur_freq > 550000)
699                         goto out;
700                 hi_freq = cur_freq;
701                 low_freq = 300000;
702                 set_speed_proc = pmu_set_cpu_speed;
703                 is_pmu_based = 1;
704         }
705         /* Else check for 750FX */
706         else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
707                 pmac_cpufreq_init_750FX(cpunode);
708 out:
709         of_node_put(cpunode);
710         if (set_speed_proc == NULL)
711                 return -ENODEV;
712
713         pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
714         pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
715         ppc_proc_freq = cur_freq * 1000ul;
716
717         printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
718         printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
719                low_freq/1000, hi_freq/1000, cur_freq/1000);
720
721         return cpufreq_register_driver(&pmac_cpufreq_driver);
722 }
723
724 module_init(pmac_cpufreq_setup);
725