Merge branch 'CVE-2014-7975' of git://git.kernel.org/pub/scm/linux/kernel/git/luto...
[sfrench/cifs-2.6.git] / arch / powerpc / kvm / book3s_pr.c
1 /*
2  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3  *
4  * Authors:
5  *    Alexander Graf <agraf@suse.de>
6  *    Kevin Wolf <mail@kevin-wolf.de>
7  *    Paul Mackerras <paulus@samba.org>
8  *
9  * Description:
10  * Functions relating to running KVM on Book 3S processors where
11  * we don't have access to hypervisor mode, and we run the guest
12  * in problem state (user mode).
13  *
14  * This file is derived from arch/powerpc/kvm/44x.c,
15  * by Hollis Blanchard <hollisb@us.ibm.com>.
16  *
17  * This program is free software; you can redistribute it and/or modify
18  * it under the terms of the GNU General Public License, version 2, as
19  * published by the Free Software Foundation.
20  */
21
22 #include <linux/kvm_host.h>
23 #include <linux/export.h>
24 #include <linux/err.h>
25 #include <linux/slab.h>
26
27 #include <asm/reg.h>
28 #include <asm/cputable.h>
29 #include <asm/cacheflush.h>
30 #include <asm/tlbflush.h>
31 #include <asm/uaccess.h>
32 #include <asm/io.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/kvm_book3s.h>
35 #include <asm/mmu_context.h>
36 #include <asm/switch_to.h>
37 #include <asm/firmware.h>
38 #include <asm/hvcall.h>
39 #include <linux/gfp.h>
40 #include <linux/sched.h>
41 #include <linux/vmalloc.h>
42 #include <linux/highmem.h>
43 #include <linux/module.h>
44 #include <linux/miscdevice.h>
45
46 #include "book3s.h"
47
48 #define CREATE_TRACE_POINTS
49 #include "trace_pr.h"
50
51 /* #define EXIT_DEBUG */
52 /* #define DEBUG_EXT */
53
54 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
55                              ulong msr);
56 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
57
58 /* Some compatibility defines */
59 #ifdef CONFIG_PPC_BOOK3S_32
60 #define MSR_USER32 MSR_USER
61 #define MSR_USER64 MSR_USER
62 #define HW_PAGE_SIZE PAGE_SIZE
63 #endif
64
65 static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
66 {
67         ulong msr = kvmppc_get_msr(vcpu);
68         return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
69 }
70
71 static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
72 {
73         ulong msr = kvmppc_get_msr(vcpu);
74         ulong pc = kvmppc_get_pc(vcpu);
75
76         /* We are in DR only split real mode */
77         if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
78                 return;
79
80         /* We have not fixed up the guest already */
81         if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
82                 return;
83
84         /* The code is in fixupable address space */
85         if (pc & SPLIT_HACK_MASK)
86                 return;
87
88         vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
89         kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
90 }
91
92 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);
93
94 static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
95 {
96 #ifdef CONFIG_PPC_BOOK3S_64
97         struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
98         memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
99         svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
100         svcpu->in_use = 0;
101         svcpu_put(svcpu);
102 #endif
103
104         /* Disable AIL if supported */
105         if (cpu_has_feature(CPU_FTR_HVMODE) &&
106             cpu_has_feature(CPU_FTR_ARCH_207S))
107                 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);
108
109         vcpu->cpu = smp_processor_id();
110 #ifdef CONFIG_PPC_BOOK3S_32
111         current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
112 #endif
113
114         if (kvmppc_is_split_real(vcpu))
115                 kvmppc_fixup_split_real(vcpu);
116 }
117
118 static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
119 {
120 #ifdef CONFIG_PPC_BOOK3S_64
121         struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
122         if (svcpu->in_use) {
123                 kvmppc_copy_from_svcpu(vcpu, svcpu);
124         }
125         memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
126         to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
127         svcpu_put(svcpu);
128 #endif
129
130         if (kvmppc_is_split_real(vcpu))
131                 kvmppc_unfixup_split_real(vcpu);
132
133         kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
134         kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
135
136         /* Enable AIL if supported */
137         if (cpu_has_feature(CPU_FTR_HVMODE) &&
138             cpu_has_feature(CPU_FTR_ARCH_207S))
139                 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);
140
141         vcpu->cpu = -1;
142 }
143
144 /* Copy data needed by real-mode code from vcpu to shadow vcpu */
145 void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
146                           struct kvm_vcpu *vcpu)
147 {
148         svcpu->gpr[0] = vcpu->arch.gpr[0];
149         svcpu->gpr[1] = vcpu->arch.gpr[1];
150         svcpu->gpr[2] = vcpu->arch.gpr[2];
151         svcpu->gpr[3] = vcpu->arch.gpr[3];
152         svcpu->gpr[4] = vcpu->arch.gpr[4];
153         svcpu->gpr[5] = vcpu->arch.gpr[5];
154         svcpu->gpr[6] = vcpu->arch.gpr[6];
155         svcpu->gpr[7] = vcpu->arch.gpr[7];
156         svcpu->gpr[8] = vcpu->arch.gpr[8];
157         svcpu->gpr[9] = vcpu->arch.gpr[9];
158         svcpu->gpr[10] = vcpu->arch.gpr[10];
159         svcpu->gpr[11] = vcpu->arch.gpr[11];
160         svcpu->gpr[12] = vcpu->arch.gpr[12];
161         svcpu->gpr[13] = vcpu->arch.gpr[13];
162         svcpu->cr  = vcpu->arch.cr;
163         svcpu->xer = vcpu->arch.xer;
164         svcpu->ctr = vcpu->arch.ctr;
165         svcpu->lr  = vcpu->arch.lr;
166         svcpu->pc  = vcpu->arch.pc;
167 #ifdef CONFIG_PPC_BOOK3S_64
168         svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
169 #endif
170         /*
171          * Now also save the current time base value. We use this
172          * to find the guest purr and spurr value.
173          */
174         vcpu->arch.entry_tb = get_tb();
175         vcpu->arch.entry_vtb = get_vtb();
176         if (cpu_has_feature(CPU_FTR_ARCH_207S))
177                 vcpu->arch.entry_ic = mfspr(SPRN_IC);
178         svcpu->in_use = true;
179 }
180
181 /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
182 void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
183                             struct kvmppc_book3s_shadow_vcpu *svcpu)
184 {
185         /*
186          * vcpu_put would just call us again because in_use hasn't
187          * been updated yet.
188          */
189         preempt_disable();
190
191         /*
192          * Maybe we were already preempted and synced the svcpu from
193          * our preempt notifiers. Don't bother touching this svcpu then.
194          */
195         if (!svcpu->in_use)
196                 goto out;
197
198         vcpu->arch.gpr[0] = svcpu->gpr[0];
199         vcpu->arch.gpr[1] = svcpu->gpr[1];
200         vcpu->arch.gpr[2] = svcpu->gpr[2];
201         vcpu->arch.gpr[3] = svcpu->gpr[3];
202         vcpu->arch.gpr[4] = svcpu->gpr[4];
203         vcpu->arch.gpr[5] = svcpu->gpr[5];
204         vcpu->arch.gpr[6] = svcpu->gpr[6];
205         vcpu->arch.gpr[7] = svcpu->gpr[7];
206         vcpu->arch.gpr[8] = svcpu->gpr[8];
207         vcpu->arch.gpr[9] = svcpu->gpr[9];
208         vcpu->arch.gpr[10] = svcpu->gpr[10];
209         vcpu->arch.gpr[11] = svcpu->gpr[11];
210         vcpu->arch.gpr[12] = svcpu->gpr[12];
211         vcpu->arch.gpr[13] = svcpu->gpr[13];
212         vcpu->arch.cr  = svcpu->cr;
213         vcpu->arch.xer = svcpu->xer;
214         vcpu->arch.ctr = svcpu->ctr;
215         vcpu->arch.lr  = svcpu->lr;
216         vcpu->arch.pc  = svcpu->pc;
217         vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
218         vcpu->arch.fault_dar   = svcpu->fault_dar;
219         vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
220         vcpu->arch.last_inst   = svcpu->last_inst;
221 #ifdef CONFIG_PPC_BOOK3S_64
222         vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
223 #endif
224         /*
225          * Update purr and spurr using time base on exit.
226          */
227         vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
228         vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
229         vcpu->arch.vtb += get_vtb() - vcpu->arch.entry_vtb;
230         if (cpu_has_feature(CPU_FTR_ARCH_207S))
231                 vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
232         svcpu->in_use = false;
233
234 out:
235         preempt_enable();
236 }
237
238 static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
239 {
240         int r = 1; /* Indicate we want to get back into the guest */
241
242         /* We misuse TLB_FLUSH to indicate that we want to clear
243            all shadow cache entries */
244         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
245                 kvmppc_mmu_pte_flush(vcpu, 0, 0);
246
247         return r;
248 }
249
250 /************* MMU Notifiers *************/
251 static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
252                              unsigned long end)
253 {
254         long i;
255         struct kvm_vcpu *vcpu;
256         struct kvm_memslots *slots;
257         struct kvm_memory_slot *memslot;
258
259         slots = kvm_memslots(kvm);
260         kvm_for_each_memslot(memslot, slots) {
261                 unsigned long hva_start, hva_end;
262                 gfn_t gfn, gfn_end;
263
264                 hva_start = max(start, memslot->userspace_addr);
265                 hva_end = min(end, memslot->userspace_addr +
266                                         (memslot->npages << PAGE_SHIFT));
267                 if (hva_start >= hva_end)
268                         continue;
269                 /*
270                  * {gfn(page) | page intersects with [hva_start, hva_end)} =
271                  * {gfn, gfn+1, ..., gfn_end-1}.
272                  */
273                 gfn = hva_to_gfn_memslot(hva_start, memslot);
274                 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
275                 kvm_for_each_vcpu(i, vcpu, kvm)
276                         kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
277                                               gfn_end << PAGE_SHIFT);
278         }
279 }
280
281 static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva)
282 {
283         trace_kvm_unmap_hva(hva);
284
285         do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
286
287         return 0;
288 }
289
290 static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
291                                   unsigned long end)
292 {
293         do_kvm_unmap_hva(kvm, start, end);
294
295         return 0;
296 }
297
298 static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
299                           unsigned long end)
300 {
301         /* XXX could be more clever ;) */
302         return 0;
303 }
304
305 static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
306 {
307         /* XXX could be more clever ;) */
308         return 0;
309 }
310
311 static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
312 {
313         /* The page will get remapped properly on its next fault */
314         do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
315 }
316
317 /*****************************************/
318
319 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
320 {
321         ulong guest_msr = kvmppc_get_msr(vcpu);
322         ulong smsr = guest_msr;
323
324         /* Guest MSR values */
325         smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
326         /* Process MSR values */
327         smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
328         /* External providers the guest reserved */
329         smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
330         /* 64-bit Process MSR values */
331 #ifdef CONFIG_PPC_BOOK3S_64
332         smsr |= MSR_ISF | MSR_HV;
333 #endif
334         vcpu->arch.shadow_msr = smsr;
335 }
336
337 static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
338 {
339         ulong old_msr = kvmppc_get_msr(vcpu);
340
341 #ifdef EXIT_DEBUG
342         printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
343 #endif
344
345         msr &= to_book3s(vcpu)->msr_mask;
346         kvmppc_set_msr_fast(vcpu, msr);
347         kvmppc_recalc_shadow_msr(vcpu);
348
349         if (msr & MSR_POW) {
350                 if (!vcpu->arch.pending_exceptions) {
351                         kvm_vcpu_block(vcpu);
352                         clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
353                         vcpu->stat.halt_wakeup++;
354
355                         /* Unset POW bit after we woke up */
356                         msr &= ~MSR_POW;
357                         kvmppc_set_msr_fast(vcpu, msr);
358                 }
359         }
360
361         if (kvmppc_is_split_real(vcpu))
362                 kvmppc_fixup_split_real(vcpu);
363         else
364                 kvmppc_unfixup_split_real(vcpu);
365
366         if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
367                    (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
368                 kvmppc_mmu_flush_segments(vcpu);
369                 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
370
371                 /* Preload magic page segment when in kernel mode */
372                 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
373                         struct kvm_vcpu_arch *a = &vcpu->arch;
374
375                         if (msr & MSR_DR)
376                                 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
377                         else
378                                 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
379                 }
380         }
381
382         /*
383          * When switching from 32 to 64-bit, we may have a stale 32-bit
384          * magic page around, we need to flush it. Typically 32-bit magic
385          * page will be instanciated when calling into RTAS. Note: We
386          * assume that such transition only happens while in kernel mode,
387          * ie, we never transition from user 32-bit to kernel 64-bit with
388          * a 32-bit magic page around.
389          */
390         if (vcpu->arch.magic_page_pa &&
391             !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
392                 /* going from RTAS to normal kernel code */
393                 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
394                                      ~0xFFFUL);
395         }
396
397         /* Preload FPU if it's enabled */
398         if (kvmppc_get_msr(vcpu) & MSR_FP)
399                 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
400 }
401
402 void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
403 {
404         u32 host_pvr;
405
406         vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
407         vcpu->arch.pvr = pvr;
408 #ifdef CONFIG_PPC_BOOK3S_64
409         if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
410                 kvmppc_mmu_book3s_64_init(vcpu);
411                 if (!to_book3s(vcpu)->hior_explicit)
412                         to_book3s(vcpu)->hior = 0xfff00000;
413                 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
414                 vcpu->arch.cpu_type = KVM_CPU_3S_64;
415         } else
416 #endif
417         {
418                 kvmppc_mmu_book3s_32_init(vcpu);
419                 if (!to_book3s(vcpu)->hior_explicit)
420                         to_book3s(vcpu)->hior = 0;
421                 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
422                 vcpu->arch.cpu_type = KVM_CPU_3S_32;
423         }
424
425         kvmppc_sanity_check(vcpu);
426
427         /* If we are in hypervisor level on 970, we can tell the CPU to
428          * treat DCBZ as 32 bytes store */
429         vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
430         if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
431             !strcmp(cur_cpu_spec->platform, "ppc970"))
432                 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
433
434         /* Cell performs badly if MSR_FEx are set. So let's hope nobody
435            really needs them in a VM on Cell and force disable them. */
436         if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
437                 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
438
439         /*
440          * If they're asking for POWER6 or later, set the flag
441          * indicating that we can do multiple large page sizes
442          * and 1TB segments.
443          * Also set the flag that indicates that tlbie has the large
444          * page bit in the RB operand instead of the instruction.
445          */
446         switch (PVR_VER(pvr)) {
447         case PVR_POWER6:
448         case PVR_POWER7:
449         case PVR_POWER7p:
450         case PVR_POWER8:
451                 vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
452                         BOOK3S_HFLAG_NEW_TLBIE;
453                 break;
454         }
455
456 #ifdef CONFIG_PPC_BOOK3S_32
457         /* 32 bit Book3S always has 32 byte dcbz */
458         vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
459 #endif
460
461         /* On some CPUs we can execute paired single operations natively */
462         asm ( "mfpvr %0" : "=r"(host_pvr));
463         switch (host_pvr) {
464         case 0x00080200:        /* lonestar 2.0 */
465         case 0x00088202:        /* lonestar 2.2 */
466         case 0x70000100:        /* gekko 1.0 */
467         case 0x00080100:        /* gekko 2.0 */
468         case 0x00083203:        /* gekko 2.3a */
469         case 0x00083213:        /* gekko 2.3b */
470         case 0x00083204:        /* gekko 2.4 */
471         case 0x00083214:        /* gekko 2.4e (8SE) - retail HW2 */
472         case 0x00087200:        /* broadway */
473                 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
474                 /* Enable HID2.PSE - in case we need it later */
475                 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
476         }
477 }
478
479 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
480  * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
481  * emulate 32 bytes dcbz length.
482  *
483  * The Book3s_64 inventors also realized this case and implemented a special bit
484  * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
485  *
486  * My approach here is to patch the dcbz instruction on executing pages.
487  */
488 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
489 {
490         struct page *hpage;
491         u64 hpage_offset;
492         u32 *page;
493         int i;
494
495         hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
496         if (is_error_page(hpage))
497                 return;
498
499         hpage_offset = pte->raddr & ~PAGE_MASK;
500         hpage_offset &= ~0xFFFULL;
501         hpage_offset /= 4;
502
503         get_page(hpage);
504         page = kmap_atomic(hpage);
505
506         /* patch dcbz into reserved instruction, so we trap */
507         for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
508                 if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
509                         page[i] &= cpu_to_be32(0xfffffff7);
510
511         kunmap_atomic(page);
512         put_page(hpage);
513 }
514
515 static int kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
516 {
517         ulong mp_pa = vcpu->arch.magic_page_pa;
518
519         if (!(kvmppc_get_msr(vcpu) & MSR_SF))
520                 mp_pa = (uint32_t)mp_pa;
521
522         gpa &= ~0xFFFULL;
523         if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
524                 return 1;
525         }
526
527         return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
528 }
529
530 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
531                             ulong eaddr, int vec)
532 {
533         bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
534         bool iswrite = false;
535         int r = RESUME_GUEST;
536         int relocated;
537         int page_found = 0;
538         struct kvmppc_pte pte;
539         bool is_mmio = false;
540         bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
541         bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
542         u64 vsid;
543
544         relocated = data ? dr : ir;
545         if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
546                 iswrite = true;
547
548         /* Resolve real address if translation turned on */
549         if (relocated) {
550                 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
551         } else {
552                 pte.may_execute = true;
553                 pte.may_read = true;
554                 pte.may_write = true;
555                 pte.raddr = eaddr & KVM_PAM;
556                 pte.eaddr = eaddr;
557                 pte.vpage = eaddr >> 12;
558                 pte.page_size = MMU_PAGE_64K;
559         }
560
561         switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
562         case 0:
563                 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
564                 break;
565         case MSR_DR:
566                 if (!data &&
567                     (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
568                     ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
569                         pte.raddr &= ~SPLIT_HACK_MASK;
570                 /* fall through */
571         case MSR_IR:
572                 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
573
574                 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
575                         pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
576                 else
577                         pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
578                 pte.vpage |= vsid;
579
580                 if (vsid == -1)
581                         page_found = -EINVAL;
582                 break;
583         }
584
585         if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
586            (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
587                 /*
588                  * If we do the dcbz hack, we have to NX on every execution,
589                  * so we can patch the executing code. This renders our guest
590                  * NX-less.
591                  */
592                 pte.may_execute = !data;
593         }
594
595         if (page_found == -ENOENT) {
596                 /* Page not found in guest PTE entries */
597                 u64 ssrr1 = vcpu->arch.shadow_srr1;
598                 u64 msr = kvmppc_get_msr(vcpu);
599                 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
600                 kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
601                 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
602                 kvmppc_book3s_queue_irqprio(vcpu, vec);
603         } else if (page_found == -EPERM) {
604                 /* Storage protection */
605                 u32 dsisr = vcpu->arch.fault_dsisr;
606                 u64 ssrr1 = vcpu->arch.shadow_srr1;
607                 u64 msr = kvmppc_get_msr(vcpu);
608                 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
609                 dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
610                 kvmppc_set_dsisr(vcpu, dsisr);
611                 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
612                 kvmppc_book3s_queue_irqprio(vcpu, vec);
613         } else if (page_found == -EINVAL) {
614                 /* Page not found in guest SLB */
615                 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
616                 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
617         } else if (!is_mmio &&
618                    kvmppc_visible_gpa(vcpu, pte.raddr)) {
619                 if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
620                         /*
621                          * There is already a host HPTE there, presumably
622                          * a read-only one for a page the guest thinks
623                          * is writable, so get rid of it first.
624                          */
625                         kvmppc_mmu_unmap_page(vcpu, &pte);
626                 }
627                 /* The guest's PTE is not mapped yet. Map on the host */
628                 kvmppc_mmu_map_page(vcpu, &pte, iswrite);
629                 if (data)
630                         vcpu->stat.sp_storage++;
631                 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
632                          (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
633                         kvmppc_patch_dcbz(vcpu, &pte);
634         } else {
635                 /* MMIO */
636                 vcpu->stat.mmio_exits++;
637                 vcpu->arch.paddr_accessed = pte.raddr;
638                 vcpu->arch.vaddr_accessed = pte.eaddr;
639                 r = kvmppc_emulate_mmio(run, vcpu);
640                 if ( r == RESUME_HOST_NV )
641                         r = RESUME_HOST;
642         }
643
644         return r;
645 }
646
647 static inline int get_fpr_index(int i)
648 {
649         return i * TS_FPRWIDTH;
650 }
651
652 /* Give up external provider (FPU, Altivec, VSX) */
653 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
654 {
655         struct thread_struct *t = &current->thread;
656
657         /*
658          * VSX instructions can access FP and vector registers, so if
659          * we are giving up VSX, make sure we give up FP and VMX as well.
660          */
661         if (msr & MSR_VSX)
662                 msr |= MSR_FP | MSR_VEC;
663
664         msr &= vcpu->arch.guest_owned_ext;
665         if (!msr)
666                 return;
667
668 #ifdef DEBUG_EXT
669         printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
670 #endif
671
672         if (msr & MSR_FP) {
673                 /*
674                  * Note that on CPUs with VSX, giveup_fpu stores
675                  * both the traditional FP registers and the added VSX
676                  * registers into thread.fp_state.fpr[].
677                  */
678                 if (t->regs->msr & MSR_FP)
679                         giveup_fpu(current);
680                 t->fp_save_area = NULL;
681         }
682
683 #ifdef CONFIG_ALTIVEC
684         if (msr & MSR_VEC) {
685                 if (current->thread.regs->msr & MSR_VEC)
686                         giveup_altivec(current);
687                 t->vr_save_area = NULL;
688         }
689 #endif
690
691         vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
692         kvmppc_recalc_shadow_msr(vcpu);
693 }
694
695 /* Give up facility (TAR / EBB / DSCR) */
696 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
697 {
698 #ifdef CONFIG_PPC_BOOK3S_64
699         if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
700                 /* Facility not available to the guest, ignore giveup request*/
701                 return;
702         }
703
704         switch (fac) {
705         case FSCR_TAR_LG:
706                 vcpu->arch.tar = mfspr(SPRN_TAR);
707                 mtspr(SPRN_TAR, current->thread.tar);
708                 vcpu->arch.shadow_fscr &= ~FSCR_TAR;
709                 break;
710         }
711 #endif
712 }
713
714 /* Handle external providers (FPU, Altivec, VSX) */
715 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
716                              ulong msr)
717 {
718         struct thread_struct *t = &current->thread;
719
720         /* When we have paired singles, we emulate in software */
721         if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
722                 return RESUME_GUEST;
723
724         if (!(kvmppc_get_msr(vcpu) & msr)) {
725                 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
726                 return RESUME_GUEST;
727         }
728
729         if (msr == MSR_VSX) {
730                 /* No VSX?  Give an illegal instruction interrupt */
731 #ifdef CONFIG_VSX
732                 if (!cpu_has_feature(CPU_FTR_VSX))
733 #endif
734                 {
735                         kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
736                         return RESUME_GUEST;
737                 }
738
739                 /*
740                  * We have to load up all the FP and VMX registers before
741                  * we can let the guest use VSX instructions.
742                  */
743                 msr = MSR_FP | MSR_VEC | MSR_VSX;
744         }
745
746         /* See if we already own all the ext(s) needed */
747         msr &= ~vcpu->arch.guest_owned_ext;
748         if (!msr)
749                 return RESUME_GUEST;
750
751 #ifdef DEBUG_EXT
752         printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
753 #endif
754
755         if (msr & MSR_FP) {
756                 preempt_disable();
757                 enable_kernel_fp();
758                 load_fp_state(&vcpu->arch.fp);
759                 t->fp_save_area = &vcpu->arch.fp;
760                 preempt_enable();
761         }
762
763         if (msr & MSR_VEC) {
764 #ifdef CONFIG_ALTIVEC
765                 preempt_disable();
766                 enable_kernel_altivec();
767                 load_vr_state(&vcpu->arch.vr);
768                 t->vr_save_area = &vcpu->arch.vr;
769                 preempt_enable();
770 #endif
771         }
772
773         t->regs->msr |= msr;
774         vcpu->arch.guest_owned_ext |= msr;
775         kvmppc_recalc_shadow_msr(vcpu);
776
777         return RESUME_GUEST;
778 }
779
780 /*
781  * Kernel code using FP or VMX could have flushed guest state to
782  * the thread_struct; if so, get it back now.
783  */
784 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
785 {
786         unsigned long lost_ext;
787
788         lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
789         if (!lost_ext)
790                 return;
791
792         if (lost_ext & MSR_FP) {
793                 preempt_disable();
794                 enable_kernel_fp();
795                 load_fp_state(&vcpu->arch.fp);
796                 preempt_enable();
797         }
798 #ifdef CONFIG_ALTIVEC
799         if (lost_ext & MSR_VEC) {
800                 preempt_disable();
801                 enable_kernel_altivec();
802                 load_vr_state(&vcpu->arch.vr);
803                 preempt_enable();
804         }
805 #endif
806         current->thread.regs->msr |= lost_ext;
807 }
808
809 #ifdef CONFIG_PPC_BOOK3S_64
810
811 static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
812 {
813         /* Inject the Interrupt Cause field and trigger a guest interrupt */
814         vcpu->arch.fscr &= ~(0xffULL << 56);
815         vcpu->arch.fscr |= (fac << 56);
816         kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
817 }
818
819 static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
820 {
821         enum emulation_result er = EMULATE_FAIL;
822
823         if (!(kvmppc_get_msr(vcpu) & MSR_PR))
824                 er = kvmppc_emulate_instruction(vcpu->run, vcpu);
825
826         if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
827                 /* Couldn't emulate, trigger interrupt in guest */
828                 kvmppc_trigger_fac_interrupt(vcpu, fac);
829         }
830 }
831
832 /* Enable facilities (TAR, EBB, DSCR) for the guest */
833 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
834 {
835         bool guest_fac_enabled;
836         BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
837
838         /*
839          * Not every facility is enabled by FSCR bits, check whether the
840          * guest has this facility enabled at all.
841          */
842         switch (fac) {
843         case FSCR_TAR_LG:
844         case FSCR_EBB_LG:
845                 guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
846                 break;
847         case FSCR_TM_LG:
848                 guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
849                 break;
850         default:
851                 guest_fac_enabled = false;
852                 break;
853         }
854
855         if (!guest_fac_enabled) {
856                 /* Facility not enabled by the guest */
857                 kvmppc_trigger_fac_interrupt(vcpu, fac);
858                 return RESUME_GUEST;
859         }
860
861         switch (fac) {
862         case FSCR_TAR_LG:
863                 /* TAR switching isn't lazy in Linux yet */
864                 current->thread.tar = mfspr(SPRN_TAR);
865                 mtspr(SPRN_TAR, vcpu->arch.tar);
866                 vcpu->arch.shadow_fscr |= FSCR_TAR;
867                 break;
868         default:
869                 kvmppc_emulate_fac(vcpu, fac);
870                 break;
871         }
872
873         return RESUME_GUEST;
874 }
875
876 void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
877 {
878         if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
879                 /* TAR got dropped, drop it in shadow too */
880                 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
881         }
882         vcpu->arch.fscr = fscr;
883 }
884 #endif
885
886 int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
887                           unsigned int exit_nr)
888 {
889         int r = RESUME_HOST;
890         int s;
891
892         vcpu->stat.sum_exits++;
893
894         run->exit_reason = KVM_EXIT_UNKNOWN;
895         run->ready_for_interrupt_injection = 1;
896
897         /* We get here with MSR.EE=1 */
898
899         trace_kvm_exit(exit_nr, vcpu);
900         kvm_guest_exit();
901
902         switch (exit_nr) {
903         case BOOK3S_INTERRUPT_INST_STORAGE:
904         {
905                 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
906                 vcpu->stat.pf_instruc++;
907
908                 if (kvmppc_is_split_real(vcpu))
909                         kvmppc_fixup_split_real(vcpu);
910
911 #ifdef CONFIG_PPC_BOOK3S_32
912                 /* We set segments as unused segments when invalidating them. So
913                  * treat the respective fault as segment fault. */
914                 {
915                         struct kvmppc_book3s_shadow_vcpu *svcpu;
916                         u32 sr;
917
918                         svcpu = svcpu_get(vcpu);
919                         sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
920                         svcpu_put(svcpu);
921                         if (sr == SR_INVALID) {
922                                 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
923                                 r = RESUME_GUEST;
924                                 break;
925                         }
926                 }
927 #endif
928
929                 /* only care about PTEG not found errors, but leave NX alone */
930                 if (shadow_srr1 & 0x40000000) {
931                         int idx = srcu_read_lock(&vcpu->kvm->srcu);
932                         r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
933                         srcu_read_unlock(&vcpu->kvm->srcu, idx);
934                         vcpu->stat.sp_instruc++;
935                 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
936                           (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
937                         /*
938                          * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
939                          *     so we can't use the NX bit inside the guest. Let's cross our fingers,
940                          *     that no guest that needs the dcbz hack does NX.
941                          */
942                         kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
943                         r = RESUME_GUEST;
944                 } else {
945                         u64 msr = kvmppc_get_msr(vcpu);
946                         msr |= shadow_srr1 & 0x58000000;
947                         kvmppc_set_msr_fast(vcpu, msr);
948                         kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
949                         r = RESUME_GUEST;
950                 }
951                 break;
952         }
953         case BOOK3S_INTERRUPT_DATA_STORAGE:
954         {
955                 ulong dar = kvmppc_get_fault_dar(vcpu);
956                 u32 fault_dsisr = vcpu->arch.fault_dsisr;
957                 vcpu->stat.pf_storage++;
958
959 #ifdef CONFIG_PPC_BOOK3S_32
960                 /* We set segments as unused segments when invalidating them. So
961                  * treat the respective fault as segment fault. */
962                 {
963                         struct kvmppc_book3s_shadow_vcpu *svcpu;
964                         u32 sr;
965
966                         svcpu = svcpu_get(vcpu);
967                         sr = svcpu->sr[dar >> SID_SHIFT];
968                         svcpu_put(svcpu);
969                         if (sr == SR_INVALID) {
970                                 kvmppc_mmu_map_segment(vcpu, dar);
971                                 r = RESUME_GUEST;
972                                 break;
973                         }
974                 }
975 #endif
976
977                 /*
978                  * We need to handle missing shadow PTEs, and
979                  * protection faults due to us mapping a page read-only
980                  * when the guest thinks it is writable.
981                  */
982                 if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
983                         int idx = srcu_read_lock(&vcpu->kvm->srcu);
984                         r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
985                         srcu_read_unlock(&vcpu->kvm->srcu, idx);
986                 } else {
987                         kvmppc_set_dar(vcpu, dar);
988                         kvmppc_set_dsisr(vcpu, fault_dsisr);
989                         kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
990                         r = RESUME_GUEST;
991                 }
992                 break;
993         }
994         case BOOK3S_INTERRUPT_DATA_SEGMENT:
995                 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
996                         kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
997                         kvmppc_book3s_queue_irqprio(vcpu,
998                                 BOOK3S_INTERRUPT_DATA_SEGMENT);
999                 }
1000                 r = RESUME_GUEST;
1001                 break;
1002         case BOOK3S_INTERRUPT_INST_SEGMENT:
1003                 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
1004                         kvmppc_book3s_queue_irqprio(vcpu,
1005                                 BOOK3S_INTERRUPT_INST_SEGMENT);
1006                 }
1007                 r = RESUME_GUEST;
1008                 break;
1009         /* We're good on these - the host merely wanted to get our attention */
1010         case BOOK3S_INTERRUPT_DECREMENTER:
1011         case BOOK3S_INTERRUPT_HV_DECREMENTER:
1012         case BOOK3S_INTERRUPT_DOORBELL:
1013         case BOOK3S_INTERRUPT_H_DOORBELL:
1014                 vcpu->stat.dec_exits++;
1015                 r = RESUME_GUEST;
1016                 break;
1017         case BOOK3S_INTERRUPT_EXTERNAL:
1018         case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
1019         case BOOK3S_INTERRUPT_EXTERNAL_HV:
1020                 vcpu->stat.ext_intr_exits++;
1021                 r = RESUME_GUEST;
1022                 break;
1023         case BOOK3S_INTERRUPT_PERFMON:
1024                 r = RESUME_GUEST;
1025                 break;
1026         case BOOK3S_INTERRUPT_PROGRAM:
1027         case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1028         {
1029                 enum emulation_result er;
1030                 ulong flags;
1031                 u32 last_inst;
1032                 int emul;
1033
1034 program_interrupt:
1035                 flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
1036
1037                 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1038                 if (emul != EMULATE_DONE) {
1039                         r = RESUME_GUEST;
1040                         break;
1041                 }
1042
1043                 if (kvmppc_get_msr(vcpu) & MSR_PR) {
1044 #ifdef EXIT_DEBUG
1045                         pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
1046                                 kvmppc_get_pc(vcpu), last_inst);
1047 #endif
1048                         if ((last_inst & 0xff0007ff) !=
1049                             (INS_DCBZ & 0xfffffff7)) {
1050                                 kvmppc_core_queue_program(vcpu, flags);
1051                                 r = RESUME_GUEST;
1052                                 break;
1053                         }
1054                 }
1055
1056                 vcpu->stat.emulated_inst_exits++;
1057                 er = kvmppc_emulate_instruction(run, vcpu);
1058                 switch (er) {
1059                 case EMULATE_DONE:
1060                         r = RESUME_GUEST_NV;
1061                         break;
1062                 case EMULATE_AGAIN:
1063                         r = RESUME_GUEST;
1064                         break;
1065                 case EMULATE_FAIL:
1066                         printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
1067                                __func__, kvmppc_get_pc(vcpu), last_inst);
1068                         kvmppc_core_queue_program(vcpu, flags);
1069                         r = RESUME_GUEST;
1070                         break;
1071                 case EMULATE_DO_MMIO:
1072                         run->exit_reason = KVM_EXIT_MMIO;
1073                         r = RESUME_HOST_NV;
1074                         break;
1075                 case EMULATE_EXIT_USER:
1076                         r = RESUME_HOST_NV;
1077                         break;
1078                 default:
1079                         BUG();
1080                 }
1081                 break;
1082         }
1083         case BOOK3S_INTERRUPT_SYSCALL:
1084         {
1085                 u32 last_sc;
1086                 int emul;
1087
1088                 /* Get last sc for papr */
1089                 if (vcpu->arch.papr_enabled) {
1090                         /* The sc instuction points SRR0 to the next inst */
1091                         emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
1092                         if (emul != EMULATE_DONE) {
1093                                 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
1094                                 r = RESUME_GUEST;
1095                                 break;
1096                         }
1097                 }
1098
1099                 if (vcpu->arch.papr_enabled &&
1100                     (last_sc == 0x44000022) &&
1101                     !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1102                         /* SC 1 papr hypercalls */
1103                         ulong cmd = kvmppc_get_gpr(vcpu, 3);
1104                         int i;
1105
1106 #ifdef CONFIG_PPC_BOOK3S_64
1107                         if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
1108                                 r = RESUME_GUEST;
1109                                 break;
1110                         }
1111 #endif
1112
1113                         run->papr_hcall.nr = cmd;
1114                         for (i = 0; i < 9; ++i) {
1115                                 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
1116                                 run->papr_hcall.args[i] = gpr;
1117                         }
1118                         run->exit_reason = KVM_EXIT_PAPR_HCALL;
1119                         vcpu->arch.hcall_needed = 1;
1120                         r = RESUME_HOST;
1121                 } else if (vcpu->arch.osi_enabled &&
1122                     (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
1123                     (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
1124                         /* MOL hypercalls */
1125                         u64 *gprs = run->osi.gprs;
1126                         int i;
1127
1128                         run->exit_reason = KVM_EXIT_OSI;
1129                         for (i = 0; i < 32; i++)
1130                                 gprs[i] = kvmppc_get_gpr(vcpu, i);
1131                         vcpu->arch.osi_needed = 1;
1132                         r = RESUME_HOST_NV;
1133                 } else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1134                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1135                         /* KVM PV hypercalls */
1136                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1137                         r = RESUME_GUEST;
1138                 } else {
1139                         /* Guest syscalls */
1140                         vcpu->stat.syscall_exits++;
1141                         kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1142                         r = RESUME_GUEST;
1143                 }
1144                 break;
1145         }
1146         case BOOK3S_INTERRUPT_FP_UNAVAIL:
1147         case BOOK3S_INTERRUPT_ALTIVEC:
1148         case BOOK3S_INTERRUPT_VSX:
1149         {
1150                 int ext_msr = 0;
1151                 int emul;
1152                 u32 last_inst;
1153
1154                 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
1155                         /* Do paired single instruction emulation */
1156                         emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
1157                                                     &last_inst);
1158                         if (emul == EMULATE_DONE)
1159                                 goto program_interrupt;
1160                         else
1161                                 r = RESUME_GUEST;
1162
1163                         break;
1164                 }
1165
1166                 /* Enable external provider */
1167                 switch (exit_nr) {
1168                 case BOOK3S_INTERRUPT_FP_UNAVAIL:
1169                         ext_msr = MSR_FP;
1170                         break;
1171
1172                 case BOOK3S_INTERRUPT_ALTIVEC:
1173                         ext_msr = MSR_VEC;
1174                         break;
1175
1176                 case BOOK3S_INTERRUPT_VSX:
1177                         ext_msr = MSR_VSX;
1178                         break;
1179                 }
1180
1181                 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1182                 break;
1183         }
1184         case BOOK3S_INTERRUPT_ALIGNMENT:
1185         {
1186                 u32 last_inst;
1187                 int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1188
1189                 if (emul == EMULATE_DONE) {
1190                         u32 dsisr;
1191                         u64 dar;
1192
1193                         dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
1194                         dar = kvmppc_alignment_dar(vcpu, last_inst);
1195
1196                         kvmppc_set_dsisr(vcpu, dsisr);
1197                         kvmppc_set_dar(vcpu, dar);
1198
1199                         kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1200                 }
1201                 r = RESUME_GUEST;
1202                 break;
1203         }
1204 #ifdef CONFIG_PPC_BOOK3S_64
1205         case BOOK3S_INTERRUPT_FAC_UNAVAIL:
1206                 kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
1207                 r = RESUME_GUEST;
1208                 break;
1209 #endif
1210         case BOOK3S_INTERRUPT_MACHINE_CHECK:
1211         case BOOK3S_INTERRUPT_TRACE:
1212                 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1213                 r = RESUME_GUEST;
1214                 break;
1215         default:
1216         {
1217                 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1218                 /* Ugh - bork here! What did we get? */
1219                 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1220                         exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1221                 r = RESUME_HOST;
1222                 BUG();
1223                 break;
1224         }
1225         }
1226
1227         if (!(r & RESUME_HOST)) {
1228                 /* To avoid clobbering exit_reason, only check for signals if
1229                  * we aren't already exiting to userspace for some other
1230                  * reason. */
1231
1232                 /*
1233                  * Interrupts could be timers for the guest which we have to
1234                  * inject again, so let's postpone them until we're in the guest
1235                  * and if we really did time things so badly, then we just exit
1236                  * again due to a host external interrupt.
1237                  */
1238                 s = kvmppc_prepare_to_enter(vcpu);
1239                 if (s <= 0)
1240                         r = s;
1241                 else {
1242                         /* interrupts now hard-disabled */
1243                         kvmppc_fix_ee_before_entry();
1244                 }
1245
1246                 kvmppc_handle_lost_ext(vcpu);
1247         }
1248
1249         trace_kvm_book3s_reenter(r, vcpu);
1250
1251         return r;
1252 }
1253
1254 static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
1255                                             struct kvm_sregs *sregs)
1256 {
1257         struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1258         int i;
1259
1260         sregs->pvr = vcpu->arch.pvr;
1261
1262         sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
1263         if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1264                 for (i = 0; i < 64; i++) {
1265                         sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
1266                         sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1267                 }
1268         } else {
1269                 for (i = 0; i < 16; i++)
1270                         sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1271
1272                 for (i = 0; i < 8; i++) {
1273                         sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
1274                         sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
1275                 }
1276         }
1277
1278         return 0;
1279 }
1280
1281 static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
1282                                             struct kvm_sregs *sregs)
1283 {
1284         struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1285         int i;
1286
1287         kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1288
1289         vcpu3s->sdr1 = sregs->u.s.sdr1;
1290         if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1291                 for (i = 0; i < 64; i++) {
1292                         vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
1293                                                     sregs->u.s.ppc64.slb[i].slbe);
1294                 }
1295         } else {
1296                 for (i = 0; i < 16; i++) {
1297                         vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
1298                 }
1299                 for (i = 0; i < 8; i++) {
1300                         kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
1301                                        (u32)sregs->u.s.ppc32.ibat[i]);
1302                         kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
1303                                        (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
1304                         kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
1305                                        (u32)sregs->u.s.ppc32.dbat[i]);
1306                         kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
1307                                        (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
1308                 }
1309         }
1310
1311         /* Flush the MMU after messing with the segments */
1312         kvmppc_mmu_pte_flush(vcpu, 0, 0);
1313
1314         return 0;
1315 }
1316
1317 static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1318                                  union kvmppc_one_reg *val)
1319 {
1320         int r = 0;
1321
1322         switch (id) {
1323         case KVM_REG_PPC_DEBUG_INST:
1324                 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1325                 break;
1326         case KVM_REG_PPC_HIOR:
1327                 *val = get_reg_val(id, to_book3s(vcpu)->hior);
1328                 break;
1329         case KVM_REG_PPC_LPCR:
1330         case KVM_REG_PPC_LPCR_64:
1331                 /*
1332                  * We are only interested in the LPCR_ILE bit
1333                  */
1334                 if (vcpu->arch.intr_msr & MSR_LE)
1335                         *val = get_reg_val(id, LPCR_ILE);
1336                 else
1337                         *val = get_reg_val(id, 0);
1338                 break;
1339         default:
1340                 r = -EINVAL;
1341                 break;
1342         }
1343
1344         return r;
1345 }
1346
1347 static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
1348 {
1349         if (new_lpcr & LPCR_ILE)
1350                 vcpu->arch.intr_msr |= MSR_LE;
1351         else
1352                 vcpu->arch.intr_msr &= ~MSR_LE;
1353 }
1354
1355 static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1356                                  union kvmppc_one_reg *val)
1357 {
1358         int r = 0;
1359
1360         switch (id) {
1361         case KVM_REG_PPC_HIOR:
1362                 to_book3s(vcpu)->hior = set_reg_val(id, *val);
1363                 to_book3s(vcpu)->hior_explicit = true;
1364                 break;
1365         case KVM_REG_PPC_LPCR:
1366         case KVM_REG_PPC_LPCR_64:
1367                 kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
1368                 break;
1369         default:
1370                 r = -EINVAL;
1371                 break;
1372         }
1373
1374         return r;
1375 }
1376
1377 static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
1378                                                    unsigned int id)
1379 {
1380         struct kvmppc_vcpu_book3s *vcpu_book3s;
1381         struct kvm_vcpu *vcpu;
1382         int err = -ENOMEM;
1383         unsigned long p;
1384
1385         vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
1386         if (!vcpu)
1387                 goto out;
1388
1389         vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
1390         if (!vcpu_book3s)
1391                 goto free_vcpu;
1392         vcpu->arch.book3s = vcpu_book3s;
1393
1394 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1395         vcpu->arch.shadow_vcpu =
1396                 kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
1397         if (!vcpu->arch.shadow_vcpu)
1398                 goto free_vcpu3s;
1399 #endif
1400
1401         err = kvm_vcpu_init(vcpu, kvm, id);
1402         if (err)
1403                 goto free_shadow_vcpu;
1404
1405         err = -ENOMEM;
1406         p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1407         if (!p)
1408                 goto uninit_vcpu;
1409         vcpu->arch.shared = (void *)p;
1410 #ifdef CONFIG_PPC_BOOK3S_64
1411         /* Always start the shared struct in native endian mode */
1412 #ifdef __BIG_ENDIAN__
1413         vcpu->arch.shared_big_endian = true;
1414 #else
1415         vcpu->arch.shared_big_endian = false;
1416 #endif
1417
1418         /*
1419          * Default to the same as the host if we're on sufficiently
1420          * recent machine that we have 1TB segments;
1421          * otherwise default to PPC970FX.
1422          */
1423         vcpu->arch.pvr = 0x3C0301;
1424         if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1425                 vcpu->arch.pvr = mfspr(SPRN_PVR);
1426         vcpu->arch.intr_msr = MSR_SF;
1427 #else
1428         /* default to book3s_32 (750) */
1429         vcpu->arch.pvr = 0x84202;
1430 #endif
1431         kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1432         vcpu->arch.slb_nr = 64;
1433
1434         vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1435
1436         err = kvmppc_mmu_init(vcpu);
1437         if (err < 0)
1438                 goto uninit_vcpu;
1439
1440         return vcpu;
1441
1442 uninit_vcpu:
1443         kvm_vcpu_uninit(vcpu);
1444 free_shadow_vcpu:
1445 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1446         kfree(vcpu->arch.shadow_vcpu);
1447 free_vcpu3s:
1448 #endif
1449         vfree(vcpu_book3s);
1450 free_vcpu:
1451         kmem_cache_free(kvm_vcpu_cache, vcpu);
1452 out:
1453         return ERR_PTR(err);
1454 }
1455
1456 static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1457 {
1458         struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1459
1460         free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1461         kvm_vcpu_uninit(vcpu);
1462 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1463         kfree(vcpu->arch.shadow_vcpu);
1464 #endif
1465         vfree(vcpu_book3s);
1466         kmem_cache_free(kvm_vcpu_cache, vcpu);
1467 }
1468
1469 static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1470 {
1471         int ret;
1472 #ifdef CONFIG_ALTIVEC
1473         unsigned long uninitialized_var(vrsave);
1474 #endif
1475
1476         /* Check if we can run the vcpu at all */
1477         if (!vcpu->arch.sane) {
1478                 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1479                 ret = -EINVAL;
1480                 goto out;
1481         }
1482
1483         /*
1484          * Interrupts could be timers for the guest which we have to inject
1485          * again, so let's postpone them until we're in the guest and if we
1486          * really did time things so badly, then we just exit again due to
1487          * a host external interrupt.
1488          */
1489         ret = kvmppc_prepare_to_enter(vcpu);
1490         if (ret <= 0)
1491                 goto out;
1492         /* interrupts now hard-disabled */
1493
1494         /* Save FPU state in thread_struct */
1495         if (current->thread.regs->msr & MSR_FP)
1496                 giveup_fpu(current);
1497
1498 #ifdef CONFIG_ALTIVEC
1499         /* Save Altivec state in thread_struct */
1500         if (current->thread.regs->msr & MSR_VEC)
1501                 giveup_altivec(current);
1502 #endif
1503
1504 #ifdef CONFIG_VSX
1505         /* Save VSX state in thread_struct */
1506         if (current->thread.regs->msr & MSR_VSX)
1507                 __giveup_vsx(current);
1508 #endif
1509
1510         /* Preload FPU if it's enabled */
1511         if (kvmppc_get_msr(vcpu) & MSR_FP)
1512                 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1513
1514         kvmppc_fix_ee_before_entry();
1515
1516         ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1517
1518         /* No need for kvm_guest_exit. It's done in handle_exit.
1519            We also get here with interrupts enabled. */
1520
1521         /* Make sure we save the guest FPU/Altivec/VSX state */
1522         kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
1523
1524         /* Make sure we save the guest TAR/EBB/DSCR state */
1525         kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
1526
1527 out:
1528         vcpu->mode = OUTSIDE_GUEST_MODE;
1529         return ret;
1530 }
1531
1532 /*
1533  * Get (and clear) the dirty memory log for a memory slot.
1534  */
1535 static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
1536                                          struct kvm_dirty_log *log)
1537 {
1538         struct kvm_memory_slot *memslot;
1539         struct kvm_vcpu *vcpu;
1540         ulong ga, ga_end;
1541         int is_dirty = 0;
1542         int r;
1543         unsigned long n;
1544
1545         mutex_lock(&kvm->slots_lock);
1546
1547         r = kvm_get_dirty_log(kvm, log, &is_dirty);
1548         if (r)
1549                 goto out;
1550
1551         /* If nothing is dirty, don't bother messing with page tables. */
1552         if (is_dirty) {
1553                 memslot = id_to_memslot(kvm->memslots, log->slot);
1554
1555                 ga = memslot->base_gfn << PAGE_SHIFT;
1556                 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1557
1558                 kvm_for_each_vcpu(n, vcpu, kvm)
1559                         kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1560
1561                 n = kvm_dirty_bitmap_bytes(memslot);
1562                 memset(memslot->dirty_bitmap, 0, n);
1563         }
1564
1565         r = 0;
1566 out:
1567         mutex_unlock(&kvm->slots_lock);
1568         return r;
1569 }
1570
1571 static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
1572                                          struct kvm_memory_slot *memslot)
1573 {
1574         return;
1575 }
1576
1577 static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
1578                                         struct kvm_memory_slot *memslot,
1579                                         struct kvm_userspace_memory_region *mem)
1580 {
1581         return 0;
1582 }
1583
1584 static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1585                                 struct kvm_userspace_memory_region *mem,
1586                                 const struct kvm_memory_slot *old)
1587 {
1588         return;
1589 }
1590
1591 static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
1592                                         struct kvm_memory_slot *dont)
1593 {
1594         return;
1595 }
1596
1597 static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
1598                                          unsigned long npages)
1599 {
1600         return 0;
1601 }
1602
1603
1604 #ifdef CONFIG_PPC64
1605 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1606                                          struct kvm_ppc_smmu_info *info)
1607 {
1608         long int i;
1609         struct kvm_vcpu *vcpu;
1610
1611         info->flags = 0;
1612
1613         /* SLB is always 64 entries */
1614         info->slb_size = 64;
1615
1616         /* Standard 4k base page size segment */
1617         info->sps[0].page_shift = 12;
1618         info->sps[0].slb_enc = 0;
1619         info->sps[0].enc[0].page_shift = 12;
1620         info->sps[0].enc[0].pte_enc = 0;
1621
1622         /*
1623          * 64k large page size.
1624          * We only want to put this in if the CPUs we're emulating
1625          * support it, but unfortunately we don't have a vcpu easily
1626          * to hand here to test.  Just pick the first vcpu, and if
1627          * that doesn't exist yet, report the minimum capability,
1628          * i.e., no 64k pages.
1629          * 1T segment support goes along with 64k pages.
1630          */
1631         i = 1;
1632         vcpu = kvm_get_vcpu(kvm, 0);
1633         if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
1634                 info->flags = KVM_PPC_1T_SEGMENTS;
1635                 info->sps[i].page_shift = 16;
1636                 info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
1637                 info->sps[i].enc[0].page_shift = 16;
1638                 info->sps[i].enc[0].pte_enc = 1;
1639                 ++i;
1640         }
1641
1642         /* Standard 16M large page size segment */
1643         info->sps[i].page_shift = 24;
1644         info->sps[i].slb_enc = SLB_VSID_L;
1645         info->sps[i].enc[0].page_shift = 24;
1646         info->sps[i].enc[0].pte_enc = 0;
1647
1648         return 0;
1649 }
1650 #else
1651 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1652                                          struct kvm_ppc_smmu_info *info)
1653 {
1654         /* We should not get called */
1655         BUG();
1656 }
1657 #endif /* CONFIG_PPC64 */
1658
1659 static unsigned int kvm_global_user_count = 0;
1660 static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1661
1662 static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1663 {
1664         mutex_init(&kvm->arch.hpt_mutex);
1665
1666 #ifdef CONFIG_PPC_BOOK3S_64
1667         /* Start out with the default set of hcalls enabled */
1668         kvmppc_pr_init_default_hcalls(kvm);
1669 #endif
1670
1671         if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1672                 spin_lock(&kvm_global_user_count_lock);
1673                 if (++kvm_global_user_count == 1)
1674                         pSeries_disable_reloc_on_exc();
1675                 spin_unlock(&kvm_global_user_count_lock);
1676         }
1677         return 0;
1678 }
1679
1680 static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1681 {
1682 #ifdef CONFIG_PPC64
1683         WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1684 #endif
1685
1686         if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1687                 spin_lock(&kvm_global_user_count_lock);
1688                 BUG_ON(kvm_global_user_count == 0);
1689                 if (--kvm_global_user_count == 0)
1690                         pSeries_enable_reloc_on_exc();
1691                 spin_unlock(&kvm_global_user_count_lock);
1692         }
1693 }
1694
1695 static int kvmppc_core_check_processor_compat_pr(void)
1696 {
1697         /* we are always compatible */
1698         return 0;
1699 }
1700
1701 static long kvm_arch_vm_ioctl_pr(struct file *filp,
1702                                  unsigned int ioctl, unsigned long arg)
1703 {
1704         return -ENOTTY;
1705 }
1706
1707 static struct kvmppc_ops kvm_ops_pr = {
1708         .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
1709         .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
1710         .get_one_reg = kvmppc_get_one_reg_pr,
1711         .set_one_reg = kvmppc_set_one_reg_pr,
1712         .vcpu_load   = kvmppc_core_vcpu_load_pr,
1713         .vcpu_put    = kvmppc_core_vcpu_put_pr,
1714         .set_msr     = kvmppc_set_msr_pr,
1715         .vcpu_run    = kvmppc_vcpu_run_pr,
1716         .vcpu_create = kvmppc_core_vcpu_create_pr,
1717         .vcpu_free   = kvmppc_core_vcpu_free_pr,
1718         .check_requests = kvmppc_core_check_requests_pr,
1719         .get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
1720         .flush_memslot = kvmppc_core_flush_memslot_pr,
1721         .prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
1722         .commit_memory_region = kvmppc_core_commit_memory_region_pr,
1723         .unmap_hva = kvm_unmap_hva_pr,
1724         .unmap_hva_range = kvm_unmap_hva_range_pr,
1725         .age_hva  = kvm_age_hva_pr,
1726         .test_age_hva = kvm_test_age_hva_pr,
1727         .set_spte_hva = kvm_set_spte_hva_pr,
1728         .mmu_destroy  = kvmppc_mmu_destroy_pr,
1729         .free_memslot = kvmppc_core_free_memslot_pr,
1730         .create_memslot = kvmppc_core_create_memslot_pr,
1731         .init_vm = kvmppc_core_init_vm_pr,
1732         .destroy_vm = kvmppc_core_destroy_vm_pr,
1733         .get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
1734         .emulate_op = kvmppc_core_emulate_op_pr,
1735         .emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
1736         .emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
1737         .fast_vcpu_kick = kvm_vcpu_kick,
1738         .arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
1739 #ifdef CONFIG_PPC_BOOK3S_64
1740         .hcall_implemented = kvmppc_hcall_impl_pr,
1741 #endif
1742 };
1743
1744
1745 int kvmppc_book3s_init_pr(void)
1746 {
1747         int r;
1748
1749         r = kvmppc_core_check_processor_compat_pr();
1750         if (r < 0)
1751                 return r;
1752
1753         kvm_ops_pr.owner = THIS_MODULE;
1754         kvmppc_pr_ops = &kvm_ops_pr;
1755
1756         r = kvmppc_mmu_hpte_sysinit();
1757         return r;
1758 }
1759
1760 void kvmppc_book3s_exit_pr(void)
1761 {
1762         kvmppc_pr_ops = NULL;
1763         kvmppc_mmu_hpte_sysexit();
1764 }
1765
1766 /*
1767  * We only support separate modules for book3s 64
1768  */
1769 #ifdef CONFIG_PPC_BOOK3S_64
1770
1771 module_init(kvmppc_book3s_init_pr);
1772 module_exit(kvmppc_book3s_exit_pr);
1773
1774 MODULE_LICENSE("GPL");
1775 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1776 MODULE_ALIAS("devname:kvm");
1777 #endif